Memory resource management method and device, electronic equipment and storage medium

CN122195655APending Publication Date: 2026-06-12SHANGHAI BIREN TECH CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SHANGHAI BIREN TECH CO LTD
Filing Date
2026-03-10
Publication Date
2026-06-12

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Abstract

The application provides a memory resource management method and device, electronic equipment and a storage medium, and belongs to the technical field of memory scheduling. The memory resource management method comprises the following steps: receiving a memory access request, and the thread group of the memory access request is a first thread group; in the case of determining whether there is a memory access conflict between the first thread group and an old thread group in a memory space configuration table based on the memory access request and the obtained memory space configuration table, determining a target old thread group with a memory access conflict; starting a memory fence instruction for each target old thread group; releasing the memory resources occupied by the target old thread group, and allocating expected memory space to the first thread group. The accurate memory fence instruction ensures the data consistency in the resource reuse process, thereby solving the fatal problem of data trampling and verification failure caused by the asynchrony between memory configuration updating and instruction execution in the prior art, and significantly improving the robustness and automation degree of the verification environment.
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Description

Technical Field

[0001] This invention relates to the field of memory scheduling technology, and in particular to a memory resource management method, apparatus, electronic device, and storage medium. Background Technology

[0002] In the architectures of modern high-performance processors, especially graphics processing units (GPUs) and various parallel computing accelerators, thread groups are the basic units for executing parallel tasks. Multiple thread groups often need to concurrently access a shared memory region, such as global shared memory, to complete data exchange and collaborative work. Therefore, during the processor design verification phase, conducting comprehensive and reliable verification of the memory access management mechanism of thread groups is a crucial step in ensuring the correctness of processor functionality and system stability.

[0003] In existing processor verification environments, the management of thread group memory resources typically employs a straightforward approach. For example, when writing test cases, verification engineers need to explicitly pre-allocate memory for each thread group to be run, or manually request a memory space of a fixed size and base address at runtime. This management method is still applicable in simple, serial verification scenarios.

[0004] However, with the continuous improvement of processor parallelism and the increasing complexity of application scenarios, the above-mentioned manual and static memory management schemes are prone to problems such as memory access conflicts and address overlap, which seriously affect the efficiency of memory resource management. Summary of the Invention

[0005] This invention provides a memory resource management method, apparatus, electronic device, and storage medium to address the shortcomings of existing manual and static memory management schemes, which are prone to memory access conflicts and address overlap, thereby achieving safe, efficient, and automated memory resource management.

[0006] This invention provides a memory resource management method, comprising the following steps.

[0007] Receive memory access requests, wherein the thread group for the memory access requests is the first thread group; If, based on the memory access request and the obtained memory space configuration table, it is determined that there is a memory access conflict between the first thread group and the old thread group in the memory space configuration table, the target old thread group with the memory access conflict is determined. For each of the target old thread groups, initiate a memory fence instruction; Release the memory resources occupied by the target old thread group and allocate the expected memory space to the first thread group.

[0008] According to a memory resource management method provided by the present invention, the memory access request includes a unique identifier of the first thread group and a unique identifier of the context to which the first thread group belongs; The memory resource management method further includes: In the memory space configuration table, identify the target thread group that has the same unique identifier as the first thread group; Based on the inconsistency between the unique identifier of the context to which the first thread group belongs and the unique identifier of the context to which the target thread group belongs, it is determined that there is a memory access conflict between the first thread group and the old thread group.

[0009] According to a memory resource management method provided by the present invention, the memory access request further includes the memory space size expected by the first thread group; The memory resource management method further includes: Since no target thread group with the same unique identifier as the first thread group was found in the memory space configuration table, the expected memory space of the first thread group was determined based on the starting address of the next thread group to be allocated and the expected memory space size of the first thread group. Based on the overlap between the memory space expected by the first thread group and the memory space occupied by the old thread group whose configuration status is valid in the memory space configuration table, it is determined that there is a memory access conflict between the first thread group and the old thread group.

[0010] According to a memory resource management method provided by the present invention, when there are multiple second thread groups, the following operations are performed sequentially on the multiple second thread groups: The memory fence instruction is executed for the selected second thread group; Release the memory resources occupied by the selected second thread group; The second thread group is the old thread group whose configuration status is valid in the memory space configuration table and which is the target old thread group whose memory space overlaps with that of the first thread group.

[0011] According to a memory resource management method provided by the present invention, the memory resource management method further includes: Based on the premise that the memory space expected by the first thread group does not overlap with the memory space occupied by one or more currently active old thread groups in the memory space configuration table, and that the configuration status of the first thread group is valid, the memory space configuration table is updated based on the memory space expected by the first thread group; and The starting address of the next thread group to be allocated is updated based on the end address of the memory space expected by the first thread group.

[0012] According to a memory resource management method provided by the present invention, before receiving a memory access request for a first thread group, the memory resource management method further includes: Receive instructions to select random access mode; In response to the selection instruction, a unique identifier for the first thread group and a unique identifier for the context to which the first thread group belongs are randomly configured.

[0013] According to a memory resource management method provided by the present invention, releasing the memory resources occupied by the target old thread group includes: Delete the entry corresponding to the target old thread group from the memory space configuration table.

[0014] The present invention also provides a memory resource management device, comprising the following modules: A receiving module is used to receive memory access requests, wherein the thread group of the memory access request is the first thread group; The determination module is used to determine the target old thread group with memory access conflict when it is determined that the first thread group and the old thread group in the memory space configuration table have memory access conflict based on the memory access request and the obtained memory space configuration table. The processing module is used to initiate a memory fence instruction for each of the target old thread groups; The adjustment module is used to release the memory resources occupied by the target old thread group and allocate the expected memory space to the first thread group.

[0015] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the memory resource management method described above.

[0016] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the memory resource management method as described above.

[0017] The present invention also provides a computer program product, including a computer program that, when executed by a processor, implements the memory resource management method described above.

[0018] The present invention provides a memory resource management method, apparatus, electronic device and storage medium that ensures data consistency during resource reuse through precise memory fence instructions, thereby solving the fatal problem of data trampling and verification failure caused by asynchronous memory configuration updates and instruction execution in the prior art, and significantly improving the robustness and automation of the verification environment. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0020] Figure 1 This is one of the flowcharts of the memory resource management method provided by the present invention.

[0021] Figure 2 This is the second flowchart of the memory resource management method provided by the present invention.

[0022] Figure 3 This is the third flowchart of the memory resource management method provided by the present invention.

[0023] Figure 4 This is the fourth flowchart of the memory resource management method provided by the present invention.

[0024] Figure 5 This is a schematic diagram of the memory space configuration table provided by the present invention.

[0025] Figure 6 This is one of the schematic diagrams for detecting memory access conflicts provided by the present invention.

[0026] Figure 7 This is the second schematic diagram of the memory access conflict detection provided by the present invention.

[0027] Figure 8 This is the fifth flowchart of the memory resource management method provided by the present invention.

[0028] Figure 9 This is a flowchart illustrating the processing flow for cross-conflicts provided by the present invention.

[0029] Figure 10 This is a schematic diagram of the memory resource management device provided by the present invention.

[0030] Figure 11 This is a schematic diagram of the structure of the electronic device provided by the present invention.

[0031] Figure label: 1001: Receiver module; 1002: Determiner module; 1003: Processing module; 1004: Adjustment module; 1110: Processor; 1120: Communication interface; 1130: Memory; 1140: Communication bus. Detailed Implementation

[0032] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0033] The following is combined Figures 1 to 11 The present invention describes a memory resource management method, apparatus, electronic device, and storage medium.

[0034] This invention provides a memory resource management method, which can be executed by a dedicated hardware logic unit, firmware program, or software module running in a processor verification environment. In a preferred embodiment, the execution entity of this method can be a thread group controller (TGController) integrated in the verification environment. This controller is responsible for uniformly and automatically managing thread group access to Global Shared Memory (GSM).

[0035] Figure 1 This is one of the flowcharts illustrating the memory resource management method provided by the present invention, such as... Figure 1 As shown, the method includes the following: Step 101: Receive memory access requests. The thread group for the memory access requests is the first thread group.

[0036] The first thread group can be understood as any thread group that needs to initiate memory access, but whose memory configuration has not yet been confirmed or allocated by the system at the current moment. This could be a thread group associated with a newly started task, or a newly created thread group within an executing task that needs to dynamically request memory resources.

[0037] In some embodiments, the first thread group can be a new thread group or an old thread group that already exists in the memory space configuration table.

[0038] In some embodiments, memory access requests can be received by the execution entity in various forms. For example, it can be a memory access instruction in the processor instruction stream, which is monitored or decoded by the execution entity (such as a thread group controller); or it can be an explicit request issued by a test case in a verification platform to the execution entity through a specific interface function call. This request contains relevant information sufficient to identify the first thread group.

[0039] Step 102: If it is determined that there is a memory access conflict between the first thread group and the old thread group in the memory space configuration table based on the memory access request and the obtained memory space configuration table, determine the target old thread group with the memory access conflict.

[0040] The memory space configuration table is a key data structure maintained internally by the execution entity, used to record the status information of all currently active thread groups occupying memory resources. This table can be a register file, a dedicated on-chip memory, or a lookup table maintained by the verification environment software. Each entry in the table is associated with at most one old thread group.

[0041] Among them, the old thread group refers to the thread group that has been recorded in the memory space configuration table when the current memory access request is received, and whose status is valid.

[0042] Step 103: For each target old thread group, initiate a memory fence instruction.

[0043] In this step, when a conflict is detected, the resources of the old thread group are not immediately forcibly reclaimed. Instead, a memory fence instruction is first initiated for each old thread group that is determined to be in conflict.

[0044] The essential purpose of the memory fence instruction is to establish a reliable synchronization point. Its function is to ensure that all instructions in transit that were issued before this instruction was initiated and that depend on the memory configuration of the old thread group (such as its memory base address and range) can be completed within the processor's deep pipeline. Instructions in transit here refer to those that have entered the processor's execution pipeline but have not yet completed all stages (especially memory access and write-back stages). This instruction effectively prevents subsequent resource releases from affecting these still-executing instructions.

[0045] In one possible implementation, the memory fence instruction suspends the execution of subsequent instructions until all memory operations preceding it that are related to the old thread group have been completed.

[0046] Step 104: Release the memory resources occupied by the target old thread group and allocate the expected memory space to the first thread group.

[0047] Once the memory fence instruction has finished executing, it means that all in-transit instructions related to the target old thread group have been completed, and it is absolutely safe to release its resources at this point.

[0048] Specifically, after the memory fence instruction is executed, the memory resources occupied by the target old thread group are released, and the expected memory space is allocated to the first thread group.

[0049] Releasing memory resources occupied by the target old thread group is an automated process. For example, the executing entity can mark the entry corresponding to the target old thread group in the memory space allocation table as invalid or remove it directly. This process is transparent to upper-layer applications (such as test cases), achieving implicit and automated release, which greatly simplifies the writing of verification stimuli. After the release is completed, the memory area previously occupied by the conflicting target old thread group becomes free. At this point, this memory space can be safely allocated to the waiting first thread group, and the memory space allocation table can be updated to reflect the new allocation status.

[0050] In this embodiment, the reclamation of memory resources is bound to the request for new resources, and data consistency during resource reuse is ensured through precise processing operations. This solves the fatal problem of data trampling and verification failure caused by asynchronous memory configuration updates and instruction execution in the prior art, and significantly improves the robustness and automation of the verification environment.

[0051] In some embodiments, according to a memory resource management method provided by the present invention, a memory access request includes a unique identifier of a first thread group and a unique identifier of the context to which the first thread group belongs.

[0052] The unique identifier `tg_id` for the first thread group is typically unique within a context. The unique identifier `ctxt_id` of the context to which the first thread group belongs distinguishes it from different applications or management domains. In parallel processors, a context is a logical container that manages a range of GPU resources (such as memory, command queues, etc.), and resources between different contexts are usually isolated. Therefore, a memory access request can accurately indicate its origin by carrying both `ctxt_id` and `tg_id`.

[0053] like Figure 2 As shown, memory resource management methods also include: Step 201: Determine the target thread group that has the same unique identifier as the first thread group in the memory space configuration table.

[0054] Specifically, the unique identifier (i.e., tg_id) of the first thread group is extracted from the received memory access request. Then, this identifier is used as an index or key to search the internally maintained memory space configuration table. If the search is successful, that is, if an entry is found whose thread group identifier is exactly the same as that of the first thread group, then the thread group that is found and already exists in the table is the target thread group.

[0055] Step 202: Based on the inconsistency between the unique identifier of the context to which the first thread group belongs and the unique identifier of the context to which the target thread group belongs, it is determined that there is a memory access conflict between the first thread group and the old thread group.

[0056] After finding a target thread group with the same tg_id, its context identifiers are further compared. It extracts the ctxt_id of the first thread group from the memory access request and reads its stored ctxt_id from the target thread group entry in the memory space configuration table. If these two ctxt_ids are inconsistent, the system determines that a memory access conflict has occurred.

[0057] For example, referring to random memory access mode, the system might generate a test scenario: a thread group (e.g., tg_id 5) belonging to context A (e.g., ctxt_id is 0) is running, and its configuration information is recorded in the memory space configuration table. At this time, a new memory access request is received from a first thread group belonging to context B (e.g., ctxt_id is 1), and the tg_id of this first thread group is also exactly 5. The execution entity then looks up the target thread group with tg_id 5 in the configuration table and finds that its ctxt_id is 0, which is inconsistent with the ctxt_id of the new request (which is 1), thus determining that a memory access conflict exists.

[0058] Once a conflict is identified according to this rule, a memory fence instruction is initiated for the old thread group with the conflict (i.e., the thread group with tg_id 5 in context A) to ensure that its in-transit instructions are completed, and then the resources it occupies are safely released. Finally, the freed-up resources are allocated to the new thread group (i.e., the thread group with tg_id 5 in context B).

[0059] In this embodiment, resource contention issues arising from different contexts using the same thread group identifier can be accurately identified and handled. This enables the verification system to support more complex concurrent access patterns, especially in verification scenarios where multiple tasks and applications coexist on the same processor. It effectively prevents configuration information between contexts from being accidentally overwritten, thereby ensuring the correctness of memory management and the stability of the system in complex concurrent scenarios, and significantly improving the coverage and reliability of verification.

[0060] In some embodiments, the memory access request may also include the memory space size anticipated by the first thread group.

[0061] The memory space size `tg_size` specifies the amount of contiguous memory space required by the first thread group. This size information is the basis for physical memory layout and conflict detection.

[0062] like Figure 3As shown, the memory resource management method also includes: Step 301: Based on the fact that no target thread group with the same unique identifier as the first thread group was found in the memory space configuration table, the expected memory space of the first thread group was determined based on the starting address of the next thread group to be allocated and the expected memory space size of the first thread group.

[0063] The starting address of the next thread group to be allocated is a key state variable maintained internally by the execution entity (such as the thread group controller). For example, it can be a write pointer (wr_ptr), which always points to the beginning of the currently free area in the Global Shared Memory (GSM) for the next allocation. By reading this starting address and combining it with the memory space size carried in the memory access request, the execution entity can calculate the expected physical memory usage range of the first thread group, for example, a continuous address range from [starting address] to [starting address + memory space size - 1].

[0064] Step 302: Based on the overlap between the expected memory space of the first thread group and the memory space occupied by the old thread group whose configuration status is valid in the memory space configuration table, it is determined that there is a memory access conflict between the first thread group and the old thread group.

[0065] In this step, the expected memory space range of the first thread group is compared with the actual memory range occupied by each old thread group with a valid configuration status, as recorded in the memory space configuration table. If any intersection or overlap is found in the addresses, a memory access conflict is determined to have occurred.

[0066] For example, suppose the write pointer `wr_ptr` currently points to address 0x1000. At this time, a request is received from the first thread group, whose `tg_size` is 0x800. The system calculates its expected memory space to be [0x1000, 0x17FF]. Subsequently, the system checks the memory space allocation table and finds that an old thread group occupies memory space [0x1400, 0x1FFF]. Since [0x1000, 0x17FF] and [0x1400, 0x1FFF] have an overlapping region [0x1400, 0x17FF], a memory access conflict is determined. In this case, the old thread group occupying [0x1400, 0x1FFF] is the conflicting old thread group.

[0067] Once such a physical overlap conflict is detected, the system will execute memory fence instructions for the target old thread group (or these conflicting threads), that is, by sending Fence instructions or other means, to ensure that all instructions in transit are completed.

[0068] In this embodiment, memory conflict detection is extended from the logical identifier level to the physical address level. When memory resources are insufficient for sequential allocation, this mechanism can automatically identify and reclaim space occupied by old thread groups whose tasks may have ended, even though they are still recorded, thereby achieving dynamic memory reorganization and efficient reuse. This greatly improves memory resource utilization and makes the entire memory management system more adaptable and robust to complex and unpredictable random memory access scenarios.

[0069] In some embodiments, when there are multiple second thread groups, the following operations are performed sequentially on the multiple second thread groups: Execute the memory fence instruction for the selected second thread group; Release the memory resources occupied by the selected second thread group; The second thread group is the old thread group whose configuration status is valid in the memory space configuration table and whose target old thread group has overlapping memory space with the expected memory space of the first thread group.

[0070] In this embodiment, the above two steps are repeated until all target old thread groups in the conflict set have been processed. Once the resources of the last conflicting target old thread group are released, the memory space that was originally occupied by multiple old thread groups and is now completely cleared can be allocated as a whole to the waiting first thread group.

[0071] For example, suppose a first thread group requests a 2KB memory block with an expected memory space of [0x2000, 0x27FF]. When the execution entity checks the memory space allocation table, it finds that this area overlaps with two older thread groups: older thread group A occupies [0x1800, 0x23FF], and older thread group B occupies [0x2400, 0x25FF]. The system will then process the requests sequentially: selecting older thread group A and initiating its processing operation. After the processing operation is complete, the resources of older thread group A are released. Next, selecting older thread group B and initiating its processing operation. After the processing operation is complete, the resources of older thread group B are released. This processing operation is the same as the process of executing the memory fence instruction and releasing it, as described earlier.

[0072] After the two old thread groups mentioned above are safely removed, the first thread group can obtain the complete memory space of [0x2000, 0x27FF].

[0073] In this embodiment, problems such as resource contention or deadlock that may be caused by processing multiple conflicts at the same time are avoided, so that the automated memory reclamation mechanism can still maintain high reliability and robustness when facing extremely complex verification scenarios.

[0074] In some embodiments, the memory resource management method further includes: Based on the premise that the memory space expected by the first thread group does not overlap with the memory space occupied by one or more currently active old thread groups in the memory space configuration table, and that the configuration status of the first thread group is valid, update the memory space configuration table based on the expected memory space of the first thread group; and Update the starting address of the next thread group to be allocated based on the end address of the memory space expected for the first thread group.

[0075] In this embodiment, updating the memory space configuration table refers to creating a new entry for the first thread group in the memory space configuration table. This new entry will record key configuration information, including but not limited to: the unique identifier of the first thread group (tg_id), the unique identifier of its context (ctxt_id), the memory base address allocated to it (i.e., the value of the current write pointer wr_ptr), and its memory space size (tg_size). After this entry is created, its status is set to valid, indicating that the thread group has officially become an activated, memory-consuming old thread group.

[0076] The starting address of the next thread group to be allocated is the write pointer wr_ptr. After successfully allocating memory for the first thread group, this pointer must move forward to point to the next available free memory address.

[0077] Specifically, the calculation method is: new wr_ptr value = old wr_ptr value + memory space size allocated to the first thread group.

[0078] For example: Suppose the starting address (wr_ptr) of the next thread group to be allocated, maintained internally by the execution entity, is 0x2000. A memory access request is received from the first thread group, requesting a memory space size (tg_size) of 0x1000. The expected memory space is calculated to be [0x2000, 0x2FFF], and compared with all active old thread groups in the memory space configuration table. Finding no address overlap, a new entry is created in the memory space configuration table, recording the first thread group's tg_id and ctxt_id, and its memory base address is set to 0x2000, and its size to 0x1000. The value of wr_ptr is updated to 0x2000 + 0x1000 = 0x3000. Thus, the next memory allocation request will attempt to allocate memory starting from address 0x3000.

[0079] In this embodiment, it is ensured that memory resources can be allocated in an orderly and efficient manner during the verification process, and the continuity and consistency of the memory layout of the entire verification environment are guaranteed by accurately maintaining the state of the memory allocation pointer.

[0080] In some embodiments, such as Figure 4 As shown, before receiving memory access requests for the first thread group, the memory resource management method further includes: Step 401: Receive the random access memory mode selection instruction.

[0081] Random memory access mode refers to a verification mode that differs from deterministic testing (i.e., where verification engineers manually write fixed access sequences). In this mode, the system automatically generates a series of unpredictable but rule-compliant memory access requests.

[0082] In some embodiments, a selection instruction acts as a switch to activate this mode. This instruction can be issued by a higher-level verification environment (e.g., the main test platform or test case). Specifically, the instruction can be received in various ways; for example, a verification engineer can activate the mode by writing a preset value to a specific configuration register of the execution entity (such as a thread group controller); or, during the test case startup phase, by calling a specific function to notify the execution entity to enter random access mode.

[0083] Step 402: In response to the selection command, randomly configure the unique identifier of the first thread group and the unique identifier of the context to which the first thread group belongs.

[0084] In this context, random configuration is not completely unordered randomness, but rather constrained randomness. For example, some rules or constraints are set in advance to guide the random number generator to produce parameter combinations with specific characteristics.

[0085] For example, configurable random access modes include: Different contexts, different thread group identifiers, i.e. different ctxt_id, different tg_id.

[0086] Different contexts, same thread group identifier, i.e. different ctxt_id, same tg_id: The random generator is constrained to generate two unique identifiers (ctxt_id) for two different contexts, but their unique identifiers (tg_id) for the thread group are constrained to be the same.

[0087] Within the same context, different thread group identifiers (i.e., the same ctxt_id but different tg_id): a random generator produces the same ctxt_id, but different tg_ids. This is used to test memory allocation and management capabilities when dynamically creating multiple different thread groups within the same context.

[0088] Same context, same thread group identifier, i.e. same ctxt_id, same tg_id: This can be used to test system behavior when the same thread group is configured or accessed repeatedly.

[0089] In this embodiment, various simple or complex memory access sequences can be generated automatically and in large quantities. These randomly configured ctxt_id and tg_id are used to construct subsequent memory access requests, which are then sent to the core logic of memory management for processing.

[0090] This process frees verification engineers from the arduous task of manually writing numerous complex test cases to trigger boundary conditions. By simply setting constraints, it can automatically and tirelessly explore every corner of the system design, especially reliably reproducing concurrent conflict scenarios that are difficult to construct and cover manually, thus significantly improving verification coverage and enabling the discovery of potential design flaws earlier and more effectively.

[0091] In some embodiments, releasing the memory resources occupied by the target old thread group includes: Delete the entry corresponding to the target old thread group from the memory space configuration table.

[0092] The memory space configuration table is a core data structure used by the execution entity (such as the thread group controller) to track and manage all currently active thread groups. Each active old thread group has a corresponding entry in this table, which records all configuration information of this thread group, such as its unique identifier (tg_id), the unique identifier of its context (ctxt_id), the base address of the memory it occupies, and the memory size.

[0093] In some embodiments, deleting an entry corresponding to a target old thread group can be done by directly removing the entry from the memory space allocation table data structure. If the table is a linked list or a dynamic array, this means performing a standard node or element deletion operation.

[0094] In some embodiments, deleting an entry corresponding to a target old thread group can be done by invalidating the target old thread group.

[0095] In this embodiment, resource release is achieved by deleting configuration table entries. The entire operation (whether physical or logical deletion) is automatically completed internally by the executing entity, making it completely transparent to upper-layer test cases or applications. They do not need to and cannot call an explicit release function. This design avoids repeatedly implementing similar resource management functions in test cases, thereby significantly reducing the development burden and error risk of the verification environment.

[0096] In some embodiments, such as Figure 5As shown, each entry in the memory space configuration table includes valid, tg_id, ctxt_id, base_addr, and size. Here, valid indicates whether the thread group corresponding to the entry is valid, tg_id is the unique identifier of the thread group, ctxt_id is the unique identifier of the context to which the thread group belongs, base_addr is the base address of the memory space occupied by the thread group, and size is the size of the memory space occupied by the thread group.

[0097] For example, the values ​​of valid, tg_id, ctxt_id, base_addr, and size are 1, 0, 0, 0x2000, and 0x1000, respectively.

[0098] For example, the values ​​of valid, tg_id, ctxt_id, base_addr, and size are 1, 1, 1, 0x3000, and 0x2000, respectively.

[0099] like Figure 5 and Figure 6 As shown, the following process is used to determine whether a memory access conflict exists.

[0100] Step 601: Receive a memory access request for the first thread group, tg_id=1, ctxt_id=1.

[0101] Step 602: Query the memory space configuration table and find that tg_id=1 exists.

[0102] Step 603: Check that tg_id=1 in the context table belongs to ctxt_id=0.

[0103] Step 604: Determine if a memory access conflict exists, trigger a processing operation to reclaim the memory resources occupied by the old thread group.

[0104] like Figure 5 and Figure 7 As shown, the following process is used to determine whether a memory access conflict exists.

[0105] Step 701: Receive a memory access request for the first thread group, tg_id=1, ctxt_id=0, size=0x1000.

[0106] Step 702: Query the memory space configuration table and find that tg_id=1 does not exist.

[0107] Step 703: Starting from cur_wptr=0x1000, allocate a new interval [0x1000, 0x2000].

[0108] Step 704: The new interval [0x1000, 0x2000] overlaps with the memory intervals corresponding to other thread groups.

[0109] Step 705: Determine if a memory access conflict exists, trigger a processing operation to reclaim the memory resources occupied by the old thread group.

[0110] In some embodiments, such as Figure 8 As shown, memory resource management methods include: Step 801: Received a memory access request for the first thread group.

[0111] Step 802: Parse tg_id and ctxt_id, and query the memory space configuration table.

[0112] Step 803: Memory access conflict detection.

[0113] Step 804: If a conflict is found with tg_id, proceed to step 805 if the result is yes, and proceed to step 806 if the result is no.

[0114] Step 805: Fence the old thread group.

[0115] In step 806, there is a cross conflict between tg. If the judgment result is yes, proceed to step 807; if the judgment result is no, proceed to step 808.

[0116] Step 807: Fence all cross tg.

[0117] Step 808: If tg_id is valid in the memory space configuration table, proceed to step 809 if the result is yes, and proceed to step 811 if the result is no.

[0118] Step 809: Allow instruction issuance.

[0119] Step 810: Update the memory space configuration table; the old tg is invalid.

[0120] Step 811: Perform dynamic memory allocation.

[0121] Step 812: Configure entries in the memory space configuration table.

[0122] Step 813: Execute tg_id configuration.

[0123] Fence, in this invention, is the memory fence instruction.

[0124] In some embodiments, such as Figure 9 As shown, the handling process for cross-conflicts includes: Step 901: Query the size of tg in the current ctxt_id.

[0125] Step 902: Based on the memory space configuration table, find all old TGs that intersect with the issued TG.

[0126] Step 903: Send Fence.

[0127] Step 904: Wait for the old tg to be released.

[0128] The memory resource management device provided by the present invention is described below. The memory resource management device described below can be referred to in correspondence with the memory resource management method described above.

[0129] The present invention also provides a memory resource management device, such as... Figure 10 As shown, it includes the following modules: The receiving module 1001 is used to receive memory access requests, and the thread group for the memory access requests is the first thread group; The determination module 1002 is used to determine the target old thread group with memory access conflict when it is determined that there is a memory access conflict between the first thread group and the old thread group in the memory space configuration table based on the memory access request and the obtained memory space configuration table. Processing module 1003 is used to initiate a memory fence instruction for each target old thread group; Adjustment module 1004 is used to release the memory resources occupied by the target old thread group and allocate the expected memory space to the first thread group.

[0130] Figure 11 An example is a schematic diagram of the physical structure of an electronic device, such as... Figure 11 As shown, the electronic device may include: a processor 1110, a communication interface 1120, a memory 1130, and a communication bus 1140, wherein the processor 1110, the communication interface 1120, and the memory 1130 communicate with each other through the communication bus 1140. The processor 1110 can call logical instructions in the memory 1130 to execute a memory resource management method, which includes: receiving a memory access request, wherein the thread group requesting the memory access request is a first thread group; if it is determined, based on the memory access request and the obtained memory space configuration table, that there is a memory access conflict between the first thread group and an old thread group in the memory space configuration table, determining the target old thread group with the memory access conflict; for each target old thread group, initiating a memory fence instruction; releasing the memory resources occupied by the target old thread group, and allocating the expected memory space to the first thread group.

[0131] Furthermore, the logical instructions in the aforementioned memory 1130 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0132] On the other hand, the present invention also provides a computer program product, which includes a computer program that can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer is able to execute the memory resource management method provided by the above methods. The method includes: receiving a memory access request, wherein the thread group of the memory access request is a first thread group; determining, based on the memory access request and an acquired memory space configuration table, that there is a memory access conflict between the first thread group and an old thread group in the memory space configuration table, a target old thread group with a memory access conflict; initiating a memory fence instruction for each target old thread group; releasing the memory resources occupied by the target old thread group and allocating the expected memory space to the first thread group.

[0133] In another aspect, the present invention also provides a non-transitory computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the memory resource management method provided by the above methods. The method includes: receiving a memory access request, wherein the thread group of the memory access request is a first thread group; determining, based on the memory access request and an acquired memory space configuration table, that there is a memory access conflict between the first thread group and an old thread group in the memory space configuration table, a target old thread group with a memory access conflict; initiating a memory fence instruction for each target old thread group; releasing the memory resources occupied by the target old thread group and allocating the expected memory space to the first thread group.

[0134] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0135] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., including several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods of various embodiments or some parts of embodiments.

[0136] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A memory resource management method, characterized in that, include: Receive memory access requests, wherein the thread group for the memory access requests is the first thread group; If, based on the memory access request and the obtained memory space configuration table, it is determined that there is a memory access conflict between the first thread group and the old thread group in the memory space configuration table, the target old thread group with the memory access conflict is determined. For each of the target old thread groups, initiate a memory fence instruction; Release the memory resources occupied by the target old thread group and allocate the expected memory space to the first thread group.

2. The memory resource management method according to claim 1, characterized in that, The memory access request includes the unique identifier of the first thread group and the unique identifier of the context to which the first thread group belongs; The memory resource management method further includes: In the memory space configuration table, identify the target thread group that has the same unique identifier as the first thread group; Based on the inconsistency between the unique identifier of the context to which the first thread group belongs and the unique identifier of the context to which the target thread group belongs, it is determined that there is a memory access conflict between the first thread group and the old thread group.

3. The memory resource management method according to claim 2, characterized in that, The memory access request also includes the memory space size expected by the first thread group; The memory resource management method further includes: Since no target thread group with the same unique identifier as the first thread group was found in the memory space configuration table, the expected memory space of the first thread group was determined based on the starting address of the next thread group to be allocated and the expected memory space size of the first thread group. Based on the overlap between the memory space expected by the first thread group and the memory space occupied by the old thread group whose configuration status is valid in the memory space configuration table, it is determined that there is a memory access conflict between the first thread group and the old thread group.

4. The memory resource management method according to claim 3, characterized in that, If there are multiple second thread groups, perform the following operations sequentially on each of the multiple second thread groups: The memory fence instruction is executed for the selected second thread group; Release the memory resources occupied by the selected second thread group; The second thread group is the old thread group whose configuration status is valid in the memory space configuration table and which is the target old thread group whose memory space overlaps with that of the first thread group.

5. The memory resource management method according to claim 3, characterized in that, The memory resource management method further includes: Based on the premise that the memory space expected by the first thread group does not overlap with the memory space occupied by one or more currently active old thread groups in the memory space configuration table, and that the configuration status of the first thread group is valid, the memory space configuration table is updated based on the memory space expected by the first thread group; and The starting address of the next thread group to be allocated is updated based on the end address of the memory space expected by the first thread group.

6. The memory resource management method according to claim 2, characterized in that, Before receiving the memory access request for the first thread group, the memory resource management method further includes: Receive instructions to select random access mode; In response to the selection instruction, a unique identifier for the first thread group and a unique identifier for the context to which the first thread group belongs are randomly configured.

7. The memory resource management method according to any one of claims 1 to 6, characterized in that, The release of memory resources occupied by the target old thread group includes: Delete the entry corresponding to the target old thread group from the memory space configuration table.

8. A memory resource management device, characterized in that, include: A receiving module is used to receive memory access requests, wherein the thread group of the memory access request is the first thread group; The determination module is used to determine the target old thread group with memory access conflict when it is determined that the first thread group and the old thread group in the memory space configuration table have memory access conflict based on the memory access request and the obtained memory space configuration table. The processing module is used to initiate a memory fence instruction for each of the target old thread groups; The adjustment module is used to release the memory resources occupied by the target old thread group and allocate the expected memory space to the first thread group.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and running on the processor, characterized in that, When the processor executes the computer program, it implements the memory resource management method as described in any one of claims 1 to 7.

10. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the memory resource management method as described in any one of claims 1 to 7.