Analog-digital circuit hybrid simulation method, device and electronic equipment

Abstract

The application provides an analog-digital circuit hybrid simulation method and device and electronic equipment. The method comprises the following steps: acquiring an output voltage range of an analog circuit input into a digital circuit; mapping the output voltage range into an input value range of the digital circuit; determining a plurality of different duty cycle digital signals according to input values in the digital circuit and different threshold values; determining a simulation output signal of the digital circuit based on the plurality of different duty cycle digital signals, so as to analyze the simulation output signal and obtain the influence of the analog circuit on the digital circuit. The simulation of the analog circuit involved in the analog-digital circuit hybrid simulation is converted into the simulation of the digital circuit, instead of the real hybrid simulation, so that time can be saved, efficiency can be improved, and the requirement of verifying the fastest convergence can be met.

Description

Technical Field

[0001] This application relates to the field of circuit simulation technology, and in particular to a method, apparatus and electronic device for hybrid analog-digital circuit simulation. Background Technology

[0002] Currently, there are three simulation methods in the chip simulation and verification stage on the market: digital simulation, analog simulation, and hybrid digital-analog simulation.

[0003] Current mixed-signal simulation requires synthesizing RTL code into a netlist file. Only after the netlist file is complete can the mixed simulation of analog and digital circuits begin, failing to meet the requirement for early convergence in verification. Furthermore, because mixed-signal simulation requires loading detailed circuit parameter information, its efficiency is low, and iteration times are long, again failing to meet the requirement for rapid convergence in verification. Summary of the Invention

[0004] The purpose of this application is to provide a method, apparatus, and electronic device for mixed analog-digital circuit simulation, which converts the simulation of analog circuits involved in mixed analog-digital circuit simulation into the simulation of digital circuits, replacing the actual mixed simulation, thereby saving time, improving efficiency, and meeting the requirement of rapid convergence in verification.

[0005] In a first aspect, this application provides a hybrid analog-digital circuit simulation method, the method comprising: obtaining the output voltage range from the analog circuit input to the digital circuit; mapping the output voltage range to the input value range of the digital circuit; within the input value range, determining multiple different duty cycle digital signals based on the input values ​​inside the digital circuit and different thresholds; and determining the simulation output signal of the digital circuit based on the multiple different duty cycle digital signals, so as to analyze the simulation output signal and derive the influence of the analog circuit on the digital circuit.

[0006] Furthermore, the step of mapping the output voltage range to the input value range of the digital circuit includes: mapping the output voltage range to the input value range of the digital circuit according to a preset ratio.

[0007] Further, the above ratio is 1:N; the step of mapping the output voltage range to the input value range of the digital circuit according to the preset ratio includes: multiplying the lower limit and upper limit of the output voltage range by ten respectively to determine the input value range mapped to the digital circuit.

[0008] Furthermore, the above-mentioned step of determining multiple different duty cycle digital signals within the input value range based on the input value inside the digital circuit and different thresholds includes: for each threshold, when the input value inside the digital circuit is less than the threshold, the output signal is 0, and when the input value inside the digital circuit is greater than the threshold, the output signal is 1, thus obtaining a duty cycle digital signal composed of 0 and 1 under the threshold.

[0009] Furthermore, the duty cycles of 0 and 1 are different under the different thresholds mentioned above.

[0010] Furthermore, the above steps for determining the simulation output signal of the digital circuit based on multiple different duty cycle digital signals include: determining multiple different simulation output signals according to the preset judgment conditions of the digital circuit under each duty cycle digital signal.

[0011] Furthermore, the aforementioned preset judgment conditions include: the counter value corresponds to different simulated output signals in different intervals; under each duty cycle digital signal, the steps of determining multiple different simulated output signals according to the preset judgment conditions of the digital circuit include: for each duty cycle digital signal, the following steps are performed: detect the current count value collected by the counter under the duty cycle digital signal; determine the target value interval in which the current count value is located; and take the target output signal corresponding to the target value interval as the simulated output signal of the digital circuit under the duty cycle digital signal.

[0012] Secondly, this application also provides a hybrid analog-digital circuit simulation device, comprising: a voltage range acquisition module for acquiring the output voltage range from the analog circuit input to the digital circuit; a range mapping module for mapping the output voltage range to the input value range of the digital circuit; a duty cycle determination module for determining multiple different duty cycle digital signals within the input value range based on the input value inside the digital circuit and different thresholds; and a simulation output signal determination module for determining the simulation output signal of the digital circuit based on the multiple different duty cycle digital signals, so as to analyze the simulation output signal and determine the influence of the analog circuit on the digital circuit.

[0013] Thirdly, this application also provides an electronic device, including a processor and a memory, wherein the memory stores computer-executable instructions that can be executed by the processor, and the processor executes the computer-executable instructions to implement the method of the first aspect described above.

[0014] Fourthly, this application also provides a computer-readable storage medium storing computer-executable instructions, which, when invoked and executed by a processor, cause the processor to implement the method described in the first aspect above.

[0015] The mixed-signal simulation method, apparatus, and electronic device provided in this application first obtain the output voltage range from the analog circuit input to the digital circuit; then, the output voltage range is mapped to the input value range of the digital circuit; further, within the input value range, multiple different duty cycle digital signals are determined based on the input values ​​inside the digital circuit and different thresholds; finally, based on the multiple different duty cycle digital signals, the simulation output signal of the digital circuit is determined to analyze the simulation output signal and derive the influence of the analog circuit on the digital circuit. This application converts the simulation of the analog circuit involved in the mixed-signal simulation of analog and digital circuits into the simulation of the digital circuit, replacing the actual mixed-signal simulation, which can save simulation time, improve simulation efficiency, and meet the requirement of rapid convergence in verification. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0017] Figure 1 A flowchart illustrating a hybrid analog-digital circuit simulation method provided in this application embodiment; Figure 2 A schematic diagram of an analog-to-digital mapping provided in an embodiment of this application; Figure 3 This is another analog-to-digital mapping schematic diagram provided in the embodiments of this application; Figure 4 This is another analog-to-digital mapping schematic diagram provided in the embodiments of this application; Figure 5 A flowchart illustrating another analog-digital circuit hybrid simulation method provided in this application embodiment; Figure 6 A schematic diagram of a hybrid analog-digital circuit simulation process provided for an embodiment of this application; Figure 7 A structural block diagram of a hybrid analog-digital circuit simulation device provided in this application embodiment; Figure 8 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0018] The technical solutions of this application will be clearly and completely described below with reference to the embodiments. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0019] To address the problem that existing mixed analog-digital circuit simulations cannot meet the requirement of rapid convergence in verification, this application provides a mixed analog-digital circuit simulation method, apparatus, and electronic device. This method converts the simulation of analog circuits involved in mixed analog-digital circuit simulation into the simulation of digital circuits, replacing the actual mixed simulation. This saves time, improves efficiency, and meets the requirement of rapid convergence in verification.

[0020] To facilitate understanding of this embodiment, a detailed description of a hybrid analog-digital circuit simulation method disclosed in this application embodiment will be provided first. Figure 1 A flowchart of a hybrid analog-digital circuit simulation method provided in this application embodiment is shown. The method specifically includes the following steps: Step S102: Obtain the range of output voltage from analog circuit input to digital circuit; In one implementation, the output voltage waveform of the analog circuit can be obtained first. This output voltage waveform represents the output voltage information of the analog circuit during mixed-signal simulation. It can be a sine or cosine waveform. Specifically, the output voltage range of the analog circuit, such as 0-10V, can be determined based on the maximum and minimum voltage values ​​in the output voltage waveform.

[0021] Step S104: Map the output voltage range to the input value range of the digital circuit; In practice, the output voltage range of an analog circuit can be mapped to the input value range of a digital circuit using a certain ratio. This ratio is typically 1:N, where N is generally a number greater than 1. The purpose of this mapping is to facilitate observation. In this embodiment, N can be set to 10. Thus, when the output voltage range of the analog circuit is 0-10V, the input value range of the digital circuit after the 1:10 mapping is 0-100, making observation very convenient.

[0022] Step S106: Within the input value range, determine multiple different duty cycle digital signals based on the input values ​​inside the digital circuit and different thresholds; Digital circuits have different input value thresholds, which do not exceed the range of digital circuit input values. Different duty cycle digital signals are determined by comparing the input values ​​of the digital circuit with different thresholds.

[0023] Step S108: Based on multiple digital signals with different duty cycles, determine the simulation output signal of the digital circuit in order to analyze the simulation output signal and determine the influence of the analog circuit on the digital circuit.

[0024] Typically, mixed-signal simulation of digital-analog circuits requires the completion of the entire digital circuit netlist file before it can begin. However, the delayed completion of the netlist file leads to low efficiency and long simulation times. To achieve mixed-signal simulation results as early as possible, facilitate faster convergence of the simulation, and maximize the realistic reproduction of the mixed-signal simulation, this embodiment converts the voltage input in the analog circuit to the excitation input in the digital circuit during the simulation verification stage. This involves converting the voltage values ​​from the analog circuit to the digital circuit for mixed-signal simulation, saving time and accelerating the convergence of the simulation verification.

[0025] This application also provides a hybrid simulation method for analog-digital circuits, which is implemented based on the previous embodiment. This embodiment focuses on describing the analog-digital mapping process and the hybrid simulation process.

[0026] Step S104 above, mapping the output voltage range to the input value range of the digital circuit, includes: mapping the output voltage range to the input value range of the digital circuit according to a preset ratio. In a preferred embodiment, the ratio is 1:N; multiplying the lower limit and upper limit of the output voltage range by ten respectively to determine the input value range mapped to the digital circuit.

[0027] See Figure 2 As shown, m to n represent the output voltage of the analog circuit, which is a sine (cosine) wave. m represents the minimum value of the output voltage of the analog circuit; n represents the maximum value of the output voltage of the analog circuit; x represents the threshold.

[0028] In analog circuits, (nm) is equivalent to a digital counter [K:0]. (n, m) and [K:0] exhibit a certain linear relationship. It should be noted that the numbers below are for illustrative purposes only and do not represent actual values.

[0029] For example, in an analog circuit, the maximum voltage output to a digital circuit is 10V, and the minimum voltage is 0V, i.e., (10, 0). To convert this to a definite value in the digital circuit, a counter can be used, such as (100, 0). Therefore, a 9V output voltage in an analog circuit can be simulated in a digital circuit using 90 as the excitation, and a 5V output voltage can be simulated using 50 as the excitation. Since 9V in the analog circuit corresponds to 90 in the digital circuit, and 5V corresponds to 50, there is a certain linear relationship between the two.

[0030] Further, in step S106 above, within the input value range, multiple different duty cycle digital signals are determined based on the input values ​​inside the digital circuit and different thresholds, including: For each threshold, when the input value inside the digital circuit is less than the threshold, the output signal is 0; when the input value inside the digital circuit is greater than the threshold, the output signal is 1, resulting in a digital signal with a duty cycle consisting of 0s and 1s at the threshold. The duty cycles of 0s and 1s are different for each threshold.

[0031] See Figure 2 As shown, assuming the threshold x1 is set to 3V, when the analog circuit output voltage is between 0V and 3V, corresponding to 0-30 (inclusive) in the digital circuit, any value between 0 and 30 input to the digital circuit is represented by 0. When the analog circuit output voltage is between 3V and 10V, corresponding to 30-100 in the digital circuit, any value between 30 and 100 input is represented by 1. In this case, 0 has a 30% duty cycle, and 1 has a 70% duty cycle. In practical applications, the threshold is not necessarily 3, so x1 is used to represent 0. <x1<10。

[0032] See Figure 3 As shown, assuming the threshold x2 is set to 5V, when the analog circuit output voltage is between 0V and 5V, corresponding to 0-50 (inclusive) in the digital circuit, any value input between 0 and 50 is represented by 0 in the digital circuit. When the analog circuit output voltage is between 5V and 10V, corresponding to 50-100 in the digital circuit, any value input between 50 and 100 is represented by 1 in the digital circuit. In this case, the duty cycle for both 0 and 1 is 50%. Since the actual application may not be 5V, x2 is used, where x2 = n / 2.

[0033] See Figure 4 As shown, assuming the threshold x3 is set to 8V, when the analog circuit's output voltage is between 0V and 8V, corresponding to 0-80 (inclusive) in the digital circuit, any value input between 0 and 80 is represented by 0 in the digital circuit. When the analog circuit's output voltage is between 8V and 10V, corresponding to 80-100 in the digital circuit, any value input between 80 and 100 is represented by 1 in the digital circuit. In this case, 0 has an 80% duty cycle, and 1 has a 20% duty cycle. In practical applications, the threshold is not necessarily 8V, so x3 is used to represent 0. <x3<10。 In this embodiment, different duty cycles of 0 and 1 in the digital circuit are used to represent the output voltage of the analog circuit, thereby converting the value in the analog circuit into the value in the digital circuit. Then, different duty cycles of 0 and 1 are used for simulation to achieve a similar effect to hybrid simulation.

[0034] Furthermore, step S108 above, which determines the simulation output signal of the digital circuit based on multiple digital signals with different duty cycles, specifically includes: Under each duty cycle digital signal, multiple different simulated output signals are determined according to the preset judgment conditions of the digital circuit. For example, the preset judgment conditions include: the counter value corresponds to different simulated output signals in different intervals; the steps to determine multiple different simulated output signals under each duty cycle digital signal according to the preset judgment conditions of the digital circuit include: for each duty cycle digital signal, the following steps are performed: detect the current count value collected by the counter under the duty cycle digital signal; determine the target value interval in which the current count value is located; and take the target output signal corresponding to the target value interval as the simulated output signal of the digital circuit under the duty cycle digital signal.

[0035] See Figure 5 As shown in the diagram, the different judgment conditions can be understood as different thresholds. Furthermore, the analog circuit output voltage shown in the diagram is 0-10V; this is merely for illustrative purposes and does not necessarily represent a true 0-10V range. Similarly, the digital circuit input value is 0-100; this is also just an example for illustrative purposes and does not necessarily mean it is 0-100.

[0036] For example, if the threshold is 30, then when the digital circuit input value is between 0 and 30, the corresponding digital signal is 0; when the digital circuit input value is between 30 and 100, the corresponding digital signal is 1. At this time, the ratio of 0 to 1 is 3:7, and the total length of 0 and 1 remains unchanged, with the length of 0 accounting for 3 / 10.

[0037] For example, if the threshold is 80, then when the digital circuit input value is between 0 and 80, the corresponding digital signal is 0, and when the digital circuit input value is between 80 and 100, the corresponding digital signal is 1. At this time, the ratio of 0 to 1 is 8:2, and the total length of 0 and 1 remains unchanged.

[0038] As can be seen from the above, the digital signal input value corresponding to digital signal 0 is between 0 and 30, that is, the corresponding analog output voltage is between 0 and 3V; similarly, the digital circuit input value corresponding to digital signal 1 is between 30 and 100, that is, the corresponding analog circuit output voltage is between 3V and 10V.

[0039] Examples of other conditions are as follows: When the digital signal is 0 (corresponding to an analog output voltage of 0-3V), and the counter (this count represents other conditions, just an example; there may be more in reality) is in the range of 0-10, the simulated output signal is A1; when the counter is in the range of 10-20, the simulated output signal is A2; when the counter is in the range of 20-30, the simulated output signal is A3, and so on. By analyzing and comparing A1, A2, and A3 (taking three as examples), we can obtain the impact of the analog circuit's output voltage of 0-3V on the digital circuit.

[0040] Similarly: when the digital signal is 1 (corresponding to an analog output voltage of 3V-10V), the simulation output signal is B1 when the counter range is 0-10; B2 when the counter range is 10-20; B3 when the counter range is 20-30, and so on. Signals A1, A2, A3, B1, B2, and B3 are the final simulation output signals. By comprehensively analyzing and comparing A1, A2, A3, B1, B2, and B3, we can understand the impact of 0V-10V in the analog circuit on the digital circuit, and also realize the mixed simulation process of converting the output voltage of the analog circuit into the excitation of the digital circuit.

[0041] See Figure 6 As shown, A: can be understood as the input value of the digital circuit (0-100) (the source of 0-100 is the known output voltage of the analog circuit (0-10V). For ease of observation, the input value of the digital circuit is set to 0-100). B: represents other input values ​​of the digital circuit. C: also represents other input values ​​of the digital circuit. In practical applications, there are more than just signals B and C; only two are listed here. D: represents the final simulation output signal. Finally, by comprehensively analyzing D under three different conditions, the influence of A (voltage 0-10V) on the digital circuit is obtained.

[0042] The hybrid analog-digital circuit simulation method provided in this application converts the output of the analog circuit into the excitation input of the digital circuit, which can simplify the hybrid simulation of analog and digital circuits, save simulation time, improve simulation efficiency, and enable the simulation verification to converge as soon as possible.

[0043] Based on the above method embodiments, this application also provides a hybrid analog-digital circuit simulation device, see [link to relevant documentation]. Figure 7As shown, the device includes: a voltage range acquisition module 72, used to acquire the output voltage range from the analog circuit input to the digital circuit; a range mapping module 74, used to map the output voltage range to the input value range of the digital circuit; a duty cycle determination module 76, used to determine multiple different duty cycle digital signals within the input value range based on the input value inside the digital circuit and different thresholds; and a simulation output signal determination module 78, used to determine the simulation output signal of the digital circuit based on multiple different duty cycle digital signals, so as to analyze the simulation output signal and determine the influence of the analog circuit on the digital circuit.

[0044] Furthermore, the aforementioned range mapping module 74 is used to map the output voltage range to the input value range of the digital circuit according to a preset ratio.

[0045] Furthermore, the ratio is 1:N; the range mapping module 74 is used to multiply the lower limit and upper limit of the output voltage range by ten respectively to determine the input value range mapped to the digital circuit.

[0046] Furthermore, the duty cycle determination module 76 is used to output a signal of 0 when the input value inside the digital circuit is less than the threshold and an output signal of 1 when the input value inside the digital circuit is greater than the threshold for each threshold, thereby obtaining a duty cycle digital signal composed of 0 and 1 under the threshold.

[0047] Furthermore, the duty cycles of 0 and 1 are different under the different thresholds mentioned above.

[0048] Furthermore, the aforementioned simulation output signal determination module 78 is used to determine multiple different simulation output signals under each duty cycle digital signal according to the preset judgment conditions of the digital circuit.

[0049] Furthermore, the aforementioned preset judgment conditions include: the counter value corresponds to different simulation output signals in different intervals; the simulation output signal determination module 78 is used to perform the following steps for each duty cycle digital signal: detect the current count value collected by the counter under the duty cycle digital signal; determine the target value interval where the current count value is located; and use the target output signal corresponding to the target value interval as the simulation output signal of the digital circuit under the duty cycle digital signal.

[0050] The device provided in this application embodiment has the same implementation principle and technical effect as the aforementioned method embodiment. For the sake of brevity, any parts of the device embodiment not mentioned can be referred to the corresponding content in the aforementioned method embodiment.

[0051] This application also provides an electronic device, such as... Figure 8The diagram shows the structure of the electronic device, which includes a processor 81 and a memory 80. The memory 80 stores computer-executable instructions that can be executed by the processor 81, and the processor 81 executes the computer-executable instructions to implement the above-described method.

[0052] exist Figure 8 In the illustrated embodiment, the electronic device further includes a bus 82 and a communication interface 83, wherein the processor 81, the communication interface 83, and the memory 80 are connected via the bus 82.

[0053] The memory 80 may include high-speed random access memory (RAM) or non-volatile memory, such as at least one disk storage device. Communication between this system network element and at least one other network element is achieved through at least one communication interface 83 (which can be wired or wireless), such as the Internet, wide area network, local area network, metropolitan area network, etc. The bus 82 may be an ISA (Industry Standard Architecture) bus, a PCI (Peripheral Component Interconnect) bus, or an EISA (Extended Industry Standard Architecture) bus, etc. The bus 82 can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 8 The symbol is represented by a single double-headed arrow, but this does not mean that there is only one bus or one type of bus.

[0054] Processor 81 may be an integrated circuit chip with signal processing capabilities. In implementation, each step of the above method can be completed by the integrated logic circuitry in the hardware of processor 81 or by instructions in software form. The processor 81 can be a general-purpose processor, including a Central Processing Unit (CPU), a Network Processor (NP), etc.; it can also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in the embodiments of this application can be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor. The software modules can reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. The storage medium is located in the memory, and the processor 81 reads the information in the memory and, in conjunction with its hardware, completes the steps of the method described in the foregoing embodiments.

[0055] This application also provides a computer-readable storage medium storing computer-executable instructions. When the computer-executable instructions are called and executed by a processor, the computer-executable instructions cause the processor to implement the above-described method. For specific implementation details, please refer to the foregoing method embodiments, which will not be repeated here.

[0056] The computer program products of the methods, apparatus, and electronic devices provided in the embodiments of this application include a computer-readable storage medium storing program code. The instructions included in the program code can be used to execute the methods described in the preceding method embodiments. For specific implementations, please refer to the method embodiments, which will not be repeated here.

[0057] Unless otherwise specifically stated, the relative steps, numerical expressions, and values ​​of the components and steps described in these embodiments do not limit the scope of this application.

[0058] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a processor-executable, non-volatile, computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0059] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0060] Finally, it should be noted that the above-described embodiments are merely specific implementations of this application, used to illustrate the technical solutions of this application, and not to limit them. The protection scope of this application is not limited thereto. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features, within the technical scope disclosed in this application. Such modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be covered within the protection scope of this application. Therefore, the protection scope of this application should be determined by the protection scope of the claims.

Claims

1. A hybrid analog-digital circuit simulation method, characterized in that, The method includes: During the verification and simulation phase, the range of voltage input from the analog circuit to the output voltage in the digital circuit is obtained. The output voltage range is mapped to the input value range of the digital circuit according to a preset ratio value, including: the ratio value is 1:N, the lower limit and upper limit of the output voltage range are multiplied by N respectively to determine the input value range mapped to the digital circuit; Within the input value range, based on the input value inside the digital circuit and different thresholds, multiple different duty cycle digital signals are determined, including: for each threshold, when the input value inside the digital circuit is less than the threshold, the output signal is 0, and when the input value inside the digital circuit is greater than the threshold, the output signal is 1, thus obtaining a duty cycle digital signal composed of 0 and 1 under the threshold; under different thresholds, the duty cycles of 0 and 1 are different; Under each duty cycle digital signal, based on the preset judgment conditions of the digital circuit, a variety of different simulation output signals are determined in order to analyze the simulation output signals and determine the influence of the analog circuit on the digital circuit.

2. The method according to claim 1, characterized in that, The preset judgment conditions include: the counter value corresponds to different simulated output signals in different intervals; under each duty cycle digital signal, the steps of determining multiple different simulated output signals according to the preset judgment conditions of the digital circuit include: For each duty cycle digital signal, the following steps are performed: The current count value collected by the counter is detected under the duty cycle digital signal; Determine the target numerical range in which the current count value is located; The target output signal corresponding to the target value range is used as the simulation output signal of the digital circuit under the duty cycle digital signal.

3. A hybrid analog-digital circuit simulation device, characterized in that, The device includes: The voltage range acquisition module is used to acquire the voltage range from the analog circuit input to the digital circuit output during the verification and simulation phase. The range mapping module is used to map the output voltage range to the input value range of the digital circuit according to a preset ratio value, including: the ratio value is 1:N, multiplying the lower limit and upper limit of the output voltage range by N respectively to determine the input value range mapped to the digital circuit; The duty cycle determination module is used to determine multiple different duty cycle digital signals within the input value range, based on the input value inside the digital circuit and different thresholds. This includes: for each threshold, when the input value inside the digital circuit is less than the threshold, the output signal is 0; when the input value inside the digital circuit is greater than the threshold, the output signal is 1, resulting in a duty cycle digital signal composed of 0 and 1 under the threshold. Under different thresholds, the duty cycles of 0 and 1 are different. The simulation output signal determination module is used to determine multiple different simulation output signals under each duty cycle digital signal according to the preset judgment conditions of the digital circuit, so as to analyze the simulation output signals and determine the influence of the analog circuit on the digital circuit.

4. An electronic device, characterized in that, The method includes a processor and a memory, the memory storing computer-executable instructions executable by the processor, the processor executing the computer-executable instructions to implement the method of any one of claims 1 to 2.

5. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions that, when invoked and executed by a processor, cause the processor to perform the method described in any one of claims 1 to 2.

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