Interface stress regulation type silicon-based phemt epitaxial growth method and device

Abstract

The application discloses an interface stress regulation type silicon-based PHEMT epitaxial growth method and device, relates to the technical field of electronic components and equipment manufacturing, and comprises the following steps: firstly, performing cleaning, in-situ degassing, surface reconstruction and composite buffer layer deposition on a silicon substrate in sequence to construct a low-defect transition structure; then, based on the same trigger source, curvature, reflection and diffraction signals are synchronously collected, stress deviation modeling and trajectory generation are performed, and process window adaptive control instructions are arranged and generated accordingly; then, the instructions are used to control the deposition sequence and delta doping linkage of each functional layer of the active layer, so that the active layer structure growth is completed; finally, post-processing and multi-index quantitative quality inspection are performed to construct quality inspection grading and abnormal backtracking structure. The application realizes real-time monitoring and dynamic closed-loop regulation of interface stress, significantly reduces the defect density of the epitaxial layer, and improves the consistency and yield of device performance.

Description

Technical Field

[0001] This invention relates to the field of electronic component and equipment manufacturing technology, and in particular to a method and apparatus for interfacial stress-controlled silicon-based PHEMT epitaxial growth. Background Technology

[0002] In the field of electronic component and equipment manufacturing technology, existing solutions for silicon-based PHEMT epitaxial growth typically revolve around the construction of a composite buffer layer on the silicon substrate, epitaxial deposition process formulation, and offline metrology. These solutions employ stepwise acquisition of curvature, reflection, and diffraction signals, execution of temperature, flux, and growth rate control within preset windows, and post-processing stages including annealing, passivation, and inter-wafer sampling. However, these methods suffer from limitations such as alignment gaps caused by different triggering sources and acquisition windows for online characterization signals, unstable and untraceable mapping from measurement to stress, and lack of decoupling and linkage between parameter control objects. Existing methods largely rely on empirical formulations and single-parameter adjustment paths, emphasizing offline verification and post-processing correction. In stress evolution scenarios where the silicon substrate and composite buffer layer structure coexist, they are prone to timing mismatches and arbitration failures at intra-segment and interface nodes, making it difficult to ensure the stable generation and real-time execution of adaptive control commands for the process window. For the joint processing of stress deviation modeling and stress trajectory generation and control command arrangement based on online characterization signals, existing technologies generally have shortcomings in synchronous acquisition and coordinated alignment of time axis, equipment axis and structural axis, arbitration of contradictory scenarios of curvature, reflection and diffraction, construction of stress state set and linkage arrangement of parameter targets, and archiving and traceability association of process data. It is difficult to form a continuous link of acquisition, alignment judgment, control and record in the production scenario of silicon-based PHEMT epitaxial growth. This leads to the disconnect between process window and stress state, insufficient execution consistency of barrier and spacer layer and channel and cap layer deposition sequence configuration and δ doping linkage configuration, and non-closed process of quantitative acquisition and archiving, batch classification and anomaly backtracking. Summary of the Invention

[0003] This invention provides a method and apparatus for interfacial stress-controlled silicon-based PHEMT epitaxial growth, comprising:

[0004] The configuration parameters of the silicon substrate and the composite buffer are obtained, and the composite buffer layer structure is generated by cleaning, in-situ degassing, surface reconstruction and composite buffer epitaxial deposition based on gradient composition path, superlattice periodic sequence and dislocation filter layer stacking order.

[0005] The system performs synchronous acquisition of curvature, reflection and diffraction data from the same trigger source; it also performs stress deviation modeling and stress trajectory generation, control command arrangement and processing, and generates adaptive control commands for the process window, all based on an online characterization dataset.

[0006] The active layer structure is generated by executing adaptive control instructions for the process window and active layer stack parameters, configuring the deposition sequence of barrier, spacer, channel and cap layer, configuring δ-doping linkage and epitaxial deposition.

[0007] The system executes adaptive control commands that include active layer structure, execution records, verification labels, and process windows. It performs low-damage annealing, surface passivation, and quantitative acquisition, archiving, batch classification, and anomaly backtracking based on four types of indicators: electrical, morphological, structural, and chemical. It also constructs a quality inspection classification and anomaly backtracking structure.

[0008] Furthermore, the configuration parameters of the silicon substrate and the composite buffer include:

[0009] Silicon substrates include size specifications, orientation type, surface roughness, defect density level, and edge bevel structure;

[0010] The composite buffer configuration parameters include gradient component path, superlattice periodic sequence, dislocation filter layer stacking order, carrier gas type, precursor channel mapping, temperature program, and growth rate program.

[0011] Furthermore, the process of simultaneously acquiring curvature, reflection, and diffraction data using the same trigger source also includes:

[0012] Curvature, reflection and diffraction are acquired synchronously by the device control unit. The three measurement subsystems are started by the same trigger source. The trigger source is generated after the wafer is inserted into the cavity and must be of the same origin as the surface state timestamp.

[0013] The curvature measurement subsystem uses an optical curvature monitoring spot to scan along the wafer radius to obtain curvature timing and radial segmentation statistics.

[0014] The reflection measurement subsystem records the interference intensity under fixed incident angle and multi-wavelength sequence conditions, and generates reflection intensity time series and standing wave node index;

[0015] The diffraction measurement subsystem acquires fringe patterns through an electron gun and a fluorescent screen, forming fringe sequences and fringe spacing statistics.

[0016] Furthermore, the process of stress deviation modeling also includes:

[0017] Complete the window alignment of curvature signal, reflection signal, and diffraction signal on the time axis;

[0018] Set grid points on the structural axis according to the segment sequence and interface layout;

[0019] For each grid point, a feature group is generated, which includes curvature guidance features, interference phase guidance features, and fringe spacing guidance features;

[0020] Denoising, robust fitting, and edge removal are performed on the feature group. Stress estimation is obtained through node constraints, and then the difference is formed with the intra-segment baseline to obtain the stress deviation.

[0021] Furthermore, the process of generating stress trajectories also includes:

[0022] Perform time equalization on nodes within a segment and insert interface nodes at the boundaries of adjacent segments;

[0023] The node order was corrected based on the switching nodes in the composite buffer deposition plan execution record;

[0024] For segments with segment-level skip flags, a continuous interpolation strategy is used to reconstruct the timing, with the interpolation strategy referencing the segment-level weights and the rhythm of the same segment in adjacent batches.

[0025] Furthermore, the process of orchestrating and processing control instructions also includes:

[0026] Read the boundary constraints and device adjustable range from the stress state set and the composite buffer deposition plan execution record to generate the feasible region of the control object;

[0027] The adjustment order is determined based on the priority of nodes within the segment;

[0028] When a node is displayed as a slowly changing state within a segment, the control object adopts a micro-gradient adjustment strategy, and the adjustment range is obtained by segment-level weight mapping.

[0029] When a node displays a sudden change in the interface state, the controlled object adopts a short-time transition strategy. The transition time and magnitude are jointly determined by the interface node index and the adjustable range of the device.

[0030] Furthermore, the composite buffer epitaxial deposition process also includes:

[0031] The process of implementing the gradient component layer is to form a continuous component distribution that gradually transitions from the low strain region to the target strain region by synchronously arranging the precursor channel mapping and temperature program.

[0032] The process of realizing a superlattice involves alternating deposition of two or more thin layers according to the periodic sequence in the composite buffer configuration list, so that the interface appears periodically and induces dislocation bending.

[0033] The dislocation filtering layer is implemented by introducing a thin layer with specific crystal plane inclination and step density conditions, so that through-type dislocations can bifurcate or terminate during the expansion process.

[0034] Furthermore, the in-situ degassing process also includes:

[0035] The in-situ degassing process is completed in a metal-organic chemical vapor deposition equipment. The operation sequence includes wafer loading, evacuation, heating, stabilization, cooling and transfer to surface reconstruction.

[0036] The surface reconstruction process is divided into three stages: precursor pre-exposure, temperature fine-tuning, and surface state determination.

[0037] Furthermore, the online representation dataset undergoes three quality checks before being written to the data buffer. The first quality check targets frame loss and jitter by using window sliding statistics to remove outlier segments. The second quality check targets segment order mapping errors by using cross-judgment of interface identifiers and interference phases to correct the intra-segment order. The third quality check targets fringe sequence blurring by using matching and reconstruction using pattern templates from the same batch and segment.

[0038] Furthermore, an interface stress-controlled silicon-based PHEMT epitaxial growth apparatus, applied to any of the methods described above, includes:

[0039] The device control unit is used to schedule the curvature measurement subsystem, the reflection measurement subsystem, and the diffraction measurement subsystem to start up with the same trigger source and acquire online characterization signals, and output synchronous timing to the data channel and the structure channel;

[0040] The data channel is used to perform time axis and device axis alignment management on the online characterization signal and to segment and splice it according to the segment sequence and interface identifier, and output the online characterization dataset to the stress deviation modeling unit;

[0041] The structural channel is used to establish segment sequence mapping and interface indication, and to work with the data channel to generate an online characterization dataset, providing structural constraints to the stress deviation modeling unit;

[0042] The mutual recognition unit is used to arbitrate and form weights based on the fringe sequence or phase and trend when there is a contradiction between curvature and reflection and diffraction, and provides the arbitration results to the stress deviation modeling unit and the process window adaptive controller.

[0043] The stress deviation modeling unit is used to construct a mapping from the metric space to the stress space based on the online characterization dataset and the composite buffer layer structure and deposition plan execution records, and to generate stress deviation, segment-level weights and confidence labels, which are then output to the stress trajectory generation unit.

[0044] The stress trajectory generation unit is used to splice nodes according to the segment sequence and interface position, and form a stress state set for the time balancing and interpolation replacement nodes within the segment, and output it to the process window adaptive controller.

[0045] The process window adaptive controller is used to read the stress state set, boundary constraints, and target values, duration of action, transition slope, and effective time of the device adjustable range arrangement object, and generate a structured instruction set, which is then output to the traceability management unit and the downstream execution end.

[0046] The traceability management unit is used to create batch-level traceability entries and record insertion tags, exception records, weights, and associations with archiving and publishing. It provides a playback entry point to upstream data and provides references to the post-processing stage of downstream methods.

[0047] The beneficial effects of this invention are:

[0048] It operates on the synchronous acquisition and organization link of online characterization signals, reducing alignment gaps caused by asynchrony between curvature, reflection, and diffraction. The online characterization dataset can be directly referenced for subsequent modeling and orchestration in epitaxial growth scenarios, which is more stable in terms of link continuity and call consistency compared to the existing approach that relies on step-by-step acquisition and offline organization. It operates on the conversion link from online characterization signals to stress states, establishing a verifiable mapping through stress deviation modeling and stress trajectory generation, weakening the uncertainty caused by relying solely on empirical formulas and single-parameter adjustments, and making the stress state expression and subsequent control objects clearly correspond under the constraint of silicon-based epitaxial stress evolution. It operates on the parameter linkage and deposition execution link, with process window adaptive control commands driving the configuration of barrier, spacer, channel, and cap layer deposition sequence and δ-doping linkage configuration. Compared to the existing path of fixed window and post-correction, it forms a self-consistent control release and execution connection in the epitaxial manufacturing process, which is convenient for integration with quantitative acquisition and archiving, batch classification, and anomaly backtracking. Attached Figure Description

[0049] Figure 1 A schematic flowchart of an interface stress-controlled silicon-based PHEMT epitaxial growth method provided in this application embodiment;

[0050] Figure 2 This is a structural block diagram of an interface stress-controlled silicon-based PHEMT epitaxial growth apparatus provided in an embodiment of this application. Detailed Implementation

[0051] The present invention will be further described below with reference to the accompanying drawings and specific embodiments. The illustrative embodiments and descriptions herein are used to explain the present invention, but are not intended to limit the present invention.

[0052] Example 1: Refer to Figure 1 In the field of electronic component and equipment manufacturing technology, Figure 1 This is a schematic flowchart of a silicon-based PHEMT epitaxial growth method with interface stress regulation provided in an embodiment of the present invention. The process may include at least steps S1-S4:

[0053] Step S1: Obtain the configuration parameters of the silicon substrate and the composite buffer, perform cleaning, in-situ degassing, surface reconstruction and composite buffer epitaxial deposition based on gradient composition path, superlattice periodic sequence and dislocation filter layer stacking order to generate composite buffer layer structure.

[0054] Step S2: Perform synchronous acquisition of curvature, reflection and diffraction using the same trigger source; perform stress deviation modeling and stress trajectory generation using online characterization dataset; perform control command arrangement and processing; and generate adaptive control commands for the process window.

[0055] Step S3: Execute the process window adaptive control instructions and active layer stack parameters to configure the deposition sequence of barrier, spacer layer, channel and cap layer, the δ doping linkage configuration and epitaxial deposition process to generate the active layer structure.

[0056] Step S4: Execute adaptive control instructions that include active layer structure, execution record, verification label and process window to perform low-damage annealing, surface passivation and quantitative acquisition, archiving and batch classification based on four types of indicators: electrical, morphological, structural and chemical, and anomaly backtracking to construct a quality inspection classification and anomaly backtracking structure.

[0057] Step S1: Obtain the configuration parameters of the silicon substrate and the composite buffer, perform cleaning, in-situ degassing, surface reconstruction, and composite buffer epitaxial deposition to generate a composite buffer layer structure.

[0058] The input sources for this step are the silicon substrate and composite buffer configuration parameters. The silicon substrate refers to the semiconductor substrate used to support subsequent epitaxial layers, including information such as size specifications, orientation type, surface roughness, defect density level, and edge bevel structure, derived from incoming material inspection and historical batch archives. The composite buffer configuration parameters refer to the set of structures and processes defined for the lattice and thermal differences between the silicon substrate and the target epitaxial stack, including gradient composition paths, superlattice periodic sequences, dislocation filter layer stacking order, carrier gas type, precursor channel mapping, temperature program, and growth rate program, derived from the process database and the quality inspection grading and anomaly backtracking structure formed in the previous process cycle. Specifically, the silicon substrate and composite buffer configuration parameters are used as joint inputs, and the loading management module performs number binding and process version locking to obtain a list of silicon wafers to be processed and a list of composite buffer configurations. A batch-level traceability entry is established in the process data warehouse. This entry is associated with the composite buffer layer structure at the end of this step and can be called by subsequent steps, where subsequent steps refer to the online characterization dataset generation stage in online characterization and closed-loop control.

[0059] Specifically, cleaning is the first processing step in this process, aimed at removing contaminants such as particles, organic residues, and metal residues. The cleaning process includes four stages: carrier registration, media preparation, process selection, and rinsing and drying. The carrier registration stage extracts wafer numbers and historical surface conditions from the list of silicon wafers to be processed, triggering an appropriate wet process. The media preparation stage generates a compatibility verification task based on the carrier gas and precursor channel mapping in the composite buffer configuration list, preventing cross-reactions between residues and subsequent gas-phase precursors. The process selection stage retrieves standardized cleaning sequences related to silicon substrate orientation from the process database, removing different types of contaminants through tank changing and a combination of ultrasonic and chemical immersion. The rinsing and drying stage completes the removal of the surface water film using ultrapure water rinsing and nitrogen spin-drying or hot plate drying. The cleaning process is scheduled by the process execution control unit. Anomaly handling strategies cover scenarios such as tank contamination indications, abnormal surface residual fluorescence, and particle count exceeding the threshold, triggering secondary decontamination or batch isolation, and writing the anomaly indications into the traceability entries. The phased output of the cleaning process is called the initial surface. This output field is named Initial Surface and is directly referenced by the in-situ degassing and surface reconstruction processes within this step. At the end of this step, it is archived together with the composite buffer layer structure to support the baseline setting of the subsequent online characterization dataset.

[0060] Furthermore, in-situ degassing is a heat treatment process performed under vacuum or process atmosphere to release adsorbed molecules, moisture, and solvent residues that remain on the surface and within the substrate after cleaning. The in-situ degassing process is completed within a metal-organic chemical vapor deposition (MOCVD) system, and the sequence includes wafer loading, evacuation, heating, stabilization, cooling, and transfer to surface reconstruction. In the wafer loading stage, a vacuum transfer system moves the silicon wafer carrying the initial surface into the reaction chamber. In the evacuation stage, a low-pressure environment is established by the evacuation unit, and leak checks are performed. In the heating stage, heating is performed according to the temperature program in the composite buffer configuration list while maintaining carrier gas flow. In the stabilization stage, the reaction chamber pressure, exhaust gas composition, and infrared radiation signal trends are monitored. In the cooling stage, the temperature is lowered according to the starting temperature required for surface reconstruction. Anomaly handling covers scenarios such as slow heating, pressure fluctuations, and abnormal gas composition, triggering strategies such as extended stabilization or returning to evacuation, and is recorded in the traceability entry. The staged output of in-situ degassing is called the in-situ degassing surface. This output is referenced within this step by the surface reconstruction process to determine the substrate state for initiating surface reconstruction.

[0061] Surface reconstruction is a surface ordering process carried out after in-situ degassing. Its purpose is to form a repeatable, ordered surface through the combined effects of atmosphere, temperature program, and pretreatment source. The surface reconstruction process consists of three stages: precursor pre-exposure, temperature fine-tuning, and surface state determination. In the precursor pre-exposure stage, precursors or auxiliary reactive components required for thin-layer nucleation are introduced under low-flow conditions to form a stable adsorption layer on the surface. In the temperature fine-tuning stage, the reaction chamber temperature is adjusted within a small range according to the composite buffer configuration list to bring the surface migration and adsorption / desorption rates to the target range. In the surface state determination stage, a comprehensive judgment is made based on the stability of the reflected light signal, the trend of the gas indicated at the exhaust end, and the comparison results with the equipment log. If the determination fails, the process returns to the temperature fine-tuning stage and repeats; if the determination succeeds, the process proceeds to composite buffer epitaxial deposition. The staged output of surface reconstruction is called the surface reconstruction state. This output is used within this step to generate the composite buffer deposition plan and is recorded as a surface state timestamp in the traceability entry.

[0062] Composite buffer epitaxial deposition is the core processing step in this process, aiming to construct a low-defect transition structure to support subsequent active layers. The composite buffer is defined as a multi-segmented buffer sequence consisting of gradient composition layers, a superlattice, and a dislocation filter layer. The gradient composition layers are achieved through the synchronous programming of precursor channel mapping and temperature settings, creating a continuous compositional distribution that gradually transitions from a low-strain region to the target strain region. The superlattice is achieved by alternating deposition of two or more thin layers according to a periodic sequence in the composite buffer configuration list, causing periodic interface formation and inducing dislocation bending. The dislocation filter layer is achieved by introducing thin layers with specific crystal plane tendencies and step density conditions, causing through-type dislocations to bifurcate or terminate during propagation. The switching between these three structures is driven by the process execution control unit based on the step clock and sensor status. The deposition record at the switching moment and the equipment status are jointly written into a traceability entry.

[0063] During the composite buffer epitaxial deposition process, a dual-channel strategy is employed for parameter scheduling and risk constraints. The parameter scheduling channel performs minor adjustments to the temperature and growth rate programs to keep the deposition rate and surface migration within the configured range. The risk constraint channel sets up interception and reset branches for situations such as abnormal gas trends at the exhaust end, pressure disturbances in the reaction chamber, and fluctuations in precursor supply. This triggers a sequence of brief pauses, channel refreshes, and deposition restarts. After the interception branch ends, the process returns to the normal deposition path. If an equipment-level fault alarm occurs, an abort flag is generated, and controlled cooling and evacuation reset are performed. Simultaneously, the batch identifier is added to the isolation list, awaiting personnel handling, and a maintenance ticket number is attached to the anomaly backtracking structure. The phased output of the composite buffer epitaxial deposition is called the composite buffer layer structure preform, which includes the number of gradient component segments completed up to the current cycle, the number of formed superlattice periods, and information on the deposited dislocation filter layers. After all segments are deposited, it is converted into the final composite buffer layer structure draft.

[0064] To ensure seamless integration between this step and subsequent steps, both data and structure outputs are synchronized. The structure path outputs the composite buffer layer structure, with the output field named "Composite Buffer Layer Structure." This structure serves to form the structural baseline of the online characterization dataset in the next main step's online characterization and closed-loop control, and is retrieved by the online characterization dataset generation stage of this main step. The data path outputs the composite buffer deposition plan execution record, surface state timestamp, and anomaly backtracking information. The composite buffer deposition plan execution record is used for equipment state alignment before the synchronous acquisition of curvature, reflection, and diffraction in the next main step. The surface state timestamp is used for constraint window alignment before stress deviation modeling in the next main step. The anomaly backtracking information provides risk boundaries during the control command orchestration stage of the next main step. The outputs of both paths are bound to traceability entries, which are continuously used throughout the active layer deposition and post-processing stages, forming a batch profile that spans across main steps.

[0065] During this step, the wafer loading logic and threshold strategy are critical safeguards. The wafer loading logic automatically assigns the wafer orientation based on the mapping between the silicon substrate edge slope structure and the equipment step height, preventing asymmetric thermal loading during subsequent temperature programming. The threshold strategy constructs multi-level triggers based on particle count, gas trends, and reaction chamber pressure changes. Upon triggering, corresponding process branches and operation tickets are automatically generated until the risk is resolved and the process returns to the main path. All triggering behaviors are recorded in traceability entries and associated with the final composite buffer layer structure during archiving, ensuring that subsequent main steps obtain sufficient on-site context from both structural and data perspectives.

[0066] The synergy between in-situ and offline metrology enhances process observability in this step. In-situ metrology relies on built-in sensors to acquire time-series data on temperature, pressure, and exhaust gas indicators. Offline metrology uses surface morphology, thickness, and stress measurements after film fabrication to perform sample sampling. The two types of metrology results are mapped and compared within the process data warehouse. If discrepancies arise, a review sample collection and equipment status inspection are triggered. The review conclusions are written into the traceability entry as part of the anomaly backtracking information and used in the next main step to construct the sampling strategy for the online characterization dataset.

[0067] It should be noted that version management of the composite buffer configuration parameters is implemented throughout this step. Version management is achieved through process version locking and structural template locking. Different batches within the same step reuse the same template when the version remains unchanged; when the version changes, branch templates are automatically created and differences are recorded. Version management covers three key categories: gradient composition paths, superlattice periodic sequences, and dislocation filter layer stacking order. Any change to any of these triggers an upgrade of the structural template and an iteration of the process version. The new template generated after the upgrade is archived along with the final composite buffer layer structure at the end of this step for use in the next and subsequent main steps.

[0068] To establish a stable data loop, this step performs an archiving verification before completion. The archiving verification includes the composite buffer layer structure, composite buffer deposition plan execution records, surface state timestamps, and anomaly backtracking information. The verification conclusion is written into the traceability entry. After successful verification, the output of this step is officially released. The composite buffer layer structure is a structural output, directly available for the next main step to form the structural baseline of the online characterization dataset. The composite buffer deposition plan execution records, surface state timestamps, and anomaly backtracking information are data outputs, indirectly supporting the acquisition alignment and modeling orchestration of the next main step. Throughout the cross-main step flow, the terminology of the above outputs remains identical and consistent with the process database index, avoiding any confusion in terminology.

[0069] On the equipment operation side of this step, the loading / unloading cycle time of the metal-organic chemical vapor deposition (MOCVD) equipment and the tank-changing cycle time of the cleaning unit are scheduled by a scheduler. The scheduler provides parallel combination relationships based on carrier registration and equipment ledger to avoid station idleness and excessive waiting time. If a temporary equipment maintenance event occurs, the scheduler adjusts the cycle time and sequence according to the equipment status entries in the anomaly backtracking information and notifies the process data warehouse to record a new schedule version. The schedule version is associated with the final draft of the composite buffer layer structure during archiving, allowing subsequent main steps to read the process background when building the online characterization dataset and stress deviation modeling.

[0070] On the human operation side of this step, all manual interventions are completed through the operation ticket system. The operation ticket system provides confirmation items for key nodes, including confirmation of media preparation completion, wafer orientation verification, temperature program switching confirmation, and anomaly interception release confirmation. Each confirmation action is written into a traceability entry and labeled with the operator's identity and timestamp. Traceability entries provide a visual flow clue when read across main steps. Since the output of this step will be directly read by the next main step, the operation ticket status is designed as a mandatory item; incomplete items will block the wafer output signal and enter a queue state.

[0071] This step references the silicon substrate and composite buffer configuration parameters in terms of input sources, and establishes traceability entries based on incoming material inspection and process databases, quality inspection grading, and anomaly backtracking structures. In terms of processing links, it completes the continuous operation of cleaning, in-situ degassing, surface reconstruction, and composite buffer epitaxial deposition, and sets up process branches for interception, reset, and isolation for abnormal scenarios. In terms of output products, it discloses three records: composite buffer layer structure and data path. The former, as the output field name, is read by the online characterization dataset generation stage in the next main step, while the latter is referenced in the acquisition alignment and modeling orchestration stage in the next main step, thus completing the connection from structure to data.

[0072] In summary, the technical effects of this step are as follows: by conducting a series of cleaning, in-situ degassing, surface reconstruction, and composite buffer epitaxial deposition on the silicon substrate, the source of interfacial stress is diverted and reduced, stable nucleation conditions are formed on the substrate surface, and the composite buffer layer structure has a reusable structural and data foundation for subsequent online characterization and closed-loop control.

[0073] Step S2: Simultaneously acquire curvature, reflection and diffraction data, model stress deviation and generate stress trajectory, process control commands and generate adaptive control commands for the process window.

[0074] The input sources for this step are the composite buffer layer structure from step S1 above, along with the associated composite buffer deposition plan execution record, surface state timestamps, and anomaly backtracking information. Simultaneously, online characterization signals from the device side are also input. The composite buffer layer structure refers to the layering results of the gradient composition segments, superlattice segments, and dislocation filtering segments constructed against the silicon substrate, including segment order, thickness order, interface identifiers, and device clock. Online characterization signals refer to the curvature, reflection, and diffraction signals observed in situ within the reaction chamber. The curvature signal generates a bending trajectory from the optical path scanning module; the reflection signal forms an interference intensity sequence from Optical Reflectometry Monitoring (ORM); and the diffraction signal forms a diffraction fringe sequence from Reflection High Energy Electron Diffraction (RHEED). The above inputs are bound at the acquisition starting point through batch-level traceability entries. The traceability entry number is consistent with the composite buffer deposition plan execution record and serves as the baseline for alignment control and anomaly tracking. Specifically, the aforementioned composite buffer layer structure and the online characterization signal are simultaneously sent to the data channel and the structure channel for processing. The data channel is responsible for the alignment management of the time axis and the device axis, while the structure channel is responsible for segment mapping and interface instruction construction. Finally, within this step, an online characterization dataset that can be called by the stress deviation modeling stage is generated, and the online characterization dataset is recorded as a replayable object.

[0075] Specifically, the simultaneous acquisition of curvature, reflection, and diffraction data is orchestrated by the device control unit, with all three measurement subsystems activated by the same trigger source. This trigger source is generated after the wafer is loaded into the cavity and must be identical to the surface state timestamp. The curvature measurement subsystem uses an optical curvature detection (OCD) spot to scan the wafer radius, obtaining the curvature time series and radial segmentation statistics. The reflection measurement subsystem records the interference intensity under fixed incident angles and multi-wavelength sequences, generating a reflection intensity time series and standing wave node index. The diffraction measurement subsystem acquires fringe patterns using an electron gun and a fluorescent screen, forming a fringe sequence and fringe spacing statistics. At the acquisition end, the three time series undergo device clock correction and jitter suppression. Then, the data channels are segmented and stitched together according to the segment sequence interface identifier. If a switching delay exists in the composite buffer deposition plan execution record, a delay marker is injected before stitching and attached to the traceability entry. Understandably, if anomalies such as optical path misalignment, fluorescent screen saturation, or electron beam interruption occur during the acquisition process, the device control unit generates an insertion marker and triggers a resampling strategy. The resampling strategy restores continuity by combining short-window repeated sampling with threshold determination. Both the insertion marker and the resampling result are written into the traceability entry. The synchronous acquisition stage produces an initial version of the online characterization dataset, which covers the same window segments of curvature signals, reflection signals, and diffraction signals, and also has segment order mapping and interface indication.

[0076] Furthermore, stress deviation modeling constructs a mapping from the metric space to the stress space for the online characterization dataset. This mapping is based on two types of information sources: the segment sequence and interface layout in the composite buffer layer structure, and the temperature, flux, and switching nodes in the composite buffer deposition plan execution record. The modeling process first aligns the curvature, reflection, and diffraction signals along the time axis. Then, it sets grid points along the structural axis based on the segment sequence and interface layout. Subsequently, it generates feature groups for each grid point, including curvature-guided features, interference phase-guided features, and fringe spacing-guided features. The modeling process performs denoising, robust fitting, and edge removal on the feature groups. Stress estimates are obtained using the node constraints provided by the aforementioned two information sources, and then differiated with the intra-segment baseline. The difference result is the stress deviation. If a segment exhibits sparse or non-convergent feature sets, the modeling process retrieves the feature distribution of the same segment from adjacent batches using the equipment status entries in the anomaly backtracking information as a reference, and performs robust fitting again. If it still fails, the segment is marked for review and a segment-level skip flag is added to the output. The segment-level skip flag triggers a conservative strategy in subsequent control instruction orchestration. The modeling output is called stress deviation, and it includes both segment-level weights and grid point confidence labels, both written as fields with the same name to the data buffer of this step.

[0077] After stress deviation modeling is completed, the stress trajectory generation stage constructs the full-process trajectory based on the segment sequence and interface position. The trajectory is defined as a stress state sequence that progresses over time, and the state is composed of nodes within the segment and interface nodes. Trajectory generation first performs time equalization on the nodes within the segment, then inserts interface nodes to the boundaries of adjacent segments, and subsequently corrects the node order based on the switching nodes in the composite buffer deposition plan execution record. For segments with segment-level skip flags, trajectory generation uses a continuous interpolation strategy to reconstruct the time sequence. The interpolation strategy refers to the aforementioned segment-level weights and the rhythm of the same segment in adjacent batches to generate replacement nodes and record the replacement source in the traceability entry. The trajectory results and stress deviations together form a stress state set, which is directly read in the control command arrangement stage to construct the mapping between the controlled object and the control intensity.

[0078] Control command orchestration is executed by the process window adaptive controller. The process window adaptive controller is a parameter-linked module for epitaxial processes, controlling three types of objects: temperature, VIII ratio, and growth rate. The orchestration process first reads the boundary constraints and adjustable range of the device from the stress state set and the composite buffer deposition plan execution record to generate the feasible region of the controlled object. Then, it determines the adjustment sequence based on the priority of nodes within the segment. When a node displays a gradually changing state within the segment, the controlled object adopts a micro-gradient adjustment strategy, with the adjustment amplitude obtained by segment-level weight mapping. When a node displays a sudden interface change state, the controlled object adopts a short-time transition strategy, with the transition time and amplitude jointly determined by the interface node index and the adjustable range of the device. If there is a substitute node in the trajectory, the orchestration process automatically reduces the control intensity of that node and shortens its duration, while recording a conservative strategy marker in the traceability entry. After orchestration, a structured instruction set is generated. The instruction set includes the object identifier, target value, duration, transition slope, and effective time, and together with the batch number, forms the output field.

[0079] Alignment and mutual recognition are crucial throughout the entire data acquisition and control orchestration process. Time alignment establishes a primary reference using the device clock and surface state timestamps; device axis alignment establishes a primary reference using the segment sequence and switching nodes in the deposition plan; and structural axis alignment establishes a primary reference using the interface identifiers in the composite buffer layer structure. These three types of references are weighted and synthesized in the data channel to form an alignment matrix. The absence of any one of these references triggers a conservative strategy or offline verification. The mutual recognition mechanism is used to determine conflicting scenarios between the three types of measurements. If there is a trend conflict between curvature and reflection, the diffraction fringe sequence provides an arbitration node; if diffraction fringes are continuously missing, the curvature trend and reflection phase jointly complete the arbitration. The mutual recognition conclusion, along with its weights, is written into the traceability entry, providing a decision-making context for subsequent main steps.

[0080] Device-level anomaly handling covers two main categories: sensor-end anomalies and execution-end anomalies. Sensor-end anomalies include optical path drift, electron beam deflection, and phosphor screen saturation. The handling strategy employs a combination of short-window calibration, channel refresh, and downsampling to restore readability. Execution-end anomalies include temperature control section timeouts and flux fluctuations. The handling strategy is linked to the device status entries in the anomaly backtracking information, triggering temporary shutdowns, power reduction, and rollback to the previous stable node. Insertion markers, recovery trajectories, and reduction parameters generated during anomaly handling are all recorded. Subsequent main steps can read this information to employ conservative strategies in deposition sequence and linkage configurations.

[0081] This step also involves data quality management. The online representation dataset undergoes three quality checks before being written to the data buffer. The first check targets frame drops and jitter, using window sliding statistics to remove outliers and generate a resampling plan. The second check addresses segment order mapping errors, using cross-judgment of interface identifiers and interferometric phases to correct the intra-segment order. The third check addresses fringe sequence blurring, using matching and reconstruction with pattern templates from the same batch and segment; if matching fails, a segment-level skip flag is triggered. The quality check results form quality labels on the traceability entries, used to guide the weighting of control command arrangement.

[0082] To support seamless integration across main steps, this step performs archiving and publishing before completion. The archived objects include the final version of the online characterization dataset, stress deviations, stress trajectories, weight information, mutual recognition conclusions, anomaly records, and insertion markers. The published object is the process window adaptive control instruction, directly labeled as the output field name. This output serves as the primary input in the subsequent active layer deposition and delta-doping linkage in step S3, and is read at the process window adaptive control instruction input position in the corresponding sub-step to drive the deposition sequence configuration and linkage configuration of the barrier segment, spacer segment, channel segment, and cap segment. Simultaneously, the archived objects are read in the subsequent quantization acquisition and archiving stage of step S4, serving as a reference background for on-chip uniformity and batch classification. Related fields and composite buffer deposition plan execution records generate cross-validation, forming a closed-loop link from structure to data.

[0083] Stress deviation modeling and stress trajectory generation are key innovations disclosed here, therefore their working principles are fully revealed in this step. Stress deviation modeling obtains the intra-segment deviation through robust fitting of multi-source feature sets. This deviation corresponds to the difference in stress state under the same structural and process conditions within the same segment, and segment-level weights are used to express reliability. Stress trajectory generation reconstructs the stress evolution of the growth process by sequentially splicing intra-segment nodes and interface nodes. The trajectory not only provides the state at a single point but also expresses the transition relationship between segments, providing continuous scheduling reference for subsequent controlled objects. Together, these two constitute the driving source of the controller, and together with the adjustable range of the process window, determine the instruction set structure, thereby providing a reliable parameter scheduling path without introducing additional mechanistic assumptions.

[0084] In terms of device communication and operation scheduling, this step exchanges status with upstream and downstream units through the device control channel. The exchange with upstream step S1 involves the execution record of the composite buffer deposition plan and surface state timestamps, which are then registered at the data acquisition start point. The exchange with downstream step S3 involves process window adaptive control commands, which are queued after issuance and invoked in both deposition sequence configuration and linkage configuration stages. The exchange with subsequent step S4 involves the final version of the online characterization dataset and stress state set, used as prior input for quantitative acquisition and hierarchical models. All exchange activities are marked as replayable in the traceability entries to facilitate subsequent review of historical tasks.

[0085] To ensure that control command orchestration more closely mirrors device behavior, this step also performs offline verification of the execution operations at the object layer. Offline verification extracts samples from the same segment of historical batches, reads the corresponding stress deviations, stress trajectories, and command set structures, and constructs an overview of the device response. If significant differences occur in the same segment within the current batch, convergence acceleration or amplitude limiting is applied to the orchestration strategy to prevent unreasonable oscillations. The offline verification results are attached as tags to the metadata of the adaptive control commands in the process window. Subsequent step S3 directly reads these tags during command parsing and selects the scheduling sub-strategy accordingly.

[0086] The output products and their destinations for this step are naturally explained at the end of this paragraph. The output field, named "Process Window Adaptive Control Instruction," is published as a structured object to the process data warehouse and read from the input position of the "Process Window Adaptive Control Instruction" in subsequent step S3. This input drives the generation and execution of the active layer deposition plan and the delta-doping linkage configuration. Simultaneously, the final version of the online characterization dataset from this step, along with stress deviation, stress trajectory, weight information, mutual recognition conclusions, anomaly records, and insertion markers, are read as background data in the quantization acquisition and archiving stage of subsequent step S4, completing data integration across main steps. Through the aforementioned archiving and publishing actions, batch-level traceability entries continue to extend, forming a complete chain in subsequent main steps.

[0087] The technical effects of this step can be summarized as follows: Through the synchronous acquisition and alignment of curvature, reflection and diffraction, and through the linkage processing of stress deviation modeling, stress trajectory generation and control command arrangement, a structured process window adaptive control command is obtained, which forms a stable connection and data backtracking channel with the preceding and following main steps.

[0088] Step S3: Perform the sequential configuration of barrier, spacer layer, channel and cap layer deposition, δ doping linkage configuration and epitaxial deposition process to generate active layer structure;

[0089] The input sources for this step are the process window adaptive control instructions issued in step S2 above and the active layer stack parameters registered in the process database. The process window adaptive control instructions refer to a structured set of device control objects, including temperature targets, transition slopes, durations, activation times, flux ratios, and device adjustable ranges, derived from the combined arrangement results of synchronous acquisition, stress deviation modeling, and stress trajectory generation. The active layer stack parameters refer to a set of sequences, material families, nominal thickness values, doping locations, and surface state constraints for the target PHEMT layer system, including entries such as deposition channel mapping, clean gas flow, and switching node codes. Specifically, the aforementioned two types of inputs are batch-bound within the task scheduler to generate a draft active layer deposition plan and a draft delta-doping linkage constraint plan to be executed. Corresponding traceability entries are created in the process data warehouse. These traceability entries record the configuration version, device response, and anomaly handling throughout this step, and at the end, establish a reference relationship with the active layer structure for subsequent steps to read.

[0090] Specifically, the deposition sequence configuration of the barrier, spacer, channel, and cap layers is completed by the planning unit. The planning unit parses the sequence field in the active layer stack parameters, constructs process segments in the order of barrier first, spacer in the middle, channel support, and cap layer top, and sets start and end windows and switching thresholds for each process segment according to the temperature target and flux ratio in the process window adaptive control command. If historical data shows thermal inertia differences in similar substrates, the planning unit inserts a soft-start segment before the corresponding process segment. The soft-start segment uses low flux and short duration gating, and the triggering condition originates from the device clock and the stability marker of the reflection signal. After planning is completed, a structure object named "Active Layer Deposition Plan" is output, containing a segment sequence table, parameter trajectory, switching node list, and sampling point label, and a traceability entry is written. This object is directly referenced by the instruction parser and execution controller in this step. Abnormal branches of the planning generation action include missing sequence layers and channel mapping conflicts. Both types of abnormalities trigger a rollback strategy and record the conflict field and manual handling ticket number.

[0091] Furthermore, the delta-doping linkage configuration is constructed by the linkage orchestration unit based on the active layer deposition plan. Delta-doping refers to the formation of highly doped surface sources within an extremely thin thickness range, implemented through a combination strategy of pulse supply, short dwell time, and carrier gas purging. The linkage orchestration unit extracts the doping location, target surface source density, and relevant spacer layer thickness from the active layer stack parameters, and establishes a three-segment pulse sequence according to the adjustable range given by the process window adaptive control command. The three segments are preheating purging, main pulse delivery, and residual purging. If a segment has a conservative stress state marker, the linkage orchestration unit compresses the main pulse duration and reduces the flux, and then provides a synchronous correction to the spacer layer thickness. The correction direction and magnitude are derived from the segment-level weight mapping. The generated result of the delta-doping linkage configuration includes a surface source channel on / off sequence table, a spacer layer thickness correction table, and a matching temperature fine-tuning table. The three tables are registered as the same version in the traceability entries, and the output field is named delta-doping linkage configuration. In this step, it drives the epitaxial deposition process together with the active layer deposition plan.

[0092] Epitaxial deposition is performed by the metal-organic chemical vapor deposition (MOCVD) equipment, scheduled by the execution controller. Before execution, the instruction resolver converts the process window adaptive control instructions into a sequence of device instructions, which includes the heating channel target, precursor channel target, carrier gas flow rate, pressure window, and the effective time of the switching node. Upon entering the barrier deposition section, the execution controller calls the temperature target and flux ratio according to the active layer deposition plan, activates the metal-organic source and nitrogen source, records the reflection intensity and exhaust gas indication. If the switching threshold is reached, the parameter status within the section is written into the traceability entry, and the process transitions to the spacer layer deposition section. The spacer layer deposition section uses a low-doped background and a stable migration environment. If the linkage scheduling unit provides a spacer layer thickness correction table, the execution controller fine-tunes the duration according to the correction table and maintains a smooth flux transition. At the end of the section, a sampling trigger flag is output for subsequent offline metering. The channel deposition section provides the conditions for the formation of two-dimensional electron gas. The controller invokes the conservative strategy label and section-level weights in the adaptive control instructions of the process window to suppress excessive transition probability and maintain a smooth growth interface. If fluctuations in the exhaust gas are detected in this section, a short-term power reduction is triggered, followed by a gradual return to the target window. The cap deposition section is responsible for contact layer construction. At the beginning of the section, channel refreshing is performed, and surface state conditioning atmosphere is activated. At the end of the section, a clean gas process is invoked to complete residual convergence.

[0093] Within each deposition segment, the linkage scheduling unit triggers the delta-doping linkage configuration. The execution controller initiates the main pulse delivery according to the area source channel on / off sequence list near the spacer layer deposition segment or the boundary between the barrier and the channel. After the pulse ends, the carrier gas is controlled for purging and emission according to the residual purging strategy, and then the nominal flux is restored. If the device feedback indicates a sluggish response from the area source channel, the execution controller will temporarily insert a compensation pulse and shorten the duration of subsequent spacer layer growth. The compensation action and the shortening magnitude are written into the traceability entry, and a verification tag is generated at the end of the segment. The verification tag is used for subsequent quantitative acquisition and reading. If a segment-level skip flag exists, the delta-doping linkage configuration for this segment switches to a conservative strategy, the main pulse amplitude is reduced and the dwell time is shortened, while the purging intensity is increased. Related adjustments are written into the traceability entry.

[0094] To ensure consistency between timing and structural axes, the data channel initiates dual-axis alignment during execution. Timing axis alignment constructs an alignment matrix based on the device clock and effective time fields, while structural axis alignment establishes a mapping relationship based on the segment sequence table and the switching node list. If a gap occurs in either axis, the data channel generates an insertion marker and triggers short-window resampling or parameter freezing. After freezing, the alignment is restored according to the alignment matrix. The alignment status is written to the traceability entry with an alignment tag. Alignment failure triggers a conservative strategy and generates a manual review prompt. The above alignment and resampling do not change the version of the active layer deposition plan and the delta-doping linkage configuration; they only generate patch records during execution. These patch records are archived along with the active layer structure at the end of this step.

[0095] Anomalies are categorized into three types: sensor anomalies, supply anomalies, and temperature control anomalies. Sensor anomalies include reflective probe drift and signal saturation. The controller is invoked to refresh the channel and reset the sampling gain, maintaining the growth rate at a low level during this process. After a successful reset, recovery proceeds as planned. Supply anomalies include fluctuations in the metal-organic source and carrier gas pressure disturbances. The device switches to the bypass channel and triggers a purge before returning to the main channel. Temperature control anomalies include heating zone timeouts and cooling overshoots. The device performs step-by-step repair and records the extent of the overshoot. All anomalies generate event nodes in the traceability entries. These event nodes include the trigger time, segment sequence position, temporary parameters, and recovery path for subsequent analysis.

[0096] On the communication and release side, this step generates two levels of data output at the end of the segment and the end of the batch. The end-of-segment output is a set of execution fragments and in-situ markers within the segment, used to construct an online snapshot. This snapshot is not publicly released but is written into a traceability entry. The end-of-batch output is a complete active layer structure, execution record, and verification label. The active layer structure refers to the active layer stack assembled in sequence and verified at the end of the segment, including the hierarchical relationship between barrier and spacer layers, channels and cap layers, as well as nominal thickness, doping location, and interface identifiers. The execution record is a joint sequence of parameter trajectories, switching times, and anomaly patches. The verification label refers to the sampling trigger and compensation traces generated in the spacer layer segment and doping segment. The above three are archived in the process data warehouse by batch. The output field named "Active Layer Structure" will be read from the active layer structure input position in subsequent step S4, used to advance low-damage annealing, surface passivation, quantitative acquisition and archiving, batch classification, and anomaly backtracking. The execution record and verification label are referenced as background information in the quantitative acquisition and archiving stage of step S4, used to construct statistical calibers and classification criteria.

[0097] This step also includes an offline verification channel. Offline verification selects the target section from the end-of-segment snapshot, invoking measurement tasks for surface morphology, thickness, and doping distribution. The measurement system includes atomic force microscopy, step height scanning, and secondary ion mass spectrometry (SIMS). The results returned by the offline verification channel are cross-referenced with the execution record. If the difference exceeds the tolerance, a deviation entry is added to the traceability entries and pushed to the downstream step S4 quantization acquisition stage as a key inspection target. Offline verification does not change the active layer structure but outputs verification instructions, which are published alongside the batch number and can be read by subsequent steps.

[0098] To ensure the adaptive control commands for the process window perfectly align with the device behavior, the command parser continuously monitors command deviation during execution. Deviation is defined as the difference between the device feedback and the target trajectory. The parser triggers minor corrections based on the deviation and records the correction amount. If the cumulative number of corrections exceeds a certain threshold within a process segment, the parser writes a segment stability warning to the traceability entry and suggests updating the reference boundary of the active layer stack parameters in subsequent batches. This suggestion is archived along with the active layer structure and execution records at the end of this step, allowing subsequent step S4 to set finer-grained grading thresholds.

[0099] Regarding the connection with the preceding and following main steps, this step reads the process window adaptive control command from step S2 and converts it into an execution action. After completion, it publishes the active layer structure to the processing link of step S4, and simultaneously transmits the execution record and verification tag as data background to the quantization acquisition and archiving stage of step S4. If step S4 determines that a certain batch needs to be reviewed during classification and backtracking, the feedback will be transmitted back to the planning and generation unit of this step through the traceability entry. The planning and generation unit updates the sequence parameter boundary and doping pulse strategy accordingly, and the update action takes effect in the next batch, thus forming a closed loop across the main steps.

[0100] In summary, this step revolves around the adaptive control commands of the process window and the parameters of the active layer stack. It completes the configuration of the deposition sequence of the barrier, spacer, channel, and cap layers, the configuration of the delta doping linkage, and the epitaxial deposition process, generating the externally released active layer structure. The output field name is "active layer structure" and is called by the active layer structure input position in the subsequent step S4. The execution record and verification label are also archived simultaneously and referenced by the subsequent quantitative acquisition and hierarchical model. The traceability entries record the configuration version, device response, and anomaly handling throughout the entire process.

[0101] The technical effects of this step can be summarized as follows: through sequential configuration and linkage arrangement and coordinated operation of device execution, a dual-path output of structure and data is formed, completing a stable transition from control commands to layer construction, and providing an active layer structure and execution record that can be directly referenced for subsequent annealing passivation and quantization grading.

[0102] Step S4: Perform low-damage annealing, surface passivation and quantitative data acquisition, archiving and batch classification, and anomaly backtracking to construct a quality inspection classification and anomaly backtracking structure;

[0103] The input sources for this step are the active layer structure, execution record, and verification tags released in step S3 above, and the process window adaptive control instructions generated in step S2 are read simultaneously as the scheduling basis for temperature, flux, duration, and transition slope. The active layer structure refers to a stack object completed in sequence, containing barrier, spacer, channel, and cap layers, including fields such as interface identifier, nominal thickness, doping location, and segment sequence table. The execution record refers to the joint sequence of parameter trajectories, switching times, and anomaly patches during the deposition process. The verification tags refer to the sampling trigger and compensation traces generated in the spacer and doping segments. The process window adaptive control instructions refer to a structured set of control objects, covering temperature targets, flux ratios, duration, activation time, and adjustable range. Specifically, the aforementioned objects are sent as joint inputs to the post-processing scheduler. The post-processing scheduler completes batch binding and alignment registration, generates the starting states of annealing and passivation tasks, and establishes traceability entries. The traceability entries record the device status, data flow, and anomaly handling throughout this step, and establish a reference relationship with the output of this step at the end of the step, so that they can be read by the composite buffer configuration list stage of the next round step S1.

[0104] The low-damage annealing process revolves around atmosphere management and the heating / cooling programs and dwell time intervals. Low-damage annealing refers to a heat treatment sequence performed while maintaining lattice stability and preventing new interface damage. Inert or weakly reducing atmospheres are commonly used, and the gas supply channels operate in the inlet and outlet sequence under the control of the scheduler. In the early stage of annealing, the unit control unit completes the wafer placement, cavity evacuation, and leak testing, and establishes a temperature zone mapping by reading the interface markers and segment sequence table from the active layer structure. During the heating stage, a stepped trajectory is generated according to the temperature target and transition slope in the process window adaptive control command. The unit writes a timestamp and atmosphere concentration at each step node. If the execution record indicates a timeout or reduction patch in a certain segment, a slow-down segment is added at the corresponding node and a slow-down marker is recorded. During the isothermal stage, the exhaust gas indicator, optical reflection intensity, and cavity pressure stability are continuously monitored. If fluctuations occur, a short-window calibration is triggered and an insertion marker is written. The cooling stage employs a segmented drop strategy. Short stop segments are inserted between segments based on interface markers. These short stop segments are used to release stress concentration, and the timing and duration of all short stop segments are written into traceability entries. To support process observability, the online metering module records temperature readings, chamber pressure readings, and gas flow rates, which are then written into the post-processing set via the data channel. The interim product of low-damage annealing is the annealed state structure, which serves as the input for surface passivation within this step. Simultaneously, annealing process record entries are generated in the data channel for aperture mapping in subsequent quantitative acquisition.

[0105] Surface passivation revolves around the construction of surface terminal bonds and the suppression of interface states. Surface passivation refers to a series of processes that form stable terminal bonds and a protective layer on the surface of the active layer, which can employ sulfidation, nitriding, fluorination, or a dielectric sealing path. The sulfidation path introduces sulfur-containing reaction precursors and completes adsorption and displacement within a short period; the nitriding path uses an active nitrogen source to form surface nitrogen terminals; the fluorination path constructs strong bonded terminals; and the dielectric sealing path encapsulates the interface through a thin dielectric layer. If atomic layer deposition (ALD) is used to construct the dielectric sealing layer, the deposition control unit performs multi-cycle stacking according to the rhythm of pulse introduction, dwell, and sweep, and records an adsorption stability marker at the end of each cycle. If a plasma-assisted route is used, the window is composed of three parameters: power, bias, and duration, with the upper and lower limits of the window derived from the adjustable range of the process window adaptive control command. During surface passivation, the device places sampling point markers at the interface markings, and the points are marked with sampling trigger traces from the reference calibration labels, thus forming a one-to-one mapping with the previous deposition sampling. The stage product of surface passivation is the post-processing layer system. This object is used as the measurement object for quantitative acquisition within this step, and at the same time, passivation process record entries are generated and included in the post-processing process set.

[0106] The quantitative acquisition process revolves around four categories of indicators: electrical, morphological, structural, and chemical. Electrical acquisition employs a four-probe sheet resistance measurement and Hall effect (HE) testing. The measurement system reads data from multiple points within the sheet and provides calculated mobility and carrier concentration results along with confidence markers. Morphological acquisition utilizes atomic force microscopy (AFM) and step height scanning to generate descriptive fields such as surface roughness and step density. Structural acquisition employs X-ray diffraction (XRD) and rocking curves, scanning for symmetric and asymmetric configurations, outputting peak positions, full width at half maximum (FWHM), and mismatch indicators. Chemical acquisition utilizes secondary ion mass spectrometry (SIMS), photoluminescence (PL), and X-ray photoelectron spectroscopy (XPS) to output doping depth distribution, radiation recombination indicators, and surface chemical state descriptions. The data acquisition task is triggered by the measurement scheduler according to the alignment of the annealed structure and the post-processing layer. Sampling points follow a combination principle of center, edge, diagonal, and local hotspot combinations within the image. The sampling order prioritizes electrical parameters, followed by morphological parameters, and then structural and chemical parameters. If a device returns missing frames or saturation, the measurement scheduler triggers a short-window retest and writes an insertion mark in the traceability entry. If multiple retests at the same point still result in discrete out-of-limit readings, that point is listed as a verification object and its weight is reduced during subsequent grading. The interim product of the quantitative acquisition is process quality control data, which includes four fields: electrical, morphological, structural, and chemical, along with sampling coordinates, timestamps, and device version numbers. This process quality control data serves as input to the archiving and grading engine within this step, and also as evidence for downstream anomaly backtracking.

[0107] The archiving process revolves around data models and version control systems. Archived objects cover annealing process records, passivation process records, process quality control data, device status, sampling strategies, insertion tags, and a list of review objects. The archiving process first creates a batch-level directory in the process data warehouse and registers the version number and generation time, then serializes and writes the data according to object type. If an object references an execution record or verification tag, a cross-step reference relationship is established, and a jump pointer is written at the reference point, pointing to the corresponding entry in step S3 or the stress state set in step S2. After archiving is complete, a release summary is generated, listing readable fields, source paths, and change records, serving as a scheduling index for the hierarchical engine and anomaly backtracking processing. The interim product of the archiving process is the archive summary object, which is not released externally but is only available for the engine to read within this step.

[0108] The batch grading process revolves around a rule engine and evidence synthesis. The rule engine reads process quality control data, execution records, verification tags, and archived summary objects, constructing feature groups according to hierarchical mapping relationships. These feature groups include sheet resistance statistics, mobility statistics, surface roughness statistics, peak position, full width at half maximum (FWHM), doping depth shift, recombination luminescence intensity, and surface chemical state indices. Evidence synthesis follows a structure-first, then electrical-first, then chemical sequence. First, the correspondence between potential barriers and spacer layers, and between channels and cap layers is established in the hierarchical mapping. Then, feature groups for each layer are collected from these correspondences, ultimately forming grading in both intra-sheet and inter-sheet dimensions. If the execution record shows an abnormal patch or conservative strategy in a certain segment, the feature weight of that layer is reduced in the evidence synthesis of the corresponding layer. If the verification tag shows a compensation pulse or shortened duration behavior, a watchlist is set on both sides of the grading boundary of the corresponding layer, and samples within the watchlist enter the manual review queue. The grading results are expressed using both hierarchical and batch scales. The hierarchical scale is used to label the state of a single layer, while the batch scale is used to assign values ​​to the entire sheet. The phased output of the grading process is the batch grading record. This record includes the tier, batch, and observation band markers, as well as the reasons for the demotion, and is written into the traceability entries and process data warehouse.

[0109] The anomaly backtracking process revolves around causal chain construction and path reconstruction. The engine first scans the observation band markers and reasons for weight reduction in the batch classification records. Then, it traces back along the reference path in the archived summary object to process quality inspection data, annealing process records, and passivation process records. It then jumps to the execution record of step S3 and the stress state set of step S2. Path reconstruction follows both chronological order and segmentation table constraints. At each node, it records the trigger time, device instructions, feedback readings, and insertion markers. If the same event is found to have repeated traces in multiple locations, parallel branches are constructed and weighted according to the strength of evidence and reading stability. The results of the anomaly backtracking are written as a structured object, including a problem list, path diagram, key node set, and suggested attention segments. If path reconstruction triggers maintenance instructions at the equipment level or window revision suggestions at the process level, a prompt marker is added to the object, and a rectification receipt space is generated. This space is filled in by the relevant responsible person in subsequent batches. The interim product of the anomaly backtracking process is the anomaly backtracking structure, which is merged with the batch classification records at the end of this step to generate the final output.

[0110] To support seamless transitions across main steps, a release and closure process is performed at the end of this step. The released object is the quality inspection grading and anomaly backtracking structure. This output field name is registered in the data warehouse and assigned a batch number, then written into the traceability entry as the final state. This object is read by the composite buffer configuration list during the next round of production preparation, serving as a boundary reference for gradient component paths, superlattice periodic sequences, and dislocation filter layer stacking order. It also provides historical weights for the online characterization dataset sampling strategy in step S2 and provides segment-level reminders for the active layer deposition plan and delta-doping linkage configuration in step S3. Simultaneously, a replayable marker is generated. The replay entry supports retrieval by time, segment order, and level for subsequent review or external auditing.

[0111] Anomaly handling on the communication and execution sides is integrated throughout all stages. If the purity of the annealing gas source fluctuates, the scheduler triggers channel switching and short-window steady-state monitoring, marking the fluctuating period as a risk zone. Risk zone marking uses a weighting strategy during the classification phase. If plasma jitter occurs during the passivation process, the device reduces power and extends the dwell time, while recording the jitter duration and number of jitters. If instrument maintenance occurs across days during quantization acquisition, the measurement scheduler marks the maintenance window in the archived summary object and removes data within the window. A wait-and-see approach is subsequently used to balance the uncertainty caused by missing samples. All of the above actions form event nodes in the traceability entries, which are mapped to key nodes during path reconstruction.

[0112] To ensure data consistency and version uniformity, a summary verification is performed before archiving. The verification targets five categories of objects: annealing process records, passivation process records, process quality inspection data, batch classification records, and anomaly backtracking structures. The verification process checks the incrementability of timestamps, the completeness of hierarchical mappings, and the reachability of reference paths. If any gaps are found, the process reverts to the corresponding step to complete the correction or marks it as skipped. After the verification passes, the release action is triggered, and all objects enter an unchangeable state. Any subsequent revisions will generate incremental entries attached below the traceability entries for later spot checks or retrospective reviews.

[0113] The output and destination of this step are explained at the end of this section. The output field is named Quality Inspection Grading and Anomaly Backtracking Structure. This object is published to the process data warehouse in a structured form and is directly read in the composite buffer configuration list stage of the next round, S1, as the basis for composite buffer parameter boundaries and monitoring point deployment. It is also called as historical background in the sampling and modeling stage of subsequent step S2, and parsed as segment-level reminders in the sequential configuration and linkage orchestration of subsequent step S3, forming a closed-loop flow from post-processing to front-end configuration. In addition to the main output, the annealed state structure, post-processing hierarchy, and the path diagrams within the process quality inspection data, batch grading records, and anomaly backtracking structure are all archived with the batch for subsequent review or external sampling.

[0114] The technical effects of this step can be summarized as follows: through the joint operation of process scheduling, quantitative acquisition, archiving, grading, and anomaly backtracking of low-damage annealing and surface passivation, a structured object quality inspection grading and anomaly backtracking structure for batch control is formed, and the output object connects to multiple preceding and subsequent stages and completes the data closure loop.

[0115] Example 2: Figure 2 A structural block diagram of an interface stress-controlled silicon-based PHEMT epitaxial growth apparatus 00 according to an embodiment of the present invention is shown. Figure 2 As shown, the structure may include:

[0116] The device control unit 101 is used to schedule the curvature measurement subsystem, reflection measurement subsystem, and diffraction measurement subsystem to start up and acquire online characterization signals under the same trigger source, and output synchronization timing to the data channel and structure channel. Specifically, it receives the trigger source and surface state timestamp registered from the traceability management unit, and the segment sequence and interface identification baseline registered from the structure channel. It calls the three types of measurement interfaces, namely optical path scanning, reflection detection, and diffraction imaging, to complete the pre-start checks, channel preparation, and sampling parameter loading. When the trigger source arrives, it issues a start command and records the start time and device clock deviation. During sampling, it performs jitter suppression, sampling gain correction, and channel refresh. For segments with optical path offset, fluorescent screen saturation, or beam interruption, it generates insertion marks and issues short-window resampling commands. After resampling, it merges segments and updates the timestamp. The output objects are the synchronization timing and online characterization signal snapshots, which are sent to the data channel for alignment management and to the structure channel for segment sequence mapping and interface indication. At the same time, the insertion marks are sent back to the traceability management unit for registration as event nodes.

[0117] Data channel 102 is used to perform time axis and device axis alignment management on online characterization signals and to segment and splice them according to segment order and interface identifiers, outputting the online characterization dataset to the stress deviation modeling unit. Specifically, it receives synchronous timing and online characterization signal snapshots from the device control unit, and segment order and interface identifier baselines and mapping constraints from the structural channel, constructs time references and device references and performs alignment management, generates offset correction amounts and writes alignment labels for scenarios with inconsistent sampling start and end or channel lag, performs segment trimming and splicing according to segment order and interface identifiers, inserts delay labels for segments with switching delays and retains the original timestamps, triggers short window interpolation and labels the source when encountering missing frames, and outputs the online characterization dataset, which is directly connected to the stress deviation modeling unit for call, while delivering the alignment labels and delay labels to the mutual recognition unit for reference, and registering the version and writing order in the traceability management unit.

[0118] Structural channel 103 is used to establish segment sequence mapping and interface indication, and to collaboratively generate an online characterization dataset with the data channel, providing structural constraints to the stress deviation modeling unit. Specifically, it receives synchronous timing data from the device control unit, a composite buffer layer structure summary from the traceability management unit, and a deposition plan execution record summary, generates a segment sequence mapping table and an interface indication table, and adds prompts for abnormal switching nodes. When a mapping gap is encountered, a temporary placeholder is created and the verification source is marked. The segment sequence mapping table and interface indication table are pushed to the data channel to participate in segment trimming and splicing, and the structural constraints are synchronously output to the stress deviation modeling unit. When segment skipping or placeholder scenarios are involved, a weight reduction indication is added. The output object is a set of structural constraints, which is jointly referenced by the stress deviation modeling unit and the mutual recognition unit in the feature extraction and arbitration stages. At the same time, the mapping version and placeholder list are registered in the traceability management unit.

[0119] The mutual recognition unit 104 is used to arbitrate and form weights based on fringe sequence or phase and trend when there are contradictions between curvature, reflection and diffraction, and provides the arbitration results to the stress deviation modeling unit and the process window adaptive controller. Specifically, it receives alignment tags and time series summaries of each channel from the data channel and interface indication table from the structure channel, establishes consistency checks on the same window segments, triggers the arbitration process when there are trend contradictions or missing fringes, and gives arbitration nodes and weight allocation according to the credibility of the fringe sequence or the joint trend of phase and curvature; it generates conservative tags and reduces the weight of the segments covered by the inserted tags; after arbitration, it outputs the arbitration results to the stress deviation modeling unit for feature screening and weight setting, and simultaneously provides them to the process window adaptive controller as a reference for subsequent target value arrangement; the arbitration process and weight allocation table are written to the traceability management unit to form event records and weight snapshots.

[0120] The stress deviation modeling unit 105 is used to construct a mapping from the metric space to the stress space based on the online characterization dataset and the composite buffer layer structure and deposition plan execution records, and to generate stress deviation, segment-level weights, and confidence labels, which are then output to the stress trajectory generation unit. Specifically, it receives the online characterization dataset from the data channel, the structural constraint set from the structure channel, and the arbitration results from the mutual recognition unit. It establishes node constraints with the deposition plan execution record summary registered in the traceability management unit, performs window alignment and grid point setting, feature extraction and denoising, robust fitting and edge removal, adopts a conservative strategy for the arbitration weight reduction section and outputs the segment-level weight reduction; it provides stress estimation and intra-segment baseline difference for each grid point, generates stress deviation, and generates confidence labels; the output objects are stress deviation, segment-level weights, and confidence labels, which are sent to the stress trajectory generation unit splicing node, and the modeling version and abnormal segment list are registered in the traceability management unit.

[0121] The stress trajectory generation unit 106 is used to splice nodes according to the segment sequence and interface position, and form a stress state set by balancing the duration and interpolating the nodes within the segment, and output it to the process window adaptive controller. Specifically, it receives stress deviation, segment-level weights and confidence labels from the stress deviation modeling unit, segment sequence mapping table and interface indicator table from the structural channel, constructs a joint sequence of time nodes and interface nodes, performs duration balancing and boundary correction, performs continuous interpolation for segments with skipped segments or missing frames and marks the source of the replacement; generates a stress state set carrying segment-level weights, confidence labels and replacement labels, and sends it to the process window adaptive controller for the arrangement of object target values, action duration, transition slope and effective time, and registers the trajectory version and replacement list in the traceability management unit.

[0122] The process window adaptive controller 107 is used to read the stress state set, boundary constraints, and target values, durations, transition slopes, and effective times of the device adjustable range arrangement objects, and generate a structured instruction set, which is then output to the traceability management unit and the downstream execution end. Specifically, it receives the stress state set, segment-level weights, and substitution labels from the stress trajectory generation unit, the interface indicator table and segment sequence mapping table from the structural channel, and the device status and adjustable range summary from the traceability management unit. It provides target values, durations, transition slopes, and effective times for each object. When a substitution label is encountered, a conservative strategy is triggered and the action interval is shortened. The structured instruction set is generated and sent to the downstream execution end. At the same time, the instruction set number, effective time, and conservative strategy mark are sent back to the traceability management unit for registration, for subsequent querying and verification.

[0123] The traceability management unit 108 is used to create batch-level traceability entries and record insertion marks, abnormal records, weights, and archiving and publishing associations. It provides a playback entry point to upstream data and a reference point to the post-processing stage of downstream methods. Specifically, it receives data acquisition events from the device control unit, alignment labels and mapping versions from the data channel and structural channel, arbitration results from the mutual recognition unit, modeling versions from the stress deviation modeling unit, trajectory versions and alternative lists from the stress trajectory generation unit, and instruction set numbers and effective times from the process window adaptive controller. It creates batch-level entries and establishes time and object indexes, records insertion marks, abnormal records, weight snapshots, archiving paths, and publishing associations. The output objects are playback entry points and reference paths, providing trigger source verification and historical calls to the device control unit, and archiving queries and hierarchical backtracking calls to the post-processing stage of methods, forming a closed-loop link from data acquisition to control publishing and then to data archiving.

[0124] The technical solutions of the present invention are not limited to the specific embodiments described above. Any technical modifications made in accordance with the technical solutions of the present invention fall within the protection scope of the present invention.

Claims

1. A method for interfacial stress-controlled silicon-based PHEMT epitaxial growth, characterized in that, Includes the following steps: S1: Obtain the configuration parameters of the silicon substrate and the composite buffer, perform cleaning, in-situ degassing, surface reconstruction and composite buffer epitaxial deposition based on gradient composition path, superlattice periodic sequence and dislocation filter layer stacking order to generate composite buffer layer structure; S2: Execute synchronous acquisition of curvature, reflection and diffraction using the same trigger source; execute stress deviation modeling and stress trajectory generation using online characterization datasets; process control commands and generate adaptive control commands for the process window. S3: Executes adaptive control instructions for the process window and active layer stack parameters to configure the deposition sequence of the barrier, spacer layer, channel and cap layer, configure the δ-doping linkage and perform epitaxial deposition to generate the active layer structure. S4: Executes adaptive control instructions including active layer structure, execution record, verification label and process window, performs low-damage annealing, surface passivation and quantitative acquisition, archiving and batch classification based on four types of indicators: electrical, morphological, structural and chemical, and anomaly backtracking, and constructs quality inspection classification and anomaly backtracking structure.

2. The interface stress-controlled silicon-based PHEMT epitaxial growth method according to claim 1, characterized in that: The configuration parameters for the silicon substrate and the composite buffer include: Silicon substrates include size specifications, orientation type, surface roughness, defect density level, and edge bevel structure; The composite buffer configuration parameters include gradient component path, superlattice periodic sequence, dislocation filter layer stacking order, carrier gas type, precursor channel mapping, temperature program, and growth rate program.

3. The interface stress-controlled silicon-based PHEMT epitaxial growth method according to claim 1, characterized in that: The process of simultaneously acquiring curvature, reflection, and diffraction data using the same trigger source also includes: Curvature, reflection and diffraction are acquired synchronously by the device control unit. The three measurement subsystems are started by the same trigger source. The trigger source is generated after the wafer is inserted into the cavity and must be of the same origin as the surface state timestamp. The curvature measurement subsystem uses an optical curvature monitoring spot to scan along the wafer radius to obtain curvature timing and radial segmentation statistics. The reflection measurement subsystem records the interference intensity under fixed incident angle and multi-wavelength sequence conditions, and generates reflection intensity time series and standing wave node index; The diffraction measurement subsystem acquires fringe patterns through an electron gun and a fluorescent screen, forming fringe sequences and fringe spacing statistics.

4. The interface stress-controlled silicon-based PHEMT epitaxial growth method according to claim 1, characterized in that: The process of stress deviation modeling also includes: Complete the window alignment of curvature signal, reflection signal, and diffraction signal on the time axis; Set grid points on the structural axis according to the segment sequence and interface layout; For each grid point, a feature group is generated, which includes curvature guidance features, interference phase guidance features, and fringe spacing guidance features; Denoising, robust fitting, and edge removal are performed on the feature group. Stress estimation is obtained through node constraints, and then the difference is formed with the intra-segment baseline to obtain the stress deviation.

5. The interface stress-controlled silicon-based PHEMT epitaxial growth method according to claim 1, characterized in that: The process of generating stress trajectories also includes: Perform time equalization on nodes within a segment and insert interface nodes at the boundaries of adjacent segments; The node order was corrected based on the switching nodes in the composite buffer deposition plan execution record; For segments with segment-level skip flags, a continuous interpolation strategy is used to reconstruct the timing, with the interpolation strategy referencing the segment-level weights and the rhythm of the same segment in adjacent batches.

6. The interface stress-controlled silicon-based PHEMT epitaxial growth method according to claim 1, characterized in that: The process of control instruction programming and processing also includes: Read the boundary constraints and device adjustable range from the stress state set and the composite buffer deposition plan execution record to generate the feasible region of the control object; The adjustment order is determined based on the priority of nodes within the segment; When a node is displayed as a slowly changing state within a segment, the control object adopts a micro-gradient adjustment strategy, and the adjustment range is obtained by segment-level weight mapping. When a node displays a sudden change in the interface state, the controlled object adopts a short-time transition strategy. The transition time and magnitude are jointly determined by the interface node index and the adjustable range of the device.

7. The interface stress-controlled silicon-based PHEMT epitaxial growth method according to claim 1, characterized in that: The process of composite buffer epitaxial deposition also includes: The process of implementing the gradient component layer is to form a continuous component distribution that gradually transitions from the low strain region to the target strain region by synchronously arranging the precursor channel mapping and temperature program. The process of realizing a superlattice involves alternating deposition of two or more thin layers according to the periodic sequence in the composite buffer configuration list, so that the interface appears periodically and induces dislocation bending. The dislocation filtering layer is implemented by introducing a thin layer with specific crystal plane inclination and step density conditions, so that through-type dislocations can bifurcate or terminate during the expansion process.

8. The interface stress-controlled silicon-based PHEMT epitaxial growth method according to claim 1, characterized in that: The in-situ degassing process also includes: The in-situ degassing process is completed in a metal-organic chemical vapor deposition equipment. The operation sequence includes wafer loading, evacuation, heating, stabilization, cooling and transfer to surface reconstruction. The surface reconstruction process is divided into three stages: precursor pre-exposure, temperature fine-tuning, and surface state determination.

9. The interface stress-controlled silicon-based PHEMT epitaxial growth method according to claim 1, characterized in that: The online representation dataset undergoes three quality checks before being written to the data buffer. The first quality check targets frame loss and jitter by using window sliding statistics to remove outlier segments. The second quality check targets segment order mapping errors by using cross-judgment of interface identifiers and interference phases to correct the intra-segment order. The third quality check targets fringe sequence blurring by using pattern templates from the same batch and segment for matching and reconstruction.

10. A silicon-based PHEMT epitaxial growth apparatus with interface stress regulation, applied to the method according to any one of claims 1-9, characterized in that, include: The device control unit is used to schedule the curvature measurement subsystem, the reflection measurement subsystem, and the diffraction measurement subsystem to start up with the same trigger source and acquire online characterization signals, and output synchronous timing to the data channel and the structure channel; The data channel is used to perform time axis and device axis alignment management on the online characterization signal and to segment and splice it according to the segment sequence and interface identifier, and output the online characterization dataset to the stress deviation modeling unit; The structural channel is used to establish segment sequence mapping and interface indication, and to work with the data channel to generate an online characterization dataset, providing structural constraints to the stress deviation modeling unit; The mutual recognition unit is used to arbitrate and form weights based on the fringe sequence or phase and trend when there is a contradiction between curvature and reflection and diffraction, and provides the arbitration results to the stress deviation modeling unit and the process window adaptive controller. The stress deviation modeling unit is used to construct a mapping from the metric space to the stress space based on the online characterization dataset and the composite buffer layer structure and deposition plan execution records, and to generate stress deviation, segment-level weights and confidence labels, which are then output to the stress trajectory generation unit. The stress trajectory generation unit is used to splice nodes according to the segment sequence and interface position, and form a stress state set for the time balancing and interpolation replacement nodes within the segment, and output it to the process window adaptive controller. The process window adaptive controller is used to read the stress state set, boundary constraints, and target values, duration of action, transition slope, and effective time of the device adjustable range arrangement object, and generate a structured instruction set, which is then output to the traceability management unit and the downstream execution end. The traceability management unit is used to create batch-level traceability entries and record insertion tags, exception records, weights, and associations with archiving and publishing. It provides a playback entry point to upstream data and provides references to the post-processing stage of downstream methods.

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