Multilayer electronic component

Abstract

This disclosure provides a multilayer electronic component, which may include: a body comprising a dielectric layer and an inner electrode, the dielectric layer comprising Ba, Ti, and Ca and having a plurality of first dielectric grains and a plurality of second dielectric grains; and an outer electrode disposed on the body. The plurality of first dielectric grains have a first core-shell structure comprising a first core and a first shell disposed on at least a portion of the first core, and the plurality of second dielectric grains have a second core-shell structure comprising a second core and a second shell disposed on at least a portion of the second core. The plurality of first dielectric grains satisfy S1-C1≥0.7at%, and the plurality of second dielectric grains satisfy C2-S2<0.5at%, wherein the average atomic percentage content of Ca included in the first core and the second core are C1 and C2, respectively, and the maximum atomic percentage content of Ca included in the first shell and the second shell are S1 and S2, respectively.

Description

[0001] This application claims the benefit of priority to Korean Patent Application No. 10-2024-0188195, filed on December 17, 2024, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0002] This disclosure relates to a multilayer electronic component. Background Technology

[0003] Multilayer ceramic capacitors (MLCCs, a type of multilayer electronic component) are chip capacitors mounted on printed circuit boards of various types of electronic products, such as image display devices (including liquid crystal displays (LCDs) and plasma display panels (PDPs)), computers, smartphones, and mobile phones, and used to charge or discharge them.

[0004] In the case of MLCCs used in automotive electronics, the need for high-temperature protection is increasing due to the harsher operating environments. However, BaTiO3 (BT), with a Curie temperature of approximately 120°C, suffers from a problem where its dielectric constant decreases rapidly at temperatures above 120°C.

[0005] (Ba) can be used 1-x Ca x TiO3 (BCT) improves the temperature coefficient of capacitance (TCC) of MLCCs, but compared with BT, BCT has the problem of having a lower room temperature dielectric constant.

[0006] Therefore, a method for forming dielectric layers by mixing BT and BCT has been proposed. However, further research is needed on the microstructure of the dielectric grains that constitute the dielectric layer in order to develop MLCCs with excellent electrostatic capacitance, temperature change characteristics and lifetime reliability.

[0007] [Existing Technical Documents] [Patent Literature] (Patent Document 1) Korean Patent No. 10-2013-0062343. Summary of the Invention

[0008] One aspect of this disclosure is to provide a highly reliable multilayer electronic component with excellent capacitance.

[0009] However, the problems to be solved by this disclosure are not limited to those described above, and the problems to be solved by this disclosure will be more readily understood in the process of describing specific embodiments of this disclosure.

[0010] A multilayer electronic component according to some embodiments of the present disclosure may include: a body including a dielectric layer and an inner electrode disposed alternately with the dielectric layer, the dielectric layer including Ba, Ti and Ca and having a plurality of first dielectric grains and a plurality of second dielectric grains; and an outer electrode disposed on the body, wherein the plurality of first dielectric grains may have a first core-shell structure, the first core-shell structure including a first core and a first shell disposed on at least a portion of the first core, and the plurality of second dielectric grains may have a second core-shell structure, the second core-shell structure including a second core and a second shell disposed on at least a portion of the second core, one or more of the plurality of first dielectric grains may satisfy S1-C1≥0.7at%, and one or more of the plurality of second dielectric grains may satisfy C2-S2<0.5at%, wherein the average content (at%) of Ca included in the first core and the second core are C1 and C2, respectively, and the maximum content (at%) of Ca included in the first shell and the second shell are S1 and S2, respectively. Attached Figure Description

[0011] The above and other aspects, features and advantages of this disclosure will become clearer from the following detailed embodiments, taken in conjunction with the accompanying drawings, in which: Figure 1 This is a perspective view schematically illustrating a multilayer electronic assembly according to an embodiment of the present disclosure.

[0012] Figure 2 It is along Figure 1 The cross-sectional view taken from line I-I'.

[0013] Figure 3 It is along Figure 1 The cross-sectional view taken from line II-II'.

[0014] Figure 4 It is shown schematically. Figure 2 A magnified view of the K1 region.

[0015] Figure 5A This is a graph showing the Y content at various locations by performing a line scan of the dielectric grains.

[0016] Figure 5B This is a graph showing the Ca content at various locations by performing a line scan on the first dielectric grain.

[0017] Figure 5C This is a graph showing the Ca content at various locations by performing a line scan on the second dielectric grain.

[0018] Figure 6A These are images obtained by analyzing and measuring the distribution of Ca inside the dielectric layer using transmission electron microscopy-energy dispersive X-ray spectroscopy (TEM-EDS).

[0019] Figure 6B This is an image of the first dielectric grain analyzed by line scan using TEM-EDS.

[0020] Figure 6C This is an image of the second dielectric grain analyzed by line scan using TEM-EDS. Detailed Implementation

[0021] In the following description, some embodiments of the present disclosure will be described with reference to the accompanying drawings. However, embodiments of the present disclosure may be modified to have various other forms, and the scope of the present disclosure is not limited to the embodiments described below. Furthermore, some embodiments of the present disclosure may be provided to describe the present disclosure more completely to those skilled in the art. Therefore, for clarity of description, the shape and size of elements in the drawings may be exaggerated, and elements indicated by the same reference numerals in the drawings may be the same elements.

[0022] In the accompanying drawings, for the purpose of clarifying this disclosure, parts irrelevant to the description will be omitted, and thicknesses may be enlarged to clearly show layers and regions. The same reference numerals will be used to designate components having the same function within the same concept. Furthermore, throughout the specification, unless otherwise expressly stated, when an element is referred to as "comprising" or "including" another element, it means that the element may also include other elements, without excluding other elements.

[0023] In the accompanying drawings, the X direction can be defined as a first direction or the thickness direction, the Y direction can be defined as a second direction or the length direction, and the Z direction can be defined as a third direction or the width direction.

[0024] Multilayer electronic components Figure 1 This is a perspective view schematically illustrating a multilayer electronic assembly according to an embodiment of the present disclosure.

[0025] Figure 2 It is along Figure 1 The cross-sectional view taken from line I-I'.

[0026] Figure 3 It is along Figure 1 The cross-sectional view taken from line II-II'.

[0027] Figure 4 It is shown schematically. Figure 2 A magnified view of the K1 region.

[0028] Figure 5A This is a graph showing the Y content at various locations by performing a line scan of the dielectric grains.

[0029] Figure 5BThis is a graph showing the Ca content at various locations by performing a line scan on the first dielectric grain.

[0030] Figure 5C This is a graph showing the Ca content at various locations by performing a line scan on the second dielectric grain.

[0031] Figure 6A These are images obtained by analyzing and measuring the distribution of Ca inside the dielectric layer using transmission electron microscopy-energy dispersive X-ray spectroscopy (TEM-EDS).

[0032] Figure 6B This is an image of the first dielectric grain analyzed by line scan using TEM-EDS.

[0033] Figure 6C This is an image of the second dielectric grain analyzed by line scan using TEM-EDS.

[0034] In the following text, reference will be made to Figures 1 to 6C A multilayer electronic assembly 100 according to embodiments of the present disclosure is described in detail. Additionally, a multilayer ceramic capacitor is described as an example of a multilayer electronic assembly; however, the present disclosure is not limited thereto, and embodiments of the present disclosure can also be applied to various composite electronic assemblies, such as inductors, piezoelectric elements, varistors, or thermistors.

[0035] A multilayer electronic component 100 according to some embodiments of the present disclosure may include: a body 110 including a dielectric layer 111 and inner electrodes 121 and 122; and outer electrodes 131 and 132 disposed on the body 110.

[0036] There are no particular restrictions on the specific shape of the main body 110, for example, such as Figure 1 As shown, the body 110 may have a hexahedral shape or a shape similar to a hexahedron. Due to the shrinkage of the ceramic powder included in the body 110 during the sintering process, or due to the polishing process for the corners of the body 110, the body 110 may not have a hexahedral shape with perfectly straight lines, but may have a generally hexahedral shape.

[0037] The main body 110 may have a first surface 1 and a second surface 2 that are opposite to each other in a first direction, a third surface 3 and a fourth surface 4 that are connected to the first surface 1 and the second surface 2 and are opposite to each other in a second direction, and a fifth surface 5 and a sixth surface 6 that are connected to the first surface 1, the second surface 2, the third surface 3 and the fourth surface 4 and are opposite to each other in a third direction.

[0038] The body 110 may include dielectric layers 111 and internal electrodes 121 and 122 alternately disposed with the dielectric layers 111. The plurality of dielectric layers 111 are in a sintered state, such that adjacent dielectric layers 111 can be integrated with each other, making it difficult to identify the boundaries between them without the use of a scanning electron microscope (SEM).

[0039] For example, internal electrodes 121 and 122 may include a first internal electrode 121 and a second internal electrode 122, which are alternately arranged in a first direction and a dielectric layer 111 is disposed between them. The body 110 may include a capacitor forming portion Ac, which forms a capacitor by including a first internal electrode 121 and a second internal electrode 122 arranged opposite to each other and a dielectric layer 111 disposed between the first internal electrode 121 and the second internal electrode 122.

[0040] The first inner electrode 121 is spaced apart from the fourth surface 4 and can be connected to the first outer electrode 131 on the third surface 3. The second inner electrode 122 is spaced apart from the third surface 3 and can be connected to the second outer electrode 132 on the fourth surface 4.

[0041] The conductive metal included in the inner electrodes 121 and 122 may include one or more selected from the group consisting of Ni, Cu, Pd, Ag, Au, Pt, Sn, W, Ti and alloys thereof, and more preferably may include Ni, but this disclosure is not limited thereto.

[0042] The main body 110 may further include: cover portions 112 and 113 disposed on two surfaces of the capacitor forming portion Ac that are opposite to each other in a first direction; and edge portions 114 and 115 disposed on two surfaces of the capacitor forming portion Ac that are opposite to each other in a third direction. The cover portions 112 and 113 and the edge portions 114 and 115 do not include internal electrodes and may have a structure similar to that of the dielectric layer 111.

[0043] The external electrodes 131 and 132 may include: a first external electrode 131 disposed on the third surface 3 and extending to a portion of the first surface 1, a portion of the second surface 2, a portion of the fifth surface 5 and / or a portion of the sixth surface 6; and a second external electrode 132 disposed on the fourth surface 4 and extending to a portion of the first surface 1, a portion of the second surface 2, a portion of the fifth surface 5 and / or a portion of the sixth surface 6.

[0044] The type or shape of the external electrodes 131 and 132 is not particularly limited; for example, they may have a multi-layered structure. For example, as... Figure 2As shown, the outer electrodes 131 and 132 may include base electrode layers 131a and 132a that are in contact with the inner electrodes 121 and 122, and plating layers 131b and 132b disposed on the base electrode layers 131a and 132a.

[0045] The substrate electrode layers 131a and 132a may be sintered electrode layers comprising metal and glass. The metal included in the substrate electrode layers 131a and 132a may include at least one selected from the group consisting of Cu, Ni, Pd, Pt, Au, Ag, Pb, and alloys thereof. The glass included in the substrate electrode layers 131a and 132a may include one or more selected from the group consisting of oxides of Ba, oxides of Ca, oxides of Zn, oxides of Al, oxides of B, and oxides of Si.

[0046] The substrate electrode layers 131a and 132a may be composed of only sintered electrode layers, but this disclosure is not limited thereto. For example, the substrate electrode layers 131a and 132a may include: a sintered electrode layer comprising metal and glass; and a resin electrode layer disposed on the sintered electrode layer and comprising metal particles and resin.

[0047] The metal particles included in the resin electrode layer may include one or both of spherical particles and flake-shaped particles. The metal particles included in the resin electrode layer may include at least one selected from the group consisting of Cu, Ni, Pd, Pt, Au, Ag, Pb, Sn, and alloys thereof. The resin included in the resin electrode layer may include one or more of, for example, epoxy resin, acrylic resin, and ethyl cellulose resin.

[0048] The plating layers 131b and 132b may comprise, for example, Ni, Sn, Pd and / or alloys thereof, and may be formed using multiple layers. The plating layers 131b and 132b may be, for example, Ni plating layers or Sn plating layers, or may be in the form of Ni plating layers and Sn plating layers sequentially formed on the substrate electrode layers 131a and 132a. The plating layers 131b and 132b may comprise multiple Ni plating layers and / or multiple Sn plating layers.

[0049] Although the accompanying drawings depict a multilayer electronic assembly 100 having two external electrodes 131 and 132, this disclosure is not limited thereto, and the number and / or shape of the external electrodes may be varied depending on the shape of the internal electrodes and / or other purposes.

[0050] The dielectric layer 111 may include, for example, a perovskite-type compound represented by the general formula ABO3. A may include one or both of Ba and Ca, and B may include one or both of Ti and Zr. The dielectric layer 111 may include a perovskite-type compound as a main component.

[0051] The dielectric layer 111 may include Ba and Ti. The dielectric layer 111 may include, for example, a barium titanate (BaTiO3)-based compound as a main component, and the barium titanate-based compound may include one or more selected from the group consisting of BaTiO3, (Ba 1-x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1), and Ba(Ti 1-y Zr y )O3 (0 < y < 1).

[0052] The dielectric layer 111 may include Ca. The Ca included in the dielectric layer 111 may be sourced from the main component (such as (Ba 1-x Ca x )TiO3 (BCT)), or may be sourced from the sub-component (such as CaCO3). Since Ca has the same valence as Ba that constructs the lattice structure of BT, but has an ionic radius slightly smaller than that of Ba, Ca can effectively replace the Ba site. In this case, lattice contraction can occur without bonding defects, and due to lattice distortion, the phase transition temperature can increase, so the capacitance temperature coefficient (TCC) characteristics of the dielectric layer can be improved.

[0053] In the present disclosure, the term "main component" may refer to a component that accounts for a relatively large weight ratio or atomic number ratio compared to other components, and may refer to: a component that exceeds 50 wt% based on the total weight of the entire dielectric composition or the entire dielectric layer, a component that exceeds 50 at% based on the total atomic number of the entire dielectric composition or the entire dielectric layer, or a component that exceeds 50 mol% based on the total mole number of the entire dielectric composition or the entire dielectric layer. In the present disclosure, "sub-component" may refer to a component that accounts for a relatively small ratio (e.g., weight ratio, atomic number ratio, or mole number ratio) compared to the main component.

[0054] The dielectric layer 111 may include a plurality of first dielectric grains 11 and a plurality of second dielectric grains 12. The plurality of first dielectric grains 11 and the plurality of second dielectric grains 12 may have a core-shell structure. Specifically, the plurality of first dielectric grains 11 may have a first core-shell structure including a first core 11a and a first shell 11b provided on at least a part of the first core 11a. The plurality of second dielectric grains 12 may have a second core-shell structure including a second core 12a and a second shell 12b provided on at least a part of the second core 12a.

[0055] Core-shell structures can be formed by adding rare earth elements to perovskite-type compounds. Specifically, rare earth elements can form shells 11b and 12b by substituting the A or B sites of the perovskite-type compound. These shells 11b and 12b can act as barriers to oxygen vacancy flow, thereby suppressing current leakage.

[0056] Shells 11b and 12b may be configured to cover the entire surface of cores 11a and 12a, but this disclosure is not limited thereto, and shells 11b and 12b may not cover a portion of the surface of cores 11a and 12a. For example, shells 11b and 12b may be configured to cover more than 90% of the total surface area of ​​cores 11a and 12a, in which case the reliability improvement effect of this disclosure may become more significant.

[0057] In addition, the dielectric layer 111 may also include one or more third dielectric grains 13, which may not have a core-shell structure.

[0058] Considering the capacitance and reliability of multilayer electronic components, hybrid-grain dielectric layers composed of BT (bit-mode) and BCT (bit-mode) grains have been proposed in the past. BT grains can be used to improve the room-temperature characteristics of multilayer electronic components, while BCT grains can be used to improve the TCC (transformative capacitance, capacitance, and mean time to failure) of multilayer electronic components. However, when the microstructure of the dielectric grains is not properly controlled, it may be difficult to optimize the capacitance, TCC, and mean time to failure (MTTF) of multilayer electronic components simply by utilizing both types of dielectric grains to form the dielectric layer.

[0059] Therefore, in a multilayer electronic component 100 according to some embodiments of the present disclosure, one or more of a plurality of first dielectric dies 11 may satisfy S1-C1≥0.7at%, and one or more of a plurality of second dielectric dies 12 may satisfy C2-S2<0.5at%, wherein the average Ca content (at%) included in the first core 11a and the second core 12a are C1 and C2, respectively, and the maximum Ca content (at%) included in the first shell 11b and the second shell 12b are S1 and S2, respectively. Among the plurality of first dielectric dies 11, the die satisfying S1-C1≥0.7at% can be defined as a first specific die, and among the plurality of second dielectric dies 12, the die satisfying C2-S2<0.5at% can be defined as a second specific die. By including first specific dies and second specific dies satisfying the above numerical ranges in the dielectric layer 111, the capacitance, TCC, and MTTF of the multilayer electronic component 100 can be effectively improved.

[0060] When S1-C1 is less than 0.7at%, there may be a problem with the TCC degradation of the multilayer electronic component 100, and when C2-S2 is greater than or equal to 0.5at%, there may be a problem with the capacitance and / or MTTF degradation of the multilayer electronic component 100.

[0061] There is no particular upper limit for S1-C1, but one or more of the multiple first dielectric grains 11 can satisfy 0.7at% ≤ S1-C1 ≤ 3.0at%. That is, the S1-C1 of the first specific grain can be less than or equal to 3.0at%. When S1-C1 exceeds 3.0at%, there may be a problem of a decrease in the dielectric constant of the dielectric layer 111. There is no particular lower limit for C2-S2, and the C2-S2 of the second specific grain can be greater than or equal to 0at%.

[0062] For example, C1 and S1 can be obtained from line scan results obtained by transmission electron microscopy-energy dispersive X-ray spectroscopy (TEM-EDS) analysis of the first dielectric grain 11. (Refer to...) Figure 5B C1 can be obtained by measuring the Ca content at multiple equally spaced points (e.g., at five points P1, P3, P5, P7, and P9) in the first core 11a and then calculating the average value. S1 can refer to the maximum Ca content included in the first shell 11b obtained by line scanning.

[0063] For example, C2 and S2 can be obtained from line scan results obtained by TEM-EDS analysis of the second dielectric grain 12. (Refer to...) Figure 5C C2 can be obtained by measuring the Ca content at multiple equally spaced points in the second core 12a (e.g., at five points P2, P4, P6, P8, and P10) and then averaging the results. S2 can refer to the maximum Ca content included in the second shell 12b obtained by line scanning.

[0064] Furthermore, the boundaries between cores 11a and 12a and shells 11b and 12b can be defined by the content of rare earth elements (e.g., Y) as secondary components. For example, a plurality of first dielectric grains 11 and a plurality of second dielectric grains 12 may include Y (a rare earth element), and the first core 11a and the second core 12a may be defined as regions where the content of Y is less than 0.2 at%, and the first shell 11b and the second shell 12b may be defined as regions where the content of Y is greater than or equal to 0.2 at%.

[0065] For example, the Y content can be obtained from line scan results obtained by TEM-EDS analysis of dielectric grains 11 and 12. (Refer to...) Figure 5A In online scanning, the boundary between cores 11a and 12a and shells 11b and 12b can be defined as a point where the Y content is 0.2 at%. Line scan results can be obtained by analyzing a cross-section of the polished multilayer electronic assembly 100 to the central portion in the third direction using TEM-EDS analysis, for example, from the central region of the body 110 in the first and second directions. Figure 2obtained from the K1 region in

[0066] Referring to Figure 5A , in some embodiments, the maximum content Y1 of Y included in the first shell 11b may be greater than or equal to 1.0 at%, and the maximum content Y2 of Y included in the second shell 12b may be greater than or equal to 1.0 at%. Therefore, the reliability of the multilayer electronic component 100 can be improved by making the dielectric layer 111 have the first dielectric grains 11 and the second dielectric grains 12 with a stable core-shell structure. There is no particular limitation on the upper limits of Y1 and Y2. However, for example, Y1 and Y2 may be less than or equal to 5.0 at%. When Y1 and Y2 exceed 5.0 at%, there may be a problem of a decrease in the dielectric constant of the dielectric layer 111.

[0067] Referring to Figure 6A , the first dielectric grains 11 and the second dielectric grains 12 can be distinguished by the color and / or brightness in the image measuring the Ca distribution using TEM-EDS. However, the first dielectric grains 11 and the second dielectric grains 12 can be more accurately distinguished by the content of Ca included in the cores 11a and 12a and the shells 11b and 12b measured by line scanning. Specifically, among the dielectric grains having a core-shell structure, the dielectric grains in which the average content of Ca included in the core is less than the maximum content of Ca included in the shell can be defined as the first dielectric grains 11, and among the dielectric grains having a core-shell structure, the dielectric grains in which the average content of Ca included in the core is greater than or equal to the maximum content of Ca included in the shell can be defined as the second dielectric grains 12. That is, a plurality of first dielectric grains 11 can satisfy C1 < S1, and a plurality of second dielectric grains 12 can satisfy C2 ≥ S2.

[0068] In addition, the first dielectric grains 11 and the second dielectric grains 12 can also be distinguished by the content of Ca included in the cores 11a and 12a measured by line scanning. Specifically, among the dielectric grains having a core-shell structure, the dielectric grains in which the average content of Ca included in the core is less than 0.8 at% can be defined as the first dielectric grains 11, and among the dielectric grains having a core-shell structure, the dielectric grains in which the average content of Ca included in the core is greater than or equal to 0.8 at% can be defined as the second dielectric grains 12. That is, a plurality of first dielectric grains 11 can satisfy C1 < 0.8 at%, and a plurality of second dielectric grains 12 can satisfy C2 ≥ 0.8 at%. There is no particular limitation on the upper limit of C2. However, for example, C2 may be less than or equal to 5.0 at%.

[0069] In some embodiments, the ratio of the number of first dielectric dies 11 that satisfy S1-C1≥0.7at% may be greater than or equal to 70%. That is, the ratio of the number of first specific dies among the plurality of first dielectric dies 11 may be greater than or equal to 70%. Therefore, the capacitance, TCC and MTTF of the multilayer electronic components according to the present disclosure can be further improved.

[0070] In some embodiments, the ratio of the number of the plurality of second dielectric dies 12 that satisfy C2-S2<0.5at% may be greater than or equal to 70%. That is, the ratio of the number of the second specific die among the plurality of second dielectric dies 12 may be greater than or equal to 70%. Therefore, the capacitance, TCC and MTTF of the multilayer electronic component according to the present disclosure can be further improved.

[0071] The dielectric layer 111 may include a plurality of first dielectric dies 11 and a plurality of second dielectric dies 12, and the ratio of the number of the plurality of first dielectric dies 11 and the plurality of second dielectric dies 12 in the dielectric layer 111 is not particularly limited. However, in the cross-section of the dielectric layer 111, the ratio of the area occupied by the plurality of first dielectric dies 11 may, for example, be greater than or equal to 10% and less than or equal to 50%. Therefore, the capacitance, TCC, and MTTF of the multilayer electronic component 100 can be further effectively improved.

[0072] The ratio of the number of specific grains can be determined by specifying a region in an image of an arbitrary cross-section of the dielectric layer 111 analyzed by an analytical method (such as TEM-EDS), and measuring the total number of dielectric grains 11 and 12 present in that region, as well as the number of specific grains. The ratio of the area occupied by the plurality of first dielectric grains 11 can be obtained by specifying a region in an image of an arbitrary cross-section of the dielectric layer 111 analyzed by an analytical method (such as TEM-EDS), and measuring the total area of ​​that region and the area occupied by the plurality of first dielectric grains 11 within that region.

[0073] The total number of dielectric grains 11 and 12 extracted from a certain region may be, for example, greater than or equal to 10, but this disclosure is not limited thereto.

[0074] In some embodiments, the maximum diameter of one or more of the plurality of first dielectric grains 11 may be greater than or equal to 100 nm and less than or equal to 450 nm, and the maximum diameter of one or more of the plurality of second dielectric grains 12 may be greater than or equal to 100 nm and less than or equal to 450 nm. The maximum diameter of dielectric grains 11 and 12 may refer to the maximum length of a straight line connecting one grain boundary of dielectric grains 11 and 12 to another grain boundary. When the maximum diameter meets the above numerical range, the dielectric properties of dielectric grains 11 and 12 can be excellent, and sintering and grain growth control can be easily performed.

[0075] In some embodiments, the maximum diameter of the first core 11a of one or more of the plurality of first dielectric grains 11 may be greater than or equal to 70 nm and less than or equal to 400 nm, and the maximum diameter of the second core 12a of one or more of the plurality of second dielectric grains 12 may be greater than or equal to 70 nm and less than or equal to 400 nm. The maximum diameter of cores 11a and 12a may refer to the maximum value of the length corresponding to cores 11a and 12a in the straight line connecting one grain boundary of dielectric grains 11 and 12 to another grain boundary. When the maximum diameter of cores 11a and 12a is less than 70 nm, it may be difficult to achieve the target dielectric properties, and when the maximum diameter of cores 11a and 12a exceeds 400 nm, there may be a problem of reduced reliability of the multilayer electronic component 100.

[0076] Furthermore, the average size of the plurality of first dielectric dies 11 can be greater than or equal to 100 nm and less than or equal to 450 nm, and the average size of the plurality of second dielectric dies 12 can be greater than or equal to 100 nm and less than or equal to 450 nm. The average size of the plurality of first cores 11a can be greater than or equal to 70 nm and less than or equal to 400 nm, and the average size of the plurality of second cores 12a can be greater than or equal to 70 nm and less than or equal to 400 nm.

[0077] The average size of dielectric grains 11 and 12 can refer to the average of the maximum diameters of a plurality of dielectric grains 11 and 12 present in any region (e.g., a region of 3 μm × 4 μm (width × length)) when observed using SEM or TEM. The average size of cores 11a and 12a can refer to the average of the maximum diameters of a plurality of cores 11a and 12a present in the region (e.g., a region of 3 μm × 4 μm). This region (e.g., a region of 3 μm × 4 μm) can be specified in a cross-section of the multilayer electronic assembly 100 polished to the center in the first and second directions, and can be specified in the central region of the body 110 in the first and second directions.

[0078] The following describes the secondary components that may be included in dielectric layer 111. These secondary components can be described based on the molar amounts of elements and can be calculated by converting them into the amount of oxides or carbonates added as additives prior to sintering. Unless there are special circumstances, the content of elements before and after sintering may not have large errors and the type and content of elements included in dielectric layer 111 can be measured after sintering using various measurement methods such as SEM-EDS, TEM-EDS, and scanning transmission electron microscopy (STEM)-EDS.

[0079] As an example of a more specific method for measuring the content of each element included in the dielectric layer 111, the composition inside the dielectric grains in the central portion of the body 110 can be analyzed using TEM-EDS or STEM-EDS. First, after sintering, a thinned analytical sample is prepared in the region including the dielectric layer 111 within the cross-section of the body 110 using a focused ion beam (FIB) device. Then, a damaged layer on the surface of the thinned sample is removed using argon (Ar) ion milling, and qualitative / quantitative analysis is performed by area scanning of each component in images obtained using TEM-EDS or STEM-EDS. In this case, the qualitative / quantitative analysis curves for each component can be expressed by converting the weight, number of atoms, or moles of each element into a weight percentage (wt%), atomic percentage (at%), or molar percentage (mol%) of each element.

[0080] In another method, the body 110 is crushed to remove the inner electrodes 121 and 122, and then the dielectric layer 111 portion is selected. The composition of the selected dielectric layer 111 can be analyzed using a device such as an inductively coupled plasma optical emission spectrometer (ICP-OES) or an inductively coupled plasma mass spectrometer (ICP-MS).

[0081] 1) First secondary component The dielectric layer 111 may also include other rare earth elements besides Y. For example, the dielectric layer 111 may also include a first sub-component, which includes one or more selected from the group consisting of Dy, Tb, Sc, La, Nd, Eu, Gd, Ho, Er, Yb, and Lu. The first sub-component can improve the reliability of the multilayer electronic component 100.

[0082] Based on 100 mol of Ti, the content of the first secondary component included in the dielectric layer 111 can be greater than or equal to 2.5 mol and less than or equal to 10.0 mol. Therefore, the room temperature dielectric constant and / or insulation resistance characteristics can be improved.

[0083] 2) Second sub-component The dielectric layer 111 may include one or both of a fixed-valence acceptor element and a variable-valence acceptor element. In this case, the fixed-valence acceptor element may include Mg and / or Zr, and the variable-valence acceptor element may include one or more selected from the group consisting of Mn, V, Cr, Fe, Ni, Co, Cu, and Zn. That is, the dielectric layer 111 may also include a second sub-component comprising one or more selected from the group consisting of Mg, Zr, Mn, V, Cr, Fe, Ni, Co, Cu, and Zn.

[0084] Variable-valence acceptor elements and fixed-valence acceptor elements can be used to reduce electron aggregation, lower sintering temperatures, and improve the high-temperature voltage resistance of multilayer electronic components. Based on 100 mol of Ti, the content of the second sub-component included in the dielectric layer 111 can be, for example, greater than or equal to 0.01 mol and less than or equal to 8.0 mol.

[0085] 3) Third sub-component The dielectric layer 111 may also include a third sub-component, which may include one or both of Si and Al. The third sub-component can be used to improve the dielectric constant and DC bias characteristics by improving the sintering density.

[0086] Based on 100 mol of Ti, the content of the third sub-component included in dielectric layer 111 may, for example, be greater than or equal to 1.0 mol and less than or equal to 5.0 mol.

[0087] To properly control the microstructure of the dielectric layer 111, the dielectric layer 111 may include at least one selected from the group consisting of Y, Dy, Mg, Zr, Mn, V, Si, and Al, which are the aforementioned secondary components. More specifically, the plurality of first dielectric grains 11 and the plurality of dielectric grains 12 may include at least one selected from Y, Dy, Mg, Zr, Mn, V, Si, and Al.

[0088] In the line scan results obtained by TEM-EDS analysis of the first dielectric grain 11, the average content of Dy included in the first core 11a is less than the maximum content of Dy included in the first shell 11b (D1). The average content of Zr included in the first core 11a is less than the maximum content of Zr included in the first shell 11b (Z1).

[0089] One or more of the plurality of first dielectric dies 11 may satisfy, for example, Y1>S1, Y1>D1, and / or Y1>Z1. One or more of the plurality of first dielectric dies 11 may satisfy, for example, S1>D1 and / or S1>Z1. In an embodiment, one or more of the plurality of first dielectric dies 11 may satisfy Y1>S1>D1 and Y1>S1>Z1. Therefore, the reliability of the multilayer electronic assembly 100 can be improved by using first dielectric dies 11 with a robust core-shell structure.

[0090] Similarly, in the line scan results obtained by TEM-EDS analysis of the second dielectric grain 12, the average content of Dy included in the second core 12a is less than the maximum content of Dy included in the second shell 12b (D2). The average content of Zr included in the second core 12a is less than the maximum content of Zr included in the second shell 12b (Z2).

[0091] One or more of the plurality of second dielectric dies 12 may satisfy, for example, Y2>D2 and / or Y2>Z2. One or more of the plurality of second dielectric dies 12 may satisfy, for example, S2>D2 and / or S2>Z2. One or more of the plurality of second dielectric dies 12 may satisfy, for example, C2>Y2, C2>D2 and / or C2>Z2. In some embodiments, one or more of the plurality of second dielectric dies 12 may satisfy C2>Y2>D2 and C2>Y2>Z2. In some embodiments, one or more of the plurality of second dielectric dies 12 may satisfy S2>D2, S2>Z2, Y2>D2 and Y2>Z2. Therefore, the reliability of the multilayer electronic assembly 100 can be improved by using second dielectric dies 12 with a robust core-shell structure.

[0092] In addition, the average and / or maximum contents of Dy and Zr contained in the cores 11a and 12a and the shells 11b and 12b can be measured by the same method as the methods described above for measuring C1, S1, C2 and S2.

[0093] There is no particular limitation on the size of the multilayer electronic component 100, but the maximum size of the multilayer electronic component 100 in the second direction can be 0.1 mm to 6.0 mm, the maximum size of the multilayer electronic component 100 in the third direction can be 0.1 mm to 5.0 mm, and the maximum size of the multilayer electronic component 100 in the first direction can be 0.05 mm to 3.5 mm.

[0094] The average thickness td of dielectric layer 111 can be, for example, 0.1 μm to 20 μm, 0.1 μm to 10 μm, 0.1 μm to 5 μm, 0.1 μm to 2 μm, or 0.1 μm to 0.4 μm. The average thickness te of inner electrodes 121 and 122 can be, for example, 0.1 μm to 3.0 μm, 0.1 μm to 1.0 μm, or 0.1 μm to 0.4 μm.

[0095] The average thickness td of dielectric layer 111 can refer to the average dimension of dielectric layer 111 in the first direction, and the average thickness te of inner electrodes 121 and 122 can refer to the average dimension of inner electrodes 121 and 122 in the first direction. The average thickness td of dielectric layer 111 and the average thickness te of inner electrodes 121 and 122 can be measured by scanning images of cross-sections of the body 110 in the first and second directions using a scanning electron microscope (SEM) at 10,000x magnification. More specifically, the average thickness td of dielectric layer 111 can be obtained by measuring the thickness at multiple points of dielectric layer 111 (e.g., five points equidistant from each other in the second direction) and then averaging the results. Similarly, the average thickness of inner electrodes 121 and 122 can be obtained by measuring the thickness at multiple points of inner electrode 121 or 122 (e.g., five points equidistant from each other in the second direction) and then averaging the results. Five points spaced equidistant from each other can be specified in the capacitor forming section Ac. Furthermore, when the measurement of the average thickness is extended to 10 dielectric layers 111 and 10 inner electrodes 121 and 122, the average thickness td of the dielectric layer 111 and the average thickness te of the inner electrodes 121 and 122 can be more generalized.

[0096] The average thickness tc of the covering portions 112 and 113 may, for example, be less than or equal to 150 μm, less than or equal to 100 μm, less than or equal to 30 μm, or less than or equal to 20 μm. The average thickness tc of the covering portions 112 and 113 may, for example, be greater than or equal to 5 μm, greater than or equal to 10 μm, or greater than or equal to 30 μm. The average thickness of the edge portions 114 and 115 may, for example, be less than or equal to 150 μm, less than or equal to 100 μm, less than or equal to 20 μm, or less than or equal to 15 μm.

[0097] In this case, the average thickness tc of the covering portions 112 and 113 may refer to the average thickness of each of the first covering portion 112 and the second covering portion 113, and the average thickness of the edge portions 114 and 115 may refer to the average thickness of each of the first edge portion 114 and the second edge portion 115.

[0098] The average thickness tc of the covering portions 112 and 113 may refer to the average dimension of the covering portions 112 and 113 in the first direction, and the average thickness tc of the covering portions 112 and 113 may be: in a cross-section of the main body 110 in the first and second directions, the average value of the dimensions of the covering portions in the first direction measured at five points that are equally spaced from each other in the second direction. The average thickness of the edge portions 114 and 115 may refer to the average dimension of the edge portions 114 and 115 in the third direction, and the average thickness of the edge portions 114 and 115 may be: in a cross-section of the main body 110 in the first and third directions, the average value of the dimensions of the edge portions in the third direction measured at five points that are equally spaced from each other in the first direction.

[0099] Hereinafter, an example of a method for forming the multilayer electronic component 100 will be described. However, the method for manufacturing the multilayer electronic component 100 is not limited thereto.

[0100] First, a ceramic powder for forming the dielectric layer 111 is prepared. The ceramic powder may include a main component powder. The main component powder may include one or more selected from the group consisting of BaTiO3, (Ba 1-x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1- y Zr y )O3 (0 < x < 1, 0 < y < 1), and Ba(Ti 1-y Zr y )O3 (0 < y < 1). Based on a total of 100 parts by weight of the BT powder and the BCT powder, the main component powder may contain 10 parts by weight to 40 parts by weight of the BT powder.

[0101] A first sub-component powder, a second sub-component powder, and a third sub-component powder may be added to the main component powder. The sub-component powder may include, for example, one or more selected from the group consisting of CaCO3 powder, Y2O3 powder, Dy2O3 powder, MgO powder, ZrO2 powder, MnO2 powder, V2O5 powder, SiO2 powder, and Al2O3 powder.

[0102] Next, the main component powder added with the sub-component powder is mixed with an organic solvent (such as ethanol) and a binder (such as polyvinyl butyral), and then ball-milled to prepare a dielectric composition, and the dielectric composition is coated on a carrier film and dried to prepare a ceramic green sheet.

[0103] Next, the conductive paste (containing metal powder, adhesive, organic solvent, etc.) for the internal electrode is printed onto the ceramic green sheet at a predetermined thickness using screen printing or gravure printing, thereby forming the internal electrode pattern.

[0104] Subsequently, ceramic green sheets with internal electrode patterns printed on them are peeled off from the carrier film, and then a predetermined number of ceramic green sheets with internal electrode patterns printed on them are stacked and pressed to form a ceramic laminate. In the upper and lower parts of the ceramic laminate, a predetermined number of ceramic green sheets without internal electrode patterns can be stacked to form cover portions 112 and 113 after sintering. Subsequently, the ceramic laminate is cut into sheets of a predetermined size, and then the cut sheets can be sintered in an atmosphere of 1.0% H2 / 99.0% N2 to 3.5% H2 / 96.5% N2 (H2O / H2 / N2 atmosphere) at a temperature greater than or equal to 1000°C and less than or equal to 1400°C for 1 hour to 3 hours to form the body 110.

[0105] Next, external electrodes 131 and 132 can be formed. For example, when the substrate electrode layers 131a and 132a include sintered electrode layers, the body 110 can be immersed in a conductive paste (containing metal powder, glass frit, binder and organic solvent) for forming the sintered electrode layers, and then the conductive paste can be sintered at a temperature of 500°C to 900°C to form the sintered electrode layers.

[0106] For example, when the substrate electrode layers 131a and 132a include resin electrode layers, after the sintered electrode layers are formed, the body 110 can be impregnated in a conductive resin composition (including metal powder, resin, binder and organic solvent) and then subjected to a curing heat treatment at a temperature of 250°C to 550°C to form the resin electrode layers.

[0107] Alternatively, electroplating and / or electroless plating can be performed to form plating layers 131b and 132b on the substrate electrode layers 131a and 132a.

[0108] (Example) The present disclosure will be described in more detail below with examples. However, the following examples are intended only to help in a specific understanding of the present disclosure, and the scope of the present disclosure is not limited to the following examples.

[0109] Examples 1 to 7 By mixing BT powder and (Ba) in a weight ratio (%) of 10:90 to 40:60 1-x Ca x)The BCT powder of the composition of TiO3 (0 < x < 1) is mixed to prepare the main component powder. Thereafter, CaCO3 powder, Y2O3 powder, Dy2O3 powder, MgO powder, ZrO2 powder, MnO2 powder, V2O5 powder, SiO2 powder and Al2O3 powder are mixed with the main component powder in a predetermined weight ratio, and an organic solvent and a binder are added, and then ball milling is performed to form a dielectric composition. In addition, based on 100 parts by weight of the main component powder, CaCO3 powder is added in an amount of 1 part by weight to 10 parts by weight.

[0110] In addition, a conductive paste for the internal electrode is prepared by mixing Ni powder and an organic solvent. After forming a ceramic laminate using the dielectric composition and the conductive paste for the internal electrode, the ceramic laminate is cut into a predetermined size to form a laminated sheet. Next, the laminated sheet is sintered to form a body. Thereafter, a sample sheet is prepared by sequentially forming a sintered electrode layer containing Cu, a Ni plating layer, and a Sn plating layer on the surface of the body. The sample sheet is manufactured to a size of 1005 (length: about 1.0 mm, width: about 0.5 mm, thickness: about 0.5 mm).

[0111] Comparative example (for reference) Instead of using a mixed powder of BT powder and BCT powder as the main component powder, in the comparative example, only BT powder is used as the main component powder. In addition, CaCO3 powder is not added. Except for this, the sample sheet is manufactured in the same manner as in Examples 1 to 7.

[0112] Measurement of Ca content Among the cross-sections in the first and second directions of the center of the sample sheet polished in the third direction, the central region in the first and second directions is analyzed by TEM-EDS.

[0113] Thereafter, line scan analysis is performed on the first dielectric grain and the second dielectric grain. As Figure 6B and Figure 6C shown, line scan analysis is performed within the range of one grain boundary to another grain boundary of the dielectric grain.

[0114] In addition, in the line scan result showing the content of Y at each position within the dielectric grain (for example, Figure 5A ), the region where the content of Y is less than 0.2 at% is defined as the core, and the region where the content of Y is greater than or equal to 0.2 at% is defined as the shell. Thereafter, C1, S1, C2 and S2 are measured by the line scan result showing the content of Ca at each position within the dielectric grain.

[0115] Based on the line scan results of analyzing the Ca distribution in the first dielectric grain, the Ca content is measured at five equally spaced points set in the first core, and the average Ca content is designated as C1, and the maximum Ca content included in the first shell is designated as S1.

[0116] Similarly, based on the line scan results of analyzing the Ca distribution in the second dielectric grain, the Ca content was measured at five equally spaced points set in the second core, and the average Ca content was designated as C2, and the maximum Ca content included in the second shell was designated as S2.

[0117] Based on C1, S1, C2, and S2, calculate the values ​​of S1-C1 and C2-S2, and list the results in Table 1 below.

[0118] Capacitor Evaluation After heat-treating the sample at 150°C for 24 hours, the capacitance was measured at 1 kHz and 1 Vrms using an inductance-capacitance-resistance (LCR) meter (an instrument used to measure inductance, capacitance, and resistance). The capacitance of the comparative example was used as reference value 2 to calculate the relative values ​​of the capacitances of the other examples. The relative values ​​of the example capacitances are listed in Table 1 below. An example capacitance was considered good (OK) when its relative value was greater than or equal to 1, and poor (NG) when its relative value was less than 1.

[0119] TCC Evaluation TCC was measured at 150°C, which represents the percentage change in capacitance relative to the capacitance at room temperature (25°C). The TCC of the comparative example was used as a reference value of 0.5 to calculate the relative values ​​of the TCC for other examples. The relative values ​​of the example TCCs are listed in Table 1 below. An example's TCC is considered good (OK) when its relative value is greater than or equal to 1, and poor (NG) when its relative value is less than 1.

[0120] MTTF Evaluation When 150°C and three times the rated voltage are applied to 80 sample pieces for each sample number, the Mean Time to Failure (MTTF) is the average time it takes for the insulation resistance of all sample pieces to drop to less than or equal to 100 kΩ. The MTTF of the comparative example is used as a reference value of 1.5 to calculate the relative values ​​of the MTTF for other examples, and the relative values ​​of the MTTF for the examples are listed in Table 1 below. An example is determined to have a good (OK) MTTF when its relative value is greater than or equal to 1, and a poor (NG) MTTF when its relative value is less than 1.

[0121] [Table 1]

[0122] Example 1 shows that the TCC characteristics of the sample chip deteriorate because S1-C1 is less than 0.7 at%. Furthermore, it is confirmed that the capacitance and MTTF characteristics of the samples in Examples 3 and 5 deteriorate because C2-S2 exceeds 0.5 at%. However, it is confirmed that the samples in Examples 2, 4, 6, and 7 exhibit excellent capacitance, TCC, and MTTF characteristics because they satisfy S1-C1 ≥ 0.7 at% and C2-S2 < 0.5 at%.

[0123] This disclosure is not limited to the embodiments and drawings described above, and the scope of this disclosure is defined by the appended claims. Therefore, those skilled in the art can make various substitutions, modifications, or alterations without departing from the scope of this disclosure as defined by the appended claims, and such substitutions, modifications, or alterations should be construed as being included within the scope of this disclosure.

[0124] Furthermore, the use of "example embodiments" does not imply the same embodiments and is provided to emphasize and explain different features. However, the embodiments presented above do not preclude implementation in combination with features of another embodiment. For example, even if something described in a particular embodiment is not described in another embodiment, it may be understood as a description relating to the other embodiment unless there is a description in the other embodiment that contradicts or contradicts that content.

[0125] In this disclosure, the term "connection" includes not only direct connections but also indirect connections such as those via adhesive layers. Furthermore, the term "electrical connection" includes both cases where elements are physically connected and cases where elements are not physically connected. The terms "first," "second," etc., are used to distinguish one element from another and do not limit the order and / or importance associated with these elements. In some cases, without departing from the scope of the claims, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element.

[0126] As one of the various effects of this disclosure, multilayer electronic components with excellent reliability can be provided.

[0127] While exemplary embodiments have been shown and described above, it will be readily understood by those skilled in the art that modifications and variations may be made without departing from the scope of this disclosure as defined by the appended claims.

Claims

1. A multilayer electronic component, comprising: The body includes a dielectric layer and internal electrodes disposed alternately with the dielectric layer, the dielectric layer comprising Ba, Ti and Ca and having a plurality of first dielectric grains and a plurality of second dielectric grains; as well as External electrodes are disposed on the main body. The plurality of first dielectric grains have a first core-shell structure, wherein the first core-shell structure includes a first core and a first shell disposed on at least a portion of the first core. The plurality of second dielectric grains have a second core-shell structure, wherein the second core-shell structure includes a second core and a second shell disposed on at least a portion of the second core. Wherein, one or more of the plurality of first dielectric grains satisfy S1-C1≥0.7at%, and one or more of the plurality of second dielectric grains satisfy C2-S2<0.5at%. The average atomic percentage contents of Ca included in the first core and the second core are C1 and C2, respectively, and the maximum atomic percentage contents of Ca included in the first shell and the second shell are S1 and S2, respectively.

2. The multilayer electronic component according to claim 1, wherein, One or more of the plurality of first dielectric grains satisfy 0.7at%≤S1-C1≤3.0at.

3. The multilayer electronic component according to claim 1, wherein, The plurality of first dielectric grains and the plurality of second dielectric grains include Y, Wherein, the first core and the second core are regions where the Y content is less than 0.2 at%, and the first shell and the second shell are regions where the Y content is greater than or equal to 0.2 at%.

4. The multilayer electronic component according to claim 3, wherein, The maximum content of Y included in the first shell is greater than or equal to 1.0 at%. The maximum content of Y included in the second shell is greater than or equal to 1.0 at.

5. The multilayer electronic component according to claim 1, wherein, The plurality of first dielectric grains satisfy C1 <S1, Wherein, the plurality of second dielectric grains satisfy C2≥S2.

6. The multilayer electronic assembly according to claim 1, wherein, The plurality of first dielectric grains satisfy C1 < 0.8at%. Wherein, the plurality of second dielectric grains satisfy C2≥0.8at.

7. The multilayer electronic component according to claim 5, wherein, The percentage of the number of first dielectric grains that satisfy S1-C1≥0.7at% is greater than or equal to 70%.

8. The multilayer electronic component according to claim 5, wherein, The percentage of the number of the plurality of second dielectric grains that satisfy C2-S2<0.5at% is greater than or equal to 70%.

9. The multilayer electronic component according to claim 5, wherein, In the cross-section of the dielectric layer, the ratio of the area occupied by the plurality of first dielectric grains is greater than or equal to 10% and less than or equal to 50%.

10. The multilayer electronic assembly according to claim 1, wherein, One or more of the plurality of first dielectric grains have a maximum diameter greater than or equal to 100 nm and less than or equal to 450 nm, and Wherein, the maximum diameter of one or more of the plurality of second dielectric grains is greater than or equal to 100 nm and less than or equal to 450 nm.

11. The multilayer electronic assembly according to claim 1, wherein, The maximum diameter of the first core of one or more of the plurality of first dielectric grains is greater than or equal to 70 nm and less than or equal to 400 nm, and Wherein, the maximum diameter of the second core of one or more of the plurality of second dielectric grains is greater than or equal to 70 nm and less than or equal to 400 nm.

12. The multilayer electronic assembly according to claim 1, wherein, The dielectric layer further includes one or more selected from the group consisting of Dy, Tb, Sc, La, Nd, Eu, Gd, Ho, Er, Yb and Lu.

13. The multilayer electronic assembly according to claim 1, wherein, The dielectric layer further includes one or more elements selected from the group consisting of Mg, Zr, Mn, V, Cr, Fe, Ni, Co, Cu, and Zn.

14. The multilayer electronic assembly according to claim 1, wherein, The dielectric layer further includes Si and / or Al.

15. The multilayer electronic assembly according to claim 1, wherein, The dielectric layer further includes at least one selected from the group consisting of Y, Dy, Mg, Zr, Mn, V, Si and Al.

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