Stable control method and system of power quality manager with double inner model PI control

By employing a dual internal mode PI control method, external voltage loops and internal current loops are used to process odd and even harmonics respectively, generating high-precision PWM modulation waves. This solves the harmonic suppression problem in rural power grids and improves the stability of power quality managers and the power quality of the power grid.

CN122246738APending Publication Date: 2026-06-19HEFEI UNIV OF TECH +1

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
HEFEI UNIV OF TECH
Filing Date
2026-03-04
Publication Date
2026-06-19

AI Technical Summary

Technical Problem

Existing power quality managers are unable to effectively suppress odd and even harmonics in rural power grids, and the parameters of the compensation link are difficult to set, leading to problems with power grid stability and power quality.

Method used

The dual internal mode PI control method is adopted, which processes odd and even harmonics through external voltage loop and internal current loop respectively. High-precision PWM modulation wave is generated by phase-locked loop calculation and repetitive controller to drive power quality manager for harmonic and reactive power compensation.

🎯Benefits of technology

It achieves independent suppression of odd and even harmonics, simplifies parameter tuning, reduces control delay, and improves the stability of DC bus voltage and power quality of the grid.

✦ Generated by Eureka AI based on patent content.

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Abstract

This invention relates to the field of power quality management technology, and discloses a stable control method and system for a power quality manager using dual internal mode PI control. The control method samples data from the power grid, load, and power quality manager, generates an external voltage loop output via a dual internal mode PI controller, calculates the harmonics and reactive currents requiring compensation using phase-locked loop (PLL) calculations, generates a three-phase reference current signal via an internal current loop, and converts it into a PWM modulation wave to drive the power quality manager. While achieving harmonic and reactive power compensation, it effectively suppresses derivative harmonics that may be introduced by the compensation device itself, ensuring that the DC-side bus voltage does not fluctuate with grid fluctuations, guaranteeing the stability of the DC-side bus voltage and the quality of grid-side current management, thereby improving the power quality and supply stability of the power grid.
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Description

Technical Field

[0001] This invention relates to the field of power quality management technology, and more specifically to a stable control method and system for a power quality manager with dual internal model PI control. Background Technology

[0002] With the widespread application of power electronic equipment in social production and daily life, its nonlinear characteristics generate a large amount of reactive power during operation, severely impacting the power quality of the distribution network. This is especially true in rural power grids, where electricity load is significantly affected by seasonality, and the dispersed nature of users leads to complex lines and predominantly single-phase loads. These characteristics result in substantial harmonics and reactive currents in rural power grids, exacerbating three-phase load imbalance and posing a significant challenge to the stable operation of the rural power grid. The increased three-phase imbalance, harmonics, and reactive power in the power grid cause enormous damage and severely affect the normal operation of electrical equipment.

[0003] In existing technologies, solutions consisting of a specific system structure of a power quality manager and common basic control methods such as dual closed-loop proportional-integral control and repetitive control are used to design DC-side bus control with a notch filter compensation stage, which improves the compensation performance of the power quality manager. However, there are problems such as difficulty in tuning the compensation stage parameters and complex structure. At the same time, it is difficult to achieve the function of fully suppressing some odd and even harmonics, so the control performance of the power quality manager needs to be further improved and optimized. Summary of the Invention

[0004] To overcome the aforementioned technical problems, this invention provides a power quality manager stability control method and system with dual internal mode PI control. This control method samples data from the power grid, load, and power quality manager, generates an external voltage loop output via a dual internal mode PI controller, and calculates the harmonics and reactive currents requiring compensation using phase-locked loop (PLL) calculations. Then, a three-phase reference current signal is generated through an internal current loop and converted into a PWM modulation wave to drive the power quality manager. While achieving harmonic and reactive power compensation, it effectively suppresses derivative harmonics that may be introduced by the compensation device itself, ensuring that the DC-side bus voltage does not fluctuate with grid fluctuations. This guarantees the stability of the DC-side bus voltage and the quality of grid-side current management, thereby improving the power quality and supply stability of the power grid. This system uses a dual internal mode PI controller to suppress odd and even harmonics separately. There is no coupling relationship between the control parameters of odd and even harmonics. They are filtered by separate low-pass filters, which simplifies parameter tuning and simplifies the control structure while ensuring the function of harmonic compensation and suppression. Compared with the traditional repetitive control internal mode PI, its control delay time is reduced by half, the system converges faster, and the DC bus voltage is stabilized quickly.

[0005] To achieve the above objectives, the present invention provides a power quality manager stability control method with dual internal model PI control, the stability control method comprising: Acquire sampling data from the power quality manager, three-phase loads, and the power grid; The external voltage loop output is obtained based on the dual internal mode PI controller of the external voltage loop; Phase-locked loop (PLL) calculations are used to obtain the three-phase harmonics and reactive current that need to be compensated. The three-phase reference current signal of the inner current loop is obtained based on the external voltage output, three-phase harmonics and reactive current, and the three-phase modulation value is obtained based on the three-phase reference current signal of the inner current loop. A three-phase PWM wave is generated based on the three-phase modulation value. The three-phase PWM wave is used to regulate the power quality manager to achieve harmonic compensation and suppression of derived harmonics in the power grid.

[0006] Preferably, sampling data from the power quality manager, three-phase loads, and the power grid are acquired, including: Sampling power quality manager DC bus side voltage And set the DC voltage command value. ; The power quality manager is connected to the grid-side three-phase current sampling system. and the three-phase voltage on the grid side ; Sample three-phase load current .

[0007] Preferably, the external voltage loop output is obtained based on the external voltage loop dual internal mode PI controller, including: Obtain DC bus side voltage from power quality manager and DC voltage command value The difference between the two is used to obtain the tracking error. ; Based on the external voltage loop dual internal mode PI controller, the odd harmonic internal mode PI controller uses formula (1) to address the tracking error. The process involves constructing the transfer function for the odd-order harmonic control channel within the odd-order harmonic internal mode PI controller. ,

[0008] in, For the odd-order harmonic control channel, For the Laplace operator, This represents the proportional gain coefficient for the odd-order harmonic control channel. For odd-order harmonics, a low-pass filter function is used. It is the natural logarithm. The fundamental period of the grid voltage. For the feedback coefficient of odd-order harmonics; Based on the even-order harmonic internal mode PI controller in the external voltage loop dual internal mode PI controller, formula (2) is used to address the tracking error. The process involves constructing the transfer function for the even-order harmonic control channel within the even-order harmonic internal mode PI controller. ,

[0009] in, For the even-order harmonic control channel, (This is the transfer function.) For the Laplace operator, The proportional gain coefficient for the even-order harmonic control channel. For even-order harmonics, a low-pass filter function is used. The feedback coefficient for even-order harmonics; Based on the external voltage loop dual internal mode PI controller superimposed with odd-order harmonic control channels and even-order harmonic control channels, the transfer function of the external voltage loop output is obtained using formula (3). (3) in, This is the transfer function of the external voltage loop output.

[0010] Preferably, phase-locked loop (PLL) calculations are used to obtain the three-phase harmonics and reactive currents that need to be compensated, including: Obtain the three-phase voltage on the grid side And based on three-phase voltage Perform a two-phase rotating coordinate system transformation to obtain the direct-axis voltage and quadrature-axis voltage; Using a proportional-integral controller for zero steady-state error tracking control outputs angular frequency deviation; The actual angular frequency of the power grid is obtained by adding the angular frequency deviation to the rated angular frequency of the power grid. The phase information of the three-phase voltage on the grid side is obtained by integrating the data. ; The phase information of the three-phase voltage is obtained using formula (4). and three-phase load current The process involves obtaining the three-phase harmonics and reactive current that need to be compensated. (4) in, For the first The first moment Phase harmonics and reactive current, For the first The first moment Phase load current, For the first The amplitude of the fundamental active current component of the phase load current. For the first The first moment The instantaneous component of the fundamental reactive current of the phase. For the first The first moment The instantaneous component of the fundamental active current of the phase.

[0011] Preferably, the three-phase reference current signal of the inner current loop is obtained based on the external voltage output, three-phase harmonics, and reactive current, and the three-phase modulation value is obtained based on the three-phase reference current signal of the inner current loop, including: The three-phase reference current signal of the inner current loop is synthesized by superimposing the obtained external voltage output, three-phase harmonics and reactive current signals. The three-phase reference current signal of the inner current loop and the three-phase current on the grid side are combined. The three-phase current error is obtained by performing corresponding subtraction. Using an internal current loop repetitive controller and taking the three-phase current error as input, the transfer function of the internal current loop repetitive controller is constructed using formula (5), and the output three-phase modulation value is repeatedly calculated. , (5) in, This is the transfer function of the repetitive controller for the inner current loop. This is the repeatability control factor. Discrete in time Domain operators, The number of sampling points for each fundamental frequency cycle of the power grid. C ( z ) is a compensator, This represents the intima coefficient.

[0012] Preferably, a three-phase PWM wave is generated based on the three-phase modulation value, and the power quality manager is controlled using the three-phase PWM wave to achieve harmonic compensation and suppression of derived harmonics in the power grid, including: Obtain the three-phase modulation value; The comparator processes the three-phase modulation values ​​and the preset triangular carrier wave to output a three-phase PWM wave. The switching transistors in the power quality manager are controlled by a three-phase PWM wave, which drives the main circuit in the power quality manager to output control voltage and generate a compensation current signal. Based on the compensation current signal, a compensation current is generated and output to the power grid to offset the harmonics and reactive current generated by the load, thereby achieving harmonic compensation and control of the power grid to suppress derived harmonics.

[0013] Preferably, the three-phase modulation values ​​and a preset triangular carrier wave are processed by a comparator to output a three-phase PWM wave, including: Obtain the values ​​of each phase in the three-phase modulation values; Use a comparator to determine whether the value of each phase in the three phases is greater than the preset value of the triangular carrier wave for the corresponding phase; When the value of each phase in the three phases is greater than the preset value of the triangular carrier wave of the corresponding phase, the comparator outputs a high-level PWM wave of the corresponding phase. When the value of each phase in the three phases is less than or equal to the preset value of the triangular carrier wave of the corresponding phase, the comparator outputs a low-level PWM wave of the corresponding phase.

[0014] A second aspect of the present invention provides a power quality manager stability control system with dual internal model PI control, the stability control system comprising: Power quality manager; A three-phase load is electrically connected to the power quality manager. The sampling module is electrically connected to the power quality manager and the three-phase load, and is used to acquire sampling data from the power quality manager, the three-phase load, and the power grid. A dual internal mode PI voltage loop module, electrically connected to the sampling module, is used to acquire the external voltage loop output; The phase-locked calculation module is electrically connected to the sampling module and is used to calculate the three-phase harmonics and reactive current that need to be compensated. The repetitive control current loop module is electrically connected to the dual internal mode PI voltage loop module and the phase-locked calculation module. It is used to obtain the three-phase reference current signal of the internal current loop based on the external voltage output, three-phase harmonics and reactive current, and to obtain the three-phase modulation value based on the three-phase reference current signal of the internal current loop. The PWM module is electrically connected to the repetitive control current loop module and the three-phase imbalance regulator. It is used to generate a three-phase PWM wave based on the three-phase modulation value and to use the three-phase PWM wave to regulate the power quality manager. The control module is electrically connected to the power quality manager, three-phase load, sampling module, dual internal model PI voltage loop module, phase-locked calculation module, repetitive control current loop module, and PWM module, and is used to execute the stable control method as described in any one of the preceding claims.

[0015] Preferably, the power quality manager includes: A DC bus, one end of which is connected to an external three-phase load; A first capacitor, one end of which is connected to the other end of the DC bus; The first MOS switch is connected to the other end of the first capacitor. The drain of the second MOS switch is connected to the source of the first MOS switch. The second capacitor has one end connected to the source of the second MOS switch and the other end connected to one end of the first capacitor. The drain of the third MOS switch is connected to the other end of the first capacitor; The fourth MOS switch has its drain connected to the source of the third MOS switch, and its source connected to one end of the second capacitor. The fifth MOS switch, the drain of which is connected to the other end of the first capacitor; The sixth MOS switch has its drain connected to the source of the fifth MOS switch, and its source connected to one end of the second capacitor. The first three-phase inductor, one end of which is connected to the source of the first MOS switch; The second and third phase inductors are connected at one end to the source of the third MOS switch. The third three-phase inductor, one end of which is connected to the source of the fifth MOS switch; The first three-phase resistor, one end of which is connected to the other end of the first three-phase inductor; The second three-phase resistor is connected to the other end of the second three-phase inductor, with one end of the first three-phase resistor connected to the other end of the second three-phase inductor. The third three-phase resistor, one end of which is connected to the other end of the third three-phase inductor; The first three-phase capacitor, one end of the first three-phase capacitor is connected to the other end of the first three-phase resistor, and the other end of the first three-phase capacitor is connected to the DC bus; The second three-phase capacitor has one end connected to the other end of the second three-phase resistor, and the other end of the second three-phase capacitor is connected to the DC bus. The third three-phase capacitor, one end of which is connected to the other end of the third three-phase resistor, and the other end of which is connected to the DC bus; A fourth three-phase inductor, one end of which is connected to the other end of the first three-phase inductor, and the other end of which is connected to an external three-phase load; The fifth three-phase inductor has one end connected to the second three-phase inductor and the other end connected to an external three-phase load. The sixth three-phase inductor has one end connected to the third three-phase inductor and the other end connected to an external three-phase load.

[0016] Through the above technical solution, the method and system form a closed-loop control by sampling the DC-side voltage of the power grid, load, and power quality manager in real time. The external voltage loop adopts a dual internal model PI controller to model and suppress the odd and even harmonics in the DC bus voltage, thereby stabilizing the DC-side voltage. The phase-locked loop calculates the harmonics and reactive current commands that need to be compensated. The internal current loop adopts a repetitive controller to synthesize the above commands and the voltage loop output into a reference signal, and compares it with the actual current to generate a high-precision PWM modulation wave, which finally drives the power quality manager to output the compensation current. The dual internal model PI controller effectively solves the problem of DC-side even harmonics that are difficult to suppress by traditional methods, reduces the delay time, quickly stabilizes the DC-side bus voltage, and improves the DC voltage quality and system stability. The repetitive control of the current loop has extremely high steady-state accuracy for periodic harmonics, can accurately track commands and effectively suppress derivative harmonics caused by switching actions. The two work together to achieve high-performance compensation for grid harmonics and reactive current, while significantly improving the operational stability and output power quality of the power quality manager itself. Attached Figure Description

[0017] Figure 1 This is a connection block diagram of a power quality manager stability control method with dual internal model PI control according to an embodiment of the present invention; Figure 2 This is a connection block diagram for obtaining the external voltage loop output of a power quality manager stability control method with dual internal model PI control according to an embodiment of the present invention. Figure 3 This is a connection block diagram for calculating and obtaining compensated three-phase harmonics and reactive current in a power quality manager stability control method with dual internal mode PI control according to an embodiment of the present invention. Figure 4 This is a connection block diagram for obtaining three-phase modulation values ​​in a power quality manager stability control method with dual internal mode PI control according to an embodiment of the present invention. Figure 5 This is a connection block diagram of a power quality manager stability control method based on three-phase modulation value, according to an embodiment of the present invention, which is a dual internal model PI control method for regulating the power quality manager. Figure 6 This is a connection block diagram of the output three-phase PWM wave of a power quality manager stabilization control method with dual internal mode PI control according to an embodiment of the present invention. Figure 7 This is a schematic diagram excluding the control module of a dual internal model PI controlled power quality manager stability control system according to an embodiment of the present invention. Figure 8This is a circuit connection diagram of the power quality manager in a power quality manager stability control system with dual internal model PI control according to an embodiment of the present invention.

[0018] Explanation of reference numerals in the attached figures 1. Power Quality Manager; 2. Three-Phase Load; 3. Sampling Module; 4. Dual Internal Model PI Voltage Loop Module; 5. Phase-Locked Loop Calculation Module; 6. Repetitive Control Current Loop Module; 7. PWM Module; 8. Control Module; Y1. DC Bus; C1. First Capacitor; Q1. First MOS Switch; Q2. Second MOS Switch; Q3. Third MOS Switch; Q4. Fourth MOS Switch; Q5. Fifth MOS Switch; Q6. Sixth MOS Switch; C2. Second Capacitor; R1. First Three-Phase Resistor; R2. Second Three-Phase Resistor; R3. Third Three-Phase Resistor; L1. First Three-Phase Inductor; L2. Second Three-Phase Inductor; L3. Third Three-Phase Inductor; L4. Fourth Three-Phase Inductor; L5. Fifth Three-Phase Inductor; L6. Sixth Three-Phase Inductor; C R 1. First and third phase capacitors; C R 2. Second and third phase capacitors; C R 3. The third three-phase capacitor. Detailed Implementation

[0019] The specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustration and explanation only and are not intended to limit the scope of the present invention.

[0020] like Figure 1 The diagram shown is a connection block diagram of a power quality manager stability control method with dual internal model PI control according to an embodiment of the present invention; Figure 1 The stability control method includes the following steps: In step S10, sampling data from the power quality manager, three-phase load, and power grid are acquired; In step S11, the external voltage loop output is obtained based on the external voltage loop dual internal mode PI controller; In step S12, phase-locked loop calculations are performed to obtain the three-phase harmonics and reactive current that need to be compensated. In step S13, the three-phase reference current signal of the inner current loop is obtained based on the external voltage output, three-phase harmonics and reactive current, and the three-phase modulation value is obtained based on the three-phase reference current signal of the inner current loop. In step S14, a three-phase PWM wave is generated based on the three-phase modulation value. The three-phase PWM wave is used to regulate the power quality manager to achieve harmonic compensation and suppression of derived harmonics in the power grid.

[0021] Step S10 uses sensors to collect real-time data on the DC side voltage of the power quality manager, the three-phase voltage and current on the grid side, and the three-phase current on the load side, ensuring the real-time performance and accuracy of the control.

[0022] Step S11 sends the error between the DC bus voltage and the command value to a specially designed dual internal mode PI controller. This controller contains independent suppression channels for odd and even harmonics, which can accurately eliminate specific harmonic pulsations of the DC side voltage. Its output serves as an amplitude reference for the internal current loop, ensuring the high stability of the DC bus.

[0023] Step S12 utilizes a phase-locked loop to track the phase and frequency of the grid voltage in real time. Based on this phase information, the fundamental active component is separated from the load current in real time, thereby accurately calculating the required harmonic and reactive current commands, achieving rapid and accurate extraction of the compensation target.

[0024] Step S13 synthesizes the three-phase reference current signal of the inner current loop by combining the external voltage output with the three-phase harmonics and reactive current. After comparing the signal with the actual grid-side current, the error is processed by the inner current loop repetitive controller. The repetitive controller can achieve zero steady-state error tracking of the periodic signal, thereby outputting a high-precision three-phase voltage modulation wave to ensure perfect reproduction of the command by the compensation current.

[0025] Step S14 compares the three-phase modulation value output by the current loop with the triangular carrier wave to generate a three-phase PWM wave that controls the power switching device. This three-phase PWM wave drives the main circuit of the power quality manager to generate a compensation current corresponding to the command and inject it into the grid, ultimately offsetting the load harmonics and reactive current, suppressing the harmonics that the device itself may generate, and purifying the grid current.

[0026] This control method samples data from the power grid, load, and power quality manager. The external voltage loop output is generated by a dual-internal-mode PI controller within the external voltage loop. Combined with phase-locked loop (PLL) calculations, the harmonics and reactive currents requiring compensation are obtained. Then, a three-phase reference current signal is generated through the internal current loop and converted into a PWM modulation wave to drive the power quality manager. While achieving harmonic and reactive power compensation, it effectively suppresses derivative harmonics that may be introduced by the compensation device itself. This ensures that the DC-side bus voltage does not fluctuate with grid fluctuations, guaranteeing the stability of the DC-side bus voltage and the quality of grid-side current management, thereby improving the power quality and supply stability of the grid.

[0027] In the figure, to facilitate real-time data input to the stability control system, in one embodiment of the present invention, acquiring sampling data from the power quality manager, three-phase load, and power grid may include the following steps: In step S20, the DC bus voltage of the power quality manager is sampled. And set the DC voltage command value. ; In step S21, the three-phase current on the grid side connected to the power quality manager is sampled. and the three-phase voltage on the grid side ; In step S22, the three-phase load current is sampled. .

[0028] The relevant data is collected: DC voltage is used to stabilize the DC bus, grid voltage is used for synchronization (phase-locked loop), and grid current and load current are used for feedback control and calculation of compensation targets, respectively, laying a solid foundation for subsequent data processing.

[0029] like Figure 2 The diagram shown is a connection block diagram for obtaining the external voltage loop output in a power quality manager stability control method with dual internal model PI control according to an embodiment of the present invention; Figure 2 In order to ensure DC-side voltage stability and achieve good harmonic suppression, in one embodiment of the present invention, obtaining the external voltage loop output based on the external voltage loop dual internal mode PI controller may include the following steps: In step S30, the DC bus voltage of the power quality manager is obtained. and DC voltage command value The difference between the two is used to obtain the tracking error. ; In step S31, based on the odd-order harmonic internal mode PI controller in the external voltage loop dual internal mode PI controller, formula (1) is used to address the tracking error. The process involves constructing the transfer function for the odd-order harmonic control channel within the odd-order harmonic internal mode PI controller. ,

[0030] in, For the odd-order harmonic control channel, For the Laplace operator, This represents the proportional gain coefficient for the odd-order harmonic control channel. For odd-order harmonics, a low-pass filter function is used. It is the natural logarithm. The fundamental period of the grid voltage. For the feedback coefficient of odd-order harmonics; In step S32, based on the even-order harmonic internal mode PI controller in the external voltage loop dual internal mode PI controller, formula (2) is used to address the tracking error. The process involves constructing the transfer function for the even-order harmonic control channel within the even-order harmonic internal mode PI controller. ,

[0031] in, For the even-order harmonic control channel, (This is the transfer function.) For the Laplace operator, The proportional gain coefficient for the even-order harmonic control channel. For even-order harmonics, a low-pass filter function is used. The feedback coefficient for even-order harmonics; In step S33, the transfer function of the external voltage loop output is obtained using formula (3) based on the superposition of odd-order harmonic control channels and even-order harmonic control channels of the dual internal mode PI controller of the external voltage loop, and the external voltage loop output is obtained. (3) in, This is the transfer function of the external voltage loop output.

[0032] The use of an external voltage loop dual internal mode PI controller to suppress odd and even harmonics, with no coupling between the control parameters of odd and even harmonics, and both are filtered by separate low-pass filters, greatly improving the control accuracy and waveform quality of the DC bus voltage. By specifically suppressing harmonic pulsations of a certain order, the high stability of the DC side voltage is ensured, providing stable and reliable energy support for the internal current loop. This fundamentally reduces the possibility of compensation current distortion caused by DC voltage fluctuations. Compared with traditional repetitive control internal mode PI, its control delay time is reduced by half under the same integral gain, and the system convergence speed is faster.

[0033] like Figure 3 The diagram shown is a connection block diagram for calculating and obtaining compensated three-phase harmonics and reactive current in a power quality manager stability control method with dual internal mode PI control according to an embodiment of the present invention; Figure 3 In order to accurately obtain the three-phase harmonics and reactive currents that need to be compensated, in one embodiment of the present invention, the phase-locked loop calculation to obtain the three-phase harmonics and reactive currents that need to be compensated may include the following steps: In step S40, the three-phase voltage on the grid side is obtained. And based on three-phase voltage Perform a two-phase rotating coordinate system transformation to obtain the direct-axis voltage and quadrature-axis voltage; In step S41, a proportional-integral controller is used to perform zero steady-state error tracking control to output the angular frequency deviation; In step S42, the actual angular frequency of the power grid is obtained by adding the angular frequency deviation and the rated angular frequency of the power grid. The phase information of the three-phase voltage on the grid side is obtained by integrating the data. ; In step S43, the phase information of the three-phase voltage is obtained using formula (4). and three-phase load current The process involves obtaining the three-phase harmonics and reactive current that need to be compensated. (4) in, For the first The first moment Phase harmonics and reactive current, For the first The first moment Phase load current, For the first The amplitude of the fundamental active current component of the phase load current. For the first The first moment The instantaneous component of the fundamental reactive current of the phase. For the first The first moment The instantaneous component of the fundamental active current of the phase.

[0034] By using phase-locked loop (PLL) technology to convert and track the grid voltage, the precise grid synchronization phase angle can be obtained in real time. Based on this phase, the fundamental active current component that is in phase with the voltage is subtracted from the total load current in real time using instantaneous power theory. The remaining part is the harmonic and reactive current command that needs to be compensated. This enables the rapid and accurate extraction of the compensation target, providing accurate dynamic commands for subsequent control links. It is the key to ensuring the real-time performance and effectiveness of compensation.

[0035] like Figure 4 The diagram shown is a connection block diagram for obtaining three-phase modulation values ​​in a power quality manager stability control method with dual internal mode PI control according to an embodiment of the present invention; Figure 4 In order to facilitate the subsequent generation of three-phase modulation values, in one embodiment of the present invention, obtaining the three-phase reference current signal of the inner current loop based on the external voltage output, three-phase harmonics, and reactive current, and obtaining the three-phase modulation value based on the three-phase reference current signal of the inner current loop may include the following steps: In step S50, the three-phase reference current signal of the inner current loop is synthesized by superimposing the acquired external voltage output, three-phase harmonics and reactive current signals. In step S51, the three-phase reference current signal of the inner current loop and the three-phase current of the grid side are... The three-phase current error is obtained by performing corresponding subtraction. In step S52, an internal current loop repetitive controller is used, and the three-phase current error is obtained as input. The transfer function of the internal current loop repetitive controller is constructed using formula (5), and the output three-phase modulation value is repeatedly calculated. , (5) in, This is the transfer function of the repetitive controller for the inner current loop. This is the repeatability control factor. Discrete in time Domain operators, The number of sampling points for each fundamental frequency cycle of the power grid. C ( z ) is a compensator, The inner membrane coefficient is used. The DC voltage regulation signal of the outer voltage loop is superimposed with the harmonic and reactive current commands to be compensated to synthesize the final three-phase current reference signal. The difference between this reference signal and the measured current on the grid side is used to obtain the instantaneous current tracking error. This error is input to the repetitive controller of the inner loop, which corrects the current output to generate a high-precision three-phase voltage modulation signal. This achieves zero steady-state error and high-precision tracking of periodic current commands, ensuring that the compensation current can offset load disturbances in real time and accurately.

[0036] like Figure 5 The diagram shown is a connection block diagram of a power quality manager stability control method based on three-phase modulation values, according to an embodiment of the present invention; in Figure 5 In order to achieve harmonic compensation of the power grid, in one embodiment of the present invention, a three-phase PWM wave is generated based on the three-phase modulation value, and the power quality manager is controlled by the three-phase PWM wave to achieve harmonic compensation and suppression of derived harmonics of the power grid. This can include the following steps: In step S60, the three-phase modulation value is obtained; In step S61, the three-phase modulation value and the preset triangular carrier wave are processed by the comparator to output a three-phase PWM wave; In step S62, a three-phase PWM wave is used to control the switching transistors in the power quality manager, driving the main circuit in the power quality manager to output a control voltage and generate a compensation current signal. In step S63, a compensation current is generated based on the compensation current signal and output to the power grid to offset the harmonics and reactive current generated by the load, thereby realizing the control of harmonic compensation and suppression of derived harmonics in the power grid.

[0037] The three-phase reference current signal calculated by the inner current loop is compared with the triangular carrier wave to generate a series of three-phase PWM waves with adjustable pulse width. This precisely controls the on / off timing of the power switching devices in the power quality manager, thereby driving the main circuit to generate the required compensation voltage. Finally, the compensation current that strictly corresponds to the command is injected into the power grid, realizing efficient and accurate power amplification and synthesis of complex compensation current waveforms. This ultimately achieves dynamic compensation of harmonics and reactive current.

[0038] like Figure 6 The diagram shown is a connection block diagram of the output three-phase PWM wave of a power quality manager stabilization control method with dual internal mode PI control according to an embodiment of the present invention; Figure 6 In order to generate the required three-phase PWM wave, in one embodiment of the present invention, the three-phase modulation value and a preset triangular carrier wave are processed by a comparator, and the output of the three-phase PWM wave may include the following steps: In step S70, the values ​​of each phase in the three-phase modulation values ​​are obtained; In step S71, a comparator is used to determine whether the value of each phase in the three phases is greater than the preset value of the triangular carrier wave of the corresponding phase. In step S72, if the value of each phase in the three phases is greater than the preset value of the triangular carrier wave of the corresponding phase, the comparator outputs a high-level PWM wave of the corresponding phase. In step S73, when the value of each phase in the three phases is less than or equal to the preset value of the triangular carrier wave of the corresponding phase, the comparator outputs a low-level PWM wave of the corresponding phase.

[0039] The three-phase modulation signals are compared in real time with a triangular carrier wave in a comparator. When the instantaneous value of the modulation signal is higher than that of the triangular carrier wave, the comparator outputs a high level; otherwise, it outputs a low level, generating a series of three-phase PWM waves with a pulse width proportional to the amplitude of the modulation signal. The complex analog modulation waveform is converted into on / off commands for power switching devices with high fidelity using a digital switching control method, thereby ensuring that the main circuit of the power quality manager can accurately synthesize the required compensation voltage and current.

[0040] like Figure 7 The diagram shown is a connection schematic of a dual internal model PI-controlled power quality manager stability control system according to an embodiment of the present invention, excluding the control module; Figure 7In a second aspect, the present invention provides a power quality manager stability control system with dual internal model PI control. The stability control system includes a power quality manager 1, a three-phase load 2, a sampling module 3, a dual internal model PI voltage loop module 4, a phase-locked loop calculation module 5, a repetitive control current loop module 6, a PWM module 7, and a control module 8. The three-phase load 2 is electrically connected to the power quality manager 1. The sampling module 3 is electrically connected to the power quality manager 1 and the three-phase load 2, and is used to acquire sampling data from the power quality manager 1, the three-phase load 2, and the power grid. The dual internal model PI voltage loop module 4 is electrically connected to the sampling module 3, and is used to acquire the external voltage loop output. The phase-locked loop calculation module 5 is electrically connected to the sampling module 3, and is used to perform phase-locked loop calculation to acquire the three-phase harmonics and reactive current that need to be compensated. The repetitive control current loop module 6 is electrically connected to the dual internal mode PI voltage loop module 4 and the phase-locked loop calculation module 5. It is used to obtain the three-phase reference current signal of the internal current loop based on the external voltage output, three-phase harmonics and reactive current, and to obtain the three-phase modulation value based on the three-phase reference current signal of the internal current loop. The PWM module 7 is electrically connected to the repetitive control current loop module 6 and the three-phase imbalance regulator. It is used to generate a three-phase PWM wave based on the three-phase modulation value and to regulate the power quality manager 1 using the three-phase PWM wave. The control module 8 is electrically connected to the power quality manager 1, the three-phase load 2, the sampling module 3, the dual internal mode PI voltage loop module 4, the phase-locked loop calculation module 5, the repetitive control current loop module 6 and the PWM module 7. It is used to execute the stable control method as described in any of the preceding claims.

[0041] This system uses a dual internal mode PI controller to suppress odd and even harmonics separately. There is no coupling relationship between the control parameters of odd and even harmonics. They are filtered by separate low-pass filters, which simplifies parameter tuning and simplifies the control structure while ensuring the function of harmonic compensation and suppression. Compared with the traditional repetitive control internal mode PI, its control delay time is reduced by half, the system converges faster, and the DC bus voltage is stabilized quickly.

[0042] like Figure 8 This is a circuit connection diagram of the power quality manager 1 in a power quality manager 2 stability control system with dual internal model PI control according to an embodiment of the present invention; Figure 8In order to control the power quality manager 1, in one embodiment of the present invention, the power quality manager 1 includes a DC bus Y1, a first capacitor C1, a first MOS switch Q1, a second MOS switch Q2, a second capacitor C2, a third MOS switch Q3, a fourth MOS switch Q4, a fifth MOS switch Q5, a sixth MOS switch Q6, a first three-phase inductor L1, a second three-phase inductor L2, a third three-phase inductor L3, a first three-phase resistor R1, and a second three-phase resistor R2. The three-phase resistor R3, the first three-phase capacitor, the second three-phase capacitor, the third three-phase capacitor, the fourth three-phase inductor L4, the fifth three-phase inductor L5, and the sixth three-phase inductor L6 are connected. Specifically, the DC bus Y1 is connected to the external three-phase load 2, one end of the first capacitor C1 is connected to the DC bus Y1, the drain of the first MOS switch Q1 is connected to the other end of the first capacitor C1, the drain of the second MOS switch Q2 is connected to the source of the first MOS switch Q1, one end of the second capacitor C2 is connected to the source of the second MOS switch Q2, and the other end of the second capacitor C2 is connected to one end of the first capacitor C1, the drain of the third MOS switch Q3 is connected to the other end of the first capacitor C1, the drain of the fourth MOS switch Q4 is connected to the source of the third MOS switch Q3, and the source of the fourth MOS switch Q4 is connected to one end of the second capacitor C2, the drain of the fifth MOS switch Q5 is connected to the other end of the first capacitor C1, the drain of the sixth MOS switch Q6 is connected to the source of the fifth MOS switch Q5, and the source of the sixth MOS switch Q6 is connected to the first three-phase inductor L6. One end of capacitor C2; one end of the first three-phase inductor L1 is connected to the source of the first MOS switch Q1; one end of the second three-phase inductor L2 is connected to the source of the third MOS switch Q3; one end of the third three-phase inductor L3 is connected to the source of the fifth MOS switch Q5; one end of the first three-phase resistor R1 is connected to the other end of the first three-phase inductor L1; one end of the first three-phase resistor R1 is connected to the other end of the second three-phase inductor L2; one end of the third three-phase resistor R3 is connected to the other end of the third three-phase inductor L3; the first three-phase capacitor C... R One end of 1 is connected to the other end of the first three-phase resistor R1, and the first three-phase capacitor C R The other end of 1 is connected to the DC bus Y1; the second three-phase capacitor C R One end of 2 is connected to the other end of the second three-phase resistor R2, and the second three-phase capacitor C R The other end of 2 is connected to the DC bus Y1; the third three-phase capacitor C R One end of 3 is connected to the other end of the third three-phase resistor R3, and the third three-phase capacitor C RThe other end of 3 is connected to the DC bus Y1; one end of the fourth three-phase inductor L4 is connected to the other end of the first three-phase inductor L1, and the other end of the fourth three-phase inductor L4 is connected to the external three-phase load 2; one end of the fifth three-phase inductor L5 is connected to the other end of the second three-phase inductor L2, and the other end is connected to the external three-phase load 2; one end of the sixth three-phase inductor L6 is connected to the other end of the third three-phase inductor L3, and the other end is connected to the external three-phase load 2.

[0043] Through the above technical solution, the method and system form a closed-loop control by sampling the DC-side voltage of the power grid, load, and power quality manager in real time. The external voltage loop adopts a dual internal model PI controller to model and suppress the odd and even harmonics in the DC bus voltage, thereby stabilizing the DC-side voltage. The phase-locked loop calculates the harmonics and reactive current commands that need to be compensated. The internal current loop adopts a repetitive controller to synthesize the above commands and the voltage loop output into a reference signal, and compares it with the actual current to generate a high-precision PWM modulation wave, which finally drives the power quality manager to output the compensation current. The dual internal model PI controller effectively solves the problem of DC-side even harmonics that are difficult to suppress by traditional methods, reduces the delay time, quickly stabilizes the DC-side bus voltage, and improves the DC voltage quality and system stability. The repetitive control of the current loop has extremely high steady-state accuracy for periodic harmonics, can accurately track commands and effectively suppress derivative harmonics caused by switching actions. The two work together to achieve high-performance compensation for grid harmonics and reactive current, while significantly improving the operational stability and output power quality of the power quality manager itself.

[0044] The preferred embodiments of the present invention have been described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the specific details of the above embodiments. Within the scope of the technical concept of the present invention, various simple modifications can be made to the technical solutions of the present invention, and these simple modifications all fall within the protection scope of the present invention. Furthermore, it should be noted that the various specific technical features described in the above embodiments can be combined in any suitable manner without contradiction. To avoid unnecessary repetition, the present invention will not describe the various possible combinations separately.

Claims

1. A stable control method for a power quality manager with dual internal model PI control, characterized in that, The stability control method includes: Acquire sampling data from the power quality manager, three-phase loads, and the power grid; The external voltage loop output is obtained based on the dual internal mode PI controller of the external voltage loop; Phase-locked loop (PLL) calculations are used to obtain the three-phase harmonics and reactive current that need to be compensated. The three-phase reference current signal of the inner current loop is obtained based on the external voltage output, three-phase harmonics and reactive current, and the three-phase modulation value is obtained based on the three-phase reference current signal of the inner current loop. A three-phase PWM wave is generated based on the three-phase modulation value. The three-phase PWM wave is used to regulate the power quality manager to achieve harmonic compensation and suppression of derived harmonics in the power grid.

2. The stability control method according to claim 1, characterized in that, Acquire sampling data from the power quality manager, three-phase loads, and the power grid, including: Sampling power quality manager DC bus side voltage And set the DC voltage command value. ; The power quality manager is connected to the grid-side three-phase current sampling system. and the three-phase voltage on the grid side ; Sample three-phase load current .

3. The stability control method according to claim 2, characterized in that, The external voltage loop output is obtained based on the dual internal mode PI controller of the external voltage loop, including: Obtain DC bus side voltage from power quality manager and DC voltage command value The difference between the two is used to obtain the tracking error. ; Based on the external voltage loop dual internal mode PI controller, the odd harmonic internal mode PI controller uses formula (1) to address the tracking error. The process involves constructing the transfer function for the odd-order harmonic control channel within the odd-order harmonic internal mode PI controller. , in, For the odd-order harmonic control channel, For the Laplace operator, This represents the proportional gain coefficient for the odd-order harmonic control channel. For odd-order harmonics, a low-pass filter function is used. It is the natural logarithm. The fundamental period of the grid voltage. For the feedback coefficient of odd-order harmonics; Based on the even-order harmonic internal mode PI controller in the external voltage loop dual internal mode PI controller, formula (2) is used to address the tracking error. The process involves constructing the transfer function for the even-order harmonic control channel within the even-order harmonic internal mode PI controller. , in, For the even-order harmonic control channel, (This is the transfer function.) For the Laplace operator, The proportional gain coefficient for the even-order harmonic control channel. For even-order harmonics, a low-pass filter function is used. The feedback coefficient for even-order harmonics; Based on the external voltage loop dual internal mode PI controller superimposed with odd-order harmonic control channels and even-order harmonic control channels, the transfer function of the external voltage loop output is obtained using formula (3). ,(3) in, This is the transfer function of the external voltage loop output.

4. The stability control method according to claim 2, characterized in that, Phase-locked loop (PLL) calculations are used to obtain the three-phase harmonics and reactive currents that need to be compensated, including: Obtain the three-phase voltage on the grid side And based on three-phase voltage Perform a two-phase rotating coordinate system transformation to obtain the direct-axis voltage and quadrature-axis voltage; Using a proportional-integral controller for zero steady-state error tracking control outputs angular frequency deviation; The actual angular frequency of the power grid is obtained by adding the angular frequency deviation to the rated angular frequency of the power grid. The phase information of the three-phase voltage on the grid side is obtained by integrating the data. ; The phase information of the three-phase voltage is obtained using formula (4). The three-phase load current is processed to obtain the three-phase harmonics and reactive current that need to be compensated. ,(4) in, For the first The first moment Phase harmonics and reactive current, For the first The first moment Phase load current, For the first The amplitude of the fundamental active current component of the phase load current. For the first The first moment The instantaneous component of the fundamental reactive current of the phase. For the first The first moment The instantaneous component of the fundamental active current of the phase.

5. The stability control method according to claim 4, characterized in that, The three-phase reference current signal of the inner current loop is obtained based on the external voltage output, three-phase harmonics, and reactive current. The three-phase modulation value is then obtained based on the three-phase reference current signal of the inner current loop, including: The three-phase reference current signal of the inner current loop is synthesized by superimposing the obtained external voltage output, three-phase harmonics and reactive current signals. The three-phase reference current signal of the inner current loop and the three-phase current on the grid side are combined. The three-phase current error is obtained by performing corresponding subtraction. Using an internal current loop repetitive controller and taking the three-phase current error as input, the transfer function of the internal current loop repetitive controller is constructed using formula (5), and the output three-phase modulation value is repeatedly calculated. , ,(5) in, This is the transfer function of the repetitive controller for the inner current loop. This is the repeatability control factor. Discrete in time Domain operators, The number of sampling points for each fundamental frequency cycle of the power grid. C ( z ) is a compensator, This represents the intima coefficient.

6. The stability control method according to claim 1, characterized in that, A three-phase PWM wave is generated based on the three-phase modulation value. This three-phase PWM wave is then used to regulate the power quality manager, enabling harmonic compensation and suppression of derived harmonics in the power grid. This includes: Obtain the three-phase modulation value; The comparator processes the three-phase modulation values ​​and the preset triangular carrier wave to output a three-phase PWM wave. The switching transistors in the power quality manager are controlled by a three-phase PWM wave, which drives the main circuit in the power quality manager to output control voltage and generate a compensation current signal. Based on the compensation current signal, a compensation current is generated and output to the power grid to offset the harmonics and reactive current generated by the load, thereby achieving harmonic compensation and control of the power grid to suppress derived harmonics.

7. The stability control method according to claim 6, characterized in that, The comparator processes the three-phase modulation values ​​and the preset triangular carrier wave to output a three-phase PWM wave, including: Obtain the values ​​of each phase in the three-phase modulation values; Use a comparator to determine whether the value of each phase in the three phases is greater than the preset value of the triangular carrier wave for the corresponding phase; When the value of each phase in the three phases is greater than the preset value of the triangular carrier wave of the corresponding phase, the comparator outputs a high-level PWM wave of the corresponding phase. When the value of each phase in the three phases is less than or equal to the preset value of the triangular carrier wave of the corresponding phase, the comparator outputs a low-level PWM wave of the corresponding phase.

8. A power quality manager stability control system with dual internal model PI control, characterized in that, The stability control system includes: Power quality manager; A three-phase load is electrically connected to the power quality manager. The sampling module is electrically connected to the power quality manager and the three-phase load, and is used to acquire sampling data from the power quality manager, the three-phase load, and the power grid. A dual internal mode PI voltage loop module, electrically connected to the sampling module, is used to acquire the external voltage loop output; The phase-locked calculation module is electrically connected to the sampling module and is used to calculate the three-phase harmonics and reactive current that need to be compensated. The repetitive control current loop module is electrically connected to the dual internal mode PI voltage loop module and the phase-locked calculation module. It is used to obtain the three-phase reference current signal of the internal current loop based on the external voltage output, three-phase harmonics and reactive current, and to obtain the three-phase modulation value based on the three-phase reference current signal of the internal current loop. The PWM module is electrically connected to the repetitive control current loop module and the three-phase imbalance regulator. It is used to generate a three-phase PWM wave based on the three-phase modulation value and to use the three-phase PWM wave to regulate the power quality manager. The control module is electrically connected to the power quality manager, three-phase load, sampling module, dual internal model PI voltage loop module, phase-locked calculation module, repetitive control current loop module, and PWM module, and is used to execute the stable control method as described in any one of claims 1-7.

9. The stable control system according to claim 8, characterized in that, The power quality manager includes: A DC bus, which is connected to an external three-phase load; A first capacitor, one end of which is connected to the DC bus; The first MOS switch is connected to the other end of the first capacitor. The drain of the second MOS switch is connected to the source of the first MOS switch. The second capacitor has one end connected to the source of the second MOS switch and the other end connected to one end of the first capacitor. The drain of the third MOS switch is connected to the other end of the first capacitor; The fourth MOS switch has its drain connected to the source of the third MOS switch, and its source connected to one end of the second capacitor. The fifth MOS switch, the drain of which is connected to the other end of the first capacitor; The sixth MOS switch has its drain connected to the source of the fifth MOS switch, and its source connected to one end of the second capacitor. The first three-phase inductor, one end of which is connected to the source of the first MOS switch; The second and third phase inductors are connected at one end to the source of the third MOS switch. The third three-phase inductor, one end of which is connected to the source of the fifth MOS switch; The first three-phase resistor, one end of which is connected to the other end of the first three-phase inductor; The second three-phase resistor is connected to the other end of the second three-phase inductor, with one end of the first three-phase resistor connected to the other end of the second three-phase inductor. The third three-phase resistor, one end of which is connected to the other end of the third three-phase inductor; The first three-phase capacitor, one end of the first three-phase capacitor is connected to the other end of the first three-phase resistor, and the other end of the first three-phase capacitor is connected to the DC bus; The second three-phase capacitor has one end connected to the other end of the second three-phase resistor, and the other end of the second three-phase capacitor is connected to the DC bus. The third three-phase capacitor, one end of which is connected to the other end of the third three-phase resistor, and the other end of which is connected to the DC bus; A fourth three-phase inductor, one end of which is connected to the other end of the first three-phase inductor, and the other end of which is connected to an external three-phase load; The fifth three-phase inductor has one end connected to the second three-phase inductor and the other end connected to an external three-phase load. The sixth three-phase inductor has one end connected to the third three-phase inductor and the other end connected to an external three-phase load.