Synchronous overcurrent protection circuit and method suitable for series siC mosfet

Abstract

The application discloses a kind of synchronous overcurrent protection circuit and method suitable for series SiC MOSFET, including the current detection circuit based on the parasitic inductance between SiC MOSFET kelvin source and power source, overcurrent trigger circuit and synchronous off circuit connected in turn;Each SiC MOSFET in series is configured with separate current detection circuit and overcurrent trigger circuit, and the voltage signal across the parasitic inductance is integrated and amplified, the drain-source current flowing through the switch tube is reconstructed, the current signal is converted into proportional relationship voltage signal easy to handle, whether overcurrent is judged by setting appropriate voltage threshold in overcurrent trigger circuit, synchronous off circuit detects the overcurrent state of each switch tube and generates synchronous off signal when overcurrent, and the switching signal of all switch tubes is closed to realize synchronous off function, to realize the synchronous protection of each switch tube in series SiC MOSFET.

Description

Technical Field

[0001] This invention relates to the technical field of power electronic equipment, and in particular to a synchronous overcurrent protection circuit and method suitable for series-connected SiC MOSFETs. Background Technology

[0002] In the process of power electronics technology iterating towards higher frequencies, higher efficiency, and smaller size, wide-bandgap semiconductor switches, with their superior material properties, are gradually replacing traditional silicon-based switches and becoming the core support in medium- and high-voltage DC applications. As the voltage requirements of medium- and high-voltage DC applications continue to increase, the voltage withstand capability of a single SiC MOSFET can no longer meet practical application needs. Currently, limited by SiC manufacturing processes and yield costs, the voltage withstand levels of commercially available discrete SiC MOSFETs are mainly concentrated at 1.2kV and 1.7kV. Higher voltage withstand levels (such as 3.3kV and above) of SiC MOSFETs are not only difficult to develop and expensive to manufacture, but also have unreliable yields in mass production, resulting in extremely low market penetration and failing to meet the large-scale application needs of medium- and high-voltage scenarios.

[0003] Therefore, SiC MOSFET series connection technology has become the most economical and flexible solution to break through the voltage withstand limit of a single switch and achieve higher voltage level applications. By connecting multiple low-voltage SiC MOSFETs in series, the voltage withstand capability of the entire series branch can be superimposed. This allows the use of mature 1.2kV and 1.7kV switches to build medium and high voltage power conversion systems without relying on high-cost high-voltage single switches, significantly reducing the R&D and production costs of medium and high voltage applications. At the same time, it improves the flexibility of system design, allowing the number of series switches to be flexibly adjusted according to actual voltage requirements.

[0004] While connecting SiC MOSFETs in series can improve the overall voltage withstand level, it also significantly increases the complexity of protection circuit design, especially overcurrent protection, which directly determines the operational safety and lifespan of the series-connected SiC MOSFET system. Compared to the protection of a single SiC MOSFET, overcurrent protection of series-connected SiC MOSFETs faces more severe challenges, mainly due to the inherent characteristics of SiC MOSFETs themselves and the inherent defects of the series structure. On the one hand, SiC MOSFETs have extremely fast switching speeds (dv / dt can reach over 50V / ns, di / dt can reach over 5A / ns), are extremely sensitive to circuit parasitic parameters, and have extremely short overcurrent or short-circuit withstand times, typically not exceeding 2μs, far shorter than the 10μs or more of traditional silicon-based IGBTs. This requires overcurrent protection schemes to have extremely high response speeds, capable of completing fault detection, judgment, and execution of protection actions within microseconds; otherwise, the switching transistors are easily damaged due to overheating or overstress. On the other hand, in a series structure, the parameter dispersion of multiple SiC MOSFETs (such as threshold voltage, on-state resistance, switching speed, etc.), the asymmetry of parasitic inductance in the drive circuit, and the difference in response delay of the detection circuit can all lead to asynchronous protection actions of the series-connected switches when an overcurrent fault occurs. If each switch is directly protected independently, the overcurrent fault may cause asynchronous protection actions due to detection differences, action delays, and deviations in switch parameters. During the asynchronous period, a single switch will bear the entire DC bus voltage stress, which can lead to transient voltage problems such as switch failure and voltage surge.

[0005] To address the aforementioned issues, a synchronous overcurrent protection technology is being developed that enables synchronized operation of overcurrent protection for each series-connected SiC MOSFET, exhibiting fast response speed, high detection accuracy, and strong reliability. This technology is of significant practical importance and engineering application value for promoting the large-scale application of series-connected SiC MOSFET technology in medium and high voltage DC fields and improving the operational safety and reliability of power conversion systems. Summary of the Invention

[0006] The purpose of this invention is to provide a synchronous overcurrent protection circuit and method suitable for series-connected SiC MOSFETs. By detecting the voltage signal across the parasitic inductance between the Kelvin source and power source of the SiC MOSFET and integrating and amplifying it, the drain-source current flowing through the switching transistor can be quickly and accurately reconstructed. The current signal is converted into a proportional and easily processed voltage signal, and an appropriate voltage threshold is set to determine whether an overcurrent has occurred. Upon detecting an overcurrent, a synchronous shutdown function is implemented to protect each switching transistor in the series-connected SiC MOSFET.

[0007] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0008] A synchronous overcurrent protection circuit for series-connected SiC MOSFETs includes a synchronous turn-off circuit and several synchronous overcurrent protection units. Each synchronous overcurrent protection unit corresponds to one SiC MOSFET. Each synchronous overcurrent protection unit consists of a connected current detection circuit and an overcurrent trigger circuit. The current detection circuit, based on the parasitic inductance between the Kelvin source and power source of the SiC MOSFET, converts the drain-source current flowing through the SiC MOSFET into a proportional and easily processed voltage-type detection signal. The overcurrent trigger circuit determines whether an overcurrent fault has occurred in the SiC MOSFET based on the magnitude of the detection signal. The synchronous turn-off circuit is connected one-to-one with each of the synchronous overcurrent protection units to achieve synchronous turn-off and protection of the series-connected SiC MOSFETs when an overcurrent fault is detected in any one of the SiC MOSFETs.

[0009] Furthermore, the current detection circuit includes a detection terminal, an integrating amplifier circuit, and a filtering circuit. The detection terminal is the parasitic inductance between the Kelvin source and the power source of the SiC MOSFET. The integrating amplifier circuit includes an operational amplifier, a first capacitor, a first resistor, and a second resistor. The filtering circuit includes a third resistor and a second capacitor. The overcurrent trigger circuit includes a comparator and a pulse transmission module. The positive input terminal of the operational amplifier is connected to the Kelvin source of the SiC MOSFET and then to ground. Its negative input terminal is connected to one end of the first resistor, one end of the first capacitor, and one end of the second resistor, respectively. Its output terminal is connected to the other end of the first capacitor, the other end of the second resistor, and one end of the third resistor, respectively. The other end of the third resistor is connected to the positive input terminal of the comparator and one end of the second capacitor, respectively, and then to ground. The negative input terminal of the comparator is connected to a reference voltage, and its output terminal is connected to the input terminal of the pulse transmission module.

[0010] Furthermore, the synchronous shutdown circuit includes several SR latches, OR gate logic circuits, NOT gate logic circuits, and several AND gate logic circuits. The output terminals of several pulse transmission modules of the several synchronous overcurrent protection units are connected to the S terminal of the corresponding SR latches. The R terminals of the several SR latches are all connected to digital ground. The Q terminals of the several SR latches are all connected to the input terminals of the OR gate logic circuits. The output terminal of the OR gate logic circuit is connected to the input terminal of the NOT gate logic circuit. The output terminal of the NOT gate logic circuit is connected to one input terminal of the several AND gate logic circuits. The other input terminal of the several AND gate logic circuits is connected to the input switching signals of several SiC MOSFETs, and its output terminal is connected to the input terminal of the gate driver of the SiC MOSFET.

[0011] The synchronous overcurrent protection method described above, applicable to the synchronous overcurrent protection circuit of series-connected SiC MOSFETs, involves detecting the voltage signal across the parasitic inductance between the Kelvin source and power source of the SiC MOSFET, integrating and amplifying it to reconstruct the drain-source current flowing through the switching transistor. This converts the current signal into a proportional and easily processed voltage signal. A set voltage threshold is then used to determine whether an overcurrent has occurred. Upon detection of an overcurrent, a synchronous shutdown function is implemented, thereby protecting each switching transistor in the series-connected SiC MOSFET.

[0012] Furthermore, the synchronous overcurrent protection method applicable to synchronous overcurrent protection circuits of series-connected SiC MOSFETs is characterized by comprising the following steps:

[0013] 1) Detect the induced voltage on the parasitic inductance between the Kelvin source and the power source of the SiC MOSFET;

[0014] 2) The induced voltage is used to obtain a detection signal after passing through the integrating amplifier circuit and the filtering circuit in the current detection circuit;

[0015] 3) The detection signal generates an overcurrent signal after passing through the overcurrent trigger circuit. The detection signal and the reference voltage are compared by a comparator to determine whether the switching transistor has experienced overcurrent. When the detection signal is greater than the reference voltage, the switching transistor has experienced overcurrent, and the overcurrent signal is at a high level. Otherwise, no overcurrent has occurred, and the overcurrent signal is at a low level.

[0016] 4) The overcurrent signal is sent to the synchronous shutdown circuit. First, it is combined with the overcurrent signals of the other series-connected switches through an OR gate logic circuit to generate a unified synchronous shutdown signal. The synchronous shutdown signal is combined with the input switching signals of each switch through an AND gate logic circuit to generate a switching signal, which is then sent to the input of the gate driver. When no overcurrent occurs, the synchronous shutdown signal is low and the switching signal is high. If one or more switches experience overcurrent, the corresponding overcurrent signal becomes high and the synchronous shutdown signal becomes low. The switching signals of all switches are synchronously set to low, and all switches are synchronously shut down.

[0017] Compared with the prior art, this invention patent has the following beneficial effects:

[0018] 1. This invention applies to SiC MOSFETs with Kelvin pins and their topologies.

[0019] 2. This invention is simple and easy to implement, and has good compatibility. Compared with traditional desaturation protection schemes, it can quickly and accurately detect the current flowing through the switching transistor and determine whether there is an overcurrent.

[0020] 3. This invention achieves synchronous turn-off of all series-connected SiC MOSFETs by designing an independent logic control circuit, without relying on MCU for logic processing and judgment, further reducing the action response delay of overcurrent protection. Attached Figure Description

[0021] Figure 1 This is a synchronous overcurrent protection circuit diagram for series-connected SiC MOSFETs proposed in an embodiment of the present invention.

[0022] Figure 2 This is a synchronous overcurrent protection circuit diagram of an embodiment of the present invention, consisting of four SiC MOSFETs connected in series to form an upper and lower half-bridge structure.

[0023] Figure 3 This is a waveform diagram of the protection circuit operating when an overcurrent fault occurs according to an embodiment of the present invention. Detailed Implementation

[0024] The present invention will be further described in detail below with reference to the embodiments and accompanying drawings, but the embodiments of the present invention are not limited thereto.

[0025] See Figure 1 and Figure 2 As shown, the synchronous overcurrent protection circuit of the upper and lower half-bridge structure (Q1~Q4) composed of four SiC MOSFETs connected in series provided in this embodiment includes a synchronous turn-off circuit and four synchronous overcurrent protection units. Each synchronous overcurrent protection unit corresponds to one SiC MOSFET switch. The synchronous overcurrent protection unit consists of a current detection circuit and an overcurrent trigger circuit connected together. The current detection circuit is based on the parasitic inductance between the Kelvin source KS and the power source PS of the SiC MOSFET, and measures the drain-source current i flowing through the SiC MOSFET. ds This is converted into a proportional, easily processed voltage-type detection signal U. samp The overcurrent trigger circuit is based on the detection signal U samp The size of the fault indicates whether an overcurrent fault has occurred in the SiC MOSFET. The synchronous shutdown circuit is connected to several synchronous overcurrent protection units one by one to realize the synchronous shutdown and protection function of the series SiC MOSFET when an overcurrent fault is detected in any SiC MOSFET.

[0026] Preferably, the current detection circuit includes a detection terminal, an integrating amplifier circuit, and a filtering circuit, wherein the detection terminal is the parasitic inductance L between the Kelvin source KS and the power source PS of the SiC MOSFET. s The integrating amplifier circuit includes an operational amplifier AMP, a first capacitor C1, a first resistor R1, and a second resistor R2; the filtering circuit includes a third resistor R...f Second capacitor C f The overcurrent trigger circuit includes a comparator COMP and a pulse transfer module Pulse Transfer; the positive input terminal of the operational amplifier AMP is connected to the Kelvin source KS of the SiC MOSFET and then to ground GND; its negative input terminal is connected to one end of the first resistor R1, one end of the first capacitor C1, and one end of the second resistor R2; its output terminal is connected to the other end of the first capacitor C1, the other end of the second resistor R2, and the third resistor R f One end; the third resistor R f The other end is connected to the positive input terminal of comparator COMP and the second capacitor C, respectively. f One end of the comparator COMP is connected to ground GND; the negative input of the comparator COMP is connected to the reference voltage V. ref Its output is connected to the input of the Pulse Transfer module.

[0027] The voltage between KS and PS is expressed as:

[0028] (1);

[0029] In the formula, The parasitic inductance between the Kelvin source KS and the power source PS is... For L s The induced voltage value generated on This represents the drain-source current flowing through the switching transistor.

[0030] and, The rate of rise of the drain-source current can be measured by the oscilloscope recording the current when the switching transistor is turned on. and The calculation shows that:

[0031] (2);

[0032] L s After connecting the two ends to the pre-amplifier circuit, the drain-source current i of the switching transistor ds It will be reconstructed as a voltage-type detection signal U det After Laplace transform, we have:

[0033] (3);

[0034] In the formula, , , Let R1, R2, and C1 be the values ​​corresponding to the first resistor, R1, the second resistor, and C1, respectively, and let s represent the complex frequency variable in the Laplace transform. From equation (3), it can be seen that the integrating amplifier circuit can be regarded as having an input of i.ds (s), Output is U det For a first-order high-pass filter of (s), if the parameters are designed reasonably, within the high-frequency passband, the denominator will contain... This can be ignored; in this case, i ds Will with U det The relationship is linear, with a proportionality constant of 1 / 2. .

[0035] However, during normal switching, the current in the parasitic inductor will contain high-frequency ripple components related to the switching frequency and oscillating components after turn-off. These high-frequency components will also be integrated and amplified, and introduced into U. det Therefore, a low-pass filter is cascaded after the integrating amplifier circuit to suppress spikes and process components during the switching process, preventing high-frequency components of the switching transient from affecting the detection output.

[0036] After a cascaded low-pass filter, the output of the detected signal is U. samp , and drain-source current i ds The transfer function between them is:

[0037] (4);

[0038] In the formula, , The third resistor Second capacitor The corresponding value s represents the complex frequency variable in the Laplace transform. After introducing the filter structure, the transmission characteristics of the current detection circuit change from high-pass to band-pass, thereby effectively suppressing the high-frequency ripple components and overshoot of the switching transient process.

[0039] The corner frequency f of the bandpass filter L and f H It can be approximated as:

[0040] (5);

[0041] With appropriate parameter design, within the bandwidth of the current detection circuit, equation (4) can be simplified to:

[0042] (6);

[0043] Preferably, the synchronous shutdown circuit includes four SR latches, a four-input single-output OR gate logic circuit, a NOT gate logic circuit, and four AND gate logic circuits. The output terminals of the four pulse transfer modules (PulseTransfer) of the four synchronous overcurrent protection units are connected to the S terminal of the corresponding SR latches. The R terminals of the four SR latches are all connected to digital ground (DGND). The Q terminals of the four SR latches are all connected to the input terminals of the OR gate logic circuits. The output terminal of the OR gate logic circuit is connected to the input terminal of the NOT gate logic circuit. The output terminal of the NOT gate logic circuit is connected to one input terminal of the four AND gate logic circuits. The other input terminal of the four AND gate logic circuits is connected to the input switching signal PWM of the four SiC MOSFETs, and its output terminal is connected to the input terminal of the gate driver of the four SiC MOSFETs.

[0044] The following is an embodiment of the synchronous overcurrent protection method implemented by the synchronous overcurrent protection circuit applicable to series SiC MOSFETs according to the present invention, including the following steps:

[0045] 1) Detect the parasitic inductance L between the Kelvin source KS and the power source PS of the SiC MOSFET. s The induced voltage U on s ;

[0046] 2) The induced voltage U s The detection signal U is obtained after passing through the integrating amplifier circuit and the filtering circuit in the current detection circuit. samp ;

[0047] 3) The detection signal U samp After passing through the overcurrent trigger circuit, an overcurrent signal Error is generated, and the detection signal U... samp With reference voltage V ref The comparator COMP is used to determine whether an overcurrent has occurred in the switching transistor. When the detection signal U... samp Greater than the reference voltage V ref If an overcurrent occurs in the switching transistor, the overcurrent signal Error is high (H); otherwise, if no overcurrent occurs, the overcurrent signal Error is low (L).

[0048] 4) The overcurrent signal Error is sent to the synchronous shutdown circuit. First, it is ORed with the overcurrent signals of the other series-connected switches to generate a unified synchronous shutdown signal FLT. The synchronous shutdown signal FLT and the input switching signals PWM of each switch are ANDed with an AND gate to generate a switching signal, which is then sent to the input of the gate driver. When no overcurrent occurs, the synchronous shutdown signal FLT is low level L and the switching signal is high level H. If one or more switches experience overcurrent, the corresponding overcurrent signal Error becomes high level H, the synchronous shutdown signal FLT becomes low level L, and the switching signals of all switches are synchronously set to low level L, thus achieving synchronous shutdown of all switches.

[0049] See Figure 3 The figure shows the overcurrent protection action timing and key waveforms of the switching transistor Q1 under a dual-pulse test condition of 1000V / 25A. The duration of the first pulse is 5μs, and the duration of the second pulse is 20μs. PWM1 is the input switching signal of the SiC MOSFET switching transistor Q1, and PWM2 is the input switching signal of the SiC MOSFET switching transistor Q2. gs1 U gs2 i represents the drive voltage of the gate driver corresponding to Q1 and Q2, respectively. ds1 U is the drain-source current of Q1. samp1 Error1 is the voltage-type detection signal output by the current detection circuit in the overcurrent protection unit of Q1, Error1 is the overcurrent signal output by the overcurrent trigger circuit in the overcurrent protection unit of Q1, and FLT is the unified synchronous shutdown signal output by the synchronous shutdown circuit.

[0050] Before the overcurrent occurred, the circuit was working normally. ds1 If the set overcurrent threshold is not exceeded, the overcurrent signal Error1 remains low (L), and the synchronous shutdown command Error1 remains high (H). During the second pulse, an overcurrent occurs in the switching transistor. Due to the delay of the integrating amplifier circuit and the filtering circuit, after a detection delay t... delay Then, the detection signal U samp1 When the voltage reaches 1V, the overcurrent protection is triggered, and the pulse transmission module generates an overcurrent fault signal Error1 (high level, H) and sends it to the synchronous shutdown circuit. This generates a synchronous shutdown signal FLT (low level, L), synchronously shutting down all PWM signals input to the gate drivers (low level, L). The switching signals of all switching transistors are also synchronously set to low level (L). gs1 U gs2The voltage is negative, and the PWM signal output by the MCU is still at a high level (H), and all the series-connected switching transistors are successfully turned off.

[0051] further, Figure 3 The paper presents the response delays of each component of the overall overcurrent protection system and the overall operating time. Among these, the detection delay t... delay The 436ns timeframe is primarily determined by the response speed and bandwidth of the operational amplifier in the current sensing circuit based on the Kelvin source parasitic inductance; overcurrent triggering and action delay t act The total delay T of the overcurrent protection scheme is 285ns, mainly due to the propagation delay of the voltage comparator in the overcurrent fault signal generation section, the response and propagation delay of the pulse transmission module, the turn-off propagation delay of the driver, the drive resistance, and the influence of the charging and discharging process of the power device gate circuit. Therefore, the total delay T of the overcurrent protection scheme is 721ns, which is much lower than the typical overcurrent withstand time of 2μs for SiC MOSFETs.

[0052] The above description is only a preferred embodiment of the present invention. The present invention is not limited to the above embodiments. In the implementation process, there may be changes to the circuit model, driving signal and related parameters. If the changes or modifications to the present invention do not depart from the spirit and scope of the present invention and fall within the scope of the claims and equivalent technology of the present invention, then these changes and modifications should be covered within the protection scope of the present invention.

Claims

1. A synchronous overcurrent protection circuit suitable for series-connected SiC MOSFETs, characterized in that, It includes a synchronous turn-off circuit and several synchronous overcurrent protection units. Each synchronous overcurrent protection unit corresponds to a SiC MOSFET switch. Each synchronous overcurrent protection unit consists of a connected current detection circuit and an overcurrent trigger circuit. The current detection circuit, based on the parasitic inductance between the Kelvin source (KS) and power source (PS) of the SiC MOSFET, measures the drain-source current (i) flowing through the SiC MOSFET. ds ) is converted into a proportional, easily processed voltage-type detection signal (U) samp The overcurrent trigger circuit is based on the detection signal (U) samp The size of the fault indicates whether an overcurrent fault has occurred in the SiC MOSFET. The synchronous shutdown circuit is connected to several synchronous overcurrent protection units one by one to realize the synchronous shutdown and protection function of the series SiC MOSFET when an overcurrent fault is detected in any SiC MOSFET.

2. The synchronous overcurrent protection circuit for series-connected SiC MOSFETs according to claim 1, characterized in that, The current detection circuit includes a detection terminal, an integrating amplifier circuit, and a filtering circuit. The detection terminal is the parasitic inductance (L) between the Kelvin source (KS) and the power source (PS) of the SiC MOSFET. s The integrating amplifier circuit includes an operational amplifier (AMP), a first capacitor (C1), a first resistor (R1), and a second resistor (R2), and the filtering circuit includes a third resistor (R...). f ) and second capacitor (C f The overcurrent trigger circuit includes a comparator (COMP) and a pulse transfer module (PulseTransfer); the positive input terminal of the operational amplifier (AMP) is connected to the Kelvin source (KS) of the SiC MOSFET and then to ground (GND). Its negative input terminal is connected to one end of the first resistor (R1), one end of the first capacitor (C1), and one end of the second resistor (R2). Its output terminal is connected to the other end of the first capacitor (C1), the other end of the second resistor (R2), and the third resistor (R... f One end of the third resistor (R); f The other end is connected to the positive input terminal of the comparator (COMP) and the second capacitor (C). f One end of the comparator (COMP) is connected to ground (GND); the negative input of the comparator (COMP) is connected to the reference voltage (V). ref Its output is connected to the input of the Pulse Transfer module.

3. The synchronous overcurrent protection circuit for series-connected SiC MOSFETs according to claim 2, characterized in that, The synchronous shutdown circuit includes several SR latches, OR gate logic circuits, NOT gate logic circuits, and several AND gate logic circuits. The output terminals of several pulse transfer modules of the several synchronous overcurrent protection units are connected to the S terminal of the corresponding SR latches. The R terminals of the several SR latches are all connected to digital ground (DGND). The Q terminals of the several SR latches are all connected to the input terminals of the OR gate logic circuits. The output terminal of the OR gate logic circuit is connected to the input terminal of the NOT gate logic circuit. The output terminal of the NOT gate logic circuit is connected to one input terminal of the several AND gate logic circuits. The other input terminal of the several AND gate logic circuits is connected to the input switching signal (PWM) of several SiC MOSFETs, and its output terminal is connected to the input terminal of the gate driver of the SiC MOSFET.

4. A synchronous overcurrent protection method using the synchronous overcurrent protection circuit applicable to series-connected SiC MOSFETs as described in any one of claims 1-3, characterized in that, This method involves detecting the parasitic inductance (L) between the Kelvin source (KS) and power source (PS) of a SiC MOSFET. s The voltage signal at both ends is integrated and amplified to reconstruct the drain-source current flowing through the switching transistor. The current signal is converted into a proportional and easily processed voltage signal. Then, the overcurrent is determined by the set voltage threshold. When an overcurrent is detected, the synchronous shutdown function is implemented, thereby protecting each switching transistor in the series SiC MOSFET.

5. The synchronous overcurrent protection method for a synchronous overcurrent protection circuit applicable to series-connected SiC MOSFETs according to claim 4, characterized in that, Includes the following steps: 1) Detecting the parasitic inductance (L) between the Kelvin source (KS) and power source (PS) of a SiC MOSFET. s The induced voltage (U) on the surface s ); 2) The induced voltage (U) s The detection signal (U) is obtained after passing through the integrating amplifier circuit and the filtering circuit in the current detection circuit. samp ); 3) The detection signal (U) samp After passing through the overcurrent trigger circuit, an overcurrent signal (Error) is generated, and the detection signal (U) samp ) and reference voltage (V ref The comparator (COMP) determines whether an overcurrent has occurred in the switching transistor. When the detection signal (U) is received... samp ) greater than the reference voltage (V ref If an overcurrent occurs, the overcurrent signal (Error) is high (H); otherwise, if no overcurrent occurs, the overcurrent signal (Error) is low (L). 4) The overcurrent signal (Error) is sent to the synchronous shutdown circuit. First, it is combined with the overcurrent signals of the other series-connected switches through an OR gate logic circuit to generate a unified synchronous shutdown signal (FLT). The synchronous shutdown signal (FLT) and the input switching signals (PWM) of each switch are combined through an AND gate logic circuit to generate a switching signal, which is then sent to the input of the gate driver. When no overcurrent occurs, the synchronous shutdown signal (FLT) is low (L) and the switching signal is high (H). If one or more switches experience overcurrent, the corresponding overcurrent signal (Error) becomes high (H), the synchronous shutdown signal (FLT) becomes low (L), and the switching signals of all switches are synchronously set to low (L), thus achieving synchronous shutdown of all switches.

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