Silicon-based heterogeneously integrated asymmetric optical transmission device

Abstract

This invention proposes a silicon-based heterogeneous integrated asymmetric optical transmission device, belonging to the field of semiconductor device technology. It includes a first dual-waveguide region and a second dual-waveguide region. The first dual-waveguide region comprises a first gain waveguide and a first loss waveguide arranged side-by-side and optically coupled to each other. The second dual-waveguide region comprises a second gain waveguide and a second loss waveguide arranged side-by-side and optically coupled to each other. The first dual-waveguide region is in a parity-time symmetry broken state, and the second dual-waveguide region is in a parity-time symmetry state. During operation, when light is input from a port of the first gain waveguide, it is output from both ports of the second gain waveguide and the second loss waveguide; when light is input from a port of the second gain waveguide, it is output only from a port of the first gain waveguide. This invention employs an active design, flexibly adjusting gain and loss through electronic control, achieving asymmetric transmission while possessing optical amplification capabilities, and is highly compatible with silicon-based integrated processes.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor device technology, and more specifically, relates to a silicon-based heterogeneous integrated asymmetric optical transmission device. Background Technology

[0002] In integrated photonic chips, achieving asymmetric optical transmission (i.e., different output paths or states when optical signals are input from different directions) is a key requirement for constructing on-chip optical isolation, optical routing, and optical logic operation units. Traditional asymmetric transmission schemes mainly rely on passive optical structures, such as asymmetric waveguide couplers or designs based on specific photonic crystal structures. However, to achieve asymmetric characteristics, these passive schemes typically introduce significant structural losses or mode mismatches, leading to significant degradation of the optical signal during transmission and limiting system performance. Furthermore, the function of passive structures is fixed, making dynamic adjustment impossible.

[0003] The parity-time symmetry principle provides a new physical basis for designing novel asymmetric optical devices. By balancing controllable gain and loss in an active system, specific modulation of optical transmission modes can be achieved. However, existing research on devices based on this principle is mostly focused on theory or discrete component experiments. There is still no mature solution that can be combined with mainstream silicon-based optoelectronic integration technology to realize practical devices with low loss, adjustable electrical control, and optical amplification capabilities. Summary of the Invention

[0004] In view of the above-mentioned defects or improvement needs of the existing technology, the present invention provides a silicon-based heterogeneous integrated asymmetric optical transmission device, thereby solving the technical problems of high loss and fixed function of passive asymmetric transmission devices.

[0005] To achieve the above objectives, according to one aspect of the present invention, a silicon-based heterogeneous integrated asymmetric optical transmission device is provided, comprising a first dual-waveguide region and a second dual-waveguide region; The first dual waveguide region includes a first gain waveguide and a first loss waveguide arranged side by side and optically coupled to each other; The second dual waveguide region includes a second gain waveguide and a second loss waveguide arranged side by side and optically coupled to each other; The input and output terminals of the first gain waveguide are port A, the input and output terminals of the first loss waveguide are port B, the input and output terminals of the second gain waveguide are port C, and the input and output terminals of the second loss waveguide are port D. Voltage regulation ensures that the first dual waveguide region is in a parity-time symmetry broken state and the second dual waveguide region is in a parity-time symmetry state; when light is input from port A, it is output from ports C and D; when light is input from port C, it is output only from port A.

[0006] More preferably, the first dual waveguide region is in a parity-time symmetry broken state, which means that the gain-loss difference between the first gain waveguide and the first loss waveguide is greater than their coupling strength.

[0007] More preferably, the second dual waveguide region is in a parity-time symmetric state, meaning that the gain-loss difference between the second gain waveguide and the second loss waveguide is less than their coupling strength.

[0008] More preferably, the arrangement order of the first dual-waveguide region and the second dual-waveguide region can be interchanged.

[0009] Preferably, the first gain waveguide, the first loss waveguide, the second gain waveguide, and the second loss waveguide are all silicon-based III-V heterogeneous integrated structures.

[0010] Preferably, the first gain waveguide and the second gain waveguide have the same structure, both including a first silicon waveguide, a first silicon dioxide cladding, a first n-type cladding, a first n-face electrode, a first active layer, a first p-type cladding, and a first p-face electrode arranged from bottom to top; The first loss waveguide and the second loss waveguide have the same structure, both including, from bottom to top, a second silicon waveguide, a second silicon dioxide cladding, a second n-type cladding, a second n-face electrode, a second active layer, a second p-type cladding, and a second p-face electrode.

[0011] Preferably, both the first active layer and the second active layer are multi-quantum well structures.

[0012] Preferably, the first gain waveguide, the first loss waveguide, the second gain waveguide, and the second loss waveguide are all optically coupled to the active layer via evanescent waves through silicon waveguides.

[0013] Preferably, the corresponding waveguide is controlled to be in a gain state or a loss state by independently adjusting the voltage between the p-side electrode and the n-side electrode applied to each waveguide.

[0014] Preferably, it further includes at least one optical amplification region disposed between the first dual waveguide region and the second dual waveguide region, the optical amplification region being used to compensate for transmission loss.

[0015] In another aspect, the present invention provides an integrated photonic chip, including the silicon-based heterogeneous integrated asymmetric optical transmission device provided by the present invention.

[0016] In summary, compared with the prior art, the above-described technical solutions conceived by this invention can achieve the following beneficial effects: 1. The silicon-based heterogeneous integrated asymmetric optical transmission device proposed in this invention, through voltage regulation, enables the first dual-waveguide region to be in a parity-time symmetry broken state and the second dual-waveguide region to be in a parity-time symmetry state. When light is input from port A of the first gain waveguide, it will be simultaneously output from port C of the second gain waveguide and port D of the second loss waveguide; when light is input from port C of the second gain waveguide, it will be output only from port A of the first gain waveguide. Ultimately, asymmetric optical transmission is achieved between ports A, B, C, and D. In practical applications, the operating mode can be flexibly selected. Compared with passive solutions that introduce high losses, this invention adopts an active design, which not only achieves asymmetry through the parity-time symmetry principle but also solves the technical problem of fixed function in passive asymmetric transmission devices. At the same time, the first and second dual-waveguide regions of this invention, by setting the first and second gain waveguides, can amplify the optical signal, solving the technical problem of high loss in passive asymmetric transmission devices and effectively compensating for transmission loss.

[0017] 2. The silicon-based heterogeneous integrated asymmetric optical transmission device proposed in this invention can dynamically change its operating state by adjusting the electrode voltage of each waveguide, thereby controlling the asymmetric transmission ratio and realizing the electrical programmability of the device function.

[0018] 3. The silicon-based heterogeneous integrated asymmetric optical transmission device proposed in this invention, wherein the first gain waveguide, the first loss waveguide, the second gain waveguide, and the second loss waveguide are all silicon-based III-V heterogeneous integrated structures, and silicon-based III-V heterogeneous integration technology is adopted. The main structure of the device is compatible with standard silicon-on-insulator platform processes, which facilitates the realization of upper-side system integration.

[0019] 4. The silicon-based heterogeneous integrated asymmetric optical transmission device proposed in this invention has an adjustable order of the first dual waveguide region and the second dual waveguide, and can insert an additional optical amplification region, so that the device design can be optimized and its functions expanded according to different application scenarios. Attached Figure Description

[0020] Figure 1 This is a top view of the silicon-based heterogeneous integrated asymmetric optical transmission device provided in Embodiment 1 of the present invention along the optical transmission direction.

[0021] Figure 2 This is a schematic diagram of the cross-sectional structure of the gain waveguide and loss waveguide in the dual waveguide region of the present invention.

[0022] Figure 3 This is a schematic diagram of the device structure in Embodiment 2 of the present invention.

[0023] Figure 4 This is a schematic diagram of the device structure in Embodiment 3 of the present invention.

[0024] Wherein, 1-1 First gain waveguide; 1-2 First loss waveguide; 2-1 Second gain waveguide; 2-2 Second loss waveguide; 301-First silicon waveguide; 302-First silicon dioxide cladding; 303-First n-type cladding; 304-First n-face electrode; 305-First active layer; 306-First p-type cladding; 307-First p-face electrode; 401-Second silicon waveguide; 402-Second silicon dioxide cladding; 403-Second n-type cladding; 404-Second n-face electrode; 405-Second active layer; 406-Second p-type cladding; 407-Second p-face electrode; 5-Optical amplification region. Detailed Implementation

[0025] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. Furthermore, the technical features involved in the various embodiments of this invention described below can be combined with each other as long as they do not conflict with each other.

[0026] Example 1 like Figure 1 As shown, this embodiment provides a silicon-based heterogeneous integrated asymmetric optical transmission device. The device sequentially integrates a first dual-waveguide region and a second dual-waveguide region along the optical axis (z and z′ directions). The first dual-waveguide region consists of a first gain waveguide 1-1 and a first loss waveguide 1-2 arranged side-by-side, optically coupled to each other via evanescent waves. The second dual-waveguide region consists of a second gain waveguide 2-1 and a second loss waveguide 2-2 arranged side-by-side, also optically coupled to each other via evanescent waves.

[0027] To further clarify, for ease of description, we define the input and output terminals of the first gain waveguide 1-1 as port A, the input and output terminals of the first loss waveguide 1-2 as port B, the input and output terminals of the second gain waveguide 2-1 as port C, and the input and output terminals of the second loss waveguide 2-2 as port D.

[0028] Specifically, such as Figure 2 As shown in the cross-sectional view, each waveguide adopts a silicon-based III-V heterogeneous integrated structure. The gain waveguides (including the first gain waveguide 1-1 and the second gain waveguide 1-2) from top to bottom include: a first silicon waveguide 301, a first silicon dioxide cladding 302, a first n-type cladding 303, a first n-face electrode 304, a first active layer 305, a first p-type cladding 306, and a first p-face electrode 307. The loss waveguides (including the first loss waveguide 1-2 and the second loss waveguide 2-2) from bottom to top include: a second silicon waveguide 401, a second silicon dioxide cladding 402, a second n-type cladding 403, a second n-face electrode 404, a second active layer 405, a second p-type cladding 406, and a second p-face electrode 407.

[0029] In a preferred embodiment of the present invention, the second active layer 405 is preferably an InGaASP multi-quantum-well structure to provide efficient optical gain or tunable absorption.

[0030] To elaborate further, within each waveguide, optical coupling is achieved through evanescent waves between its silicon waveguide and the active layer above. Specifically, the silicon waveguide, as the core medium for optical transmission, interacts with the active layer through the evanescent field of its guided mode. Under forward bias, it gains gain from the active layer, while under reverse bias, it is absorbed by the active layer.

[0031] To further explain, this invention independently controls the bias state of each waveguide through an external voltage source. The specific settings are as follows: In the first dual-waveguide region, the first gain waveguide 1-1 is forward-biased and operates in gain mode. A high reverse bias is applied between the second p-face electrode 407 and the second n-face electrode 404 of the first loss waveguide 1-2, causing its second active layer 405 to be in a strong absorption state. This results in the gain-loss difference between the first gain waveguide 1-1 and the first loss waveguide 1-2 being greater than their coupling strength, and this region is in a parity-time symmetry broken state. In the second dual-waveguide region, the second gain waveguide 2-1 is forward-biased and operates in gain mode. Zero or small bias is applied to the electrodes of the second loss waveguide 2-2, causing the gain-loss difference between the second gain waveguide 2-1 and the second loss waveguide 2-2 to be less than their coupling strength, and this region is in a parity-time symmetry state.

[0032] During forward transmission, i.e., when light enters from port A, the optical field is confined to the first gain waveguide 1-1 in the first dual-waveguide region (broken state). When light enters the second dual-waveguide region (symmetrical state), the optical field is symmetrically distributed between the second gain waveguide 2-1 and the second loss waveguide 2-2. Therefore, at the output end, light is simultaneously output from ports C and D.

[0033] In reverse transmission, i.e., when light enters from port C, the input light is symmetrically distributed into the second gain waveguide 2-1 and the second loss waveguide 2-2 in the second dual-waveguide region (symmetric state). When these two beams enter the first dual-waveguide region (broken state), the light from the second gain waveguide 2-1 can be output from port A, while the light from the second loss waveguide 2-2 is strongly absorbed after entering the first loss waveguide 1-2 and cannot be effectively output from port B. Ultimately, only port A has light output.

[0034] Ultimately, asymmetric optical transmission is achieved between ports A, B, C, and D.

[0035] Example 2 like Figure 3As shown, this embodiment demonstrates the flexibility of device design. Its structure is similar to Embodiment 1, but the operating order of the dual waveguide regions is reversed. That is, along the optical transmission direction, a dual waveguide region in a parity-time symmetric state is first set, followed by a dual waveguide region in a parity-time broken symmetry state. Through similar port definitions and analysis, it can be seen that when light is input from the gain waveguide port of the front end (symmetric state region), the optical field splits symmetrically, and upon entering the rear end (broken state region), only light in the gain waveguide can pass through; when light is input from the gain waveguide port of the rear end (broken state region), the optical field is confined within the gain waveguide, and upon entering the front end (symmetric state region), it splits symmetrically for output. This structure can also achieve asymmetric optical transmission. This fully demonstrates the configurability of the cascading order of the scheme described in this invention, that is, the order of the first and second dual waveguide regions can be interchanged, as long as they are in the broken and symmetric states respectively.

[0036] Example 3 like Figure 4 As shown, this embodiment enhances the functionality of Embodiment 1. An optical amplification region 5 is inserted between the first and second dual-waveguide regions. The optical amplification region 5 can employ the same III-V group active layer structure as the gain waveguide and provides a net optical gain through current injection via electrodes. The optical amplification region 5 can be an independent gain waveguide or an amplification array composed of multiple waveguides. Its main function is to compensate for potential signal attenuation after passing through the first dual-waveguide region and further amplify the optical field, thereby improving the overall performance of the device and its driving capability within the system.

[0037] In a preferred embodiment of the present invention, the number of optical amplification regions 5 is not limited to one, and multiple regions can be set according to actual needs, distributed between the first dual waveguide region and the second dual waveguide region.

[0038] Example 4 An integrated photonic chip includes the silicon-based heterogeneous integrated asymmetric optical transmission device provided in any one of Examples 1 to 3.

[0039] Those skilled in the art will readily understand that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A silicon-based heterogeneous integrated asymmetric optical transmission device, characterized in that, Including the first double waveguide region and the second double waveguide region; The first dual waveguide region includes a first gain waveguide (1-1) and a first loss waveguide (1-2) arranged side by side and optically coupled to each other. The second dual waveguide region includes a second gain waveguide (2-1) and a second loss waveguide (2-2) arranged side by side and optically coupled to each other. The first dual waveguide region is in a parity-time symmetry broken state, and the second dual waveguide region is in a parity-time symmetry state. During operation, when light is input from the port of the first gain waveguide (1-1), it is output from the port of the second gain waveguide (2-1) and the port of the second loss waveguide (2-2). When light is input from the port of the second gain waveguide (2-1), it is output only from the port of the first gain waveguide (1-1).

2. The silicon-based heterogeneous integrated asymmetric optical transmission device according to claim 1, characterized in that, The first gain waveguide (1-1), the first loss waveguide (1-2), the second gain waveguide (2-1), and the second loss waveguide (2-2) are all silicon-based III-V heterogeneous integrated structures.

3. The silicon-based heterogeneous integrated asymmetric optical transmission device according to claim 2, characterized in that, The first gain waveguide (1-1) and the second gain waveguide (2-1) have the same structure, both including a first silicon waveguide (301), a first silicon dioxide cladding (302), a first n-type cladding (303), a first n-face electrode (304), a first active layer (305), a first p-type cladding (306), and a first p-face electrode (307). The first silicon waveguide (301) is provided with a first silicon dioxide cladding (302), a first n-type cladding (303), a first active layer (305), a first p-type cladding (306) and a first p-surface electrode (307) in sequence on its upper part. The first n-surface electrode (304) is disposed on the first n-type cladding (303) and located on one side of the first active layer (305).

4. A silicon-based heterogeneous integrated asymmetric optical transmission device according to claim 3, characterized in that, The first loss waveguide (1-2) and the second loss waveguide (2-2) have the same structure, both including a second silicon waveguide (401), a second silicon dioxide cladding (402), a second n-type cladding (403), a second n-face electrode (404), a second active layer (405), a second p-type cladding (406), and a second p-face electrode (407). The second silicon waveguide (401) is provided with a second silicon dioxide cladding (402), a second n-type cladding (403), a second active layer (405), a second p-type cladding (406), and a second p-surface electrode (407) in sequence on its upper part. The second n-surface electrode (404) is disposed on the second n-type cladding (403) and located on one side of the second active layer (405).

5. A silicon-based heterogeneous integrated asymmetric optical transmission device according to claim 3, characterized in that, Both the first active layer (305) and the second active layer (405) are multi-quantum well structures.

6. A silicon-based heterogeneous integrated asymmetric optical transmission device according to claim 3, characterized in that, The order of the first dual waveguide region and the second dual waveguide region is adjustable along the optical transmission direction.

7. A silicon-based heterogeneous integrated asymmetric optical transmission device according to claim 3, characterized in that, The first dual waveguide region is in a parity-time symmetry broken state by adjusting the voltages of the first gain waveguide (1-1) and the first loss waveguide (1-2) respectively, so that the gain-loss difference between the first gain waveguide (1-1) and the first loss waveguide (1-2) is greater than their coupling strength.

8. A silicon-based heterogeneous integrated asymmetric optical transmission device according to claim 3, characterized in that, The second dual waveguide region is in a parity-time symmetric state by adjusting the voltages of the second gain waveguide (2-1) and the second loss waveguide (2-2) respectively, so that the gain-loss difference between the second gain waveguide (2-1) and the second loss waveguide (2-2) is less than their coupling strength.

9. A silicon-based heterogeneous integrated asymmetric optical transmission device according to claim 3, characterized in that, It also includes at least one optical amplification region (5) disposed between the first dual waveguide region and the second dual waveguide region, the optical amplification region (5) being used to compensate for transmission loss.

10. An integrated photonic chip, characterized in that, Includes the silicon-based heterogeneous integrated asymmetric optical transmission device as described in any one of claims 1 to 9.

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