Power converter and control method
By placing power semiconductors within a heat-conducting area in the power converter and utilizing thermal pads and structures for heat transfer, the condensation problem caused by temperature differences is solved, improving the reliability and safety of the equipment.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SUNGROW POWER SUPPLY CO LTD
- Filing Date
- 2026-03-23
- Publication Date
- 2026-06-26
AI Technical Summary
In power converters, different power semiconductors have different heating states under different operating modes, resulting in large temperature differences. This can easily lead to condensation, which can damage electrical insulation properties and cause equipment failure.
Multiple power semiconductors are placed in a heat-conducting area that can transfer heat to each other. At least one power semiconductor in each heat-conducting area is in operation. They are connected by heat-conducting pads and heat-conducting structures to achieve heat transfer and reduce temperature difference.
It effectively reduces the temperature difference between power semiconductors, reduces condensation, protects the power converter, and avoids equipment failure.
Smart Images
Figure CN122292884A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of photovoltaic equipment technology, specifically to power converters and control methods. Background Technology
[0002] Currently, power converters typically have multiple inputs, with a DC-DC step-up / step-down circuit between the input and the DC bus, and then output to the grid or load via a DC-AC converter.
[0003] DC-to-DC step-up / step-down circuits or DC-to-AC converters all contain several power semiconductors. These power semiconductors have different heating states under different operating modes, resulting in a large temperature difference between different power semiconductors. This can easily lead to condensation on the low-temperature side semiconductors, which in turn damages the electrical insulation properties, causing semiconductor damage and equipment failure. Summary of the Invention
[0004] This invention provides a power converter and control method to solve the technical problem of condensation occurring due to large temperature differences in power semiconductors.
[0005] In a first aspect, the present invention provides a power converter, comprising:
[0006] Several semiconductor groups, each semiconductor group includes several power semiconductors, and the power semiconductors in the same semiconductor group are all located in the heat conduction area corresponding to the semiconductor group. Different power semiconductors in the heat conduction area can transfer heat to each other. When the power converter is running based on a preset operating mode, at least one power semiconductor in any semiconductor group is in an operating state.
[0007] In some alternative implementations, a plurality of thermally conductive pads are provided in the thermally conductive area, and the power semiconductor is disposed on the thermally conductive pads.
[0008] In some alternative implementations, a thermally conductive pad is provided for each thermally conductive area, and power semiconductors within the same semiconductor group are disposed on the same thermally conductive pad.
[0009] In some alternative implementations, multiple thermal pads are provided in the thermally conductive area, and the power semiconductors in the same semiconductor group are distributed on different thermal pads in the same thermally conductive area.
[0010] In some alternative implementations, the distance between any two adjacent thermal pads within the same thermally conductive area is less than or equal to a preset thermally conductive distance.
[0011] In some alternative implementations, the thermal pads within the same thermally conductive area are connected by a thermally conductive structure.
[0012] In some alternative implementations, the power converter also includes a heat sink substrate with thermal pads disposed on the heat sink substrate.
[0013] In some optional embodiments, the power converter includes a DC-to-AC converter and several DC-to-DC buck-boost circuits. The power semiconductors in the boost topology of the same DC-to-DC buck-boost circuit are arranged as a semiconductor group in the same heat-conducting region. The power semiconductors in the buck topology of the same DC-to-DC buck-boost circuit are arranged as a semiconductor group in the same heat-conducting region. The power semiconductors in each phase of the DC-to-AC converter are arranged as a semiconductor group in several heat-conducting regions. The heat-conducting region for the power semiconductors in the DC-to-AC converter includes at least one power semiconductor in each phase of the DC-to-AC converter.
[0014] In some alternative embodiments, the power converter further includes a balancing bridge, wherein the power semiconductors in the balancing bridge and the power semiconductors in the boost topology are disposed in the same thermally conductive region, or the power semiconductors in the balancing bridge and the power semiconductors in the buck topology are disposed in the same thermally conductive region, or the power semiconductors in the balancing bridge and the power semiconductors in each phase of the DC-to-AC converter are disposed in the same thermally conductive region.
[0015] In some optional embodiments, the power converter further includes a neutral overcurrent protection module, wherein the power semiconductor in the neutral overcurrent protection module and the power semiconductor in the boost topology are disposed in the same heat-conducting region, or the power semiconductor in the neutral overcurrent protection module and the power semiconductor in the buck topology are disposed in the same heat-conducting region, or the power semiconductor in the neutral overcurrent protection module and the power semiconductor in each phase of the DC-to-AC converter are disposed in the same heat-conducting region.
[0016] In some optional embodiments, the power converter further includes a controller, which is connected to the power semiconductor in the DC-to-AC converter, the power semiconductor in the boost topology of the DC-to-DC buck-boost circuit, and the power semiconductor in the buck topology of the DC-to-DC buck-boost circuit, respectively. The controller is used to acquire the temperature of the power semiconductor in the boost topology of the DC-to-DC buck-boost circuit and the temperature of the power semiconductor in the buck topology of the DC-to-DC buck-boost circuit. When the temperature difference between the power semiconductor in the boost topology and the power semiconductor in the buck topology is greater than a preset temperature difference, the controller adjusts the duty cycle of the boost topology and / or the buck topology.
[0017] Secondly, the present invention provides a control method for a power converter, comprising: Obtain the temperature of the power semiconductor in the boost topology of the DC-to-DC buck-boost circuit and the temperature of the power semiconductor in the buck topology of the DC-to-DC buck-boost circuit. When the temperature difference between the power semiconductor in the boost topology and the power semiconductor in the buck topology is greater than a preset temperature difference, the duty cycle of the boost topology and / or the buck topology is adjusted.
[0018] The present invention has at least the following beneficial effects: The power converter of the present invention arranges multiple power semiconductors in a heat-conducting area that can transfer heat to each other. In each heat-conducting area, at least one power semiconductor is in a working state under each preset working mode. The power semiconductor in the working state can transfer its own heat to other power semiconductors in the same heat-conducting area that generate less heat or do not generate heat, thereby reducing the temperature difference between the power semiconductors and reducing the probability of condensation on the power semiconductors, thus protecting the power converter. Attached Figure Description
[0019] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0020] Figure 1 This is a circuit schematic diagram of a power converter in related technologies; Figure 2 This is a schematic diagram of the structure of the first power converter in an embodiment of the present invention; Figure 3 This is a schematic diagram of the structure of the second type of power converter in an embodiment of the present invention; Figure 4 This is a schematic diagram of the structure of the third type of power converter in this embodiment of the invention; Figure 5 This is a schematic diagram of the structure of the fourth power converter in this embodiment of the invention; Figure 6 This is a schematic diagram of the structure of the fifth power converter in this embodiment of the invention; Figure 7 This is a schematic diagram of the first type of heat transfer in an embodiment of the present invention; Figure 8 This is a schematic diagram of the second type of heat transfer in an embodiment of the present invention; Figure 9 This is a schematic diagram of the third type of heat transfer in an embodiment of the present invention; Figure 10 This is a schematic diagram of the third type of heat transfer in an embodiment of the present invention; Figure 11 This is a schematic diagram of the fourth type of heat transfer in an embodiment of the present invention; Figure 12 This is a schematic diagram of the fifth type of heat transfer in an embodiment of the present invention; Figure 13 This is a schematic diagram of the layout of power semiconductors in the balance bridge and neutral overcurrent protection module in an embodiment of the present invention. Figure 14 This is a schematic diagram of the sixth power converter in an embodiment of the present invention; Figure 15 A flowchart illustrating the control method for the first power converter in this embodiment of the invention; Figure 16 A flowchart illustrating the control method for the second power converter in this embodiment of the invention.
[0021] Explanation of reference numerals in the attached figures: 1. Thermally conductive area; 2. Power semiconductor; 3. Thermally conductive pad; 4. Thermally conductive structure; 5. Heat dissipation substrate. Detailed Implementation
[0022] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0023] In the relevant scheme, the power converter has multiple photovoltaic string inputs. A DC-to-DC (DC / DC) buck-boost circuit is set between the photovoltaic string inputs and the DC bus, and then the output is sent to the grid or load via a DC-to-AC (DC / AC) converter. The DC-to-DC buck-boost circuit is also known as a buck-boost circuit, including boost topologies and buck topologies, such as... Figure 1As shown, the power converter includes multiple maximum power point tracking (MPPT) devices. The tracking (MPPT) circuit includes a DC-to-DC buck-boost circuit. One DC-to-DC buck-boost circuit can correspond to one or more photovoltaic string inputs. Taking one DC-to-DC buck-boost circuit corresponding to two photovoltaic string inputs as an example, the power semiconductors of the boost topology in the first DC-to-DC buck-boost circuit include switch Q1 and diode D1-bst, and the power semiconductors of the buck topology include switch T1, switch T2 and diode D1_buck. The power semiconductors of the boost topology in the second DC-to-DC buck-boost circuit include switch Q2 and diode D2-bst, and the power semiconductors of the buck topology include switch T3, switch T4 and diode D2_buck. And so on. The power semiconductors of the boost topology in the n / 2th DC-to-DC buck-boost circuit include switch Q(n / 2) and diode D(n / 2)-bst, and the power semiconductors of the buck topology include switch T(n-1), switch T(n) and diode D(n / 2)_buck.
[0024] In a DC-to-AC converter, each phase includes multiple power semiconductors. Generally, the R-phase, S-phase, and T-phase of a DC-to-AC converter each include multiple power semiconductors. For example, the R-phase includes switch combinations R_T1, R_T2, R_T3, and R_T4; the S-phase includes switch combinations S_T1, S_T2, S_T3, and S_T4; and the T-phase includes switch combinations T_T1, T_T2, T_T3, and T_T4. Each switch combination includes two or three switches.
[0025] Furthermore, considering the impact of a short circuit to ground in the photovoltaic string on the power converter, a neutral overcurrent protection module is also included. This module includes a switch Q_N on the neutral (N) line of the power converter for turn-off protection. Simultaneously, considering the existence of single-phase or two-phase operating modes, a balancing bridge is installed at the busbar, consisting of switches T_P and T_N. Therefore, current power converters utilize multiple power semiconductors in the DC-to-DC buck-boost circuit, DC-to-AC converter, balancing bridge, and neutral overcurrent protection. These power semiconductors exhibit different heating states under different operating modes, resulting in significant temperature differences between them. This can easily lead to condensation on the low-temperature semiconductor, thereby compromising electrical insulation properties, causing semiconductor damage, and even equipment failure.
[0026] In view of the problem of large temperature differences between different power semiconductors in current power converters, this invention proposes a power converter that can reduce the temperature difference between power semiconductors, making the temperature difference between power semiconductors less than the temperature difference caused by condensation, thus solving the problem of power semiconductor damage and equipment failure caused by condensation due to temperature differences.
[0027] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0028] According to embodiments of the present invention, a power converter is provided, such as... Figure 2 As shown, the power converter includes several semiconductor groups, each of which includes several power semiconductors 2. The power semiconductors 2 in the same semiconductor group are all located in the heat-conducting region 1 corresponding to the semiconductor group, and different power semiconductors 2 in the heat-conducting region 1 can transfer heat to each other.
[0029] When the power converter is running based on a preset operating mode, at least one power semiconductor 2 in any semiconductor group is in an operating state.
[0030] Specifically, the power semiconductor 2 in the semiconductor group includes the power semiconductor 2 used in the DC-to-DC buck-boost circuit, DC-to-AC converter, balance bridge, and neutral overcurrent protection module of the power converter.
[0031] The power semiconductor 2 includes diodes and switching transistors, wherein the switching transistors can be insulated gate bipolar transistors (IGBTs) or silicon carbide metal-oxide-semiconductor field-effect transistors (SiC-MOSFETs), etc.
[0032] The number of semiconductor groups can be one or more, such as two or three, and the heat conduction area 1 and the semiconductor group are set in a one-to-one correspondence. The shape of the heat conduction area 1 includes, but is not limited to, rectangle, ellipse, square, etc.
[0033] The number of power semiconductors 2 in each semiconductor group can be one or more. When there is only one power semiconductor 2 in the semiconductor group, the power semiconductor 2 continues to work in a preset working mode.
[0034] The preset operating modes of the power converter can be boost mode and buck mode on the DC / DC side, three-phase RST balanced output mode, single-phase inverter mode and two-phase inverter mode on the DC / AC side, etc.
[0035] In one or more of the above-mentioned preset operating modes, at least one power semiconductor 2 in any semiconductor group is in an operating state. The operating state of the power semiconductor 2 refers to the operating state in which current flows through the circuit where the power semiconductor 2, such as a diode or a switching transistor, is located. At this time, the power semiconductor 2 generates heat. Thus, in the preset operating mode, there is at least one power semiconductor 2 in each heat conduction area 1 that generates a large amount of heat, which transfers its own heat to other power meter semiconductors in the same heat conduction area 1, thereby reducing the temperature difference between the various power semiconductors 2.
[0036] Preferably, by comprehensively considering the operating states of the power semiconductor 2 under all operating modes, the power semiconductor 2 of each semiconductor group is confirmed, so that in any preset operating mode, at least one power semiconductor 2 is working in each heat conduction area 1, thereby reducing the temperature difference of the power semiconductor 2 in each preset operating mode.
[0037] In the power converter of this invention, multiple power semiconductors 2 are arranged in a heat-conducting region 1 that can transfer heat to each other. In each heat-conducting region 1, at least one power semiconductor 2 is in a working state under each preset working mode. The power semiconductor 2 in the working state can transfer its own heat to other power semiconductors 2 in the same heat-conducting region 1 that generate less heat or do not generate heat, thereby reducing the temperature difference between the power semiconductors 2 and reducing the probability of condensation on the power semiconductors 2. This avoids damage to the electrical insulation properties caused by condensation, which could lead to damage to the power semiconductors 2, equipment failure, or other malfunctions, thus protecting the power converter.
[0038] In some embodiments, a plurality of thermally conductive pads 3 are provided in the thermally conductive region 1, and the power semiconductor 2 is disposed on the thermally conductive pads 3.
[0039] Specifically, the thermally conductive pad 3 is made of a material with good thermal conductivity, such as metal pads like copper or aluminum, or thermally conductive and insulating ceramic pads like aluminum nitride (AlN) or aluminum oxide (AlO).
[0040] Any number of power semiconductors 2 can be placed on a single thermal pad 3, and different numbers of power semiconductors 2 can be placed on different thermal pads 3. For example, two or three power semiconductors 2 can share a single thermal pad 3, or more power semiconductors 2 can share a single thermal pad 3, or each power semiconductor 2 can use a separate thermal pad 3.
[0041] The thermal pad 3 enables heat transfer between different power semiconductors 2 within the same thermally conductive area 1, thereby reducing the temperature difference between different power semiconductors 2.
[0042] In some embodiments, such as Figure 3As shown, a thermally conductive pad 3 is provided in a thermally conductive area 1, and the power semiconductor 2 in the same semiconductor group is disposed on the same thermally conductive pad 3.
[0043] Only one thermal pad 3 is provided in each thermally conductive area 1. All power semiconductors 2 in the thermally conductive area 1 are placed on the same thermal pad 3. The thermal conduction between power semiconductors 2 in the same semiconductor group is achieved through the thermal pad 3.
[0044] In this embodiment of the invention, the same thermal pad 3 is provided in the thermally conductive area 1, and the power semiconductors 2 of the same group are integrated on the same thermal pad 3. The heat conduction path between the power semiconductors 2 in the same semiconductor group is short and the heat transfer efficiency is high, which enhances the heat dissipation effect and improves the heat dissipation stability.
[0045] In some embodiments, a plurality of thermal pads 3 are provided in the thermally conductive region 1, and the power semiconductors 2 in the same semiconductor group are dispersed on different thermal pads 3 in the same thermally conductive region 1.
[0046] Specifically, different thermal pads 3 within the same thermally conductive area 1 transfer heat to each other. Consequently, different power semiconductors 2 within the same thermally conductive area 1 can transfer heat to each other through their respective thermal pads 3, reducing the temperature difference between different power semiconductors 2 and reducing the probability of condensation.
[0047] In some embodiments, such as Figure 4 As shown, multiple thermal pads 3 are provided in the thermally conductive area 1. The power semiconductors 2 in the same semiconductor group are dispersed on different thermal pads 3 in the same thermally conductive area 1. The distance between any two adjacent thermal pads 3 in the same thermally conductive area 1 is less than or equal to the preset thermally conductive distance.
[0048] Specifically, each thermal pad 3 is provided with a power semiconductor 2, or each thermal pad 3 is provided with multiple power semiconductors 2, but the number of power semiconductors 2 on each thermal pad 3 is less than the number of power semiconductors 2 in the semiconductor group, so that the power semiconductors 2 are distributed on different thermal pads 3.
[0049] Generally, when only one of the two adjacent thermal pads 3 has its power semiconductor 2 in operation, the temperature difference between the two thermal pads 3 needs to be less than a set thermal conductivity temperature difference, such as 10°C, to avoid temperature differences in the power semiconductor 2. Therefore, the distance between two adjacent thermal pads 3 needs to be small enough to ensure sufficient heat transfer and reduce the temperature difference.
[0050] The preset thermal conductivity distance refers to the maximum distance between adjacent thermally conductive pads 3, which is determined according to the shape, relative position, and environment of the thermally conductive pads 3. For example, if the shape of the thermally conductive pads 3 is polygonal with long adjacent sides and the environment is conducive to heat transfer, the preset thermal conductivity distance can be set to a smaller value, such as 3mm. If the shape of the thermally conductive pads 3 is circular, or if the adjacent sides are staggered and short when distributed, and the heat transfer efficiency of the environment is poor, the preset thermal conductivity distance can be set to a larger value, such as 5mm. When the distance between adjacent thermally conductive pads 3 is less than the preset thermal conductivity distance, the adjacent thermally conductive pads 3 can transfer heat sufficiently and reduce the temperature difference.
[0051] In this embodiment of the invention, while realizing heat transfer between power semiconductors 2 within the same semiconductor group, the independence between different power semiconductors 2 can be enhanced, and the power semiconductors 2 can be flexibly configured.
[0052] In some embodiments, such as Figure 5 As shown, multiple thermal pads 3 are provided in the thermally conductive area 1. The power semiconductors 2 in the same semiconductor group are dispersed on different thermal pads 3 in the same thermally conductive area 1. Any thermal pad 3 in the same thermally conductive area 1 is connected by a thermally conductive structure 4.
[0053] Specifically, the heat-conducting structure 4 is a structure that realizes the thermal connection between the heat-conducting pads 3, such as heat pipes, VC, heat spreaders, heat exchangers, heat-conducting strips, heat-conducting copper busbars, etc.
[0054] In this embodiment of the invention, by using the thermal pad 3 and the thermal structure 4, heat transfer between power semiconductors 2 within the same semiconductor group can be achieved without setting the distance between the thermal pads 3 very small, thereby further improving heat dissipation reliability and layout flexibility.
[0055] It should be understood that the above-described structure for heat transfer between power semiconductors 2 within the same semiconductor group can be used alone or in combination to construct the heat-conducting region 1.
[0056] In some embodiments, the power converter further includes a heat dissipation substrate 5, and a thermal pad 3 is disposed on the heat dissipation substrate 5.
[0057] Specifically, the heat dissipation substrate 5 is a heat sink used to carry the power semiconductor 2 and dissipate heat outward, and has good thermal conductivity.
[0058] The shape of the heat dissipation substrate 5 includes, but is not limited to, rectangle, circle, triangle, etc.
[0059] By setting up a heat dissipation substrate 5, the thermal pads 3 that carry the power semiconductors 2 in the semiconductor group are uniformly arranged on the heat dissipation substrate 5. The heat dissipation substrate 5 is used to expand the heat dissipation area and enhance the overall heat dissipation capacity. It also makes it easier for the thermal pads 3 to transfer heat, reduce the temperature difference between different thermal pads 3, and thus reduce the temperature difference of the power semiconductors 2.
[0060] In some embodiments, the power converter includes a DC-to-AC converter and a plurality of DC-to-DC buck-boost circuits. The power semiconductors 2 in the boost topology of the same DC-to-DC buck-boost circuit are arranged as a semiconductor group in the same heat-conducting region 1. The power semiconductors 2 in the buck topology of the same DC-to-DC buck-boost circuit are arranged as a semiconductor group in the same heat-conducting region 1. The power semiconductors 2 in each phase of the DC-to-AC converter are arranged as a semiconductor group in a plurality of heat-conducting regions 1. The heat-conducting region 1 in which the power semiconductors 2 in the DC-to-AC converter are arranged includes at least one power semiconductor 2 in each phase of the DC-to-AC converter.
[0061] Specifically, for the DC / DC side of the power converter, the number of power semiconductors 2 in each DC-to-DC buck-boost circuit is different. However, both the boost topology and buck topology of the DC-to-DC buck-boost circuit include at least one power semiconductor 2 that works in any DC / DC side operating mode. Therefore, the power semiconductors 2 in the boost topology of the same DC-to-DC buck-boost circuit can be placed in the same heat-conducting region 1, and the power semiconductors 2 in the buck topology of the same DC-to-DC buck-boost circuit can be placed in the same heat-conducting region 1, thereby reducing the temperature difference between the power semiconductors 2.
[0062] In one example, the power converter is applied to a photovoltaic power generation scenario. The DC / DC side of the power converter has n MPPT loops. Each MPPT loop includes a DC-to-DC buck-boost circuit. One DC-to-DC buck-boost circuit can correspond to two photovoltaic string inputs. In the first DC-to-DC buck-boost circuit, the power semiconductor 2 of the boost topology includes switch Q1 and diode D1-bst, and the power semiconductor 2 of the buck topology includes switch T1, switch T2 and diode D1_buck. In the second DC-to-DC buck-boost circuit, the power semiconductor 2 of the boost topology includes switch Q2 and diode D2-bst, and the power semiconductor 2 of the buck topology includes switch T3, switch T4 and diode D2_buck. And so on. In the n / 2th DC-to-DC buck-boost circuit, the power semiconductor 2 of the boost topology includes switch Q(n / 2) and diode D(n / 2)-bst, and the power semiconductor 2 of the buck topology includes switch T(n-1), switch T(n) and diode D(n / 2)_buck.
[0063] The boost and buck topologies in each DC-DC buck-boost circuit include, but are not limited to, vertical or horizontal arrangements. For example, the boost topology may be positioned above or below the buck topology.
[0064] In the DC / AC side of the power converter, each phase includes multiple power semiconductors 2. Specifically, the R phase includes switch combinations R_T1, R_T2, R_T3, and R_T4; the S phase includes switch combinations S_T1, S_T2, S_T3, and S_T4; and the T phase includes switch combinations T_T1, T_T2, T_T3, and T_T4. Each switch combination includes two or three switches, i.e., power semiconductors 2.
[0065] The power semiconductor 2 in the DC-to-AC converter and the power semiconductor 2 in the DC-to-DC step-up / step-down circuit can be arranged vertically or horizontally. For example, the power semiconductor 2 in the DC-to-AC converter can be arranged above or below the power semiconductor 2 in the DC-to-DC step-up / step-down circuit.
[0066] like Figure 6 As shown, for the power semiconductor 2 on the DC / DC side, each thermally conductive region 1 corresponds to a thermally conductive pad 3. The power semiconductor 2 within the thermally conductive region 1 achieves heat transfer through the thermally conductive pad 3. Specifically, the switch Q1 and diode D1-bst are disposed within one thermally conductive pad 3, the switch T1, switch T2 and diode D1_buck are disposed within one thermally conductive pad 3, the switch T3, switch T4 and diode D2_buck are disposed within one thermally conductive pad 3, the switch Q2 and diode D2-bst are disposed within one thermally conductive pad 3, and so on, the switch Q(n / 2) and diode D(n / 2)-bst are disposed within one thermally conductive pad 3, the switch T(n-1), switch T(n) and diode D(n / 2)_buck are disposed within one thermally conductive pad 3.
[0067] Taking MPPT1 as an example, the power converter includes the following operating modes on the DC / DC side: 1. In buck mode, both switching transistors T1 and T2 are working. In this mode, switching transistors T1 and T2, diodes D1_buck and D1-bst generate heat, while switching transistor Q1 is not working. Switching transistor Q1 is prone to condensation at low temperatures.
[0068] like Figure 7As shown, since the switching transistor Q1 and the diode D1-bst are disposed within a thermal pad 3, when the switching transistor Q1 is not working, the heat from the diode D1-bst is transferred to the switching transistor Q1 through the thermal pad 3, thereby increasing the temperature of the switching transistor Q1 and reducing the temperature difference between the switching transistor Q1 and the other power semiconductors 2.
[0069] 2. In boost mode, both switching transistors T1 and T2 are working. In this mode, switching transistors T1, T2, Q1, and diode D1-bst generate heat, while diode D1_buck does not work. Diode D1_buck is prone to condensation at low temperatures.
[0070] like Figure 8 As shown, since the switching transistors T1 and T2 and the diode D1_buck are placed in a thermal pad 3, the heat from the switching transistors T1 and T2 is transferred to the diode D1_buck through the thermal pad 3, which increases the temperature of the diode D1_buck and reduces the temperature difference between the diode D1_buck and the other power semiconductors 2.
[0071] 3. In the above-mentioned boost or buck modes, there may be cases where PV is not connected. For example, if the PV string corresponding to switch T1 or switch T2 is not connected, the switch in this buck topology will not generate heat in either boost or buck modes. Therefore, there may be a situation where one of switch T1 and switch T2 is working while the other is not. Since only one of switch T1 and switch T2 is working, the other is not working and is prone to condensation at low temperatures. Figure 9 This is a schematic diagram of heat transfer when the switch T1 is not operating in buck mode. Figure 10 A schematic diagram of heat transfer when the switch T2 is not operating in buck mode. Figure 11 A schematic diagram of heat transfer when the switch T1 is not operating in boost mode. Figure 12 A schematic diagram of heat transfer when the switch T2 is not operating in boost mode is shown below. Figures 9 to 12 As shown, in each mode, at least one power semiconductor 2 in the thermal pad 3 operates to generate heat and transfers heat to the lower-temperature power semiconductor 2.
[0072] For the power semiconductor 2 in the DC / AC converter, the switching transistors in the same phase are all set on the same thermal pad 3. Different thermal pads 3 are connected by a thermal structure 4 to form an overall thermally conductive area 1.
[0073] Alternatively, the switching transistor groups within the same phase are distributed on different thermal pads 3, and the switching transistor groups of each phase are then connected by thermal conductive structures 4 to form multiple thermal conductive regions 1, each thermal conductive region 1 including at least one switching transistor group of each phase.
[0074] For example, such as Figure 6As shown, each switch assembly is individually equipped with a corresponding thermal pad 3. Switch assemblies R_T1, R_T2, S_T1, S_T2, T_T1, and T_T2 are connected by a thermally conductive structure 4 to form a thermally conductive area 1. Switch assemblies R_T3, R_T4, S_T3, S_T4, T_T3, and T_T4 are connected by a thermally conductive structure 4 to form another thermally conductive area 1.
[0075] The DC-to-AC converter includes the following operating modes: 1. Three-phase RST balanced output mode on the DC / AC side, in which all phase switching transistor combinations are working; 2. Single-phase inverter and two-phase inverter modes. In the two-phase inverter mode, one phase of the switching transistor combination does not work. In the single-phase inverter mode, both phases of the switching transistor combination do not work. Therefore, there is a situation where one or two phases of the switching transistor combination do not work, and the heat of the working switching transistor combination is transferred to the heat of the non-working switching transistor combination.
[0076] In this embodiment of the invention, by setting power semiconductors 2 of the same or similar modules in the same heat-conducting area 1, precise heat distribution according to functional modules is achieved, so that the heat of devices with the same topology and the same operating conditions is balanced, and the wiring of different power semiconductors 2 is convenient.
[0077] In some embodiments, the power converter further includes a balanced bridge, wherein the power semiconductor 2 in the balanced bridge and the power semiconductor 2 in the boost topology of the DC-to-DC buck-boost circuit are disposed in the same heat-conducting region 1, or the power semiconductor 2 in the balanced bridge and the power semiconductor 2 in the buck topology of the DC-to-DC buck-boost circuit are disposed in the same heat-conducting region 1, or the power semiconductor 2 in the balanced bridge and the power semiconductor 2 in each phase of the DC-to-AC converter are disposed in the same heat-conducting region 1.
[0078] Specifically, the neutral overcurrent protection module includes a switch Q_N located on the N-line of the power converter. During three-phase RST balanced output, the power semiconductor 2 in the DC-to-AC converter operates, while the switch Q_N is inactive and at a low temperature. Therefore, it is necessary to place the switch Q_N within a heat-conducting region 1 that maintains a consistently high temperature. Preferably, it is placed near the power semiconductor 2, which generates heat over a long period. For example, it can be placed within the same heat-conducting region 1 as the power semiconductor 2 in the boost or buck topology of a DC-to-DC buck-boost circuit, or as the power semiconductor 2 in each phase of the DC-to-AC converter, to prevent condensation at low temperatures when it is not operating.
[0079] Furthermore, the power converter also includes a neutral line overcurrent protection module. The power semiconductor 2 in the neutral line overcurrent protection module and the power semiconductor 2 in the boost topology are disposed in the same heat-conducting region 1, or the power semiconductor 2 in the neutral line overcurrent protection module and the power semiconductor 2 in the buck topology are disposed in the same heat-conducting region 1, or the power semiconductor 2 in the neutral line overcurrent protection module and the power semiconductor 2 in each phase of the DC to AC converter are disposed in the same heat-conducting region 1.
[0080] The balancing bridge includes switches T_P and T_N between the positive and negative terminals and the neutral line of the DC bus. During three-phase RST balanced output, the power semiconductor 2 in the DC-to-AC converter operates, while switches T_P, T_N, and Q_N are inactive and at low temperatures. Therefore, switches T_P, T_N, and Q_N need to be placed within a thermally conductive region 1 that maintains a consistently high temperature. Preferably, they are placed near the power semiconductor 2, which generates heat over a long period. For example, they can be placed within the same thermally conductive region 1 as the power semiconductor 2 in the boost or buck topology of a DC-to-DC buck-boost circuit, or as the power semiconductor 2 in each phase of the DC-to-AC converter, to prevent condensation at low temperatures when not in operation.
[0081] Specifically, switching transistors T_P, T_N, and Q_N can be respectively placed on the thermal pad 3 where any three DC-to-DC buck-boost circuits are located, and placed adjacent to diode Dn_bst. For example... Figure 13 As shown, the switching transistors T_P, T_N, and Q_N are respectively placed on the thermal pad 3 of the boost topology of the DC-to-DC buck-boost circuit in any MPPT2, MPPT3, and MPPT4 circuits. In any operating mode, the diode Dn_bst of the boost topology is always working and is a long-term heat-generating device, which can transfer heat to the corresponding switching transistors T_P, T_N, or Q_N.
[0082] Furthermore, the switching transistors T_P, T_N, and Q_N can be placed within the heat-conducting region 1 where the power semiconductor 2 is located in the DC-to-AC converter. For example... Figure 14 As shown, switching transistors T_P, T_N, and Q_N are respectively mounted on corresponding thermal pads 3, and are connected to the thermal pads 3 containing the power semiconductors 2 in the DC-to-AC converter via thermal conductive structures 4. When switching transistors T_P, T_N, and Q_N are not working, and the three-phase RST output is balanced, the power semiconductors 2 in the DC-to-AC converter are all working, transferring heat to switching transistors T_P, T_N, and Q_N.
[0083] By placing the power semiconductor 2 of the balance bridge and neutral overcurrent protection module in a common heat-conducting area 1 with the power semiconductor 2 of the boost topology, buck topology, or DC-to-AC converter, the excessive temperature difference between the power semiconductor 2 of the balance bridge and neutral overcurrent protection module and other power semiconductor 2 can be further avoided, thus improving overall safety.
[0084] In some embodiments, the power converter further includes a controller, which is connected to the power semiconductor 2 in the DC-to-AC converter, the power semiconductor 2 in the boost topology of the DC-to-DC buck-boost circuit, and the power semiconductor 2 in the buck topology of the DC-to-DC buck-boost circuit, respectively. The controller is used to acquire the temperature of the power semiconductor 2 in the boost topology of the DC-to-DC buck-boost circuit and the temperature of the power semiconductor 2 in the buck topology of the DC-to-DC buck-boost circuit. When the temperature difference between the power semiconductor 2 in the boost topology and the power semiconductor 2 in the buck topology is greater than a preset temperature difference, the controller adjusts the duty cycle of the boost topology and / or the buck topology.
[0085] Specifically, the controller can be an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The aforementioned programmable logic device can be a complex programmable logic device (CLP), a field-programmable gate array (FPGA), a general-purpose array logic (GDA), or any combination thereof.
[0086] The controller can be integrated into the DC-to-AC converter or the DC-to-DC step-up / step-down circuit, or it can be set up separately.
[0087] The controller collects the temperature of the power semiconductor 2 in the boost and buck topologies through temperature sensors. Alternatively, a temperature sensor can be set for each power semiconductor 2 to collect the temperature of each power semiconductor 2, or a temperature sensor can be set on each thermal pad 3 to use the collected temperature as the temperature of the power semiconductor 2 on that thermal pad 3.
[0088] The preset temperature difference is the temperature difference at which condensation is likely to occur in the power semiconductor 2 in the actual environment, and can be set according to actual needs.
[0089] Generally, for boost topologies, increasing the duty cycle increases the power semiconductor 2 loss, while decreasing the duty cycle decreases the power semiconductor 2 loss. For buck topologies, increasing the duty cycle decreases the power semiconductor 2 loss, while decreasing the duty cycle increases the power semiconductor 2 loss.
[0090] When the temperature difference between any power semiconductor 2 in the boost topology and any power semiconductor 2 in the buck topology exceeds a preset temperature difference, the power semiconductor 2 loss can be increased or decreased by adjusting the duty cycle of the boost topology or the buck topology, or by adjusting the duty cycle of both the boost topology and the buck topology simultaneously. This further reduces the temperature difference, thereby reducing the probability of condensation in the power semiconductor 2. This prevents damage to the electrical insulation properties caused by condensation, which could lead to power semiconductor 2 damage, equipment failure, or other malfunctions, thus protecting the power converter.
[0091] This invention also provides a control method for a power converter, applicable to controlling a power converter as described in any of the above embodiments of this invention, such as... Figure 15 As shown, the method includes: Step S101: Obtain the temperature of the power semiconductor 2 in the boost topology of the DC-to-DC buck-boost circuit and the temperature of the power semiconductor 2 in the buck topology of the DC-to-DC buck-boost circuit.
[0092] Specifically, the temperature of the power semiconductor 2 in the boost topology and buck topology is collected by temperature sensors. Alternatively, a corresponding temperature sensor can be set for each power semiconductor 2 to collect the temperature of each power semiconductor 2, or a temperature sensor can be set on each thermal pad 3 and the collected temperature can be used as the temperature of the power semiconductor 2 on that thermal pad 3.
[0093] Step S102: When the temperature difference between the power semiconductor 2 in the boost topology and the power semiconductor 2 in the buck topology is greater than the preset temperature difference, adjust the duty cycle of the boost topology and / or the buck topology.
[0094] Specifically, the preset temperature difference is the temperature difference at which condensation is likely to occur in the power semiconductor 2 in the actual environment, and can be set according to actual needs.
[0095] Generally, for boost topologies, increasing the duty cycle increases the power semiconductor 2 loss, while decreasing the duty cycle decreases the power semiconductor 2 loss. For buck topologies, increasing the duty cycle decreases the power semiconductor 2 loss, while decreasing the duty cycle increases the power semiconductor 2 loss.
[0096] When the temperature difference between any power semiconductor 2 in the boost topology and any power semiconductor 2 in the buck topology exceeds a preset temperature difference, the power semiconductor 2 loss can be increased or decreased by adjusting the duty cycle of the boost topology or the buck topology, or by adjusting the duty cycle of both the boost topology and the buck topology simultaneously. This reduces the temperature difference and decreases the probability of condensation in the power semiconductor 2, thus preventing damage to the electrical insulation properties caused by condensation, which could lead to power semiconductor 2 damage, equipment failure, or other malfunctions, thereby protecting the power converter.
[0097] In some embodiments, step S102, when the temperature difference between the power semiconductor 2 in the boost topology and the power semiconductor 2 in the buck topology is greater than a preset temperature difference, adjusts the duty cycle of the boost topology and / or the buck topology, including: Step S1021: When the temperature difference between the power semiconductor 2 in the boost topology and the power semiconductor 2 in the buck topology is greater than the preset temperature difference, if the current operating mode is boost mode or buck mode, the duty cycle of the boost topology and / or buck topology is adjusted according to the temperature difference between the power semiconductor 2 in the boost topology and the power semiconductor 2 in the buck topology.
[0098] The greater the loss of power semiconductor 2, the more heat it generates and the higher its temperature. The loss of power semiconductor 2 can be adjusted by the duty cycle.
[0099] The duty cycle of the boost and buck topologies can be adjusted according to the operating logic. When the temperature of power semiconductor 2 in the boost topology is higher than that in the buck topology, the power semiconductor 2 loss in the buck topology is increased or decreased by adjusting the duty cycle of the boost and / or buck topologies. When the temperature of power semiconductor 2 in the boost topology is lower than that in the buck topology, the power semiconductor 2 loss in the buck topology is decreased or increased by adjusting the duty cycle of the boost and / or buck topologies.
[0100] Specifically, in boost mode, the duty cycle can be adjusted in the following ways: 1. The temperature of power semiconductor 2 in the boost topology is higher than that in the buck topology. Reducing the duty cycle of the boost topology results in the buck topology being on continuously. This reduces the power semiconductor 2 loss in the boost topology and decreases the temperature difference. 2. The temperature of power semiconductor 2 in the boost topology is higher than that in the buck topology. The duty cycle of the boost topology remains unchanged, while the duty cycle of the buck topology decreases. As a result, the power loss of power semiconductor 2 in the buck topology increases, and the temperature difference decreases. 3. The temperature of power semiconductor 2 in the boost topology is lower than that of power semiconductor 2 in the buck topology. Keeping the buck topology on continuously increases the duty cycle of the boost topology, which increases the power loss of power semiconductor 2 in the boost topology and decreases the temperature difference. 4. The temperature of power semiconductor 2 in the boost topology is lower than that of power semiconductor 2 in the buck topology. The duty cycle of the boost topology increases, while the buck topology remains on. The power semiconductor 2 in the boost topology loses more power, and the temperature difference decreases. In buck mode, the duty cycle can be adjusted in the following ways: 1. The temperature of power semiconductor 2 in the boost topology is higher than that of power semiconductor 2 in the buck topology. The duty cycle of the boost topology is 0, while the duty cycle of the buck topology decreases. As a result, the power semiconductor 2 in the buck topology loses more power, and the temperature difference decreases. 2. The temperature of power semiconductor 2 in the boost topology is higher than that in the buck topology. The duty cycle of the boost topology increases, while the duty cycle of the buck topology decreases. The losses of power semiconductor 2 in both the boost and buck topologies increase. However, the increase in losses of power semiconductor 2 in the buck topology is greater than that in the boost topology, and the temperature difference decreases. 3. The temperature of power semiconductor 2 in the boost topology is higher than that in the buck topology. The duty cycle of the boost topology is 0. As the duty cycle of the buck topology increases, the power semiconductor 2 loss in the buck topology decreases, and the temperature difference decreases. 4. The temperature of power semiconductor 2 in the boost topology is higher than that in the buck topology. As the duty cycle of the boost topology increases, the power semiconductor 2 loss in the boost topology increases, while the power semiconductor 2 loss in the buck topology decreases, and the temperature difference decreases.
[0101] In this embodiment of the invention, in either boost or buck mode, the duty cycle is adjusted according to the temperature of the power semiconductor 2. This allows for dynamic and balanced heating of each power semiconductor 2 through software control, which can further reduce the temperature difference and decrease the probability of condensation on the power semiconductor 2.
[0102] In some embodiments, step S102, when the temperature difference between the power semiconductor 2 in the boost topology and the power semiconductor 2 in the buck topology is greater than a preset temperature difference, adjusts the duty cycle of the boost topology and / or the buck topology, including: Step S1022: When the temperature difference between the power semiconductor 2 in the boost topology and the power semiconductor 2 in the buck topology is greater than a preset temperature difference, if the current operating mode is the pass-through mode, the current operating mode is switched to boost mode or buck mode according to the temperature difference between the power semiconductor 2 in the boost topology and the power semiconductor 2 in the buck topology, and the duty cycle of the boost topology and / or buck topology is adjusted according to the temperature difference between the power semiconductor 2 in the boost topology and the power semiconductor 2 in the buck topology.
[0103] Specifically, if the temperature of power semiconductor 2 in the boost topology is lower than the temperature of power semiconductor 2 in the buck topology, the current operating mode is switched to boost mode.
[0104] If the temperature of power semiconductor 2 in the buck topology is lower than that of power semiconductor 2 in the boost topology, the current operating mode will be switched to buck mode.
[0105] Generally, the temperature of power semiconductor 2 in the boost topology increases after switching to boost mode, and the temperature of power semiconductor 2 in the buck topology increases after switching to buck mode, thereby rapidly reducing the temperature difference.
[0106] Furthermore, after switching to boost mode or buck mode, the duty cycle of the boost topology and / or buck topology is adjusted according to the control method in boost mode or buck mode in the above embodiments.
[0107] In this embodiment of the invention, in the direct-through mode, when the temperature difference exceeds the limit, it actively switches to boost mode or buck mode, and uses mode switching to change the conduction loss and heat distribution of the device to quickly level out the temperature difference.
[0108] In some embodiments, before obtaining the temperature of the power semiconductor 2 in the boost topology of the DC-to-DC buck-boost circuit and the temperature of the power semiconductor 2 in the buck topology of the DC-to-DC buck-boost circuit in step S101, the method further includes: Step S100: Obtain the voltage of the photovoltaic string and determine the current operating mode based on the voltage of the photovoltaic string and the preset bus voltage.
[0109] Specifically, such as Figure 16 As shown, the voltage of the photovoltaic string is collected by a voltage sensor and compared with the preset bus voltage. When the voltage of the photovoltaic string is higher than the preset bus voltage, the step-down mode is executed; when the voltage of the photovoltaic string is lower than the preset bus voltage, the step-up mode is executed. This ensures that the voltage of the photovoltaic string matches the preset bus voltage and guarantees the normal output of the photovoltaic string voltage.
[0110] Furthermore, parameters such as the current and power of the photovoltaic string, and the voltage and current of the power semiconductor 2 in the boost and buck topologies can be collected to regulate the power converter and improve its operational reliability.
[0111] Although embodiments of the invention have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the invention, and such modifications and variations all fall within the scope defined by the appended claims.
Claims
1. A power converter, characterized in that, include: Several semiconductor groups, each semiconductor group including several power semiconductors, the power semiconductors in the same semiconductor group are all located in the heat-conducting region corresponding to the semiconductor group, and different power semiconductors in the heat-conducting region transfer heat to each other; When the power converter is running based on a preset operating mode, at least one power semiconductor in any of the semiconductor groups is in an operating state.
2. The power converter according to claim 1, characterized in that, The thermally conductive area is provided with several thermally conductive pads, and the power semiconductor is disposed on the thermally conductive pads.
3. The power converter according to claim 2, characterized in that, Each of the thermally conductive regions is provided with a corresponding thermally conductive pad, and the power semiconductors in the same semiconductor group are disposed on the same thermally conductive pad.
4. The power converter according to claim 2, characterized in that, The thermally conductive area is provided with multiple thermally conductive pads, and the power semiconductors in the same semiconductor group are dispersed on different thermally conductive pads in the same thermally conductive area.
5. The power converter according to claim 4, characterized in that, The distance between any two adjacent thermal pads within the same thermally conductive area is less than or equal to a preset thermally conductive distance.
6. The power converter according to claim 4, characterized in that, Each of the thermally conductive pads within the same thermally conductive area is connected by a thermally conductive structure.
7. The power converter according to any one of claims 2 to 6, characterized in that, It also includes a heat dissipation substrate, on which the thermal pad is disposed.
8. The power converter according to claim 1, characterized in that, The power converter includes a DC-to-AC converter and several DC-to-DC buck-boost circuits. The power semiconductors in the boost topology of the same DC-to-DC buck-boost circuit are arranged as a semiconductor group in the same heat-conducting region. The power semiconductors in the buck topology of the same DC-to-DC buck-boost circuit are arranged as a semiconductor group in the same heat-conducting region. The power semiconductors in each phase of the DC-to-AC converter are arranged as a semiconductor group in several heat-conducting regions. The heat-conducting region where the power semiconductors in the DC-to-AC converter are arranged includes at least one power semiconductor in each phase of the DC-to-AC converter.
9. The power converter according to claim 8, characterized in that, The power converter further includes a balancing bridge, wherein the power semiconductors in the balancing bridge and the power semiconductors in the boost topology are disposed in the same heat-conducting region, or the power semiconductors in the balancing bridge and the power semiconductors in the buck topology are disposed in the same heat-conducting region, or the power semiconductors in the balancing bridge and the power semiconductors in each phase of the DC-to-AC converter are disposed in the same heat-conducting region.
10. The power converter according to claim 8, characterized in that, The power converter further includes a neutral line overcurrent protection module. The power semiconductor in the neutral line overcurrent protection module and the power semiconductor in the boost topology are disposed in the same heat-conducting region, or the power semiconductor in the neutral line overcurrent protection module and the power semiconductor in the buck topology are disposed in the same heat-conducting region, or the power semiconductor in the neutral line overcurrent protection module and the power semiconductor in each phase of the DC-to-AC converter are disposed in the same heat-conducting region.
11. The power converter according to any one of claims 8 to 10, characterized in that, The power converter further includes a controller, which is connected to the power semiconductors in the DC-to-AC converter, the power semiconductors in the boost topology of the DC-to-DC buck-boost circuit, and the power semiconductors in the buck topology of the DC-to-DC buck-boost circuit. The controller is used to acquire the temperatures of the power semiconductors in the boost topology and the buck topology of the DC-to-DC buck-boost circuit. When the temperature difference between the power semiconductors in the boost topology and the buck topology is greater than a preset temperature difference, the controller adjusts the duty cycle of the boost topology and / or the buck topology.
12. A control method for a power converter, characterized in that, Application to control the power converter as described in any one of claims 1 to 11, comprising: Obtain the temperature of the power semiconductor in the boost topology of the DC-to-DC buck-boost circuit and the temperature of the power semiconductor in the buck topology of the DC-to-DC buck-boost circuit. When the temperature difference between the power semiconductor in the boost topology and the power semiconductor in the buck topology is greater than a preset temperature difference, the duty cycle of the boost topology and / or the buck topology is adjusted.