Vehicle network high-speed communication failure dynamic protection method, system, medium and device
By collecting physical layer and protocol layer data of the vehicle network, analyzing fault types, and implementing dynamic impedance compensation, elastic traffic scheduling, and backup link switching, the problems of impedance drift, sudden traffic frame loss, and recovery delay caused by environmental changes in high-speed communication of the vehicle network are solved, thereby improving the stability and real-time performance of high-speed communication.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- DONGFENG MOTOR GRP
- Filing Date
- 2026-03-11
- Publication Date
- 2026-06-26
AI Technical Summary
Existing high-speed communication in vehicle networks suffers from impedance drift leading to increased bit error rate when faced with environmental changes such as temperature and vibration. Buffer allocation strategies cause a surge in frame loss during traffic bursts, and redundancy switching mechanisms have excessively high recovery delays, failing to meet the requirements of high real-time scenarios.
By collecting physical layer and protocol layer data, analyzing and determining the type of fault, and adopting methods such as dynamic impedance compensation, elastic traffic scheduling, and rapid switching of backup links, we can dynamically adapt to environmental changes and solve problems such as dynamic impedance mismatch, sudden traffic frame loss, and link recovery delay.
It improves the stability and real-time performance of high-speed communication in dynamic environments, reduces frame loss rate and recovery delay, and meets the communication needs of high real-time scenarios.
Smart Images

Figure CN122293484A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of vehicle network communication and security management technology, and in particular to a method, system, medium and device for dynamic protection against failures in high-speed vehicle network communication. Background Technology
[0002] Existing methods for preventing high-speed communication failures in vehicle networks manage Ethernet communication through static impedance matching (such as fixed terminating resistors) and predefined priority queues, calibrates protocol layer timing using hardware timestamps, and addresses occasional frame loss through retransmission mechanisms. The core of these methods is to suppress electromagnetic interference through frequency domain S-parameter analysis and shielding layer design. However, these methods cannot dynamically adapt to impedance drift caused by environmental changes such as temperature and vibration. The bit error rate increases significantly under high-temperature conditions, highlighting the limitations of static models. Fixed buffer allocation strategies can lead to instantaneous buffer overflows during traffic surges (such as centralized sensor data reporting), causing a spike in frame loss and resulting in sudden traffic failures. Furthermore, redundant switching mechanisms relying on software protocol stacks take more than 10ms, failing to meet the demands of high real-time scenarios and exhibiting excessively high recovery latency. Summary of the Invention
[0003] This invention aims to solve at least one of the technical problems existing in the prior art, and proposes a dynamic protection method, system, medium and device for high-speed communication failure of the whole vehicle network.
[0004] In a first aspect, embodiments of the present invention provide a dynamic protection method for high-speed communication failures in a vehicle network, comprising the following steps:
[0005] S100: Collect physical layer and protocol layer data, and analyze and judge the fault type based on the physical layer and protocol layer data. The fault type includes at least one of dynamic impedance mismatch, burst traffic frame loss, and link recovery delay.
[0006] S200: Adopt corresponding dynamic protection strategies according to the fault type, perform dynamic impedance compensation for dynamic impedance mismatch, perform elastic traffic scheduling for sudden traffic frame loss, and perform rapid switching of backup links for link recovery delay.
[0007] Furthermore, in step S100, the physical layer data includes transmission line impedance and bit error rate, and the protocol layer data includes traffic, cyclic redundancy check error rate, and frame arrival time.
[0008] Further, in step S100, if the difference between the transmission line impedance and the standard transmission line impedance exceeds the impedance deviation threshold, the fault type is identified as dynamic impedance mismatch; the frame arrival interval is calculated based on the frame arrival time, and the flow slope is calculated based on the flow rate per unit time. If the frame arrival interval is lower than the frame arrival interval threshold and the flow slope is higher than the flow slope threshold, the fault type is identified as burst flow frame loss; the delay is calculated based on the frame arrival time, and the link comprehensive health is obtained by weighted summation of the bit error rate, delay, and cyclic redundancy check error rate. If the link comprehensive health is greater than the link comprehensive health threshold, the fault type is identified as link recovery delay.
[0009] Furthermore, in step S200, adopting the corresponding dynamic protection strategy based on the fault type includes the following steps:
[0010] S210. If the fault type involves dynamic impedance mismatch, perform dynamic impedance compensation and then proceed to step S240; if the fault type does not involve dynamic impedance mismatch, proceed to step S220.
[0011] S220. If the fault type involves sudden traffic frame loss, perform elastic traffic scheduling and then proceed to step S240; if the fault type does not involve sudden traffic frame loss, proceed to step S230.
[0012] S230. If the fault type involves link recovery delay, perform a rapid switchover to the backup link and then proceed to step S240. If the fault type does not involve link recovery delay, it indicates that the network is in good condition and there is no risk of failure. Return to step S210 for continuous monitoring.
[0013] S240, Feedback on the execution result, return to step S210 for continuous monitoring.
[0014] Furthermore, dynamic impedance compensation includes dynamically adjusting the terminating resistor via a digital potentiometer or MOSFET resistor array to always match the real-time impedance of the transmission line.
[0015] Furthermore, elastic traffic scheduling includes modifying the allocation of buffers for various types of data, increasing the buffer space allocated to high-priority data, and using compressed formats or discarding the transmission of low-priority data.
[0016] Furthermore, rapid switching to the backup link includes switching to the backup link in milliseconds via hardware acceleration mechanisms.
[0017] Secondly, embodiments of the present invention provide a dynamic protection system for high-speed communication failures in a vehicle network, comprising:
[0018] The monitoring module is used to collect physical layer and protocol layer data, and analyze and judge the data to locate the fault type. The fault type includes at least one of dynamic impedance mismatch, burst traffic frame loss, and link recovery delay.
[0019] The dynamic protection module is used to take corresponding dynamic protection strategies according to the fault type. It performs dynamic impedance compensation for dynamic impedance mismatch, elastic traffic scheduling for sudden traffic frame loss, and rapid switching to backup links for link recovery delay.
[0020] Thirdly, embodiments of the present invention provide an electronic device, including:
[0021] One or more processors;
[0022] Memory, used to store one or more programs;
[0023] When the one or more programs are executed by the one or more processors, the one or more processors perform the method as described above.
[0024] Fourthly, embodiments of the present invention provide a computer-readable medium storing a computer program, which, when executed by a processor, implements the steps of the method described above.
[0025] The present invention provides a method, system, medium, and device for dynamic protection against high-speed communication failures in vehicle networks. By collecting physical layer and protocol layer data, and analyzing and judging the data, the fault type is located. The fault type includes at least one of dynamic impedance mismatch, sudden traffic frame loss, and link recovery delay. Corresponding dynamic protection strategies are adopted based on the fault type: dynamic impedance compensation for dynamic impedance mismatch, elastic traffic scheduling for sudden traffic frame loss, and rapid switching to backup links for link recovery delay. This can solve problems such as dynamic impedance mismatch, sudden traffic frame loss, and link recovery delay in high-speed communication networks. Attached Figure Description
[0026] Figure 1 A flowchart illustrating a dynamic protection method for high-speed communication failures in a vehicle network, provided in an embodiment of the present invention;
[0027] Figure 2 This is an overall flowchart of a dynamic protection method for high-speed communication failures in a vehicle network provided by an embodiment of the present invention;
[0028] Figure 3 A flowchart of a preferred embodiment of a dynamic protection method for high-speed communication failure in a vehicle network provided by an embodiment of the present invention;
[0029] Figure 4This is an architecture diagram of an RTE optimization system for multi-sensor data synchronization provided in an embodiment of the present invention;
[0030] Figure 5 This is a structural block diagram of an electronic device provided in an embodiment of the present invention. Detailed Implementation
[0031] To enable those skilled in the art to better understand the technical solutions of the present invention, exemplary embodiments of the present invention are described below in conjunction with the accompanying drawings, including various details of the embodiments of the present invention to aid understanding. These should be considered merely exemplary. Therefore, those skilled in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present invention. Similarly, for clarity and brevity, descriptions of well-known functions and structures are omitted in the following description.
[0032] Where there is no conflict, the various embodiments of the present invention and the features thereof may be combined with each other.
[0033] As used herein, the term “and / or” includes any and all combinations of one or more related enumerated entries.
[0034] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used herein, the singular forms “a” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that when the terms “comprising” and / or “made of” are used in this specification, the presence of the stated feature, integral, step, operation, element, and / or component is specified, but the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof is not excluded. Terms such as “connected” or “linked” are not limited to physical or mechanical connections but can include electrical connections, whether direct or indirect.
[0035] Unless otherwise specified, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having the meaning consistent with their meaning in the context of the relevant art and the invention, and will not be interpreted as having an idealized or overly formal meaning unless expressly so defined herein.
[0036] This invention provides a dynamic protection method for high-speed communication failures in a vehicle network, see reference. Figure 1 , 2 As shown, the method includes the following steps:
[0037] S100: Collect physical layer and protocol layer data, and analyze and judge the fault type based on the physical layer and protocol layer data. The fault type includes at least one of dynamic impedance mismatch, burst traffic frame loss, and link recovery delay.
[0038] Specifically, a distributed sensor network is deployed at the physical and protocol layers to collect physical and protocol layer data in real time.
[0039] In one embodiment, physical layer data includes transmission line impedance and bit error rate, while protocol layer data includes traffic, cyclic redundancy check (CRC) error rate, and frame arrival time.
[0040] In one embodiment, see Figure 3 As shown, if the difference between the transmission line impedance and the standard transmission line impedance exceeds the impedance deviation threshold, the fault type is identified as dynamic impedance mismatch. The frame arrival interval is calculated based on the frame arrival time, and the flow rate is calculated based on the flow rate per unit time. If the frame arrival interval is lower than the frame arrival interval threshold and the flow rate is higher than the flow rate threshold, the fault type is identified as bursty flow frame loss. The delay is calculated based on the frame arrival time, and the link overall health is obtained by weighted summation of the bit error rate, delay, and cyclic redundancy check error rate. If the link overall health is greater than the link overall health threshold, the fault type is identified as link recovery delay.
[0041] S200: Adopt corresponding dynamic protection strategies according to the fault type, perform dynamic impedance compensation for dynamic impedance mismatch, perform elastic traffic scheduling for sudden traffic frame loss, and perform rapid switching of backup links for link recovery delay.
[0042] In one embodiment, see Figure 3 As shown, the corresponding dynamic protection strategy based on the fault type includes the following steps:
[0043] S210. If the fault type involves dynamic impedance mismatch, perform dynamic impedance compensation and then proceed to step S240; if the fault type does not involve dynamic impedance mismatch, proceed to step S220.
[0044] S220. If the fault type involves sudden traffic frame loss, perform elastic traffic scheduling and then proceed to step S240; if the fault type does not involve sudden traffic frame loss, proceed to step S230.
[0045] S230. If the fault type involves link recovery delay, perform a rapid switchover to the backup link and then proceed to step S240. If the fault type does not involve link recovery delay, it indicates that the network is in good condition and there is no risk of failure. Return to step S210 for continuous monitoring.
[0046] S240, Feedback on the execution result, return to step S210 for continuous monitoring.
[0047] In one embodiment, dynamic impedance compensation includes dynamically adjusting the terminating resistance via a digital potentiometer or MOSFET resistor array to always match the real-time impedance of the transmission line.
[0048] In one embodiment, elastic traffic scheduling includes modifying the allocation of buffers for different types of data. This involves increasing the buffer space allocated to high-priority data and using compressed formats or discarding low-priority data for transmission. Specifically, transmitted data is categorized, and high-priority data is allocated more buffer space, ensuring this area cannot be occupied by other data and guaranteeing its accurate and timely transmission. Other data, such as video signals, is converted to compressed formats for transmission, or other data is either compressed or discarded, reducing buffer usage.
[0049] In one embodiment, rapid switching to a backup link includes switching to a backup link in milliseconds via a hardware acceleration mechanism.
[0050] This invention collects physical layer and protocol layer data, analyzes and judges the data to locate the fault type, which includes at least one of dynamic impedance mismatch, burst traffic frame loss, and link recovery delay. Based on the fault type, corresponding dynamic protection strategies are adopted: dynamic impedance compensation for dynamic impedance mismatch, elastic traffic scheduling for burst traffic frame loss, and rapid switching to backup links for link recovery delay. This can solve problems such as dynamic impedance mismatch, burst traffic frame loss, and link recovery delay in high-speed communication networks.
[0051] This invention also provides a dynamic protection system for high-speed communication failures in a vehicle network, see reference. Figure 4 As shown, the system includes:
[0052] Monitoring module 11 is used to collect physical layer and protocol layer data, and to analyze and judge the physical layer and protocol layer data to locate the fault type. The fault type includes at least one of dynamic impedance mismatch, burst traffic frame loss, and link recovery delay.
[0053] The dynamic protection module 12 is used to adopt corresponding dynamic protection strategies according to the fault type, perform dynamic impedance compensation for dynamic impedance mismatch, perform elastic traffic scheduling for sudden traffic frame loss, and perform rapid switching of backup links for link recovery delay.
[0054] This invention also provides an electronic device, see below. Figure 5As shown, an embodiment of the present invention provides an electronic device including: one or more processors 101, a memory 102, and one or more I / O interfaces 103. The memory 102 stores one or more programs, which, when executed by the one or more processors, enable the one or more processors to implement any of the vehicle network high-speed communication failure dynamic protection methods described in the above embodiments; the one or more I / O interfaces 103 are connected between the processor and the memory, configured to enable information interaction between the processor and the memory.
[0055] The processor 101 is a device with data processing capabilities, including but not limited to a central processing unit (CPU); the memory 102 is a device with data storage capabilities, including but not limited to random access memory (RAM, more specifically SDRAM, DDR, etc.), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), and flash memory (FLASH); the I / O interface (read / write interface) 103 is connected between the processor 101 and the memory 102, and can realize information interaction between the processor 101 and the memory 102, including but not limited to a data bus (Bus).
[0056] In some embodiments, the processor 101, memory 102, and I / O interface 103 are interconnected via bus 104, and thus connected to other components of the computing device.
[0057] In some embodiments, the one or more processors 101 include a field-programmable gate array.
[0058] This invention also provides a computer-readable medium. The computer-readable medium stores a computer program, which, when executed by a processor, implements the steps of any of the vehicle network high-speed communication failure dynamic protection methods described in the above embodiments. The computer-readable storage medium can be volatile or non-volatile.
[0059] Those skilled in the art will understand that all or some of the steps, systems, and apparatuses disclosed above, and their functional modules / units, can be implemented as software, firmware, hardware, or suitable combinations thereof. In hardware implementations, the division between functional modules / units mentioned above does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed collaboratively by several physical components. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit (ASIC). Such software can be distributed on a computer-readable storage medium, which may include computer storage media (or non-transitory media) and communication media (or transient media).
[0060] As is known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information, such as computer-readable program instructions, data structures, program modules, or other data. Computer storage media includes, but is not limited to, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), static random access memory (SRAM), flash memory or other memory technologies, portable compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and is accessible to a computer. Furthermore, it is known to those skilled in the art that communication media typically contain computer-readable program instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.
[0061] The computer-readable program instructions described herein can be downloaded from computer-readable storage media to various computing / processing devices, or downloaded via a network, such as the Internet, local area network, wide area network, and / or wireless network, to an external computer or external storage device. The network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards them to the computer-readable storage media in the respective computing / processing device.
[0062] The computer program instructions used to perform the operations of this invention may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages such as Smalltalk, C++, etc., and conventional procedural programming languages such as the "C" language or similar programming languages. The computer-readable program instructions may be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or may be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, electronic circuitry, such as programmable logic circuitry, field-programmable gate arrays (FPGAs), or programmable logic arrays (PLAs), is personalized by utilizing state information from the computer-readable program instructions. This electronic circuitry can execute the computer-readable program instructions to implement various aspects of the invention.
[0063] The computer program product described herein can be implemented specifically through hardware, software, or a combination thereof. In one alternative embodiment, the computer program product is specifically embodied in a computer storage medium; in another alternative embodiment, the computer program product is specifically embodied in a software product, such as a software development kit (SDK), etc.
[0064] Various aspects of the present invention are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.
[0065] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine such that, when executed by the processor of the computer or other programmable data processing apparatus, they create means for implementing the functions / actions specified in one or more blocks of the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium that causes a computer, programmable data processing apparatus, and / or other device to operate in a particular manner; thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing aspects of the functions / actions specified in one or more blocks of the flowchart and / or block diagram.
[0066] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to perform the functions / actions specified in one or more boxes of a flowchart and / or block diagram.
[0067] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of an instruction, which contains one or more executable instructions for implementing a specified logical function. In some alternative implementations, the functions marked in the blocks may occur in a different order than those shown in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.
[0068] Example embodiments have been disclosed herein, and while specific terminology has been used, it is for illustrative purposes only and should be construed as such, and is not intended to be limiting. In some instances, it will be apparent to those skilled in the art that features, characteristics, and / or elements described in conjunction with particular embodiments may be used alone, or in combination with features, characteristics, and / or elements described in conjunction with other embodiments, unless otherwise expressly indicated. Therefore, those skilled in the art will understand that various changes in form and detail may be made without departing from the scope of the invention as set forth in the appended claims.
Claims
1. A dynamic protection method for high-speed communication failures in a vehicle network, characterized in that, Includes the following steps: S100: Collect physical layer and protocol layer data, and analyze and judge the fault type based on the physical layer and protocol layer data. The fault type includes at least one of dynamic impedance mismatch, burst traffic frame loss, and link recovery delay. S200: Adopt corresponding dynamic protection strategies according to the fault type, perform dynamic impedance compensation for dynamic impedance mismatch, perform elastic traffic scheduling for sudden traffic frame loss, and perform rapid switching of backup links for link recovery delay.
2. The method according to claim 1, characterized in that, In step S100, the physical layer data includes transmission line impedance and bit error rate, and the protocol layer data includes traffic, cyclic redundancy check error rate, and frame arrival time.
3. The method according to claim 2, characterized in that, In step S100, if the difference between the transmission line impedance and the standard transmission line impedance exceeds the impedance deviation threshold, the fault type is identified as dynamic impedance mismatch. The frame arrival interval is calculated based on the frame arrival time, and the flow rate is calculated based on the flow rate per unit time. If the frame arrival interval is lower than the frame arrival interval threshold and the flow rate is higher than the flow rate threshold, the fault type is identified as bursty flow frame loss. The delay is calculated based on the frame arrival time, and the link comprehensive health is obtained by weighted summation of the bit error rate, delay, and cyclic redundancy check error rate. If the link comprehensive health is greater than the link comprehensive health threshold, the fault type is identified as link recovery delay.
4. The method according to claim 1, characterized in that, In step S200, the corresponding dynamic protection strategy based on the fault type includes the following steps: S210. If the fault type involves dynamic impedance mismatch, perform dynamic impedance compensation and then proceed to step S240; if the fault type does not involve dynamic impedance mismatch, proceed to step S220. S220. If the fault type involves sudden traffic frame loss, perform elastic traffic scheduling and then proceed to step S240; if the fault type does not involve sudden traffic frame loss, proceed to step S230. S230. If the fault type involves link recovery delay, perform a rapid switchover to the backup link and then proceed to step S240. If the fault type does not involve link recovery delay, it indicates that the network is in good condition and there is no risk of failure. Return to step S210 for continuous monitoring. S240, Feedback on the execution result, return to step S210 for continuous monitoring.
5. The method according to claim 4, characterized in that, Dynamic impedance compensation involves dynamically adjusting the terminating resistance using a digital potentiometer or MOSFET resistor array to always match the real-time impedance of the transmission line.
6. The method according to claim 4, characterized in that, Elastic traffic scheduling includes modifying the allocation of buffers for different types of data, increasing the buffer space for high-priority data, and using compressed formats or discarding the transmission of low-priority data.
7. The method according to claim 4, characterized in that, Fast failover to backup links includes switching to backup links in milliseconds via hardware acceleration mechanisms.
8. A dynamic protection system for high-speed communication failures in a vehicle network, characterized in that, include: The monitoring module is used to collect physical layer and protocol layer data, and analyze and judge the data to locate the fault type. The fault type includes at least one of dynamic impedance mismatch, burst traffic frame loss, and link recovery delay. The dynamic protection module is used to take corresponding dynamic protection strategies according to the fault type. It performs dynamic impedance compensation for dynamic impedance mismatch, elastic traffic scheduling for sudden traffic frame loss, and rapid switching to backup links for link recovery delay.
9. An electronic device, characterized in that, include: One or more processors; Memory, used to store one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors implement the method as described in any one of claims 1 to 7.
10. A computer-readable medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method as described in any one of claims 1 to 7.