Board conveying device and semiconductor element processing system

Abstract

This invention relates to a board transfer device and a semiconductor component processing system including the same. The board transfer device transfers test boards during the process of removing semiconductor components from a tray for loading onto test boards and storing them in a rack. The board transfer device may include: a clamping unit for clamping a clamping area of ​​the test board, thereby enabling the transfer of the test board; a sensing unit disposed on the clamping unit for scanning at least a portion of a surface of the test board, thereby enabling the sensing of the test board; and a control unit for identifying the actual position coordinates and contour of the test board based on a sensing signal applied from the sensing unit, and determining the clamping area of ​​the test board, such that the clamping unit can clamp the clamping area of ​​the test board.

Description

Technical Field

[0001] The present invention relates to a board conveying device and a semiconductor device processing system, and more specifically, to a board conveying device and a semiconductor device processing system including the thereof for conveying test boards during the process of removing semiconductor devices from a tray for loading onto test boards and storing them in a rack. Background Technology

[0002] Typically, semiconductor devices can include memory devices or non-memory devices such as dynamic random access memory (DRAM) and static random access memory (SRAM), and can be manufactured based on a wafer formed from a thin, single-crystal substrate of silicon.

[0003] More specifically, semiconductor devices can be manufactured by performing the following processes: semiconductor manufacturing processes that form circuit patterns on multiple chips that are patterned on a wafer; bonding processes that electrically connect each of the chips formed in the semiconductor manufacturing process to each of the chips in a substrate; and molding processes for protecting the chips connected to the substrate from external influences, etc.

[0004] Semiconductor devices manufactured in this way can have their electrical functions checked through a separate testing process. This testing process can be performed using a test apparatus that essentially treats the semiconductor device as an object for testing, and a semiconductor device processing system that handles multiple semiconductor devices to connect them to the test apparatus.

[0005] However, in this traditional semiconductor component handling system, the board transport device for transporting test boards loaded with semiconductor components has the following problem: during the operation of the semiconductor component handling system, board clamping errors occur when the clamping of the test board fails or when the position of the internal test board cannot be determined. Therefore, only direct operator intervention can normalize the clamping of the test board.

[0006] Thus, when a board clamping error occurs, if only operator intervention can manually normalize the board clamping, the time consumed until the equipment is normalized is long, and the error is difficult to clear. Furthermore, if the test board's logistics information data is lost within the semiconductor component handling system, the equipment cannot determine the test board's location, thus requiring operator intervention to remove the test board. Summary of the Invention

[0007] Technical issues

[0008] The present invention aims to solve various problems, including those described above, and aims to provide a board transfer device and a semiconductor device processing system including the same. The board transfer device and the semiconductor device processing system scan and sense the outline of a test board within the semiconductor device processing system using a sensing unit, and analyze the data obtained therefrom to determine not only the presence or absence of the test board, but also the position coordinates and clamping area of ​​the test board, thereby enabling the clamping and transfer of the test board. However, this problem is merely exemplary, and the scope of the present invention is not limited thereto.

[0009] Solution

[0010] According to one embodiment of the present invention, a board conveying device is provided. The board conveying device can clamp and convey test boards in a semiconductor component processing system, wherein the semiconductor component processing system includes a sorter and a rack buffer. The sorter can remove semiconductor components loaded on a tray from a tray to store on a test board, or remove semiconductor components that have completed testing from a test board to store on a tray. The rack buffer is connected to the sorter and can receive test boards loaded with semiconductor components from the sorter to load onto a rack, or transfer test boards loaded on a rack to the sorter. The board conveying device may include: a clamping unit for clamping a clamping area of ​​the test board, thereby enabling the conveying of the test board; a sensing unit disposed on the clamping unit to scan at least a portion of a surface of the test board, thereby enabling the sensing of the test board; and a control unit that, based on a sensing signal applied from the sensing unit, identifies the actual position coordinates and contour of the test board, and determines the clamping area of ​​the test board, such that the clamping unit can clamp the clamping area of ​​the test board.

[0011] Beneficial effects

[0012] According to one embodiment of the present invention formed as described above, in cases where the clamping unit fails to clamp the test board, in cases where logistics data including the logistics position coordinates of the test board is lost in the semiconductor device processing system, or in cases where the test board cannot be located in the semiconductor device processing system due to manual operation by the operator to move the test board into or out of the semiconductor device processing system, the outline of the test board can be automatically sensed in the semiconductor device processing system by scanning the sensing unit integrally formed with the clamping unit.

[0013] Thus, based on the raw data acquired during the scanning process of the test board by the sensing unit, the shape of the test board is virtually derived using a board contour sensing algorithm. This allows for the determination of the actual position coordinates of the test board within the semiconductor device processing system, as well as the determination of the clamping area of ​​the test board. Consequently, a board transfer device and a semiconductor device processing system including the device can be realized, capable of guiding the clamping unit to grip the clamping area to smoothly perform the intended transfer operation without clamping errors. Clearly, the scope of protection of this invention is not limited by this effect. Attached Figure Description

[0014] Figure 1 This is a conceptual perspective view of a semiconductor device processing system according to an embodiment of the present invention.

[0015] Figure 2 It is a conceptual representation Figure 1 A side sectional view of a semiconductor device processing system.

[0016] Figure 3 It is shown Figure 1 A three-dimensional view of the rack buffer of a semiconductor component processing system.

[0017] Figure 4 It is a conceptual representation Figure 1 A plan view of the semiconductor component processing system.

[0018] Figure 5 It is a conceptual illustration of a setting in Figure 1 A perspective view of the board conveyor of the sorter in a semiconductor component processing system.

[0019] Figure 6 It is shown Figure 5 A three-dimensional view of the clamping area of ​​the test board held by the board conveying device.

[0020] Figure 7 It is a conceptual representation Figure 5 A block diagram showing the configuration of the control unit of the plate conveying device.

[0021] Figure 8 It is a conceptual representation Figure 5 A side sectional view of the process of the sensing unit of the board conveying device scanning the test board.

[0022] Figure 9 It is shown in Figure 8 A graph of one embodiment of the pulse sensing signal output during the scanning process of the sensing unit.

[0023] Figure 10 and Figure 11 It is shown step by step. Figure 5A plan view of the process by which the clamping unit of the board conveying device clamps the test board based on the clamping area determined by the control unit.

[0024] Explanation of reference numerals in the attached figures

[0025] 1: Semiconductor components

[0026] 2: Test board

[0027] 3: Rack

[0028] 4: Container

[0029] 10: Rack Port

[0030] 11: Rack Port Main Body

[0031] 12: Port Level 1

[0032] 13: Port Layer 2

[0033] 20: Frame Lift

[0034] 21: Main body of the frame lifting platform

[0035] 22: Rack Lifting Platform

[0036] 23: Frame lifting device

[0037] 30: Rack stacker

[0038] 31: Rack stacker body

[0039] 32: Stacker, Layer 1

[0040] 33: Stacker Second Layer

[0041] 34: Stacker three-layer section

[0042] 40: Platform lift

[0043] 41: Main body of the platform lift

[0044] 42: Platform Lifting Table

[0045] 43: Platform lifting device

[0046] 50: Plate inserter

[0047] 51: Plate inserter body

[0048] 52: Plate Conveyor

[0049] 100: Rack buffer

[0050] 100A: Rack Processing Department

[0051] 100B: Test Board Processing Department

[0052] 200: Sorter

[0053] 210: Sorter body

[0054] 220: Semiconductor Component Unloading Device

[0055] 230: Plate conveying device

[0056] 2310: Clamping Unit

[0057] 2311: Clamping device body

[0058] 2312: Hook

[0059] 2312a: Through hole

[0060] 2313: Promotion Department

[0061] 2314: Boot module

[0062] 2320: Sensing Unit

[0063] 2330: Control Department

[0064] 2331: Plate Conveying Department

[0065] 2332: Board Identification Department

[0066] 240: Semiconductor component loading device

[0067] 1000: Semiconductor Component Processing System

[0068] A1: First position

[0069] A2: Second position

[0070] E1: First Entrance / Exit

[0071] E2: Second Entrance / Exit

[0072] P1: First Board Channel

[0073] P2: Second board channel

[0074] LP: Load Port

[0075] GA: Clamping Area

[0076] TR: Teleportation Path

[0077] PS: Pulse sensing signal

[0078] SP: Starting Point

[0079] EP: The End

[0080] W: Pulse width

[0081] T: Tray

[0082] H: Hook Detailed Implementation

[0083] In the following description, various preferred embodiments of the invention will be described in detail with reference to the accompanying drawings.

[0084] The embodiments of the present invention are provided to describe the invention more completely to those skilled in the art. The following embodiments can be modified into various other forms, and the scope of the invention is not limited to these embodiments. Rather, these embodiments are provided to make this disclosure more comprehensive and complete, and to fully convey the spirit of the invention to those skilled in the art. Furthermore, in the accompanying drawings, the thickness or size of each layer is exaggerated for ease of description and clarity.

[0085] In the following description, embodiments of the invention will be illustrated with reference to the accompanying drawings, which schematically show preferred embodiments of the invention. In the drawings, for example, variations in the illustrated shapes may be expected depending on manufacturing techniques and / or tolerances. Therefore, embodiments of the inventive concept should not be construed as limited to the specific shapes of the areas shown in this specification, but should include, for example, variations in shape resulting from manufacturing processes.

[0086] Figure 1 This is a conceptual perspective view illustrating the external appearance of a semiconductor device processing system 1000 according to an embodiment of the present invention. Figure 2 It is a conceptual representation Figure 1 A side sectional view of the semiconductor device processing system 1000. Figure 3 It is shown Figure 1 A perspective view of the rack buffer 100 of the semiconductor device processing system 1000. Figure 4 It is a conceptual representation Figure 1 A plan view of the semiconductor device processing system 1000. Figure 5 It is a conceptual illustration of a setting in Figure 1 A perspective view of the sorter 200 and the board conveyor 230 of the semiconductor component processing system 1000. Figure 6 It is shown Figure 5 A perspective view of the clamping area GA of the plate conveying device 230 clamping the test plate 2. Figure 7 It is a conceptual representation Figure 5 A block diagram showing the configuration of the control unit 2330 of the plate conveying device 230. Furthermore, Figure 8 It is a conceptual representation Figure 5 A side cross-sectional view of the process by which the sensing unit 2320 of the plate conveying device 230 scans the test plate 2. Figure 9 It is shown in Figure 8A graph illustrating the pulse sensing signal PS output by the sensing unit 2320 during the scanning process according to one embodiment. Figure 10 and Figure 11 It is shown step by step. Figure 5 A plan view of the process by which the clamping unit 2310 of the plate conveying device 230 clamps the test plate 2 based on the clamping area GA determined by the control unit 2330.

[0087] like Figure 1 As shown, a semiconductor device processing system 1000 according to an embodiment of the present invention may generally include a rack buffer 100 and a sorter 200.

[0088] The rack buffer 100 is connected to the sorter 200 and can be a device that receives test boards 2 loaded with semiconductor components 1 from the sorter 200 for loading into the rack 3 or transfers test boards 2 loaded in the rack 3 to the sorter 200.

[0089] The sorter 200 is connected to the rack buffer 100 and can be a device that, if a container 4 carrying a pallet T from an overhead hoist transport device (OHT) is placed through the loading port LP, can remove the semiconductor component 1 loaded on the pallet T for storage on the test board 2, or remove the semiconductor component 1 that has completed testing from the test board 2 for storage on the pallet T, and then transfer the test board 2 back to the rack buffer 100.

[0090] Therefore, by utilizing the rack buffer 100 and sorter 200 of the present invention, the following series of processes can be automatically executed: removing the semiconductor element 1 loaded on the tray T from the tray T and storing it on the test board 2; receiving the test board 2 loaded with the semiconductor element 1 from the sorter 200 and loading it on the rack 3; and removing the tested semiconductor element 1 from the test board 2 loaded on the rack 3 and storing it on the tray T.

[0091] like Figure 2 and Figure 3 As shown, the rack buffer 100 of the semiconductor device processing system 1000 according to an embodiment of the present invention may include a rack processing unit 100A responsible for the distribution of the rack 3 and a test board processing unit 100B responsible for the distribution of the test board 2.

[0092] Here, the rack lifter 20, which is part of the rack handling unit 100A, can not only handle the logistics of the rack 3, but also the logistics of the test board 2, so that the logistics of the test board 2 can be circulated.

[0093] For example, the rack processing unit 100A of the main processing rack 3 may include a rack port 10 with a rack inlet / outlet formed on one side for rack 3 to be loaded or unloaded, a rack lift 20 that receives rack 3 from rack port 10 and lifts rack 3, and a rack stacker 30 that receives rack 3 from rack lift 20 and stacks at least one rack 3 for temporary storage.

[0094] Therefore, by utilizing the rack processing unit 100A of the present invention, the following series of rack logistics processes can be automatically executed: rack port 10 receives rack 3 through rack inlet / outlet; and if rack elevator 20 receives rack 3 from rack port 10 and raises rack 3 to the height of a specific layer of rack stacker 30, rack stacker 30 stacks rack 3 to the specific layer for temporary storage.

[0095] More specifically, such as Figure 2 As shown, the rack port 10 may include a rack port body 11, a first-layer port portion 12, and a second-layer port portion 13. The first-layer port portion 12 is formed on the rack port body 11 and has a first inlet / outlet E1, which allows the rack 3 to be inserted or removed. The second-layer port portion 13 is formed on the rack port body 11 and above the first-layer port portion 12, and has a second inlet / outlet E2, which allows another rack 3 to be inserted or removed.

[0096] As an example, the first-level port section 12 can serve as a loading port for rack 3 to be loaded through the first inlet / outlet E1. After being transported from the first-level port section 12 through the rack elevator 20 and temporarily stored in the rack stacker 30, the rack 3 is transported back to the second-level port section 13. Therefore, the second-level port section 13 can also serve as an unloading port.

[0097] Therefore, the rack 3 containing the tested semiconductor components 1 can be loaded from external testing equipment to the first-layer port section 12 by an unmanned transfer vehicle or unmanned transfer robot, and the rack 3 loaded to the second-layer port section 13 can be moved to the testing equipment by an unmanned transfer vehicle or unmanned transfer robot for testing.

[0098] However, the configuration of the various layers of this port is not limited to this, and rack ports of various shapes and types can be applied.

[0099] like Figure 2 As shown, the rack lift 20 may include a rack lift body 21 with a lifting channel formed inside, a rack lift platform 22 that is formed to be able to lift along the lifting channel, and a rack lift device 23 that lifts the rack lift platform 22.

[0100] Here, the main body 21 of the rack elevator may have a first plate channel P1 formed on the side wall opposite to the sorter 200 (see reference). Figure 2 and Figure 3 Thus, the test board 2 can be received from the sorter 200 using the rack lift 22 and placed into the empty space of the rack 3 temporarily stored in the rack stacker 30.

[0101] Therefore, the rack lifting platform 22 of the present invention can handle both the logistics of the rack 3 and the logistics of the test board 2, and can also lift the rack 3 introduced from the rack port 10 in the first direction I in the third direction III, and then transport the rack 3 lifted to a specific height in the first direction I for temporary storage in the rack stacker 30. Meanwhile, as... Figure 3 As shown, the rack lifting platform 22 can, after lifting the test plate 2 introduced from the sorter 200 through the first plate channel P1 in the second direction II, transfer the test plate 2, which has been lifted to a specific height, to the empty space of the rack 3 temporarily stored in the rack stacker 30 in the first direction I.

[0102] Here, the first direction I, the second direction II, and the third direction III are perpendicular to each other at a 90-degree angle. For example, the first direction I can be the X-axis direction, which is the main conveying direction of the rack 3; the second direction II can be the Y-axis direction, which is based on the direction of the rack 3 corresponding to the sorter 200; and the third direction III can be a vertical direction perpendicular to these X-axis and Y-axis directions, i.e., the Z-axis direction. However, the first direction I, the second direction II, and the third direction III are not necessarily limited to these X-axis, Y-axis, and Z-axis directions, and various directions can be applied.

[0103] like Figure 2 As shown, the rack stacker 30 may include a rack stacker body 31, a first-layer stacker portion 32 formed on the rack stacker body 31 and configured to allow racks 3 to be inserted for temporary storage, a second-layer stacker portion 33 formed on the rack stacker body 31 and above the first-layer stacker portion 32 for allowing another rack 3 to be inserted for temporary storage, and a third-layer stacker portion 34 formed on the rack stacker body 31 and above the second-layer stacker portion 33 for allowing yet another rack 3 to be inserted for temporary storage.

[0104] Therefore, through the rack stacker 30 of the present invention, such as Figure 2 As shown, three racks 3 can be stacked on top of each other for temporary storage, and a large number of racks 3 can be temporarily stored.

[0105] However, this rack stacker 30 is not necessarily limited to the figures shown; rack stackers 30 with various numbers of layers, at least one or more, can be applied.

[0106] The test board processing unit 100B is arranged in a row with the rack processing unit 100A, and may include a board lifter 40 for individually taking out the test board 2 from the rack 3 temporarily stored in the rack stacker 30 and raising and lowering the test board 2, and a board insert 50 for receiving the test board 2 from the board lifter 40 and transferring it to the sorter 200.

[0107] like Figure 2 As shown, the plate lift 40 can be responsible for the material transport of the test plate 2, and includes a plate lift body 41 with a lifting channel formed inside, a plate lift platform 42 formed to be able to lift along the lifting channel, and a plate lift device 43 for lifting the plate lift platform 42.

[0108] Therefore, by lifting the plate lifting platform 42 to a specific height, the plate lifting machine 40 can individually remove the test plate 2 from the rack 3 temporarily stored in the rack stacker 30 in the first direction I, and after lifting the test plate 2 in the third direction III using the plate lifting platform 42, the test plate 2 can be transferred to the plate inserter 50 in the first direction I.

[0109] However, this type of platform lift 40 is not limited to the attached drawings, and various forms and types of lift devices can be applied.

[0110] like Figure 2 As shown, the board inserter 50 may include a board inserter body 51 and a board conveyor 52 formed on the board inserter body 51 and receiving test boards 2 from the board elevator 40 and transferring them to the sorter 200.

[0111] Here, the plate inserter body 51 may have a second plate channel P2 formed on one side wall opposite to the sorter 200 (see reference). Figure 2 and Figure 3 Thus, the received test board 2 can be transferred to the sorter 200 using the board conveyor 52.

[0112] Thus, the board conveyor 52 of the present invention can be responsible for the logistics of the test board 2, and can convey the test board 2 received from the board lifting platform 42 in the first direction I in the second direction II through the second board channel P2 corresponding to the sorter 200.

[0113] like Figure 1 and Figure 4As shown, the sorter 200 of the semiconductor device processing system 1000 according to an embodiment of the present invention may include a sorter body 210, a semiconductor device unloading device 220 formed in the sorter body 210 and unloading the completed semiconductor device 1 from the test board 2 received from the rack buffer 100 to the tray T, a board conveying device 230 conveying the empty test board 2 with all semiconductor devices 1 removed from the first position A1 to the second position A2, and a semiconductor device loading device 240 taking out the semiconductor device 1 to be tested from another tray T, loading it onto the empty test board 2, and transferring it to the rack buffer 100.

[0114] For example, the sorter body 210 may be formed with at least one loading port LP, so that a container 4 for transporting a pallet T from an overhead crane (OHT) can be placed.

[0115] Therefore, the sorter 200 can automatically perform the following series of processes: taking out the tested semiconductor components 1 from the test board 2 received from the rack buffer 100 and unloading them onto the tray T; transferring the empty test board 2 with all semiconductor components 1 removed from the first position A1 to the second position A2; and taking out the semiconductor components 1 to be tested from another tray T, loading them onto the empty test board 2, and transferring them to the rack buffer 100.

[0116] like Figure 4 and Figure 5 As shown, the board conveying device 230 is a device that can hold at least a portion of the test board 2 in the sorter 200 of the semiconductor device processing system 1000 and convey it from the first position A1 to the second position A2, and generally includes a gripper unit 2310, a sensing unit 2320 and a control unit 2330.

[0117] like Figure 5 and Figure 6 As shown, the gripper unit 2310 can be disposed on the sorter body 210 and can slide between the semiconductor component unloading device 220 and the semiconductor component loading device 240. It can also grip the gripping area GA of the test board 2, thereby transferring the empty test board 2 with all semiconductor components 1 removed from the first position A1 to the second position A2.

[0118] For example, the clamp unit 2310 may include a clamp body 2311, a hook 2312, a pusher 2313, and a guide module 2314. The clamp body 2311 is configured to slide between the semiconductor device unloading device 220 and the semiconductor device loading device 240. The hook 2312 is formed on the upper side of the clamp body 2311 and has a latch H, so that it can engage with the clamping area GA formed recessed from the lower surface of the test board 2 in the form of a slot or hole, so as to clamp the clamping area GA of the test board 2. The pusher 2313 pushes the hook 2312 in the direction toward the test board 2 so that the latch H can engage with the clamping area GA. The guide module 2314 is provided on the outer side wall of the clamp body 2311 to guide the lifting and sliding movement direction of the hook 2312 raised and lowered by the pusher 2313.

[0119] More specifically, the hook portion 2312 of the gripper unit 2310 may have a latch H formed at at least one of the front and rear ends, based on the sliding movement direction of the gripper body 2311, wherein the gripper body 2311 slides to be able to transfer the test plate 2.

[0120] Therefore, when the clamping unit 2310 approaches the test plate 2 to clamp the test plate 2, the hook portion 2312 can descend along the outer surface of the test plate 2 by a predetermined distance equivalent to the thickness of the test plate 2 as the hook H formed at the end of the hook portion 2312 contacts the outer surface of the test plate 2. At this time, although not shown, it is preferable to form a chamfered portion on the upper edge of the outer surface of the hook H that contacts the outer surface of the test plate 2, so that the hook portion 2312 descends smoothly through contact with the test plate 2.

[0121] Next, if the clamping unit 2310 advances further to the clamping position in the direction toward the test plate 2, so that the hook H of the hook 2312 moves to the position corresponding to the clamping area GA, then by pushing upward by the pushing part 2313, the hook H rises and inserts into the clamping area GA, thereby completing the clamping of the clamping unit 2310 by the test plate 2.

[0122] At this time, the pushing part 2313 that pushes the hook 2312 upward can generate a clamping completion signal if the hook 2312, which is inserted into the clamping area GA, is raised completely a predetermined distance in the set clamping position. If the hook 2312 is not raised completely in the set clamping position, it can be determined that the clamping unit 2310 has failed to clamp the test board 2, and a clamping failure signal is generated.

[0123] Figure 5 and Figure 6The clamping method described herein is not necessarily limited to this, and various forms and types of clamping methods (e.g., vacuum adsorption) can be applied to the clamping unit 2310.

[0124] like Figure 5 and Figure 6 As shown, the sensing unit 2320 can be mounted on the clamping unit 2310 to scan at least a portion of the lower surface of the test board 2, thereby sensing the test board 2. The control unit 2330 identifies the actual position coordinates and outline of the test board 2 based on the sensing signal applied from the sensing unit 2320, and can determine the clamping area GA of the test board 2, so that the clamping unit 2310 can clamp the clamping area GA of the test board 2.

[0125] For example, the sensing unit 2320 is disposed on the gripper body 2311, thereby being positioned below the hook portion 2312, and can be located along the transport path TR (refer to) of the test plate 2 on the gripper body 2311. Figure 4 During the sliding movement, the lower surface of the test plate 2 is scanned. At this time, the hook 2312 may form a through hole 2312a at a position corresponding to the position of the sensor 2320, so that the sensor 2320 provided inside the gripper body 2311 can scan the lower surface of the test plate 2 positioned on the upper side of the gripper body 2311 on the transport path TR.

[0126] This sensing unit 2320 can be adapted to image sensors, ultrasonic sensors, or laser sensors, etc., so that the gripper unit 2310 descends to a height lower than that of the test board 2 and moves along the transport path TR of the test board 2 (refer to...). Figure 4 , Figure 10 and Figure 11 During the movement, the lower surface of the test plate 2 can be scanned in a non-contact manner. However, the type of sensing unit 2320 is not limited to this, and all types of sensors that can identify the test plate 2 in a non-contact manner can be applied.

[0127] In addition, such as Figure 7 As shown, the control unit 2330 may include a board conveying unit 2331 and a board identification unit 2332. The board conveying unit 2331 applies a control signal to the clamping unit 2310 to control the sliding movement of the clamping unit 2310, so that the hook H engages with the clamping area GA of the test board 2, so that the clamping unit 2310 conveys the test board 2. The board identification unit 2332 identifies the actual position coordinates of the test board 2 and the outline of the test board 2 based on the sensing signal applied from the sensing unit 2320, and determines the clamping area GA within the identified outline of the test board 2.

[0128] For example, the board conveying unit 2331 can apply a control signal to the clamping unit 2310 based on the logistics position coordinates of the test board 2, which is based on data stored for controlling the logistics of the test board 2 in the sorter 200 of the semiconductor device processing system 1000, so that the clamping unit 2310 can move to a clamping position that can clamp the clamping area GA of the test board 2.

[0129] Here, the logistics data, which includes information related to the transport path TR to which the test board 2 is to be transported within the sorter 200, may include position coordinates related to the first position A1 and position coordinates related to the second position A2 as logistics position coordinates. In the semiconductor component unloading device 220 of the sorter 200, the test board 2 in the empty state where all semiconductor components 1 have been unloaded is positioned at the first position A1, and the test board 2 in the semiconductor component loading device 240, which is loaded to load another semiconductor component 1 that needs to be tested, is positioned at the second position A2.

[0130] Therefore, the plate conveying unit 2331 can move the clamping unit 2310 to the first position A1 to clamp the test plate 2 based on the logistics position coordinates included in the logistics data, and convey the test plate 2 by moving the clamping unit 2310 clamping the test plate 2 to the second position A2.

[0131] At this time, if the clamping unit 2310, which moves to the first position A1 based on the logistics position coordinates, fails to clamp the test board 2, or if the position of the test board 2 cannot be found on the transport path TR of the test board 2 due to the loss of logistics data, the test board 2 can be scanned by the control of the board recognition unit 2332, which will be described later, to re-determine the clamping area GA of the test board 2.

[0132] For example, if the clamping unit 2310 fails to clamp the clamping area GA of the test board 2, the board recognition unit 2332 can apply a control signal to the sensing unit 2320 and the clamping unit 2310, thereby enabling... Figure 8 The ground shown is in the transmission path TR of test board 2 (reference). Figure 10 and Figure 11 The test plate 2 is scanned to determine the clamping area GA. Here, the clamping unit 2310 can determine whether the clamping test plate 2 has failed to be clamped based on the clamping failure signal applied from the pusher 2313.

[0133] Furthermore, in cases where the logistics data of the test board 2 is lost in the semiconductor device processing system 1000 due to equipment malfunction or repair, or where the position of the test board 2 is difficult to determine on the transport path TR of the test board 2 within the sorter 200 of the semiconductor device processing system 1000 due to manual handling of the test board 2, the board identification unit 2332 can apply control signals to the sensing unit 2320 and the clamping unit 2310, thereby enabling... Figure 8 The ground scan test board 2 shown is used to determine the clamping area GA.

[0134] During the process of scanning the test board 2 under the control of the board identification unit 2332, such as Figure 9 As shown, the sensing unit 2320 can output an on / off pulse sensing signal PS according to whether the test board 2 is sensing or not.

[0135] For example, although not shown in detail in the accompanying drawings, in addition to the through slots or through holes formed in the clamping region GA, the test plate 2 may also have through holes of various sizes and shapes formed in the mounting region of the semiconductor element 1. Therefore, during the passage of the sensing unit 2320 through the region where the test plate 2 is located, as the sensing signal is repeatedly turned on and off according to the shape of the test plate 2, the overall sensing signal of the test plate 2 can be output as a pulse sensing signal PS including multiple pulse signals.

[0136] here, Figure 9 The pulse sensing signal PS shown is only a signal used to describe one embodiment of this sensing principle. The invention is not limited to this, and various forms of pulse sensing signals PS can be output depending on the shape of the test board 2 positioned on the transmission path TR.

[0137] Therefore, as Figure 9 and Figure 10 As shown, when the test board 2 is positioned on the transmission path TR that has been scanned, the board identification unit 2332 can identify the actual position coordinates of the test board 2 and the outline of the test board 2 based on the pulse sensing signal PS applied from the sensing unit 2320 as raw data, and determine the clamping area GA within the outline of the test board 2.

[0138] For example, the board identification unit 2332 can identify the actual position coordinates and outline of the test board 2 located on the transmission path TR based on the start point SP and end point EP of the pulse sensing signal PS.

[0139] Next, the board recognition unit 2332 can determine the clamping area GA of the test board 2 based on the outline of the recognized test board 2 and the pre-input and stored shape data of the test board 2.

[0140] However, the determination of the clamping area GA of the board recognition unit 2332 is not necessarily limited to the above embodiment, and various methods can be used to determine the clamping area GA of the test board 2 within the outline of the recognized test board 2.

[0141] For example, since the shape and size of the through slot or through hole formed in the clamping area GA of the test board 2 are different from the shape and size of the through hole formed in the mounting area of ​​the semiconductor element 1, resulting in different pulse signals being applied to the area, the board identification unit 2332 can also determine the clamping area GA of the test board 2 based on the pulse width W of the multiple pulse signals included in the pulse sensing signal PS.

[0142] Furthermore, it is evident that the board recognition unit 2332 can also more accurately determine the position of the clamping area GA by utilizing both of the above-mentioned methods for determining the clamping area GA and cross-checking the determined clamping area GA.

[0143] Therefore, as Figure 11 As shown, when the sensing unit 2320 scans the test board 2 under the control of the board recognition unit 2332, the board transfer unit 2331 can apply a control signal to the clamping unit 2310 based on the actual position coordinates of the test board 2 and the outline of the test board 2 identified by the pulse sensing signal PS in the board recognition unit 2332, and the clamping area GA determined based thereon, so that the clamping unit 2310 can move to a clamping position that can clamp the clamping area GA of the test board 2.

[0144] Therefore, according to various embodiments of the present invention, the board transfer device 230 and the semiconductor device processing system 1000 including it can automatically sense the outline of the test board 2 in the semiconductor device processing system 1000 when the clamping unit 2310 fails to clamp the test board 2, or when the logistics data including the logistics position coordinates of the test board 2 is lost in the semiconductor device processing system 1000, or when the test board 2 is moved into or out of the semiconductor device processing system 1000 by the operator's manual operation and the position of the test board 2 to be transferred by the clamping unit 2310 cannot be found in the semiconductor device processing system 1000.

[0145] Therefore, based on the raw data (pulse sensing signal PS) obtained during the scanning process of the test board 2 by the sensing unit 2320, the shape of the test board 2 is virtually derived by the board contour sensing algorithm, and the actual position coordinates of the test board 2 within the semiconductor device processing system 1000 can be determined. At the same time, the clamping area GA of the test board 2 is determined, thereby realizing a board transfer device 230 and a semiconductor device processing system 1000 including the board transfer device 230 that can be guided to clamp the clamping area GA so as to smoothly perform the transfer operation to be performed without causing clamping errors.

[0146] pass Figures 1 to 11 The diagram illustrates and describes a board conveying device 230 disposed in a sorter 200, but embodiments of the present invention are not limited thereto. The board conveying device 230 may also be disposed in at least one of a rack lift 20, a rack stacker 30, a board lift 40, and a board inserter 50, and may also be used for conveying test boards 2 between the sorter 200 and the rack buffer 100 or for conveying test boards 2 within the rack buffer 100.

[0147] Although the invention has been described with reference to embodiments shown in the accompanying drawings, these are merely illustrative, and those skilled in the art will understand that various modifications and equivalent embodiments are possible. Therefore, the true scope of protection of the invention should be determined by the technical concept of the appended claims.

Claims

1. A board conveying device, said board conveying device being capable of clamping and conveying test boards in a semiconductor device processing system, wherein, The semiconductor component handling system includes a sorter and a rack buffer. The sorter is capable of removing semiconductor components loaded on a pallet from the pallet for storage on a test board, or removing semiconductor components that have completed testing from the test board for storage on the pallet. The rack buffer is connected to the sorter and is capable of receiving the test board loaded with the semiconductor components from the sorter for loading onto a rack, or transferring the test board loaded on the rack to the sorter. The plate conveying device includes: A clamping unit that clamps the clamping area of ​​the test board, thereby enabling the transfer of the test board; A sensing unit, disposed in the clamping unit, scans at least a portion of a surface of the test board, thereby enabling sensing of the test board; and The control unit identifies the actual position coordinates of the test board and the outline of the test board based on the sensing signal applied from the sensing unit, and determines the clamping area of ​​the test board, so that the clamping unit can clamp the clamping area of ​​the test board.

2. The plate conveying device according to claim 1, wherein the sorter comprises: Sorter body; A semiconductor component unloading device is formed on one side of the sorter body and removes the tested semiconductor components from the test board received from the rack buffer for unloading onto the tray; and A semiconductor component loading device is formed on the other side of the sorter body and removes the semiconductor component to be tested from another tray to load it onto the empty test board and transfer it to the rack buffer.

3. The board conveying device according to claim 2, wherein the clamping unit is disposed on the sorter body and is slidable between the semiconductor element unloading device and the semiconductor element loading device, thereby conveying the test board in an empty state with all semiconductor elements removed from the first position to the second position.

4. The plate conveying device according to claim 1, wherein the clamping unit comprises: Clamp body; A hook is formed on the upper side of the holder body and has a latch, so that it can be engaged in a latching form with the clamping area formed recessed from one surface of the test board in the form of a slot or a hole, so as to clamp the clamping area of ​​the test board. as well as The pushing part pushes the hook part in the direction toward the test plate, so that the hook can engage with the clamping area.

5. The plate conveying device according to claim 4, wherein the clamping unit further comprises: A guide module is disposed on the main body of the gripper and guides the lifting and sliding movement of the hook portion as it is lifted and lowered by the pusher.

6. The plate conveying device according to claim 4, wherein the hook is formed at at least one of the front and rear ends based on the sliding direction of the gripper body, wherein, The gripper body slides to transfer the test board.

7. The plate conveying device according to claim 4, wherein the sensing unit is disposed on the clamping body to scan a surface of the test plate when the clamping body slides.

8. The board conveying device according to claim 7, wherein the hook portion has a through hole at a position corresponding to the position where the sensing portion is disposed, so that the sensing portion disposed on the holder body can scan the test board.

9. The plate conveying device according to claim 4, wherein the control unit comprises: The plate conveying unit applies a control signal to the clamping unit to control the sliding movement of the clamping unit so that the hook engages with the clamping area of ​​the test plate, enabling the clamping unit to convey the test plate. as well as The board identification unit identifies the actual position coordinates of the test board and the outline of the test board based on the sensing signal applied from the sensing unit, and determines the clamping area within the identified outline of the test board.

10. The board conveying apparatus according to claim 9, wherein the board conveying unit applies a control signal to the clamping unit based on the logistics position coordinates of the test board, which are stored in the form of logistics data of the test board for controlling the logistics of the test board within the semiconductor device processing system, so that the clamping unit can move to a clamping position in which the clamping area of ​​the test board can be clamped.

11. The board conveying apparatus according to claim 10, wherein if the clamping unit fails to clamp the clamping area of ​​the test board, the board identification unit applies a control signal to the sensing unit and the clamping unit to scan the test board so as to determine the clamping area.

12. In the case of loss of the material flow data of the test board in the semiconductor device processing system, or difficulty in determining the position of the test board in the semiconductor device processing system due to manual operation of moving the test board in or out of the semiconductor device processing system, the board identification unit applies a control signal to the sensing unit and the clamping unit to scan the test board so as to determine the clamping area.

13. The board conveying apparatus according to claim 9, wherein the sensing unit outputs an on / off pulse sensing signal according to whether the test board is sensed or not when scanning the test board.

14. The board conveying apparatus according to claim 13, wherein the board identification unit receives the pulse sensing signal from the sensing unit, identifies the actual position coordinates of the test board and the outline of the test board based on the pulse sensing signal, and determines the clamping area within the identified outline of the test board.

15. The board conveying apparatus according to claim 14, wherein the board identification unit identifies the actual position coordinates of the test board and the outline of the test board based on the start and end points of the pulse sensing signal.

16. The board conveying apparatus according to claim 15, wherein the board identification unit determines the clamping area of ​​the test board based on the identified contour of the test board and pre-input and stored shape data of the test board.

17. The board conveying apparatus according to claim 15, wherein the board identification unit determines the clamping area of ​​the test board based on the pulse width of a plurality of pulse signals included in the pulse sensing signal.

18. The board conveying apparatus according to claim 9, wherein when the sensing unit scans the test board, the board conveying unit applies a control signal to the clamping unit based on the actual position coordinates of the test board identified in the board identification unit, the outline of the test board, and the clamping area determined therebased, so that the clamping unit can move to a clamping position capable of clamping the clamping area of ​​the test board.

19. A semiconductor device processing system, comprising: The sorter is capable of removing semiconductor components loaded on a tray from the tray for storage on a test board, or removing semiconductor components that have completed testing from the test board for storage on the tray. A rack buffer, connected to the sorter, is capable of receiving test boards loaded with the semiconductor components from the sorter for loading into a rack, or transferring test boards loaded in the rack to the sorter. The sorting device includes: Sorter body; A semiconductor component unloading device is formed on one side of the sorter body and removes the tested semiconductor component from the test board received from the rack buffer to unload it onto the tray; A board conveying device transports the test board, in an empty state after all the semiconductor components have been removed, from a first position to a second position; and A semiconductor component loading device, formed on the other side of the sorter body, removes the semiconductor components to be tested from another tray, loads them onto the empty test board, and transfers them to the rack buffer. The plate conveying device includes: A clamping unit that clamps the clamping area of ​​the test board, thereby enabling the transfer of the test board; A sensing unit, disposed in the clamping unit, scans at least a portion of a surface of the test board, thereby enabling sensing of the test board; and The control unit identifies the actual position coordinates of the test board and the outline of the test board based on the sensing signal applied from the sensing unit, and determines the clamping area of ​​the test board, so that the clamping unit can clamp the clamping area of ​​the test board.

20. A board conveying device, said board conveying device being capable of clamping and conveying test boards in a semiconductor device processing system, wherein, The semiconductor component handling system includes a sorter and a rack buffer. The sorter is capable of removing semiconductor components loaded on a pallet from the pallet for storage on a test board, or removing semiconductor components that have completed testing from the test board for storage on the pallet. The rack buffer is connected to the sorter and is capable of receiving the test board loaded with the semiconductor components from the sorter for loading onto a rack, or transferring the test board loaded on the rack to the sorter. The sorting device includes: Sorter body; A semiconductor component unloading device is formed on one side of the sorter body and removes the tested semiconductor component from the test board received from the rack buffer to unload it onto the tray; The board conveying device conveys the test board, in an empty state after all the semiconductor components have been removed, from a first position to a second position; and A semiconductor component loading device, formed on the other side of the sorter body, removes the semiconductor components to be tested from another tray, loads them onto the empty test board, and transfers them to the rack buffer. The plate conveying device includes: A gripper unit is disposed on the sorter body and is slidable between the semiconductor component unloading device and the semiconductor component loading device to grip the gripping area of ​​the test board, thereby enabling the transfer of the test board; A sensing unit, disposed in the clamping unit, scans at least a portion of a surface of the test board, thereby enabling sensing of the test board; and The control unit, based on the sensing signal applied from the sensing unit, identifies the actual position coordinates and outline of the test board, and determines the clamping area of ​​the test board, enabling the clamping unit to clamp the test board within the clamping area. The clamping unit includes: Clamp body; A hook portion is formed on the upper side of the holder body, and a latching hook is formed thereon, so that it can engage in a snap-fit ​​manner with the clamping area formed recessed from one surface of the test plate in the form of a slot or a hole, so as to clamp the clamping area of ​​the test plate; and The pushing part pushes the hook part in the direction toward the test plate, so that the hook can engage with the clamping area. The sensing element is disposed on the holder body to scan a surface of the test plate as the holder body slides and moves. The control unit includes: The plate conveying unit applies a control signal to the clamping unit, thereby controlling the sliding movement of the clamping unit so that the hook engages with the clamping area of ​​the test plate, enabling the clamping unit to convey the test plate; and The board identification unit identifies the actual position coordinates of the test board and the outline of the test board based on the sensing signal applied from the sensing unit, and determines the clamping area within the identified outline of the test board. The board transport unit applies a control signal to the clamping unit based on the logistics position coordinates of the test board, which are stored for controlling the logistics of the test board within the semiconductor device processing system. This causes the clamping unit to move to a clamping position capable of clamping the clamping area of ​​the test board. In cases where the clamping unit fails to clamp the test board in the clamping area, or the material flow data of the test board is lost in the semiconductor device processing system, or the position of the test board within the semiconductor device processing system is difficult to determine due to manual handling of the test board being moved in or out of the system, the board identification unit applies a control signal to the sensing unit and the clamping unit to scan the test board to determine the clamping area. When the sensing unit scans the test board, the board conveying unit applies a control signal to the clamping unit based on the actual position coordinates of the test board identified in the board identification unit, the outline of the test board, and the clamping area determined therebased, so that the clamping unit can move to a clamping position that can clamp the clamping area of ​​the test board.

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