Apparatus and method for testing a semiconductor package
TW202630015APending Publication Date: 2026-07-16JCET STATS CHIPPAC KOREA LTD
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Patent Information
- Authority / Receiving Office
- TW · TW
- Patent Type
- Applications
- Current Assignee / Owner
- JCET STATS CHIPPAC KOREA LTD
- Filing Date
- 2025-08-20
- Publication Date
- 2026-07-16
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Abstract
This application provides an apparatus for testing semiconductor packages, comprising: a test board; an adapter socket disposed on and electrically coupled to the test board; a first reference module and a second reference module, each detachably disposed in a reference socket of the adapter socket; and a test socket disposed on the adapter socket. The test socket includes: a socket body having a test socket for housing the semiconductor package, and defining a lower cavity below the test socket, together with the adapter socket, for receiving the first reference module or the second reference module; and a plurality of contact posts extending perpendicularly through the socket body between the test socket and the lower cavity, and movable perpendicularly relative to the socket body.
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