A differential upgrade method, electronic device, storage medium, and program product

Abstract

This application provides a differential upgrade method, an electronic device, a storage medium, and a program product. The method includes: determining an initial differential packet corresponding to the firmware to be updated; dividing the initial differential packet into blocks based on the memory information of the processor corresponding to the firmware to be updated, obtaining multiple single-block data packets; compressing each of the multiple single-block data packets to obtain multiple compressed data packets, and determining the restoration logic corresponding to each compressed data packet; generating a corresponding update data packet based on the multiple compressed data packets and the multiple restoration logic packets, and sending the update data packet to the processor, so that the processor can update and upgrade the firmware to be updated based on the update data packet. This method is applicable to processor devices with various memory sizes and can reduce the computational complexity and resource consumption during the upgrade process, solving the problems of narrow applicability, computational complexity, and high resource consumption of existing differential upgrade methods.

Description

Technical Field

[0001] This application relates to system firmware upgrade technology, and more particularly to a differential upgrade method, electronic device, storage medium, and program product. Background Technology

[0002] With the widespread application of embedded systems, the need for upgrades is becoming increasingly prominent. Embedded software upgrades refer to the process of updating or repairing the software in embedded devices. Traditional software upgrade methods usually involve on-site software programming, which has many limitations, such as requiring the target board and the host to be connected via a programming cable, making on-site upgrades cumbersome and requiring manual intervention.

[0003] Existing technologies commonly employ full-package upgrades and differential upgrades. Differential upgrades compare the new and old programs, generate differential files, and transmit them over the network to the embedded device to recreate the new program. The basic principle is to use a file difference algorithm to generate update packages. These patch files are transmitted to the device over the network, and the device decompresses and applies the differential packages upon receipt, thus completing the upgrade.

[0004] While existing differential upgrades can reduce the amount of downloads, they still suffer from computational complexity and high resource consumption. For resource-constrained embedded devices, they may experience insufficient memory, limiting their applicability and thus affecting the upgrade process. Summary of the Invention

[0005] This application provides a differential upgrade method, electronic device, storage medium, and program product to solve the problems of narrow applicability, computational complexity, and high resource consumption of existing differential upgrade methods.

[0006] In a first aspect, embodiments of this application provide a differential upgrade method applied to a server, comprising:

[0007] Determine the initial differential packet corresponding to the firmware to be updated, wherein the initial differential packet includes: differential data required when the firmware to be updated is upgraded;

[0008] Based on the memory information of the processor corresponding to the firmware to be updated, the initial differential packet is divided into blocks to obtain multiple single data packets;

[0009] Multiple single data packets are compressed to obtain multiple compressed data, and the restoration logic corresponding to each compressed data is determined. The data size of the compressed data is related to the memory information of the processor. The restoration logic is used to indicate the data processing logic to restore the compressed data to the corresponding differential data.

[0010] Based on multiple compressed data and multiple restoration logic, a corresponding update data packet is generated and sent to the processor so that the processor can update and upgrade the firmware to be updated based on the update data packet.

[0011] In one possible implementation, before determining the initial differential packet corresponding to the firmware to be updated, the method further includes:

[0012] Identify and determine the difference data between the update data of the firmware to be updated and the local data, wherein the update data includes: multiple difference data and multiple identical data;

[0013] Determine the byte offset, byte length, and identifier category of multiple sets of differing data and multiple sets of identical data, wherein the identifier category includes: change identifier and identical identifier;

[0014] Based on the byte offset, the byte length, and the identifier category, the corresponding difference data and the same data are encoded respectively, wherein the identifier category of the difference data is a change identifier, and the identifier category of the same data is a same identifier.

[0015] The offset order is determined based on the byte offset, and the encoded differential data and multiple identical data are sequentially packaged according to the offset order to obtain the initial differential packet.

[0016] In one possible implementation, the multiple single data packets are compressed to obtain multiple corresponding compressed data, including:

[0017] The data that appears frequently and / or regularly in multiple single data packets are identified to obtain multiple identification results;

[0018] Based on the multiple identification results, the data compression range corresponding to the multiple single data packets is determined;

[0019] A compression algorithm is used to encode and compress data within multiple data compression ranges to obtain multiple compressed data.

[0020] In one possible implementation, a corresponding update data packet is generated based on the multiple compressed data and multiple restoration logic, including:

[0021] Determine the byte length of multiple single data packets;

[0022] Based on the byte length of multiple single-block data packets, the multiple compressed data, and the multiple restoration logic, multiple single-block compressed data packets are obtained;

[0023] The updated data packet is generated by combining the full single-block compressed data packets, and the updated data packet is identified by a checksum.

[0024] Secondly, embodiments of this application provide a differential upgrade method applied to a processor, comprising:

[0025] Receive update data packets sent by the server and determine the firmware to be updated;

[0026] The updated data packet is read and processed to obtain multiple compressed data, multiple restoration logic, and a checksum;

[0027] Based on the multiple restoration logics, the corresponding compressed data is restored to obtain multiple single data packets. The multiple single data packets are obtained by the server dividing the initial differential packet into blocks according to the memory information of the processor.

[0028] Based on the multiple single data packets, determine multiple different data and multiple identical data within the multiple single data packets;

[0029] Obtain the encoding information corresponding to multiple differential data and multiple identical data, and perform data processing on the multiple differential data and multiple identical data based on the encoding information to obtain multiple target update data;

[0030] Multiple target update data are sequentially written into the firmware to be updated in order to update and upgrade the firmware.

[0031] In one possible implementation, after sequentially writing the plurality of said target update data into the firmware to be updated, the method further includes:

[0032] Perform an upgrade verification based on the verification code to obtain the verification result;

[0033] If the verification result is successful, the firmware upgrade is determined to be successful.

[0034] Thirdly, embodiments of this application provide a differential upgrade device applied to a server, comprising:

[0035] The determination module is used to determine the initial differential packet corresponding to the firmware to be updated. The initial differential packet includes: differential data required when the firmware to be updated is upgraded.

[0036] The processing module is used to divide the initial differential packet into blocks according to the memory information of the processor corresponding to the firmware to be updated, so as to obtain multiple single data packets;

[0037] The processing module is also used to compress the multiple single data packets respectively to obtain the corresponding multiple compressed data;

[0038] The determining module is further configured to determine the restoration logic corresponding to each compressed data, wherein the data size of the compressed data is related to the memory information of the processor, and the restoration logic is used to indicate the data processing logic for restoring the compressed data to the corresponding differential data.

[0039] The generation module is used to generate a corresponding update data package based on multiple compressed data and multiple restoration logic;

[0040] The sending module is used to send the update data packet to the processor, so that the processor can update and upgrade the firmware to be updated based on the update data packet.

[0041] In one possible implementation, the device further includes: an identification module;

[0042] The identification module is used to identify and determine the difference data between the update data of the firmware to be updated and the local data. The update data includes: multiple difference data and multiple identical data.

[0043] The determining module is further configured to determine the byte offset, byte length, and identifier category of the plurality of differing data and the plurality of identical data, wherein the identifier category includes: change identifier and identical identifier;

[0044] The processing module is further configured to encode the corresponding difference data and the same data according to the byte offset, the byte length and the identifier category, respectively, wherein the identifier category of the difference data is a change identifier and the identifier category of the same data is a same identifier;

[0045] The determining module is further configured to determine the offset order based on the byte offset;

[0046] The processing module is further configured to sequentially package the encoded differential data and the multiple identical data according to the offset order to obtain an initial differential packet.

[0047] In one possible implementation, the identification module is further configured to identify high-frequency data and / or regularly occurring data in multiple single data packets to obtain multiple identification results;

[0048] The determining module is further configured to determine the data compression range corresponding to the multiple single data packets based on the multiple identification results;

[0049] The processing module is further configured to use a compression algorithm to encode and compress data within multiple data compression ranges to obtain multiple compressed data.

[0050] In one possible implementation, the determining module is further configured to determine the byte length of multiple single data packets;

[0051] The determining module is further configured to obtain multiple single-block compressed data packets based on the byte length of multiple single-block data packets, multiple compressed data packets, and multiple restoration logic packets;

[0052] The generation module is also used to combine the full single-block compressed data packets to generate the updated data packet;

[0053] The processing module is also used to identify the update data packet using a checksum.

[0054] Fourthly, embodiments of this application provide a differential upgrade device applied to a processor, comprising:

[0055] The receiving module is used to receive update data packets sent by the server and determine the firmware to be updated;

[0056] The processing module is used to read and process the update data packet to obtain multiple compressed data, multiple restoration logic, and a checksum.

[0057] The processing module is further configured to perform data restoration processing on the corresponding compressed data based on the multiple restoration logics to obtain multiple single data packets, wherein the multiple single data packets are obtained by the server dividing the initial differential packet into blocks according to the memory information of the processor;

[0058] The determining module is configured to determine, based on the multiple single data packets, multiple different data and multiple identical data within the multiple single data packets;

[0059] The acquisition module is used to acquire the encoding information corresponding to multiple differential data and multiple identical data;

[0060] The processing module is further configured to perform data processing on multiple differential data and multiple identical data based on the encoding information to obtain multiple target update data;

[0061] The writing module is used to sequentially write multiple target update data into the firmware to be updated, so as to update and upgrade the firmware.

[0062] In one possible implementation, the device further includes: a verification module;

[0063] The verification module is used to perform upgrade verification based on the verification code and obtain the verification result;

[0064] The determining module is further configured to determine that the firmware to be updated has been successfully upgraded if the verification result is that the verification passed.

[0065] Fifthly, embodiments of this application provide a differential upgrade device, including: a memory and a processor;

[0066] The memory stores computer-executed instructions;

[0067] The processor executes computer execution instructions stored in the memory, causing the processor to perform a differential upgrade method as described in the first aspect and / or various possible implementations of the first aspect and the second aspect and / or various possible implementations of the second aspect.

[0068] In a sixth aspect, embodiments of this application provide a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, are used to implement a differential upgrade method as described in the first aspect and / or various possible implementations of the first aspect and the second aspect and / or various possible implementations of the second aspect.

[0069] In a seventh aspect, embodiments of this application provide a computer program product, including a computer program that, when executed by a processor, implements a differential upgrade method as described in the first aspect and / or various possible implementations of the first aspect and the second aspect and / or various possible implementations of the second aspect.

[0070] This application provides a differential upgrade method, electronic device, storage medium, and program product. The method involves: determining an initial differential packet corresponding to the firmware to be updated; dividing the initial differential packet into blocks based on the processor's memory information to obtain multiple single-block data packets; compressing each single-block data packet to obtain multiple compressed data packets and determining the restoration logic for each compressed data packet; generating a corresponding update data packet based on the multiple compressed data packets and the multiple restoration logics; and sending the update data packet to the processor so that the processor can update and upgrade the firmware based on the update data packet. This method divides the update data packet into blocks using the processor's memory information, ensuring that the processing requirements of each single-block data packet meet the processor's needs. This makes it applicable to processor devices with different memory sizes and reduces the computational complexity and resource consumption during the upgrade process, solving the problems of narrow applicability, computational complexity, and high resource consumption in existing differential upgrade methods. Attached Figure Description

[0071] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0072] Figure 1 This application provides a scenario illustration of a differential upgrade method;

[0073] Figure 2 A flowchart illustrating a differential upgrade method provided in this application. Figure 1 ;

[0074] Figure 3 A flowchart illustrating a differential upgrade method provided in this application. Figure 2 ;

[0075] Figure 4 A flowchart illustrating a differential upgrade method provided in this application. Figure 3 ;

[0076] Figure 5 A flowchart illustrating a differential upgrade method provided in this application. Figure 4 ;

[0077] Figure 6 A schematic diagram of the differential upgrade device provided in this application Figure 1 ;

[0078] Figure 7 A schematic diagram of the differential upgrade device provided in this application Figure 2 ;

[0079] Figure 8 This is a structural schematic diagram of a differential upgrade device provided in this application.

[0080] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0081] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0082] The terms "first," "second," "third," "fourth," etc. (if present) in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention described herein can be implemented, for example, in orders other than those illustrated or described herein.

[0083] In this application, the terms "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0084] First, let me explain the terms used in this application:

[0085] Differential upgrade: A differential upgrade is a technique that reduces the amount of data required for an upgrade by downloading and updating only the differing parts of the files. Suitable for embedded systems, differential upgrades are also called incremental upgrades. This involves using a differential algorithm to extract the differences between the source and target versions, creating a differential package, and then using a restoration algorithm on the device to restore the differencing parts to the source version, thus upgrading to the target version.

[0086] Embedded software upgrade refers to the process of updating or repairing the software in an embedded device. Existing technologies commonly use two methods: full package upgrade and differential upgrade. Compared to traditional full upgrades, differential upgrades significantly reduce download time and storage requirements because they only transmit the differences between the new and old versions.

[0087] The basic principle of differential upgrade is to use file difference algorithms to generate update packages. These patch files are transmitted to the device over the network. After receiving the differential package, the device decompresses and applies it to complete the upgrade.

[0088] However, while existing differential upgrades can reduce the amount of downloads, they still suffer from computational complexity and high resource consumption. For resource-constrained embedded devices, they may experience insufficient memory, which limits their applicability and affects the upgrade process.

[0089] Based on the above scenarios, it can be seen that the existing differential upgrade method, which generates a differential file by comparing the new program and the old program, and then transmits it to the embedded device via the network to restore the new program, has technical problems such as narrow applicability, computational complexity, and high resource consumption.

[0090] Figure 1 This is a schematic diagram illustrating a scenario of a differential upgrade method provided in an embodiment of this application. Figure 1 As shown, this application provides a differential upgrade method, the execution entity of which includes a server 1 and a processor 2. The server 1 can be, for example, a physical server or a cloud server, and this application does not impose any restrictions. The processor 2 is an embedded system, and may include multiple firmwares such as firmware a1 and firmware a2. The server 1 generates an initial differential packet and processes the update data packet in blocks according to the memory information of the processor 2, obtaining single-block data packets that match the memory information of the processor 2, so that the processing requirements of the single-block data packets meet the memory requirements of the processor 2. The single-block data packets are then compressed to generate update data packets and sent to the processor 2. The processor 2 receives the update data packets, analyzes and processes them to obtain update data, and updates and upgrades the corresponding firmware, thereby solving the problems of narrow applicability, computational complexity, and high resource consumption of existing differential upgrade methods.

[0091] The technical solution of this application and how the technical solution of this application solves the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will now be described with reference to the accompanying drawings.

[0092] Figure 2 A flowchart illustrating a differential upgrade method provided in this application. Figure 1 .like Figure 2 As shown, a differential upgrade method is applied to a server, and the method includes:

[0093] S101. Determine the initial differential packet corresponding to the firmware to be updated.

[0094] The initial differential packet includes the differential data required for the firmware update and upgrade.

[0095] Understandably, the server can determine the current version of the firmware to be updated in the current processor and specify the target firmware version to upgrade to. After identifying the old and new versions, differential data can be determined using differential tools, such as byte-level differential tools or binary comparison algorithms, for differential data analysis.

[0096] Specifically, all the differential data obtained can be compared and analyzed, and integrated according to a certain format and specifications to generate an initial differential package. In addition to code-level update data, the differential package can also contain corresponding configuration file updates, parameter adjustments, and other content. It can also add necessary identification information, such as the differential package version number and the applicable firmware version range, to facilitate subsequent transmission, verification, and use.

[0097] S102. Based on the memory information of the processor corresponding to the firmware to be updated, the initial differential packet is divided into blocks to obtain multiple single data packets.

[0098] The processor's memory information indicates its memory capacity, available memory space, read / write speed, and data block size limits. The server can obtain these memory-related values ​​through the embedded system's built-in memory management module. This module monitors memory usage in real time and records relevant data locally for later use.

[0099] Understandably, the approximate size of a single data packet can be determined based on the available memory space of the processor. For example, if the embedded system currently has only tens of kilobytes of available memory, the initial differential packet can be divided into single data packets, each around ten kilobytes in size. This ensures that during the update process, after each data packet is transferred to the embedded system's memory, there is sufficient space for temporary storage and subsequent processing, preventing update failure due to insufficient memory. In other words, the size of each single data packet should be determined based on the processor's memory limitations; this size should be less than or equal to the processor's single-processing capability to avoid memory overflow.

[0100] Optionally, identification information, such as packet sequence number, version number of the differential packet to which it belongs, and total number of blocks, can be added to each generated single data packet so that the embedded system can clearly identify and process the order and ownership of these data packets.

[0101] In one possible implementation, for processors that can meet the corresponding resource requirements, the initial differential packet can be divided into blocks of a fixed size and compressed. This implementation can reduce development workload, simplify data processing flow, and make data processing and transmission more standardized through fixed compression sizes, facilitating management and maintenance. This application does not impose any limitations on this approach.

[0102] S103. Compress multiple single data packets separately to obtain multiple compressed data.

[0103] S104. Determine the restoration logic corresponding to each compressed data.

[0104] The size of the compressed data is related to the processor's memory information, and the restoration logic is used to instruct the data processing logic to restore the compressed data to the corresponding differential data.

[0105] Understandably, during the compression of single data packets, compression algorithms can be used to process the packets. Specifically, appropriate compression algorithms can be selected based on data characteristics and processor capabilities, such as Huffman coding, LZW compression, and arithmetic compression. These algorithms ensure that the data can be losslessly restored after compression. Correspondingly, after compression, the resulting compressed data is saved as a new file or data packet format, ensuring that each compressed data packet contains necessary metadata, such as compression algorithm identifiers and data packet numbers, so that it can be correctly identified and processed during restoration.

[0106] At the same time, each compression algorithm has its corresponding inverse operation, which is the decompression logic. In the decompression process, the compressed data is first parsed to identify its compression algorithm and format, and then, depending on the compression algorithm, the corresponding parser and tools are used to read the compressed data.

[0107] It should be noted that after determining the restoration logic, the restored data can be verified and tested. For example, in a simulated embedded system environment, the compressed data can be compressed first, and then decompressed and restored according to the determined restoration logic. The restored data packets can then be compared with the original single data packets to see if they are consistent or meet expectations within an acceptable data error range. Through multiple such tests and adjustments, the accuracy and reliability of the restoration logic can be ensured, thereby guaranteeing the correct processing of data during firmware updates.

[0108] S105. Based on multiple compressed data and multiple restoration logics, generate the corresponding update data package.

[0109] S106. Send the update data packet to the processor.

[0110] Within the update data packet, different areas can be divided to store compressed data and related decompression logic. For example, a dedicated data area can be set up to sequentially store the compressed data corresponding to multiple compressed single data packets, ensuring that the storage order of each compressed data in this area is consistent with the previous block and compression order, facilitating subsequent sequential decompression and processing. Simultaneously, a logic area is set up to store the decompression logic information corresponding to each compressed data. This information can be presented through a specific encoding format or data structure, such as a key-value pair format, where the key is the index number of the compressed data, corresponding to its storage order in the data area, and the value is a specific decompression logic description, such as the name of the compression algorithm used and the corresponding decompression parameters, to clearly associate each compressed data with its decompression logic.

[0111] Understandably, multiple compressed data sets and their corresponding restoration logic can be added to the update data package sequentially, following a predetermined order. During this process, additional metadata can be added to identify the starting position and size of each compressed data set. After the data package is created, the various parts are encapsulated to generate a complete update data package, which is then sent to the processor.

[0112] Specifically, based on the characteristics of the embedded system and its application scenario, an appropriate communication method can be selected to establish the connection between the server and the processor. This could be a wired connection, such as serial communication or Ethernet, or a wireless connection, such as Wi-Fi or Bluetooth. This solution does not impose any restrictions on the specific connection method. Update data packets are sent according to the corresponding transmission protocol based on the established communication connection type.

[0113] Optionally, during the transmission of update data packets, the processor can provide feedback to the server regarding the received data. For example, in TCP / IP-based communication, the processor sends an acknowledgment message to the server after successfully receiving each data packet. The server uses these acknowledgment messages to determine which data packets have been successfully received and which need to be retransmitted. If no acknowledgment message is received for a particular data packet within a certain timeframe, the server can initiate a retransmission mechanism to retransmit the packet until it confirms that the processor has completely received all update data packets.

[0114] This application provides a differential upgrade method that involves determining an initial differential packet corresponding to the firmware to be updated; dividing the initial differential packet into blocks based on the memory information of the processor corresponding to the firmware to be updated, resulting in multiple single-block data packets; compressing each of the multiple single-block data packets to obtain multiple compressed data packets, and determining the restoration logic corresponding to each compressed data packet; generating a corresponding update data packet based on the multiple compressed data packets and the multiple restoration logic packets, and sending the update data packet to the processor so that the processor can update and upgrade the firmware to be updated based on the update data packet. This method divides the update data packet into blocks using the processor's memory information, ensuring that the processing requirements of each single-block data packet meet the processor's needs. This makes it applicable to processor devices with different memory sizes and reduces the computational complexity and resource consumption during the upgrade process, solving the problems of narrow applicability, computational complexity, and high resource consumption in existing differential upgrade methods.

[0115] Figure 3 A flowchart illustrating a differential upgrade method provided in this application. Figure 2 .like Figure 3 As shown, a differential upgrade method is applied to a processor, and the method includes:

[0116] S201. Receive the update data packet sent by the server and determine the firmware to be updated.

[0117] The embedded system containing the processor can open corresponding communication ports to listen for connection requests and data transmissions from the server. For example, if Ethernet communication is used and based on the TCP / IP protocol, the embedded system will listen on the designated port, waiting for the server to initiate a TCP connection and send update data packets. Correspondingly, different communication methods correspond to different port settings and listening mechanisms. When communicating via serial port, it will continuously listen for incoming serial data, preparing to receive it; this will not be elaborated further in this solution.

[0118] Understandably, once the server starts sending update data packets, the embedded system receives the data byte by byte through the established communication link and temporarily stores the received data in a receive buffer. The size of the receive buffer can be reasonably set according to the embedded system's memory resources and the expected amount of data to be received. Furthermore, since the update data packets have already been processed based on the processor's memory information, there will be no issues with the buffer being too small leading to data loss or too large consuming excessive memory resources.

[0119] Specifically, the processor can parse the stored update data packets to extract the firmware update files and related metadata, and determine the firmware to be updated based on the firmware-related identification information contained in the update data packets. During this process, the processor can verify the compatibility of the new firmware, which may include checking whether the new firmware supports the processor's hardware platform, is compatible with other system components, and meets specific security requirements.

[0120] S202. Read and process the update data packet to obtain multiple compressed data, multiple restoration logic, and a checksum.

[0121] Among them, important identification information such as version number, total length, and unique identifier can be read and parsed from the header of the data packet, and relevant information about the check code can be determined, including the type of check algorithm used and the storage location of the check code in the data packet.

[0122] Understandably, the area storing compressed data can be located based on the pre-defined structure and layout of the data packets. Its specific position within the data packet is determined by the recorded starting position identifier or a fixed structural offset. Combined with previously obtained information such as the total length, the size of this area is determined, allowing for accurate extraction of each compressed data item. Simultaneously, the logic area storing the restoration logic is located within the updated data packet. Its position is also determined according to the data packet structure conventions; for example, it may be after the data area or its starting position may be indicated by specific identifier bytes. By finding these identifiers and adhering to the structural layout, the location of the logic area is accurately pinpointed, preparing for reading the restoration logic.

[0123] Optionally, based on the information obtained regarding the location of the checksum and the checksum algorithm used, the processor can accurately extract the checksum from the corresponding position in the data packet. For example, if the CRC32 checksum algorithm is used and the checksum is known to be stored in the last 4 bytes of the data packet, the processor reads 4 bytes from the end of the receive buffer backwards to obtain the CRC32 checksum, which is then compared with the self-calculated checksum to verify the integrity of the data packet.

[0124] S203. Based on multiple restoration logics, perform data restoration processing on the corresponding compressed data to obtain multiple single data packets.

[0125] Among them, multiple single data packets are obtained by the server dividing the initial differential packet into blocks according to the processor's memory information. That is, the corresponding compressed data is restored according to multiple restoration logics, and the restored single data block is the set data block size.

[0126] Understandably, it's crucial to ensure a clear one-to-one correspondence between multiple compressed data sets and their corresponding restoration logic. For instance, when reading update data packets, they are already stored in the embedded system's memory in a specific order. Data structures such as arrays or linked lists can be used to store the compressed data and their corresponding restoration logic information separately. The processor iterates through these two sets of data, ensuring that each compressed data set is accurately associated with its corresponding restoration logic. Data compressed using the corresponding compression algorithm is then restored according to the corresponding restoration logic and algorithm flow to obtain the uncompressed single data packet.

[0127] S204. Based on multiple single data packets, determine multiple different data and multiple identical data within the multiple single data packets.

[0128] Among them, the identification category for differing data is change identifier, and the identification category for identical data is same identifier. The data type can be determined based on the different data identifier information.

[0129] S205. Obtain the encoding information corresponding to multiple differential data and multiple identical data.

[0130] The data encoding information may include, for example, data length, data offset information, and change method.

[0131] S206. Based on the encoding information, perform data processing on multiple differential data and multiple identical data to obtain multiple target update data.

[0132] The difference data can include: changed data and added data.

[0133] It is understandable that different processing methods are used for different data types. For example, for the same data, the target firmware data can be generated by reading the source firmware in the device based on the data offset and data length; for added data, new firmware data can be generated based on the data offset, data length and added data; for changed data, the source firmware data can be read from the device based on the data offset and data length, and the changed data can be superimposed to generate new firmware data.

[0134] S207. Write the update data of multiple targets into the firmware to be updated in sequence.

[0135] Specifically, the data is written sequentially according to the determined offset order of multiple target updates.

[0136] Understandably, the data order can be related to the logic and functional implementation of firmware updates. For example, code update data for certain functional modules must be written before their corresponding configuration parameter update data to ensure that the firmware can correctly load and run the new functions after the update. The processor can start from the first target update data and write it byte by byte to the corresponding address location in the firmware storage area. This address location can be determined based on a pre-defined update scheme or relevant location information carried in the update data packet.

[0137] In one possible implementation, an upgrade verification is performed based on the verification code to obtain a verification result; if the verification result is successful, it is determined that the firmware to be updated has been successfully upgraded.

[0138] The processor can extract previously saved checksums from its own storage area or related data structures. For example, checksums used to verify the integrity of update data packets when receiving them, and checksums recalculated after the target update data is written to the firmware to be updated, to confirm the accuracy of the written data, serve as the basis for subsequent verification and comparison.

[0139] Understandably, the extracted local verification code is compared with the expected verification code. If they match perfectly, it initially indicates that the data processing during the firmware update process is accurate, and there is a high probability that the upgrade verification will pass. However, further confirmation can be made by considering other aspects. If they do not match, it likely indicates that data errors or loss occurred during the update data packet reception, data restoration, or firmware writing stages, and the verification result will most likely be a failure.

[0140] Optionally, the total byte length of the target update data can be compared with the byte length of the original update data packet to determine whether there are any byte losses or duplicates during the update process.

[0141] After the above verification, comparison, and comprehensive judgment, if the checksum matches and no obvious anomalies are found that would affect the upgrade result, the verification result can be determined as successful, thus confirming that the firmware upgrade was successful. At this point, the processor can make corresponding markings within the embedded system, such as updating the system's firmware version status record, updating the current firmware version number to the latest upgraded version, and sending a notification of successful upgrade to other relevant modules of the system, enabling the entire embedded system to operate normally according to the updated firmware. In addition, the processor can also send a feedback message of successful upgrade to the server, informing the server that the firmware update has been successfully completed, facilitating subsequent management and statistical work on the server side.

[0142] This application provides a differential upgrade method that uses a compression algorithm to compress data into blocks based on the target processing memory size, reducing the resource consumption of the target device and supporting processors with smaller memory resources. At the same time, the differential parts are encrypted and verified. After the upgrade is completed, a checksum is used to monitor the upgrade process, ensuring the security and correctness of the upgrade data and improving the reliability of the software upgrade.

[0143] Figure 4 A flowchart illustrating a differential upgrade method provided in this application. Figure 3 .like Figure 4 As shown, in this embodiment... Figure 1 Based on the examples, the process of generating the initial differential packet is described in detail. The method includes:

[0144] S301. Identify and determine the difference between the update data of the firmware to be updated and the local data.

[0145] Among them, the differences between the old and new firmware data can be distinguished into identical data and different data.

[0146] Understandably, the server first needs to extract the complete data of the firmware to be updated from its storage system and obtain the local firmware data currently being used by the corresponding device, i.e., the old firmware data. Data comparison methods, such as feature hashing or byte-by-byte comparison, are not limited in this application. During the comparison process, appropriate data structures can be set up in the server's memory to record the comparison results. For example, a two-dimensional array or linked list can be created to mark which positions in the new and old firmware data are different and which are the same.

[0147] In one possible implementation, for processors with poor current network environment or limited storage capacity, only different data can be processed during the data processing stage, while the same data can be left unprocessed. This reduces the amount of data transmitted and processed, saves network bandwidth and device storage resources, and enables more effective upgrades when the network environment is poor or the storage capacity is limited. This application does not limit this implementation.

[0148] S302. Determine the byte offset, byte length, and identifier category for multiple different data and multiple identical data.

[0149] Understandably, after completing all comparison operations, based on the recorded data structure, the portions marked as differing data are summarized and organized. This allows us to determine the specific location and byte length of the differing data in the old and new firmware, and to ascertain the overall content of this differing data, forming a complete differential data set. This differential data is the key difference between the firmware to be updated and the local old firmware. Subsequent operations such as generating differential packets can be performed based on this data to achieve differential firmware upgrades.

[0150] Specifically, for each piece of data in the old and new firmware, whether it's differing or identical data, its byte offset within the entire firmware data needs to be determined. The byte offset represents the number of bytes that piece of data is relative to the beginning of the firmware data, obtained by counting from the start of the firmware data. For example, if a piece of data starts at byte 100 in the firmware file, then its byte offset is 100. When determining the byte offset, it's crucial to ensure accurate counting, which can be achieved through byte-by-byte traversal or by accurately obtaining positional information recorded during previous data comparison and analysis.

[0151] Calculate the byte length of each segment of data that needs to be encoded, which is the number of bytes contained in that segment. This can be done by counting bytes from the beginning of the data segment to the end. For example, if a segment of difference data starts at byte offset 100 and ends at the 200th byte, its byte length is 100 (200-100) bytes. Accurate byte length information is essential for subsequent complete data processing and recognition, ensuring that no data loss or misinterpretation occurs during encoding and decoding.

[0152] S303. Based on the byte offset, byte length, and identifier category, encode the corresponding difference data and the same data respectively.

[0153] Determining the byte offset, byte length, and identifier category allows for the encoding of the corresponding data and the addition of identification information to facilitate subsequent upgrades and identification. Specifically, the identifier category is defined according to established rules. For differing data, its identifier category is set to "Change Identifier" to highlight that this data has changed during the firmware update; while for identical data, its identifier category is set to "Identity Identifier," indicating that this is the part that has not changed between the old and new firmware.

[0154] Understandably, the difference data may also include: added data, reduced data, and changed data. Different data types correspond to different byte changes. Reduced data can be considered no longer processed, so it does not need to be encoded. In subsequent upgrades, it can be directly replaced by the changed data with the corresponding byte order.

[0155] Specifically, a general and easy-to-parse encoding format can be chosen, such as binary encoding or a custom simple text encoding format. Taking binary encoding as an example, data can be organized in memory using data structures such as structures, and then converted into a continuous binary byte stream for storage and transmission according to a certain byte order. If a text encoding format is used, relevant parameters, such as byte offset, byte length, and identifier category, can be converted into strings using specific character separators and format conventions, making them easy to view and perform simple manual analysis.

[0156] Optionally, specific encoding rules can be defined to specify how to integrate byte offsets, byte lengths, identifier categories, and corresponding data content into the encoded result. For example, in binary encoding, it can be stipulated that the byte offset is first stored in a fixed number of bytes (e.g., 4 bytes), then the byte length is stored in a fixed number of bytes, and then one byte is used to represent the identifier category. For example, specific values ​​can be used to represent different identifiers, such as 0 representing "same identifier" and 1 representing "change identifier". Finally, the corresponding data content is arranged sequentially according to byte order. In this way, the original data and related parameter information can be accurately restored during decoding according to the same order and rules.

[0157] S304. Determine the offset order based on the byte offset.

[0158] The obtained byte offsets can be used to obtain the corresponding offset order through a sorting algorithm.

[0159] S305. Pack the encoded differential data and multiple identical data in sequence according to the offset order to obtain the initial differential packet.

[0160] Specifically, data can be extracted one by one from the acquired encoded data according to the offset order and sequentially filled into the middle data area of ​​the initial differential packet. For example, the first encoded difference data or identical data arranged in offset order can be extracted first, and its complete encoded byte stream can be copied sequentially to the middle area of ​​the differential packet. Then, the second encoded data can be extracted and the same operation can be performed. This process is repeated until all encoded data has been filled into the differential packet.

[0161] This application provides a differential upgrade method that acquires and identifies the differential data between the old and new data packets, encodes it according to the offset order, and encrypts the difference portion to ensure the security and correctness of the upgrade data, thereby improving the reliability of the software upgrade.

[0162] In one possible implementation, for devices with sufficient resources, in order to meet the needs of rapid development in some cases, the firmware can be directly upgraded through the preliminary differential packets generated in steps S301-S305, reducing the compression steps in the upgrade process and making the upgrade process simpler. The specific transmission and upgrade process will not be described in detail here.

[0163] Figure 5 A flowchart illustrating a differential upgrade method provided in this application. Figure 4 .like Figure 5 As shown, in this embodiment... Figure 1 Based on the embodiments, a differential upgrade method is described in detail, which includes:

[0164] S401. Determine the initial differential packet corresponding to the firmware to be updated.

[0165] S402. Based on the memory information of the processor corresponding to the firmware to be updated, the initial differential packet is divided into blocks to obtain multiple single data packets.

[0166] Steps S401-S402 are similar to steps S101-S102 described above, and will not be repeated here.

[0167] S403. Identify high-frequency and / or regularly occurring data in multiple single data packets to obtain multiple identification results.

[0168] S404. Based on multiple identification results, determine the data compression range corresponding to multiple single data packets.

[0169] This approach allows for byte-by-byte statistical analysis of the entire single data packet, recording the frequency of each byte value. For example, a data structure, such as a dictionary or array, can be created to store byte values ​​and their corresponding frequencies; the specific approach depends on the programming language and application scenario, and this solution does not impose any restrictions. Furthermore, regular expressions or custom pattern matching algorithms can be used to find data exhibiting patterns.

[0170] Understandably, detailed information about the frequently occurring and regularly occurring data can be recorded and organized, including their specific content, such as byte values, byte fragments, and text patterns; their location, i.e., the starting byte offset in a single data packet; and their frequency or regularity, such as how many bytes they appear every.

[0171] Specifically, based on the identified high-frequency and regular data patterns, we analyze which regions of single data packets are suitable for compression. In other words, regions containing a large amount of frequently occurring data or data with obvious patterns are potential compressible areas. For example, if the same few bytes frequently appear in a continuous byte sequence, then this region can be considered for compression; or if we find that the data related to several functional modules exhibits a fixed pattern of repetition, then the range of data corresponding to these functional modules can also be considered part of the compression range.

[0172] S405. A compression algorithm is used to encode and compress data within multiple data compression ranges to obtain multiple compressed data.

[0173] S406. Determine the restoration logic corresponding to each compressed data.

[0174] The appropriate compression algorithm can be selected based on the type and characteristics of the data; this will not be elaborated upon here. The corresponding data restoration logic is then determined based on the selected compression algorithm.

[0175] Specifically, high-frequency or regular data within a single data block can be encoded and compressed into dictionary data using a compression algorithm. When the target processor has sufficient memory, the dictionary data of the entire data packet exhibits low repetition and high compression. When the target processor has limited memory, the size of a single data block is reduced to ensure the compressed data can be executed normally on the target processor. Simultaneously, the logic for restoring the compressed dictionary data can be used as the compression logic data.

[0176] S407. Determine the byte length of multiple single data packets.

[0177] S408. Based on the byte length of multiple single-block data packets, multiple compressed data, and multiple restoration logic, multiple single-block compressed data packets are obtained.

[0178] This involves comparing information such as packet identifiers, sequence numbers, or timestamps, and matching compressed data with original packets based on the byte length of each individual packet block, to ensure that each compressed data block is correctly aligned with its corresponding individual packet block.

[0179] Understandably, for each single compressed data packet, its structural framework can be defined by three parts: header information, compressed data, and decompression logic.

[0180] Specifically, header information can be added to the header of a single compressed data packet to include key identifying information such as the packet sequence number, byte length identifier, and compression algorithm identifier. Following the constructed structural framework, the information from each part is sequentially integrated to generate a complete single compressed data packet. For example, the header information is filled first, followed immediately by the compressed data portion, and finally, the restoration logic information is added to form a complete compressed data packet entity.

[0181] S409. Combine the full single-block compressed data packets to generate differential data packets, and use checksums to identify the updated data packets.

[0182] By integrating all the single-block data compressed packages, differential data packages can be obtained. At this time, the single-block data in the differential data packages can meet the memory requirements of the target processor, thereby reducing the resource consumption of the device.

[0183] Understandably, a suitable verification algorithm, such as MD5, SHA-1, or SHA-256, can be chosen and applied to the content of the differential data packets to generate a fixed-length checksum. This checksum is then added to the end of the differential data packets or embedded in the metadata. By using the checksum for effective identification, data integrity is guaranteed and necessary identification information is provided for the subsequent transmission and reception of differential data packets, as well as their use in firmware updates, facilitating accurate and error-free related work.

[0184] S410, Send the update data packet to the processor.

[0185] Step S410 is similar to step S106 above, and will not be described again here.

[0186] The differential upgrade method provided in this application uses a compression algorithm to compress data into blocks according to the target processor's memory size, so that it can meet the memory size of the target processor. This makes it applicable to various processor devices with different memory sizes, reduces the computational complexity and resource consumption during the upgrade process, improves the speed and efficiency of the upgrade, and greatly reduces the network bandwidth and storage space required for the upgrade.

[0187] Figure 6 A schematic diagram of the differential upgrade device provided in this application Figure 1 .like Figure 6 As shown, this embodiment provides a differential upgrade device 500, applied to a server. The device includes:

[0188] The determination module 501 is used to determine the initial differential packet corresponding to the firmware to be updated. The initial differential packet includes: differential data required when the firmware to be updated is upgraded.

[0189] The processing module 502 is used to divide the initial differential packet into blocks according to the memory information of the processor corresponding to the firmware to be updated, so as to obtain multiple single data packets;

[0190] The processing module 502 is also used to compress multiple single data packets separately to obtain multiple compressed data.

[0191] The determination module 501 is also used to determine the restoration logic corresponding to each compressed data, wherein the data size of the compressed data is related to the memory information of the processor, and the restoration logic is used to indicate the data processing logic to restore the compressed data to the corresponding differential data.

[0192] The generation module 503 is used to generate corresponding update data packets based on multiple compressed data and multiple restoration logic;

[0193] The sending module 504 is used to send the update data packet to the processor so that the processor can update and upgrade the firmware to be updated based on the update data packet.

[0194] In one possible implementation, the device further includes: an identification module 505;

[0195] The identification module 505 is used to identify and determine the difference data between the update data of the firmware to be updated and the local data. The update data includes: multiple difference data and multiple identical data.

[0196] The determination module 501 is also used to determine the byte offset, byte length and identifier category of multiple different data and multiple identical data, the identifier category including: change identifier and identical identifier;

[0197] The processing module 502 is also used to encode the corresponding difference data and the same data according to the byte offset, byte length and identifier category respectively, wherein the identifier category of the difference data is a change identifier and the identifier category of the same data is a same identifier;

[0198] The determination module 501 is also used to determine the offset order based on the byte offset;

[0199] The processing module 502 is also used to sequentially pack the encoded differential data and multiple identical data according to the offset order to obtain the initial differential packet.

[0200] In one possible implementation, the identification module 505 is further configured to identify high-frequency data and / or regularly occurring data in multiple single data packets to obtain multiple identification results;

[0201] The determining module 501 is also used to determine the data compression range corresponding to multiple single data packets based on multiple identification results;

[0202] The processing module 502 is also used to encode and compress data in multiple data compression ranges using a compression algorithm to obtain multiple compressed data.

[0203] In one possible implementation, the determining module 501 is further configured to determine the byte length of multiple single data packets;

[0204] The determining module 501 is also used to obtain multiple single-block compressed data packets based on the byte length of multiple single-block data packets, multiple compressed data, and multiple decompression logic;

[0205] The generation module 503 is also used to combine the full single-block compressed data packets to generate an update data packet;

[0206] The processing module 502 is also used to identify the update data packet using a checksum.

[0207] Figure 7 A schematic diagram of the differential upgrade device provided in this application Figure 2 .like Figure 7 As shown, this embodiment provides a differential upgrade device 600, applied to a processor. The device includes:

[0208] The receiving module 601 is used to receive update data packets sent by the server and determine the firmware to be updated;

[0209] Processing module 602 is used to read and process the update data packet to obtain multiple compressed data, multiple restoration logic, and a checksum;

[0210] The processing module 602 is also used to perform data restoration processing on the corresponding compressed data based on multiple restoration logics to obtain multiple single data packets. The multiple single data packets are obtained by the server dividing the initial differential packet into blocks according to the processor's memory information.

[0211] The determination module 603 is used to determine multiple different data and multiple identical data within multiple single data packets based on multiple single data packets;

[0212] The acquisition module 604 is used to acquire the encoding information corresponding to multiple differential data and multiple identical data;

[0213] The processing module 602 is also used to perform data processing on multiple differential data and multiple identical data based on the encoding information to obtain multiple target update data;

[0214] The writing module 605 is used to sequentially write multiple target update data into the firmware to be updated, so as to update and upgrade the firmware.

[0215] In one possible implementation, the device further includes: a verification module 606;

[0216] The verification module 506 is used to perform upgrade verification based on the verification code and obtain the verification result.

[0217] The determination module 501 is also used to determine that the firmware upgrade was successful if the verification result is successful.

[0218] The differential upgrade device provided in this embodiment can execute the method provided in the above method embodiment. Its implementation principle and technical effect are similar, and will not be described in detail here.

[0219] Figure 8 This is a schematic diagram of a differential upgrade device provided in this application. Figure 8As shown, the electronic device 700 provided in this embodiment includes at least one processor 701 and a memory 702. Optionally, the device 700 further includes a communication component 703. The processor 701, memory 702, and communication component 703 are connected via a bus 704.

[0220] In a specific implementation, at least one processor 701 executes computer execution instructions stored in memory 702, causing at least one processor 701 to perform the above-described method.

[0221] The specific implementation process of processor 701 can be found in the above method embodiments, and its implementation principle and technical effect are similar. It will not be repeated here.

[0222] In the above embodiments, it should be understood that the processor can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), etc. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in this invention can be directly implemented by a hardware processor, or implemented by a combination of hardware and software modules within the processor.

[0223] The memory may include random access memory (RAM) and may also include non-volatile memory (NVM), such as at least one disk storage device.

[0224] The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. Buses can be categorized as address buses, data buses, control buses, etc. For ease of illustration, the buses shown in the accompanying drawings are not limited to a single bus or a single type of bus.

[0225] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the above-described method.

[0226] This application also provides a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, implement the above-described method.

[0227] The aforementioned readable storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk. The readable storage medium can be any available medium accessible to a general-purpose or special-purpose computer.

[0228] An exemplary readable storage medium is coupled to a processor, enabling the processor to read information from and write information to the readable storage medium. Of course, the readable storage medium can also be a component of the processor. The processor and the readable storage medium can reside in an Application Specific Integrated Circuit (ASIC). Alternatively, the processor and the readable storage medium can exist as discrete components in the device.

[0229] The division of units is merely a logical functional division; in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be indirect coupling or communication connection through some interfaces, devices, or units, and may be electrical, mechanical, or other forms.

[0230] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0231] In addition, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0232] If a function is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0233] Those skilled in the art will understand that all or part of the steps of the above-described method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When executed, the program performs the steps of the above-described method embodiments; and the aforementioned storage medium includes various media capable of storing program code, such as ROM, RAM, magnetic disks, or optical disks.

[0234] Finally, it should be noted that other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This invention is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein, and is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of the invention is limited only by the appended claims.

Claims

1. A differential upgrade method, characterized in that, Applied to a server, the method includes: Determine the initial differential packet corresponding to the firmware to be updated, wherein the initial differential packet includes: differential data required when the firmware to be updated is upgraded; Based on the memory information of the processor corresponding to the firmware to be updated, the initial differential packet is divided into blocks to obtain multiple single data packets; Multiple single data packets are compressed to obtain multiple compressed data, and the restoration logic corresponding to each compressed data is determined. The data size of the compressed data is related to the memory information of the processor. The restoration logic is used to indicate the data processing logic to restore the compressed data to the corresponding differential data. Based on multiple compressed data and multiple restoration logic, a corresponding update data packet is generated and sent to the processor so that the processor can update and upgrade the firmware to be updated based on the update data packet.

2. The method according to claim 1, characterized in that, Before determining the initial differential packet corresponding to the firmware to be updated, the method further includes: Identify and determine the difference data between the update data of the firmware to be updated and the local data, wherein the update data includes: multiple difference data and multiple identical data; Determine the byte offset, byte length, and identifier category of multiple sets of differing data and multiple sets of identical data, wherein the identifier category includes: change identifier and identical identifier; Based on the byte offset, the byte length, and the identifier category, the corresponding difference data and the same data are encoded respectively, wherein the identifier category of the difference data is a change identifier, and the identifier category of the same data is a same identifier. The offset order is determined based on the byte offset, and the encoded differential data and multiple identical data are sequentially packaged according to the offset order to obtain the initial differential packet.

3. The method according to claim 1, characterized in that, The step of compressing multiple single data packets to obtain multiple corresponding compressed data includes: The data that appears frequently and / or regularly in multiple single data packets are identified to obtain multiple identification results; Based on the multiple identification results, the data compression range corresponding to the multiple single data packets is determined; A compression algorithm is used to encode and compress data within multiple data compression ranges to obtain multiple compressed data.

4. The method according to claim 1, characterized in that, The step of generating a corresponding update data packet based on multiple compressed data sets and multiple restoration logic sets includes: Determine the byte length of multiple single data packets; Based on the byte length of multiple single-block data packets, the multiple compressed data, and the multiple restoration logic, multiple single-block compressed data packets are obtained; The updated data packet is generated by combining the full single-block compressed data packets, and the updated data packet is identified by a checksum.

5. A differential upgrade method, characterized in that, Applied to a processor, the method includes: Receive update data packets sent by the server and determine the firmware to be updated; The updated data packet is read and processed to obtain multiple compressed data, multiple restoration logic, and a checksum; Based on the multiple restoration logics, the corresponding compressed data is restored to obtain multiple single data packets. The multiple single data packets are obtained by the server dividing the initial differential packet into blocks according to the memory information of the processor. Based on the multiple single data packets, determine multiple different data and multiple identical data within the multiple single data packets; Obtain the encoding information corresponding to multiple differential data and multiple identical data, and perform data processing on the multiple differential data and multiple identical data based on the encoding information to obtain multiple target update data; Multiple target update data are sequentially written into the firmware to be updated in order to update and upgrade the firmware.

6. The method according to claim 5, characterized in that, After sequentially writing the multiple target update data into the firmware to be updated, the method further includes: Perform an upgrade verification based on the verification code to obtain the verification result; If the verification result is successful, the firmware upgrade is determined to be successful.

7. A differential upgrade device, characterized in that, Applied to servers, including: The determination module is used to determine the initial differential packet corresponding to the firmware to be updated. The initial differential packet includes: differential data required when the firmware to be updated is upgraded. The processing module is used to divide the initial differential packet into blocks according to the memory information of the processor corresponding to the firmware to be updated, so as to obtain multiple single data packets; The processing module is also used to compress the multiple single data packets respectively to obtain the corresponding multiple compressed data; The determining module is further configured to determine the restoration logic corresponding to each compressed data, wherein the data size of the compressed data is related to the memory information of the processor, and the restoration logic is used to indicate the data processing logic for restoring the compressed data to the corresponding differential data. The generation module is used to generate a corresponding update data package based on multiple compressed data and multiple restoration logic; The sending module is used to send the update data packet to the processor, so that the processor can update and upgrade the firmware to be updated based on the update data packet.

8. A differential upgrade device, characterized in that, include: Memory, processor; The memory stores computer-executed instructions; The processor executes computer execution instructions stored in the memory, causing the processor to perform the method as described in any one of claims 1-6.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions, which, when executed by a processor, are used to implement the method as described in any one of claims 1-6.

10. A computer program product, characterized in that, Includes a computer program that, when executed by a processor, implements the method described in any one of claims 1-6.

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