A server and device hot plug management method
By setting control logic devices and signal switches on the server motherboard and using the configuration identification daughter card to send characteristic signal groups, selective establishment and isolation of the management link between the two motherboards can be achieved, which solves the problem of management link conflict between the two motherboards and improves the stability and reliability of the system.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- INSPUR SUZHOU INTELLIGENT TECH CO LTD
- Filing Date
- 2026-05-29
- Publication Date
- 2026-06-30
AI Technical Summary
In dual-socket motherboard servers, the lack of a unified and clear control boundary and configuration mechanism leads to cumbersome management link configuration, unclear ownership of permissions, and easy management conflicts, affecting system stability and scalability.
Control logic devices and signal switches are respectively set on the first and second motherboards of the server. By configuring the identification sub-card to send characteristic signal groups, the control logic devices identify the target configuration mode according to the signal groups and control the on/off state of the repeaters and signal switches to achieve selective establishment and isolation of management links.
By coordinating control at the hardware level, conflicts caused by simultaneous management of multiple terminals are avoided, improving system stability and reliability, simplifying the management link switching process, and enhancing compatibility and maintainability under different configuration scenarios.
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Figure CN122309426A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of server hardware system technology, and in particular to a method for hot-swappable management of servers and devices. Background Technology
[0002] Single-socket and dual-socket motherboards differ significantly in processor configuration, resource organization, and management mechanisms. Dual-socket motherboards, in particular, host two processors simultaneously and involve cross-processor interconnection and resource coordination, often requiring additional interconnect planning, resource enumeration and allocation, and management control path coordination at both the hardware and firmware levels. To accommodate different platform configurations and expansion needs, the motherboard typically needs to reserve more dedicated circuits, control interfaces, and configuration mechanisms, leading to increased design complexity, longer verification cycles, and higher costs. Furthermore, when switching between different operating modes or resource management strategies, the lack of a unified and clear control boundary and configuration mechanism can easily result in cumbersome management link configuration, unclear permission ownership, and potential contention risks, thus affecting system stability and scalability. Summary of the Invention
[0003] Therefore, it is necessary to provide a server and device hot-swap management method that can achieve hot-swap management control switching in different working scenarios and avoid conflicts caused by simultaneous management from multiple terminals, in order to address the above-mentioned technical problems.
[0004] In a first aspect, a server is provided, the server comprising: a first motherboard, a second motherboard, and a configuration identification sub-card; The first motherboard is provided with: a first control logic device, a first repeater and a first signal switch, wherein the first repeater is connected to the first control logic device and the first signal switch respectively; The second motherboard is equipped with: a second control logic device, a second repeater, and a second signal switch, wherein the second repeater is connected to the second control logic device and the second signal switch respectively; The configuration identification sub-card is electrically connected to the first control logic device and the second control logic device respectively, and is used to identify the current server configuration information and send characteristic signal groups to the first control logic device and the second control logic device respectively according to the configuration information; The first control logic device is used to identify the target configuration mode corresponding to the server based on the feature signal group, and control the on / off state of the first repeater and the first signal switch according to the target configuration mode. The second control logic device is used to identify the target configuration mode corresponding to the server based on the feature signal group, and control the on / off state of the second repeater and the second signal switch according to the target configuration mode.
[0005] Secondly, a device hot-swap management method, applied to the aforementioned server, includes: In response to the server being powered on, the configuration identification sub-card identifies the current server's configuration information and sends characteristic signal groups to the first control logic device and the second control logic device respectively according to the server's configuration information; In response to the first control logic device and the second control logic device respectively receiving the feature signal group, the target configuration mode corresponding to the server is identified based on the feature signal group; The first control logic device and the second control logic device determine the corresponding first control instruction and second control instruction respectively based on the target configuration mode. The first control logic device controls the first target control object corresponding to the first motherboard to perform on / off control according to the first control instruction; The second control logic device controls the second target control object corresponding to the second motherboard to perform on / off control according to the second control instruction. In response to the target control object completing the on / off control and the processor receiving a configuration completion indication, the processor performs hot-plug management processing in the current target configuration mode.
[0006] By implementing the above-described server and device hot-swappable management method, control logic devices are respectively set on the first and second motherboards. A configuration identification daughter card sends characteristic signal groups to the control logic devices on both sides, enabling them to coordinately control the on / off states of repeaters and signal switches based on these characteristic signal groups. This allows for selective establishment and isolation of relevant management signal paths during server power-on, plugging / unplugging, or operation. The characteristic signal groups output by the configuration identification daughter card provide consistent and discriminable configuration criteria for the control logic devices on both sides. Based on this, the control logic devices synchronously or according to predetermined logic enable / disable the corresponding repeaters and signal switches, ensuring that the target management link is only connected when the configuration conditions are met, and remains disconnected when the conditions are not met or there is a risk of conflict. The controlled on / off and isolation capabilities of the repeaters ensure that the processor-side bus remains effectively isolated from sensitive devices on its side even under abnormal loads, bus contention, or plugging / unplugging transients on the cross-board or peripheral side. The controlled on / off of the signal switches further enables controllable selection of target paths, avoiding erroneous access and interference caused by unauthorized or mismatched connections. Attached Figure Description
[0007] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0008] Figure 1 A structural diagram of a server provided in an embodiment of this application; Figure 2 A flowchart illustrating a device hot-swap management method provided in this application embodiment; Figure 3 This is a timing diagram of a device hot-swap management method provided in an embodiment of this application. Detailed Implementation
[0009] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.
[0010] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or processing system that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or processing system. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.
[0011] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0012] In one embodiment, such as Figure 1 As shown, a server is provided, which includes: a first motherboard, a second motherboard, and a configuration identification sub-card; The first motherboard is provided with: a first control logic device, a first repeater and a first signal switch, wherein the first repeater is connected to the first control logic device and the first signal switch respectively; The second motherboard is equipped with: a second control logic device, a second repeater, and a second signal switch, wherein the second repeater is connected to the second control logic device and the second signal switch respectively; The configuration identification sub-card is electrically connected to the first control logic device and the second control logic device respectively, and is used to identify the current server configuration information and send characteristic signal groups to the first control logic device and the second control logic device respectively according to the configuration information; The first control logic device is used to identify the target configuration mode corresponding to the server based on the feature signal group, and control the on / off state of the first repeater and the first signal switch according to the target configuration mode. The second control logic device is used to identify the target configuration mode corresponding to the server based on the feature signal group, and control the on / off state of the second repeater and the second signal switch according to the target configuration mode.
[0013] Among them, the first repeater and the second repeater are devices used to transfer, equalize or retime signals to improve the quality of high-speed signal transmission; the first signal switch and the second signal switch are switching devices used to physically control the on and off of the signal path; the feature signal group is a set of signals output by the configuration identification sub-card, used to characterize the server configuration and to provide control logic devices with a basis for determining control strategies.
[0014] Specifically, by setting independently operating control logic devices on the first and second motherboards respectively, and introducing a configuration identification sub-card to send characteristic signal groups to the control logic devices on both sides, the server can automatically identify and control the paths on both sides in hardware: when the server powers on or detects the status of the configuration identification sub-card, the configuration identification sub-card sends the corresponding characteristic signal groups to the first and second control logic devices respectively. The control logic devices on both sides output control signals according to the characteristic signal groups, and control the on / off status of the first repeater, the first signal switch, the second repeater, and the second signal switch on their respective sides, so that the target signal path is only connected under matching configuration conditions, and remains disconnected when there is a mismatch or a risk of conflict. Since the repeaters and signal switches are both in a controlled on / off state, the repeaters can isolate and buffer related signals before and after the link is established, suppressing the impact of transient abnormal loads from plugging and unplugging on the processor side and board-level devices. The signal switches are used to select and disconnect the path, avoiding bus contention, misaccess, or interference caused by connections that should not be established. Therefore, the server can automatically establish and isolate cross-board related links based on the configuration identification results, achieving consistent path control without the need for manual jumpers or complex software intervention. This improves compatibility and maintainability under different configurations, reduces the probability of failures caused by misconnection, contention, or abnormal states, and thus enhances the overall stability and reliability of the system.
[0015] In one embodiment, such as Figure 1 As shown, the first motherboard includes: a first processor, a first multiplexer, and a first high-speed connector; the second motherboard includes: a second processor, a second multiplexer, and a second high-speed connector. The first processor is electrically connected to the first multiplexer via the first repeater, and the first multiplexer is electrically connected to the first high-speed connector via the first signal switch. The second processor is electrically connected to the second multiplexer via the second repeater, and the second multiplexer is electrically connected to the second high-speed connector via the second signal switch. The first signal switch is electrically connected to the second multiplexer, and the second signal switch is electrically connected to the first multiplexer to form a cross-connection signal path between the first motherboard and the second motherboard.
[0016] Among them, high-speed connectors are connectors used to realize high-speed signal transmission and high-speed interconnection between boards / external devices; multiplexers are devices used to select among multiple signal paths and output selected channel signals.
[0017] Specifically, the signal on the first processor side is first electrically connected to the first multiplexer via the first repeater, and then the first multiplexer is electrically connected to the first high-speed connector via the first signal switch; the signal on the second processor side is electrically connected to the second multiplexer via the second repeater, and then the second multiplexer is electrically connected to the second high-speed connector via the second signal switch. Based on this, by electrically connecting the first signal switch to the second multiplexer and the second signal switch to the first multiplexer, a cross-connection path is formed between the two motherboards. When the control logic device performs on / off control on the repeater and signal switch on its side according to the configuration identification result, the corresponding cross-board high-speed interconnection link can be established or disconnected as needed: the multiplexer is used to select and switch between predetermined multiple signals, the signal switch is used to select and isolate cross-board links, and the repeater is used to provide buffering and isolation capabilities before and after link establishment. This allows cross-board interconnections to be automatically and controllably established under different configurations, avoiding link contention, misconnection, or interference caused by mismatched connections.
[0018] In one embodiment, such as Figure 2 As shown, a device hot-swap management method, applied to a server, includes: S100: In response to the server being powered on, the configuration identification sub-card identifies the current server's configuration information and sends characteristic signal groups to the first control logic device and the second control logic device respectively according to the server's configuration information. S200: In response to the first control logic device and the second control logic device respectively receiving the feature signal group, the target configuration mode corresponding to the server is identified based on the feature signal group; S300: The first control logic device and the second control logic device determine the corresponding first control instruction and second control instruction respectively based on the target configuration mode; S400: The first control logic device controls the first target control object corresponding to the first motherboard to perform on / off control according to the first control instruction; S500: The second control logic device controls the second target control object corresponding to the second motherboard to perform on / off control according to the second control instruction; S600: In response to the target control object completing the on / off control and the processor receiving a configuration completion indication, the processor performs hot-plug management processing in the current target configuration mode.
[0019] The configuration information is a set of parameters characterizing the current server assembly / board combination / link connection configuration; the target configuration mode is a configuration configuration determined by the first and second control logic devices based on the characteristic signal group, indicating which motherboard should currently manage the link or what link connection relationship should be adopted; the control instruction is a set of control signals generated and output by the control logic device after determining the target configuration mode, used to drive the corresponding hardware device to perform on / off actions; the target control object is a set of hardware objects driven by the control instruction and actually completing the link connection / isolation; the hot-swap management processing is the processor's management actions such as access, arbitration, status monitoring, permission switching, and exception handling for the hot-swap related management links under the effective target configuration mode.
[0020] Specifically, after the server powers on, the configuration identification card first identifies the current configuration information and sends a set of characteristic signals to the first and second control logic devices. Based on this, the two control logic devices identify the target configuration mode and then generate corresponding first and second control commands, respectively. These commands control the target control objects on their respective motherboards to complete the on / off control, ensuring that the side that should carry the management link is connected while the other side is disconnected or isolated, preventing conflicts caused by both processors simultaneously accessing the same management link. After the target control object completes the on / off process, the processor receives a configuration completion indication and then performs hot-swap management processing under the effective target configuration mode. This reduces manual configuration and rewiring, improves adaptability to different configuration scenarios, and enhances the reliability and consistency of the management link switching process.
[0021] In one embodiment, such as Figure 3 As shown, the feature signal group includes: a first feature signal and a second feature signal. In response to the first control logic device and the second control logic device respectively receiving the feature signal group, the target configuration mode corresponding to the server is identified based on the feature signal group, including: In response to detecting that both the first feature signal and the second feature signal are in the first state, the target configuration mode is determined to be the first configuration mode; In response to detecting that at least one of the first feature signal and the second feature signal is in the second state, and that the states of the first feature signal and the second feature signal are different, the target configuration mode is determined to be the second configuration mode.
[0022] Among them, the first feature signal and the second feature signal are two configuration discrimination signals output by the configuration identification sub-card, which are used to jointly characterize the current configuration of the server; the first state and the second state are two preset level or logic values used to represent the value of the feature signal, which are used to distinguish different configuration meanings; the first configuration mode and the second configuration mode are two target configuration modes determined according to the combination relationship between the first feature signal and the second feature signal, which are used to guide which hardware connection mode to adopt for subsequent link connection and disconnection control.
[0023] Specifically, when the first and second control logic devices receive a group of feature signals containing a first feature signal and a second feature signal, they first detect and compare the states of the two signals. If both the first and second feature signals are detected as being in the first state, the target configuration mode is determined as the first configuration mode, ensuring consistent judgment of the subsequent control strategies by the control logic on both sides. This facilitates the connection and isolation of the corresponding link under this mode. If at least one of the first and second feature signals is detected as being in the second state and the two states are different, the target configuration mode is determined as the second configuration mode. By introducing the difference judgment between the two signals, another hardware form is distinguished, thereby triggering different on / off control strategies. This mode determination using the combination relationship of the two feature signals enables reliable differentiation of different configuration forms with fewer signals, reduces the probability of misjudgment, and ensures consistent recognition of the configuration mode by the control logic devices on both sides. This improves the stability of subsequent hot-swappable management link switching and reduces the risk of conflict.
[0024] In one embodiment, determining the target configuration mode as the second configuration mode in response to detecting that at least one of the first feature signal and the second feature signal is in the second state, and that the states of the first feature signal and the second feature signal are different, includes: In response to detecting that the first feature signal is in the first state and the second feature signal is in the second state, it is determined that in the second configuration mode, the first motherboard is the master motherboard and the second motherboard is the slave motherboard. In response to detecting that the first feature signal is in the second state and the second feature signal is in the first state, it is determined that in the second configuration mode, the second motherboard is the master motherboard and the first motherboard is the slave motherboard.
[0025] Among them, the main control motherboard refers to the motherboard that assumes the management control of hot-swapping in the current configuration mode and provides management links or management functions to the outside world; the slave motherboard refers to the motherboard that does not assume management control in the current configuration mode, and its management link is isolated or controlled by the main control motherboard.
[0026] Specifically, when the first and second control logic devices detect that the states of the first and second characteristic signals are different, and at least one of them is in the second state, they enter the detailed determination process of the second configuration mode. The master-slave relationship is determined by mapping the specific combinations of the two signals: if the first characteristic signal is in the first state and the second characteristic signal is in the second state, then the first motherboard is determined to be the master motherboard and the second motherboard to be the slave motherboard; if the first characteristic signal is in the second state and the second characteristic signal is in the first state, then the second motherboard is determined to be the master motherboard and the first motherboard to be the slave motherboard. The effect of this is that the master-slave relationship can be directly and clearly determined through the mutually exclusive combination of the two characteristic signals, ensuring consistency in the judgment of the master control object by the control logic devices on both sides. This allows for targeted connection of the master-side management link and isolation of the slave-side management link in subsequent on / off control, reducing contention and conflict risks, and improving the certainty and reliability of control switching under different hardware configurations.
[0027] In one embodiment, the first target control object includes a first repeater and a first signal switch, and the second target control object includes a second repeater and a second signal switch. The first control logic device, according to a first control instruction, controls the first target control object corresponding to the first motherboard to perform on / off control, including: In response to the target configuration mode being the first configuration mode, the first logic controller turns on the first repeater and turns off the first signal switch, and the second logic controller turns off the second repeater and the second signal switch.
[0028] Specifically, when the target configuration mode is identified as the first configuration mode, the first control logic device activates the first repeater and deactivates the first signal switch according to the first control instruction, enabling the management link on the first motherboard side to be effectively enabled on the permitted path. Simultaneously, the deactivation of the first signal switch isolates unnecessary paths. In conjunction with this, the second control logic device deactivates the second repeater and the second signal switch, disabling and isolating the relevant links on the second motherboard side. By performing complementary on-off control of the devices on both sides in the first configuration mode, a clear link enable boundary can be formed at the hardware level, avoiding conflicts or crosstalk caused by both links being available simultaneously. Furthermore, a stable and deterministic link connection relationship is established before the processor enters the hot-swap management process, thereby improving the reliability and consistency of hot-swap management.
[0029] In one embodiment, the second control logic device controls the second target control object corresponding to the second motherboard to perform on / off control according to the second control instruction, including: In response to the target configuration mode being the second configuration mode, and the first motherboard being the master motherboard and the second motherboard being the slave motherboard, the first control logic device turns on the first repeater and turns on the first signal switch, and the second control logic device turns on the second repeater and turns off the second signal switch.
[0030] The second control instruction is a set of control signals generated by the second control logic device after recognizing the target configuration mode, which is used to drive the second repeater and the second signal switch on the second motherboard side to perform conduction or isolation actions; the second target control object is the combination of devices on the second motherboard side that participate in the on / off control, including the second repeater and the second signal switch.
[0031] Specifically, when the target configuration mode is the second configuration mode and the first motherboard is determined to be the master control motherboard and the second motherboard to be the slave motherboard, the control logic devices on both sides coordinate to perform on / off control according to the same master-slave conclusion: the first control logic device turns on the first repeater and turns on the first signal switch, so that the management link on the first motherboard side is fully enabled in terms of both signal driving capability and path connectivity, thereby ensuring that the master control side can stably and completely establish the effective channel required for hot-swap management; at the same time, the second control logic device turns on the second repeater but turns off the second signal switch, so that the second motherboard side maintains the necessary link electrical readiness and signal shaping capability, but isolates the key path at the physical level to prevent the slave side from forming an effective access path parallel to the master control side. By combining full enable on the master side, partial enable on the slave side, and isolation of critical paths, this control ensures the master motherboard's exclusive and deterministic control over the management link, reducing the risks of conflicts, bus contention, or inconsistent states caused by simultaneous access on both sides. On the other hand, it preserves the basic link capabilities of the slave side, reduces transient disturbances during switching, improves link stability and recovery speed, and ensures that the processor faces a hardware environment that has converged to a single effective management path when it subsequently enters hot-swappable management processing.
[0032] In one embodiment, the second control logic device controls the second target control object corresponding to the second motherboard to perform on / off control according to the second control instruction, including: In response to the target configuration mode being the second configuration mode, with the second motherboard as the master motherboard and the first motherboard as the slave motherboard, the second control logic device turns on the second repeater and turns on the second signal switch, while the first control logic device turns on the first repeater and turns off the first signal switch.
[0033] Specifically, when the target configuration mode is the second configuration mode and the second motherboard is determined to be the master control motherboard and the first motherboard to be the slave motherboard, the control logic devices on both sides work together to complete the on / off control according to the second control command. Specifically, the second control logic device turns on the second repeater and turns on the second signal switch, so that the management link on the second motherboard side is enabled in both signal driving and path connectivity, ensuring that the master control side can stably establish and maintain the effective management channel required for hot-swap management; at the same time, the first control logic device turns on the first repeater but turns off the first signal switch, so that the first motherboard side maintains basic link electrical readiness and signal processing capabilities, but forms physical isolation on critical paths, avoiding the slave side from forming an effective access path parallel to the master control side. Through this control combination of full master control side enablement and slave side critical path isolation, the only effective bearer of the management link can be clearly identified at the hardware level, reducing the risk of contention, conflict and state inconsistency caused by simultaneous access on both sides; at the same time, the basic link capabilities of the slave side are preserved, which helps to reduce the impact of switching transients on signal stability, and allows the link to converge to a stable and controllable working state more quickly.
[0034] In one embodiment, in response to the target controlled object completing on / off control and the processor receiving a configuration completion indication, the processor performs hot-plug management processing in the current target configuration mode, including: In response to the first control logic device and / or the second control logic device completing the on / off control of the corresponding target control object, a configuration completion indication containing the control result is generated and sent to the corresponding processor respectively; In response to the processor receiving a configuration completion indication, a consistency check is performed on the configuration completion indication, and the target configuration mode is confirmed to match the on / off control result based on the check result. In response to the successful consistency check, the processor loads the hot-plug management parameters corresponding to the target configuration mode and starts the hot-plug management process. In response to a failure of the consistency check, the processor outputs an alarm message and prohibits entry into hot-plug management processing or switches to the preset security policy.
[0035] Among them, the control result refers to the target configuration mode determination conclusion and the actual execution status information of the corresponding on / off control, including at least the on / off status of each repeater and signal switch, including status bits such as execution success, fault, and timeout; consistency verification is the process by which the processor performs a matching verification on the received configuration completion indication to confirm that the target configuration mode and the on / off control result meet the expected rules; hot-plug management parameters are a set of configuration data that the processor needs to load to perform hot-plug management processing under different target configuration modes, such as link selection, master / slave permissions, monitoring policies, anomaly handling and recovery thresholds, etc.; preset security policies are a set of protective policies adopted by the processor when consistency verification fails, used to limit the spread of risks, such as maintaining the isolation of critical links, prohibiting the execution of plugging and unplugging actions, entering a monitoring-only mode, or triggering alarms and controlled retry.
[0036] Specifically, after the target controlled object completes the on / off control, the control logic device generates and sends a configuration completion indication containing the control result, enabling the processor to make a judgment based on the actual execution state, avoiding premature entry into hot-plug management before the link is stable or the device does not act as expected. After receiving the configuration completion indication, the processor performs a consistency check, matching and confirming the current target configuration mode with the on / off control result according to the rules. If the check passes, the corresponding hot-plug management parameters are loaded and hot-plug management processing is started, thereby ensuring that the software-side management strategy is consistent with the hardware-side connectivity, reducing problems such as master-slave contention, erroneous takeover, and misjudgment of plug-in / plug-out status, and improving the timing determinism and consistency of hot-plug processing. If the check fails, an alarm is output and entry into hot-plug management processing is prohibited or switched to a preset safety policy, blocking control actions that may produce strong side effects in the early stages of an anomaly and reducing the probability of fault propagation.
[0037] In one embodiment, the processor performs hot-plug management processing in the current target configuration mode, including: The hot-swap management scope and hot-swap management path are determined based on the target configuration mode, and hot-swap event detection and hot-swap control are performed on the device based on the hot-swap management scope and hot-swap management path.
[0038] Among them, hot-swap event detection refers to the process by which the processor identifies and confirms events such as insertion, removal, changes in in-situ status, and changes in power supply status based on the management scope and management path; hot-swap control refers to the process by which the processor performs control actions such as allowing access, isolating and disconnecting, powering on and off, resetting, and resource mounting and releasing on the target device after event confirmation; hot-swap management scope refers to the set of devices and their boundaries that need to be included in hot-swap monitoring and control under the current target configuration mode, including which slots, boards, ports, or functional modules are manageable objects.
[0039] Specifically, when the processor initiates hot-swap management processing in the current target configuration mode, it first converges the managed objects and paths of the system according to the target configuration mode to determine the hot-swap management scope and hot-swap management path. This ensures that subsequent detection and control only apply to devices that should be managed in this mode, and completes access and control along the only valid management path in this mode. This avoids false alarms caused by including devices that do not belong to the current mode in the monitoring, and also avoids conflicts or invalid actions caused by issuing control along unexpected paths. On this basis, the processor continuously detects the device's on-site status, link status, and power supply status according to the determined management scope, and confirms and debouncing event information in conjunction with the management path. It ensures that the plug-in / plug-out event is stably identified before entering the control phase. Subsequently, the processor continues to execute the corresponding hot-swap control process for the target device along the predetermined management path, making resource allocation, power-on timing, and isolation actions consistent with the link topology in the current mode. This further improves the determinism and consistency of the plug-in / plug-out processing, reduces the probability of false control, duplicate control, and cross-path contention, and improves the stability and maintainability of the plug-in / plug-out process.
[0040] In one embodiment, the configuration completion indication further includes at least one of the following: a configuration round identifier and a timestamp, and the method further includes: In response to the processor performing a consistency check on the configuration completion indication, the processor also checks whether the configuration round identifiers received by the first processor and the second processor are consistent and whether the timestamp is within a preset valid time window. In response to inconsistent configuration round identifiers or failure to receive any configuration completion indication after timeout, the processor triggers on / off control to retry and re-receive the configuration completion indication; If a retry fails, the system switches to the default security policy and outputs an alarm message.
[0041] The configuration round identifier is a number used to mark which process the current configuration identification and on / off control belongs to, used to distinguish configuration completion indications generated by different power-on, reset, or reconfiguration processes, and to avoid old indications being mistaken for the current result; the timestamp is the time information corresponding to when the configuration completion indication is generated; the preset valid time window is the fresh time range within which the processor recognizes the configuration completion indication as valid, and if it exceeds the time window, it is judged as expired and unreliable; the security policy is a controlled protection mode that is entered when configuration consistency cannot be confirmed or retry fails, used to keep the link in a low-risk and controllable state, such as keeping critical paths disabled or isolated, prohibiting entry into the hot-plug management process, and outputting alarm information.
[0042] Specifically, after the on / off control is completed, the control logic device carries the configuration round identifier and timestamp when generating the configuration completion indication. During the consistency verification phase, the processor simultaneously checks whether the round identifiers received by the processors on both sides are consistent and determines whether the timestamp falls within the preset valid time window. This ensures that both sides reach a consensus on the configuration result of the same round and that the result is still valid, reducing the risk of misjudgment caused by out-of-order, delay, or old indication residue. When the round is inconsistent or no configuration completion indication is received within the time limit, the processor triggers the on / off control to retry and re-receive the configuration completion indication, enabling the configuration process to have error correction and convergence capabilities. If the retry fails, a safety policy is entered and an alarm is triggered to prevent the system from continuing to enter hot-plug management when the configuration is uncertain or the state is untrustworthy, thereby improving system stability and security.
[0043] In one embodiment, the method further includes: In response to the first control logic device and / or the second control logic device, the on / off control of the corresponding target control object is completed, the status feedback signal of the corresponding target control object is obtained, and a readback result is generated. The first control logic device and / or the second control logic device encapsulate the readback result and the control result in a configuration completion indication and send it to the corresponding processor; In response to the processor's configuration completion indication, a consistency check is performed, and the control result is checked to see if it is consistent with the readback result. In response to the inconsistency between the control result and the readback result, the processor prohibits entering the hot-plug management process and switches to the preset security policy.
[0044] Among them, the status feedback signal is the feedback information output by the target controlled object to characterize its actual on / off state; the readback result is the reading result of the actual state of the target controlled object obtained by the control logic device based on the status feedback signal, which is used to reflect the actual opening and closing status of the device; the control result is the execution result information formed by the control logic device after performing on / off control on the target controlled object. Specifically, after the control logic device completes the on / off control of the target controlled object, it further acquires the status feedback signal of the target controlled object and generates a readback result. Then, the readback result and the control result are encapsulated together into a configuration completion indication and sent to the processor. When the processor performs consistency verification on the configuration completion indication, it also checks whether the control result and the readback result are consistent. This ensures that the actual on / off state is confirmed before entering hot-plug management, reducing the risk of misjudgment caused by device non-deployment, sticking, or abnormality due to relying solely on the control execution state. Once the control result and the readback result are found to be inconsistent, the processor directly prohibits entering hot-plug management and switches to a preset security policy, fixing the system in a controllable and secure state. This avoids link conflicts or business risks caused by executing hot-plug related controls when the actual connectivity state is uncertain.
[0045] The above provides a detailed description of a server and device hot-swappable management method provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only intended to help understand the method and core ideas of this application. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of this application.
Claims
1. A server, characterized in that, The server includes: a first motherboard, a second motherboard, and a configuration identification sub-card; The first motherboard is provided with: a first control logic device, a first repeater and a first signal switch, wherein the first repeater is connected to the first control logic device and the first signal switch respectively; The second motherboard is provided with: a second control logic device, a second repeater and a second signal switch, wherein the second repeater is connected to the second control logic device and the second signal switch respectively; The configuration identification sub-card is electrically connected to the first control logic device and the second control logic device respectively, and is used to identify the current configuration information of the server, and send feature signal groups to the first control logic device and the second control logic device respectively according to the configuration information; The first control logic device is used to identify the target configuration mode corresponding to the server based on the feature signal group, and control the on / off state of the first repeater and the first signal switch according to the target configuration mode. The second control logic device is used to identify the target configuration mode corresponding to the server based on the feature signal group, and control the on / off state of the second repeater and the second signal switch according to the target configuration mode.
2. A server according to claim 1, characterized in that, include: The first motherboard further includes: a first processor, a first multiplexer, and a first high-speed connector; the second motherboard further includes: a second processor, a second multiplexer, and a second high-speed connector. The first processor is electrically connected to the first multiplexer via the first repeater, and the first multiplexer is electrically connected to the first high-speed connector via the first signal switch. The second processor is electrically connected to the second multiplexer via the second repeater, and the second multiplexer is electrically connected to the second high-speed connector via the second signal switch; The first signal switch is electrically connected to the second multiplexer, and the second signal switch is electrically connected to the first multiplexer to form a cross-connection signal path between the first motherboard and the second motherboard.
3. A device hot-swap management method, applied to a server as described in any one of claims 1-2, characterized in that, include: In response to the server being powered on, the configuration identification sub-card identifies the current configuration information of the server and sends characteristic signal groups to the first control logic device and the second control logic device respectively according to the configuration information of the server. In response to the first control logic device and the second control logic device respectively receiving the feature signal group, the target configuration mode corresponding to the server is identified based on the feature signal group; The first control logic device and the second control logic device respectively determine the corresponding first control instruction and second control instruction based on the target configuration mode; The first control logic device controls the first target control object corresponding to the first motherboard to perform on / off control according to the first control instruction; The second control logic device controls the second target control object corresponding to the second motherboard to perform on / off control according to the second control instruction; In response to the target control object completing the on / off control and the processor receiving a configuration completion indication, the processor performs hot-plug management processing in the current target configuration mode.
4. The device hot-swap management method according to claim 3, characterized in that, The feature signal group includes: a first feature signal and a second feature signal. The step of identifying the target configuration mode corresponding to the server based on the feature signal group, in response to the first control logic device and the second control logic device respectively receiving the feature signal group, includes: In response to detecting that both the first feature signal and the second feature signal are in the first state, the target configuration mode is determined to be the first configuration mode; In response to detecting that at least one of the first feature signal and the second feature signal is in the second state, and that the states of the first feature signal and the second feature signal are different, the target configuration mode is determined to be the second configuration mode.
5. The device hot-swap management method according to claim 4, characterized in that, The step of determining the target configuration mode as the second configuration mode in response to detecting that at least one of the first feature signal and the second feature signal is in the second state, and that the states of the first feature signal and the second feature signal are different, includes: In response to detecting that the first feature signal is in a first state and the second feature signal is in a second state, it is determined that in the second configuration mode, the first motherboard is the main control motherboard and the second motherboard is the slave motherboard. In response to detecting that the first feature signal is in the second state and the second feature signal is in the first state, it is determined that in the second configuration mode, the second motherboard is the master motherboard and the first motherboard is the slave motherboard.
6. The device hot-swap management method according to claim 4, characterized in that, The first target control object includes a first repeater and a first signal switch; the second target control object includes a second repeater and a second signal switch; the first control logic device, according to the first control instruction, controls the first target control object corresponding to the first motherboard to perform on / off control, including: In response to the target configuration mode being the first configuration mode, the first control logic device turns on the first repeater and turns off the first signal switch, and the second control logic device turns off the second repeater and the second signal switch.
7. The device hot-swap management method according to claim 5, characterized in that, The second control logic device, according to the second control instruction, controls the second target control object corresponding to the second motherboard to perform on / off control, including: In response to the target configuration mode being the second configuration mode, and the first motherboard being the master motherboard and the second motherboard being the slave motherboard, the first control logic device turns on the first repeater and turns on the first signal switch, and the second control logic device turns on the second repeater and turns off the second signal switch.
8. The device hot-swap management method according to claim 5, characterized in that, The second control logic device, according to the second control instruction, controls the second target control object corresponding to the second motherboard to perform on / off control, including: In response to the target configuration mode being the second configuration mode, the second motherboard is the master control motherboard and the first motherboard is the slave motherboard. The second control logic device turns on the second repeater and turns on the second signal switch, while the first control logic device turns on the first repeater and turns off the first signal switch.
9. A device hot-swap management method according to claim 3, characterized in that, In response to the target controlled object completing on / off control and the processor receiving a configuration completion indication, the processor performs hot-plug management processing in the current target configuration mode, including: In response to the first control logic device and / or the second control logic device completing the on / off control of the corresponding target control object, a configuration completion indication containing the control result is generated and sent to the corresponding processor respectively; In response to the processor receiving the configuration completion indication, a consistency check is performed on the configuration completion indication, and the target configuration mode is confirmed to match the on / off control result based on the check result. In response to the successful consistency check, the processor loads the hot-plug management parameters corresponding to the target configuration mode and starts the hot-plug management process. In response to a failure of the consistency check, the processor outputs an alarm message and prohibits entry into hot-plug management processing or switches to a preset security policy.
10. A device hot-swap management method according to claim 9, characterized in that, The processor performs hot-plug management processing in the current target configuration mode, including: The hot-swap management scope and hot-swap management path are determined according to the target configuration mode, and hot-swap event detection and hot-swap control are performed on the device based on the hot-swap management scope and hot-swap management path.