Heterogeneous wafer bonding method and heterogeneous wafer
By depositing a thin film with a low coefficient of thermal expansion in a heterogeneous wafer, wafer deformation is controlled and bonding interface stress is reduced, thus solving the debonding and fragmentation problems of heterogeneous wafers during high-temperature annealing and achieving higher bonding force and stability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- LANSUS TECH INC
- Filing Date
- 2026-06-05
- Publication Date
- 2026-08-04
AI Technical Summary
Existing heterogeneous wafer bonding methods are prone to excessive interfacial stress due to differences in thermal expansion coefficients during high-temperature annealing, leading to debonding or breakage, which makes it difficult to meet subsequent processing requirements.
A thin film with a lower coefficient of thermal expansion is deposited in a heterogeneous wafer. By actively controlling the wafer deformation during annealing, the stress at the bonding interface is reduced. The compressive stress generated by the thin film causes the wafer to bend and deform, thereby improving the bonding force.
Increasing the annealing temperature enhances bonding strength without debonding or fragmentation, thus ensuring wafer stability and performance optimization.
Smart Images
Figure CN122341077B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor technology, and particularly to a heterogeneous wafer bonding method and a heterogeneous wafer. Background Technology
[0002] Heterocrystalline wafer bonding has become an important direction in semiconductor development and has been widely used in fields such as radio frequency and optoelectronics. Existing heterocrystalline wafer bonding mainly uses plasma-activated bonding, which can be carried out in atmospheric or low-vacuum environments, and requires subsequent low-temperature annealing (annealing temperature <400℃).
[0003] Plasma-activated bonding utilizes plasma (common process gases are O2 and N2) to activate (irradiate) the wafer surface, thereby enhancing surface energy and improving material adhesion. Its main mechanisms include: (1) cleaning surface impurities and increasing contact area to promote bonding; (2) changing surface chemical properties and introducing active groups to increase bonding strength.
[0004] With the development of plasma processing technology, in addition to Si / Si homomaterial bonding, bonding of various other heteromaterials, such as Si / SiO2, Si / SiN, Si / GaAs, Si / GaN, Si / SiC, Si / LiNbO3, and Si / LiTaO3, has been achieved.
[0005] Bonding refers to the process of tightly bonding the surfaces of two or more wafers of different materials (heterogeneous) or the same material (homogeneous) through physical, chemical, or physical-chemical methods, and forming a stable atomic / molecular connection under specific conditions (temperature, pressure, plasma activation, annealing, etc.), ultimately making multiple wafers into a single structure with synergistic functions (such as electrical conduction, thermal conduction, mechanical support, etc.). In related technologies, during the annealing process after heterogeneous wafer bonding, as the temperature increases, wafers with a larger coefficient of thermal expansion expand more, while wafers with a smaller coefficient of thermal expansion expand less. If the stress at the bonding interface exceeds the bonding force, it will lead to debonding; if the interface stress does not exceed the bonding force, and the deformation of the wafer is too small to release sufficient stress, the bonded wafer may break. Due to the large difference in the coefficient of thermal expansion, heterogeneous wafers can only be annealed at relatively low temperatures (below 150°C) after bonding. At this temperature, the increase in bonding force is limited and cannot meet the requirements of subsequent processing. If the temperature is increased further, the bonded wafers may debond or break.
[0006] Therefore, there is an urgent need for a new heterogeneous wafer bonding method and heterogeneous wafers to solve the above-mentioned technical problems. Summary of the Invention
[0007] This invention provides a heterogeneous wafer bonding method and a heterogeneous wafer, aiming to reduce the stress at the bonding interface by actively controlling wafer deformation. By using a thin film to induce bending deformation of the wafer at the bonding surface during annealing, the interface stress is reduced. The annealing temperature is increased to obtain higher bonding force while ensuring that the wafer does not debond or break.
[0008] In a first aspect, the present invention provides a heterogeneous wafer bonding method, the heterogeneous wafer bonding method comprising the following steps:
[0009] S1. Obtain a heterogeneous first wafer and a second wafer, and clean the surfaces of the first wafer and the second wafer; S2. The first wafer and the second wafer after cleaning are spun dry, and the bonding surfaces of the first wafer and the second wafer are activated by plasma bombardment. S3. Perform pure water mega-acoustic cleaning on the first and second wafers after bombardment activation; S4. Bond the first wafer and the second wafer after pure water mega-sonic cleaning to obtain a preliminary bonded wafer; Specifically, a thin film is deposited on the side of the first wafer away from the bonding surface before step S1, or the thin film is deposited on the side of the first wafer away from the bonding surface in the preliminary bonding wafer after step S4. The coefficient of thermal expansion of the first wafer is defined as N1, the coefficient of thermal expansion of the second wafer is defined as N2, and the coefficient of thermal expansion of the thin film is defined as N3, which satisfies the following condition: N2 > N1 > N3; S5. The preliminary bonded wafer after the film deposition is subjected to heat annealing treatment to obtain a bonded wafer.
[0010] Preferably, the thin film is made of either silicon oxide or silicon nitride.
[0011] Preferably, the thickness of the thin film is adjusted according to the coefficient of thermal expansion, elastic modulus, Poisson's ratio and thickness of the first wafer and the second wafer, and satisfies the condition that the stress on the bonding surface of the first wafer and the second wafer is minimized at the highest annealing temperature.
[0012] Preferably, prior to step S1, a thin film is deposited on the side of the first wafer away from the bonding surface, the thin film being formed by chemical vapor deposition.
[0013] Preferably, after step S4, a thin film is deposited on the side of the first wafer away from the bonding surface in the preliminary bonding wafer, and the thin film is formed by physical vapor deposition.
[0014] Preferably, the thickness of the film is 0.5-5 μm.
[0015] Preferably, the thickness of the second wafer is 100~350μm.
[0016] Preferably, in step S5, the temperature during the initial bonding wafer heating and annealing process is less than 250°C.
[0017] In a second aspect, the present invention also provides a heterogeneous wafer, wherein the heterogeneous wafer includes the heterogeneous wafer bonding method as described in any of the above embodiments.
[0018] Compared with existing technologies, this invention deposits a thin film with a lower or negative coefficient of thermal expansion on the side of the first wafer away from the bonding surface. During the heating and annealing process after heterogeneous wafer bonding, this thin film can actively generate compressive stress on the surface of the first wafer opposite the bonding surface, causing bending deformation of the bonding surface between the first and second wafers. This reduces the stress at the bonding interface, preventing bonding failure and fragmentation. By actively controlling the deformation of the first and second wafers, the interface stress during the annealing process after heterogeneous wafer bonding is reduced, resulting in a more stable and higher-performance heterogeneous wafer after bonding. Attached Figure Description
[0019] The present invention will now be described in detail with reference to the accompanying drawings. The above and other aspects of the present invention will become clearer and more readily understood through the detailed description following the accompanying drawings. In the drawings: Figure 1 This is a flowchart of the heterogeneous wafer bonding method provided in the embodiments of the present invention; Figure 2 This is a schematic diagram of the structure of the initially bonded wafer during the heating and annealing process of the heterogeneous wafer bonding method provided in this embodiment of the invention; Figure 3 This is a schematic diagram of the structure of the bonding wafer in the heterogeneous wafer bonding method provided in this embodiment of the invention; Detailed Implementation To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.
[0020] Example 1 Please refer to Figure 1 This invention provides a method for bonding heterogeneous wafers 100, the method comprising the following steps: S1. Obtain heterogeneous first wafer 101 and second wafer 102, and clean the surfaces of the first wafer 101 and second wafer 102.
[0021] In this embodiment, the first wafer 101 and the second wafer 102 can be heterogeneous materials such as Si / SiO2, Si / SiN, Si / GaAs, Si / GaN, Si / SiC, Si / LiNbO3, and Si / LiTaO3. It should be noted that the first wafer 101 and the second wafer 102 are not limited to the types mentioned above; the heterogeneous wafer 100 bonding method proposed in this invention is applicable to the bonding of all heterogeneous wafer 100 materials.
[0022] In this embodiment, particulate impurities, organic matter, metal ions, etc. on the surfaces of the first wafer 101 and the second wafer 102 are removed. By cleaning these contaminants, voids and defects caused by contaminants at the bonding interface of the first wafer 101 and the second wafer 102 are reduced, thereby improving the bonding strength.
[0023] In this embodiment, the thickness of the second wafer 102 is 100~350μm. By reducing the thickness of the second wafer 102, the bonding effect between the first wafer 101 and the second wafer 102 can be improved during the heating and annealing process in the subsequent step S5.
[0024] S2. The first wafer 101 and the second wafer 102 after cleaning are spun dry, and the bonding surfaces of the first wafer 101 and the second wafer 102 are activated by plasma bombardment.
[0025] In this embodiment, plasma is an ionized gas (containing electrons, ions, and free radicals). Through the dual effects of physical bombardment and chemical modification, the physicochemical state of the surfaces of the first wafer 101 and the second wafer 102 is changed. The activated surfaces of the first wafer 101 and the second wafer 102 are significantly enhanced, providing a basis for bonding in the subsequent step S4.
[0026] S3. Perform pure water mega-acoustic cleaning on the first wafer 101 and the second wafer 102 after bombardment activation to increase the active groups on the bonding surfaces of the first wafer 101 and the second wafer 102.
[0027] In this embodiment, mega-sound cleaning utilizes high-frequency sound waves (0.8-2 MHz) to generate a cavitation effect in ultrapure water. The energy released when the bubbles burst can strip away the tiny particles remaining on the surface. At the same time, the ultrapure water can replenish hydroxyl groups on the surfaces of the first wafer 101 and the second wafer 102, making the distribution of active groups more uniform.
[0028] S4. The first wafer 101 and the second wafer 102, after being cleaned with pure water and mega-sound, are bonded to obtain a preliminary bonded wafer.
[0029] In this embodiment, in step S4, the bonding between the first wafer 101 and the second wafer 102 is a weak bonding type such as van der Waals force bonding and hydrogen bonding.
[0030] Specifically, before step S1, a thin film 103 is deposited on the side of the first wafer 101 away from the bonding surface, or after step S4, a thin film 103 is deposited on the side of the first wafer 101 away from the bonding surface in the preliminary bonding wafer. The coefficient of thermal expansion of the first wafer 101 is defined as N1, the coefficient of thermal expansion of the second wafer 102 is defined as N2, and the coefficient of thermal expansion of the thin film 103 is defined as N3, which satisfies the following condition: N2 > N1 > N3.
[0031] Specifically, considering the anisotropy of different materials, the coefficient of thermal expansion of the thin film 103 refers to the coefficient of thermal expansion along the radial direction of the first wafer 101 and / or the second wafer 102. If the first wafer 101 and / or the second wafer 102 are anisotropic, the coefficient of thermal expansion of the thin film 103 needs to be less than the coefficient of thermal expansion of the first wafer 101 grown as a substrate in any radial direction.
[0032] In this embodiment, when the two activated first wafers 101 and second wafers 102 are bonded together in a cleanroom environment, the active groups (such as hydroxyl groups) on their surfaces will attract each other through van der Waals forces and hydrogen bonds, achieving temporary bonding and obtaining a preliminarily bonded wafer.
[0033] In this embodiment, the thickness of the thin film 103 is 0.5-5 μm. Controlling the thickness of the thin film can effectively improve the bonding interface stress of the first wafer 101 and the second wafer 102 during heat annealing, preventing bonding failure and fragmentation.
[0034] In this embodiment, the thin film 103 is made of either silicon oxide or silicon nitride. It should be noted that the material of the thin film 103 is not limited to silicon oxide or silicon nitride; other types of materials are also feasible and can be selected according to actual conditions.
[0035] In this embodiment, the thickness of the thin film 103 is adjusted according to the coefficient of thermal expansion, elastic modulus, Poisson's ratio and thickness of the first wafer 101 and the second wafer 102, and satisfies the condition that the stress on the bonding surface of the first wafer 101 and the second wafer 102 is minimized at the highest annealing temperature.
[0036] In this embodiment, before step S1, a thin film 103 is deposited on the side of the first wafer 101 away from the bonding surface. The thin film 103 is formed by chemical vapor deposition (CVD).
[0037] In this embodiment, after step S4, a thin film 103 is deposited on the side of the first wafer 101 away from the bonding surface in the preliminary bonding wafer. The thin film 103 is formed by physical vapor deposition (PVD).
[0038] S5. The preliminary bonded wafer after the film deposition is subjected to heat annealing treatment to obtain a bonded wafer.
[0039] During the annealing process, the compressive stress generated by the thin film 103 on the first wafer 101 causes bending deformation of the bonding surface between the first wafer 101 and the second wafer 102, thereby reducing the stress on the bonding surface between the first wafer 101 and the second wafer 102.
[0040] In this embodiment, in step S5, the temperature during the initial bonding wafer heating and annealing process is less than 250°C.
[0041] In this embodiment, in order to better demonstrate the process flow of the heterogeneous wafer 100 bonding method proposed in this invention, the following Embodiment 1 and Embodiment 2 are provided.
[0042] Implementation Method 1 Implementation method one provides an example of bonding single-crystal LN (Lithiμm Niobate) to silicon oxide, specifically comprising the following steps: S1: The silicon oxide wafer to be bonded is a 675μm thick silicon oxide wafer (i.e., the first wafer 101), which has a bonding surface and an unbonded surface, and a 350μm thick single crystal LN wafer (i.e., the second wafer 102), wherein the tangent of the second wafer 102 is Y128.
[0043] S2: A layer of silicon oxide (i.e., thin film 103) is grown on the non-bonded surface of a silicon oxide wafer by chemical vapor deposition. The thickness of this silicon oxide layer is 0.5-5 μm.
[0044] S3: Cleaning, surface activation, and mega-acoustic cleaning treatment are performed on the bonding surfaces of silicon oxide wafers and LN wafers.
[0045] S4: Perform van der Waals bonding on the silicon oxide wafer and LN wafer completed in S3.
[0046] S5: Perform heat annealing on the silicon oxide wafer and LN wafer completed in S4. The annealing temperature shall not exceed 250℃.
[0047] Implementation Method 2 Implementation method two provides an example of bonding single-crystal LN (Lithiμm Niobate) to silicon oxide, specifically comprising the following steps: S1: The silicon oxide wafer to be bonded is a 675μm thick silicon oxide wafer (i.e., the first wafer 101), which has a bonding surface and an unbonded surface, and a 350μm thick single crystal LN wafer (i.e., the second wafer 102), wherein the tangent of the second wafer 102 is Y128.
[0048] S2: Cleaning, surface activation, and mega-acoustic cleaning treatment are performed on the bonding surfaces of silicon oxide wafers and LN wafers.
[0049] S3: Perform van der Waals bonding on the silicon oxide wafer and LN wafer completed in S2.
[0050] S4: For the silicon oxide wafer and LN wafer that have been processed in S3, a layer of silicon oxide (i.e. thin film 103) is grown on the non-bonded surface of the silicon oxide wafer by physical vapor deposition. The thickness of this silicon oxide layer is 0.5-5μm.
[0051] S5: Perform heat annealing on the silicon oxide wafer and LN wafer completed in S4. The annealing temperature shall not exceed 250℃.
[0052] Measurements show that, after bonding according to Embodiment 1 and Embodiment 2, the heterogeneous wafer 100 reduces the stress at the bonding interface by actively controlling wafer deformation. By depositing a thin film 103 with a lower coefficient of thermal expansion on the surface of the first wafer 101 away from the bonding surface, the first wafer 101 and the second wafer 102 can bend and deform at the bonding surface during annealing, reducing the interface stress. At the same time, the annealing temperature can be increased to obtain higher bonding force without debonding or breaking the first wafer 101 and the second wafer 102.
[0053] Example 2 This invention also provides a heterogeneous wafer, which is prepared based on the heterogeneous wafer bonding method described in the above embodiments and can achieve the same technical effect. Please refer to the description in the above embodiments, which will not be repeated here.
[0054] Compared with existing technologies, this invention deposits a thin film with a lower or negative coefficient of thermal expansion on the side of the first wafer away from the bonding surface. During the heating and annealing process after heterogeneous wafer bonding, this thin film can actively generate compressive stress on the surface of the first wafer opposite the bonding surface, causing bending deformation of the bonding surface between the first and second wafers. This reduces the stress at the bonding interface, preventing bonding failure and fragmentation. By actively controlling the deformation of the first and second wafers, the interface stress during the annealing process after heterogeneous wafer bonding is reduced, resulting in a more stable and higher-performance heterogeneous wafer after bonding.
[0055] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.
[0056] The embodiments of the present invention have been described above with reference to the accompanying drawings. The disclosed embodiments are merely preferred embodiments of the present invention. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many equivalent changes in form under the guidance of the present invention without departing from the spirit and scope of the claims. All such changes are within the protection scope of the present invention.
Claims
1. A method for bonding heterogeneous wafers, characterized in that, The heterogeneous wafer bonding method includes the following steps: S1. Obtain a heterogeneous first wafer and a second wafer, and clean the surfaces of the first wafer and the second wafer; S2. The first wafer and the second wafer after cleaning are spun dry, and the bonding surfaces of the first wafer and the second wafer are activated by plasma bombardment. S3. Perform pure water mega-acoustic cleaning on the first and second wafers after bombardment activation; S4. Bond the first wafer and the second wafer after pure water mega-sonic cleaning to obtain a preliminary bonded wafer; Specifically, a thin film is deposited on the side of the first wafer away from the bonding surface before step S1, or the thin film is deposited on the side of the first wafer away from the bonding surface in the preliminary bonding wafer after step S4. The coefficient of thermal expansion of the first wafer is defined as N1, the coefficient of thermal expansion of the second wafer is defined as N2, and the coefficient of thermal expansion of the thin film is defined as N3, which satisfies the following condition: N2 > N1 > N3; S5. The preliminary bonded wafer after the film deposition is subjected to heat annealing treatment to obtain a bonded wafer.
2. The heterogeneous wafer bonding method as described in claim 1, characterized in that, The thin film is made of either silicon oxide or silicon nitride.
3. The heterogeneous wafer bonding method as described in claim 1, characterized in that, The thickness of the thin film is adjusted according to the coefficient of thermal expansion, elastic modulus, Poisson's ratio, and thickness of the first and second wafers, and is designed to minimize the stress on the bonding surfaces of the first and second wafers at the highest annealing temperature.
4. The heterogeneous wafer bonding method as described in claim 1, characterized in that, Prior to step S1, a thin film is deposited on the side of the first wafer away from the bonding surface, the thin film being formed by chemical vapor deposition.
5. The heterogeneous wafer bonding method as described in claim 1, characterized in that, After step S4, a thin film is deposited on the side of the first wafer away from the bonding surface in the preliminary bonding wafer, and the thin film is formed by physical vapor deposition.
6. The heterogeneous wafer bonding method as described in claim 1, characterized in that, The thickness of the film is 0.5-5 μm.
7. The heterogeneous wafer bonding method as described in claim 6, characterized in that, The thickness of the second wafer is 100~350μm.
8. The heterogeneous wafer bonding method as described in claim 1, characterized in that, In step S5, the temperature during the initial bonding wafer heating and annealing process is less than 250°C.
9. A heterogeneous wafer, characterized in that, The heterogeneous wafer is prepared based on the heterogeneous wafer bonding method as described in any one of claims 1-8.