Spread spectrum clock setting adjustment method and wireless packet reception method

By expanding the candidate spread spectrum clock settings in the integrated circuit device and selecting the setting update lookup table with the highest signal-to-noise ratio, the impact of electromagnetic interference on wireless communication is resolved, thereby improving the quality and signal-to-noise ratio of wireless communication.

CN122363458APending Publication Date: 2026-07-10REALTEK SEMICON CORP
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
REALTEK SEMICON CORP
Filing Date
2025-01-09
Publication Date
2026-07-10

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Abstract

The present invention provides a method for adjusting a spread spectrum clock setting, comprising: expanding a system scenario to generate multiple candidate spread spectrum clock settings; applying these candidate spread spectrum clock settings to an integrated circuit device storing a predefined lookup table; measuring multiple candidate signal-to-noise ratios (SNRs) of the integrated circuit device under these candidate spread spectrum clock settings; selecting the selected spread spectrum clock setting that has the highest SNR among these candidate SNRs for the corresponding system scenario from these candidate spread spectrum clock settings; and replacing the spread spectrum clock setting corresponding to the system scenario in the predefined lookup table with the selected spread spectrum clock setting to update the predefined lookup table stored in the integrated circuit device.
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Description

Technical Field

[0001] This invention relates to the setting of a spread spectrum clock for packet reception, and particularly to a method for adjusting the spread spectrum clock setting and a method for receiving wireless packets. Background Technology

[0002] With advancements in the semiconductor industry, various functional circuits (such as arithmetic circuits, memory circuits, communication-related circuits, and image processing circuits) and electronic components can be fabricated within the same integrated circuit device. However, for integrated circuit devices that integrate high-speed interfaces and / or high-speed volatile memory, electromagnetic interference generated by these interfaces and / or memory can severely impact wireless communication. Particularly during packet reception, if the clear channel assessment (CCA) threshold needs to be increased due to electromagnetic interference, the wireless communication circuit may fail to detect low-energy signals and incorrectly receive interference signals, leading to a degraded wireless communication quality.

[0003] On the other hand, since wireless communication networks may span multiple channels or even multiple frequency bands, simply shifting the frequency of the interference source onto a specific channel may couple in additional interference to other channels and could reduce the throughput of high-speed interfaces or memory, failing to meet the system's transmission or computation requirements. Furthermore, while applying a fixed spread spectrum setting to the interference source may reduce interference to a specific channel, it could lower the signal-to-noise ratio (SNR) of other channels, affecting the quality of wireless transmission. Summary of the Invention

[0004] This invention proposes a method for adjusting a spread spectrum clock setting, comprising: expanding a system scenario to generate multiple candidate spread spectrum clock settings; applying these candidate spread spectrum clock settings to an integrated circuit device storing a predefined lookup table; measuring multiple candidate signal-to-noise ratios (SNRs) of the integrated circuit device under these candidate spread spectrum clock settings; selecting the selected spread spectrum clock setting that corresponds to the system scenario and has the highest SNR among these candidate SNRs from these candidate spread spectrum clock settings; and replacing the spread spectrum clock setting corresponding to the system scenario in the predefined lookup table with the selected spread spectrum clock setting to update the predefined lookup table stored in the integrated circuit device.

[0005] The present invention also proposes a wireless packet receiving method applicable to an integrated circuit device, wherein the non-volatile memory of the integrated circuit device stores a predefined lookup table as described above, and the wireless packet receiving method includes: initializing the wireless communication circuit of the integrated circuit device according to the system scenario; selecting a wireless channel for wireless transmission through the wireless communication circuit; setting a corresponding spread spectrum clock according to the system clock profile in the system scenario by referring to the predefined lookup table; and controlling the wireless communication circuit to receive packets through the wireless channel.

[0006] The present invention further proposes a method for adjusting a spread spectrum clock setting, comprising: expanding a system scenario to generate multiple candidate spread spectrum clock settings; applying these candidate spread spectrum clock settings to multiple integrated circuit devices storing a predefined lookup table; measuring multiple candidate signal-to-noise ratios for each integrated circuit device under these candidate spread spectrum clock settings; selecting, for each integrated circuit, the selected spread spectrum clock setting corresponding to the system scenario with the highest signal-to-noise ratio among these candidate signal-to-noise ratios; and adjusting the predefined lookup table according to the selected spread spectrum clock setting corresponding to each integrated circuit device to update the predefined lookup table stored in each integrated circuit device. Attached Figure Description

[0007] To gain a more complete understanding of the embodiments and their advantages, the following description is made with reference to the accompanying drawings, wherein:

[0008] Figure 1 This is a schematic diagram of a circuit module of an integrated circuit device according to some embodiments of the present invention;

[0009] Figure 2 for Figure 1 An example of a system temporary register and an interference source status recorder in an integrated circuit device;

[0010] Figure 3 This is a flowchart illustrating a method for establishing a predefined lookup table according to some embodiments of the present invention;

[0011] Figure 4 The possible options for composing a system scenario are illustrated schematically.

[0012] Figure 5 The possible options for setting up the spread spectrum clock are illustrated schematically.

[0013] Figure 6 In order to carry out Figure 3 An example of a predefined lookup table obtained by a predefined lookup table creation method;

[0014] Figure 7 This is a flowchart illustrating a spread spectrum clock setting and adjustment method according to some embodiments of the present invention;

[0015] Figure 8 This is a flowchart illustrating a spread spectrum clock setting and adjustment method according to some embodiments of the present invention;

[0016] Figure 9 This is a flowchart illustrating a wireless packet receiving method according to some embodiments of the present invention;

[0017] Figure 10 This is a flowchart illustrating a wireless packet receiving method according to some embodiments of the present invention;

[0018] Figure 11 This is a flowchart illustrating a wireless packet receiving method according to some embodiments of the present invention; and

[0019] Figure 12 This is a flowchart illustrating a wireless packet receiving method according to some embodiments of the present invention.

[0020] Explanation of reference numerals in the attached figures:

[0021] 104: Memory; 100: Integrated Circuit Device; 102: Wireless Communication Circuit

[0022] 108: High-speed interface; 106: Memory controller; 110, 112: Spread spectrum clock generator

[0023] 122: Processing circuit; 118: System temporary register; 114, 116: Spread spectrum clock control temporary register.

[0024] 126: Bus; 124: Non-volatile memory; 120: Interference source status recorder

[0025] SI: Interference source; AE: Affected element; SR1: CPU control register

[0026] SP: Spread Rate; PT: Predefined Lookup Table; ST: Spread Clock Type

[0027] 700, 800: Spread Spectrum Clock Setting Adjustment Method DB1-DB k : Visceral location

[0028] 900, 1000, 1100, 1200: Wireless packet receiving method; IR1: System clock state control register.

[0029] IR51-IR5 n IR2: High-speed hardware block state register; CPU clock state register

[0030] SR2: Memory controller control register; IR3: Memory clock status register.

[0031] SR3: PCIe controller status register; IR4: High-speed interface status register

[0032] SR51-SR5 n SR4: High-speed hardware block control register; USB controller control register

[0033] S302-S314, S702-S712, S802-S814, S902-S914, S1002-S1018, S1102-S1116,

[0034] S1202-S1220: Operation Detailed Implementation

[0035] The embodiments of the present invention are discussed in detail below. However, it will be understood that the embodiments provide many applicable concepts that can be implemented in a wide variety of specific contexts. The discussed and disclosed embodiments are for illustrative purposes only and are not intended to limit the scope of the invention.

[0036] Figure 1 This is a schematic diagram of a circuit module of an integrated circuit device 100 according to some embodiments of the present invention. The integrated circuit device 100 may be an integrated circuit chip, such as a system-on-chip (SoC), a system-in-package (SIP) element, or a chip-on-board (COB) element, but is not limited thereto. Figure 1 As shown, the integrated circuit device 100 includes a wireless communication circuit 102, a memory 104, a memory controller 106, a high-speed interface 108, spread spectrum clock generators 110 and 112, spread spectrum clock control registers 114 and 116, a system register 118, an interference source status recorder 120, a processing circuit 122, non-volatile memory (NVM) 124, and a bus 126. Furthermore, the integrated circuit device 100 may also include other high-speed hardware blocks, such as an image signal processor (ISP), an encoder, neural network (NN) circuitry, media access control (MAC) circuitry, and / or a co-processor.

[0037] The wireless communication circuit 102 can support one or more generations of wireless communication technologies, such as Wi-Fi, cellular communication, and / or Bluetooth. In some embodiments, the integrated circuit device 100 includes multiple wireless communication circuits 102, such as Wi-Fi circuits, Bluetooth circuits, cellular communication circuits, ZigBee circuits, and / or near-field communication (NFC) circuits, each supporting different wireless communication technologies.

[0038] The memory 104 is used to temporarily store data during the operation of the integrated circuit device 100. The memory 104 may be a volatile memory, such as dynamic random access memory (DRAM). The memory controller 106 is coupled to the memory 104 and is used to perform data writing or data reading operations on the memory 104 according to control instructions on the bus 126.

[0039] The high-speed interface 108 serves as an interface for high-speed data transfer between the integrated circuit device 100 and other components (such as solid-state drives, displays, etc.). The high-speed interface 108 can be, for example, a USB3 interface, a PCIe interface, a SATA interface, a Thunderbolt interface, etc., but is not limited to these. Furthermore, the integrated circuit device 100 may have multiple high-speed interfaces 108, and is not limited to these. Figure 1 The single high-speed interface 108 is shown.

[0040] Spread-frequency clock generators 110 and 112 are coupled to memory controller 106 and high-speed interface 108, respectively, and are used to generate spread-frequency clocks for memory 104 and high-speed interface 108, respectively. Spread-frequency clock control registers 114 and 116 are used to adjust the spread-frequency clock settings of memory 104 and high-speed interface 108, respectively.

[0041] The system temporary register 118 is used to store the control bits of each component (including memory 104, high-speed interface 108 and processing circuit 122, etc.), while the interference source status recorder 120 is used to record the status of each interference source (e.g. memory 104, high-speed interface 108 and processing circuit 122) in the integrated circuit device 100 that affects the wireless communication circuit 102.

[0042] The processing circuit 122 is used to perform data processing tasks on the integrated circuit device 100. The processing circuit 122 may be, for example, a central processing unit (CPU), a microprocessor, a graphics processing unit (GPU), an application-specific integrated circuit (ASIC), etc., but is not limited to these.

[0043] Non-volatile memory 124 is used to store program instructions executed by processing circuit 122 or data accessed by processing circuit 122. Non-volatile memory 124 may be, for example, multi-chip module (MCM) flash memory, electric fuse memory, one-time programmable (OTP) memory or other suitable memory.

[0044] Bus 126 couples various components in integrated circuit device 100, including wireless communication circuit 102, memory 104, memory controller 106, high-speed interface 108, spread spectrum clock generators 110 and 112, spread spectrum clock control registers 114 and 116, system register 118, interference source status recorder 120, processing circuit 122, and non-volatile memory 124, and is used to control signal transmission between the aforementioned components. The bus can be, for example, an advanced peripheral bus (APB), an advanced extensible interface (AXI), an advanced high-performance bus (AHB), or any combination of the aforementioned components, but is not limited thereto.

[0045] Figure 2 for Figure 1 An example of a system temporary register 118 and an interference source status recorder 120 in an integrated circuit device 100. Figure 2 In the example, system register 118 includes CPU control register SR1, memory controller control register SR2, PCIe controller control register SR3, USB controller control register SR4, and high-speed hardware block control registers SR51-SR5n (numbers 1 to n). Interference source status recorder 120 includes system clock status control register IR1, CPU clock status register IR2, memory clock status register IR3, high-speed interface status register IR4, and high-speed hardware block status registers IR51-IR5n.n .

[0046] In system register 118, each register stores multiple control bits, including CPU control register SR1, USB controller control register SR4, and high-speed hardware block control registers SR51-SR51 from the first to the nth. n The stored control bits include clock control bits (which are used to control the clock rate) and other control bits (such as control bits used to enable or disable the corresponding hardware), while the memory controller controls the scratchpad SR2 and the PCIe controller controls the scratchpad SR3. The stored control bits include generation and clock control bits (which are used to control generation specifications and clock rate) and other control bits (such as control bits used to enable or disable the corresponding hardware).

[0047] In the interference source state recorder 120, there are CPU clock state register IR2, memory clock state register IR3, and high-speed hardware block state registers IR51-IR5. n These are respectively stored in CPU control register SR1, memory control register SR2, and high-speed hardware block control registers SR51-SR5 from the 1st to the nth. n The clock control bits are stored in the high-speed interface status register IR4, while the clock control bits of the PCIe controller control register SR3 and the USB controller control register SR4 are stored in the high-speed interface status register IR4. In addition, there are CPU clock status register IR2, memory clock status register IR3, high-speed interface status register IR4, and high-speed hardware block status registers IR51-IR5. n Each includes a dirty bit, which indicates whether the corresponding clock control bit has changed. For example, if the CPU clock rate changes, the value of the clock control bit in the CPU control register SR1 also changes accordingly, and the dirty bit value in the CPU clock status register IR2 changes from 0 to 1. The system clock status control register IR1 includes multiple dirty bits DB1-DBk, which correspond to the CPU clock status register IR2, the memory clock status register IR3, the high-speed interface status register IR4, and the high-speed hardware block status registers IR51-IR5, respectively. n The dirty bits. In complex systems or configurations such as multi-threaded and multi-core processors with multiple cores operating simultaneously, the system clock state control register IR1 can instantly and accurately identify the source of clock rate changes and perform subsequent processing accordingly.

[0048] Figure 3This is a flowchart of a predefined lookup table creation method 300 according to some embodiments of the present invention. The predefined lookup table creation method 300 can be used in the sample testing stage of an integrated circuit device. First, operation S302 is performed to initialize the clock rate of the hardware in the integrated circuit device according to the system scenario, and operation S304 is performed to initialize the affected elements of the system scenario. The system scenario may include interference sources (hardware) that may affect wireless communication functions and their configurations (e.g., states such as on / off and the clock rate used), and the affected elements may be elements whose wireless transceiver performance is affected by the interference sources.

[0049] For example, Figure 4This diagram schematically illustrates possible options for composing a system scenario, where the interference source SI may include video-related hardware such as a CPU, high-speed hardware blocks and high-speed interfaces, and / or other hardware that can interfere with wireless transceiver operations, while the affected element AE may include wireless communication circuitry and / or a wireless channel. The CPU can operate at different clock rates (also known as frequencies), such as frequency a1, frequency b1, frequency c1, etc. High-speed hardware blocks include, but are not limited to, image processors, encoders, neural network circuits, media access control circuitry, and / or coprocessors. In this example, the image processor, encoder, neural network circuitry, media access control circuitry, and coprocessor can be all on, all off, or partially on and partially off. The image processor can operate at frequency a2, frequency b2, or other frequencies; the encoder can operate at frequency a3, frequency b3, or other frequencies; the neural network circuitry can operate at frequency a4, frequency b4, or other frequencies; the media access control circuitry can operate at frequency a5, frequency b5, or other frequencies; and the coprocessor can operate at frequency a6, frequency b6, or other frequencies. The high-speed interface can be a PCIe interface or a USB3 interface. The PCIe interface can be Gen1, Gen2, Gen3, or a more advanced generation, while the USB3 interface can be Gen1, Gen2, or a more advanced generation. The wireless communication circuit can be a Wi-Fi circuit, a Bluetooth circuit, or other circuits with wireless communication capabilities (such as cellular communication circuits, ZigBee circuits, and / or near-field communication circuits). The wireless channel can be the channel information used by the wireless communication circuit to transmit and receive signals, including channels 1-1 and 1-2 in band 1, channels 2-1 and 2-2 in band 2, and combinations of other channels. For example, the affected wireless communication circuit may be a Wi-Fi circuit, and correspondingly the affected wireless channels may be, for example, channel 1 (center frequency 2.142 GHz), channel 2 (center frequency 2.147 GHz) in the 2.4 GHz band, channel 36 (center frequency 5.180 GHz), channel 40 (center frequency 5.200 GHz) in the 5 GHz band, and / or one or more channels in the 6 GHz band, but are not limited thereto.

[0050] After operations S302 and S304 are completed, operation S306 is performed next, applying the spread spectrum clock settings to the spread spectrum clock generator of the integrated circuit device (which generates, for example, memory clock signals and / or high-speed interface clock signals) to adjust the clock rate of hardware such as memory and / or high-speed interfaces. Taking the integrated circuit device 100 as an example, operation S306 may be to change the spread spectrum clock settings of spread spectrum clock generator 110 and / or spread spectrum clock generator 112.

[0051] Spread spectrum clock settings include spread spectrum clock type and spread rate, etc. Figure 5 The possible options for the spread spectrum clock settings are illustrated schematically, where the spread spectrum clock type ST includes no spread (no spread spectrum processing), center spread (the center frequency remains substantially unchanged), downward spread (the center frequency changes downward), and upward spread (the center frequency changes upward), while the spread rate SP is the ratio of the spread spectrum width to the center frequency of the system clock profile (e.g., 1%, 1.5%, or other values).

[0052] Next, operation S308 is performed to measure the power spectral density (PSD) of the integrated circuit device under the same system scenario and at each spread spectrum clock setting. The power spectral density can be obtained by measuring the wireless signal emitted by the wireless communication circuit using a measuring device. The measuring device can be, for example, a spectrum analyzer, a vector signal analyzer, etc., but is not limited to these.

[0053] Next, operation S310 is performed to select the power spectral density with the minimum interference and the highest signal-to-noise ratio (SNR) from all power spectral densities. By performing operations S302-S310, the spread spectrum clock setting with the highest power spectral density in this system scenario can be obtained. Since there can be several system scenarios in the actual application of integrated circuit devices, operations S302-S310 can be performed for each system scenario. After operation S310 is completed, operation S312 is performed to determine whether there are any other system scenarios that have not yet been measured. If there are other system scenarios that have not yet been measured, operations S302-S310 are returned to obtain the spread spectrum clock settings for the corresponding other system scenarios. After obtaining the spread spectrum clock settings for all system scenarios (meaning that all system scenarios have been measured), operation S314 is entered to establish a predefined lookup table based on the system scenarios and their spread spectrum clock settings. The predefined lookup tables are established for use in subsequent mass production stages of integrated circuit devices, for example, by being stored in the non-volatile memory of the integrated circuit device or programmed into code that is executed by the integrated circuit device.

[0054] Figure 6 This is an example of a predefined lookup table PT obtained by performing a predefined lookup table creation method 300. For example... Figure 6 As shown, the predefined lookup table PT includes fields such as system scenario and spread spectrum clock setting. Each system scenario field is defined by information such as the interference source and affected components, while each spread spectrum clock setting field is defined by spread spectrum clock setting information, including the spread spectrum clock type and spread rate. In each system scenario field, the interference source information includes the system clock profile, and the corresponding affected elements include wireless communication circuits and wireless channels.

[0055] exist Figure 6 In this context, n system scenario fields correspond to n spread spectrum clock setting fields. For example, a system scenario including system clock profile S1, wireless communication circuit M1, and wireless channel x1 corresponds to a spread spectrum clock setting field including spread spectrum clock type ST1 and spreading rate SP1, and a system scenario including system clock profile S2, wireless communication circuit M2, and wireless channel x2 corresponds to a spread spectrum clock setting field including spread spectrum clock type ST2 and spreading rate SP2, and so on. Each system clock profile S1-S n It can be specific hardware that operates at a specific frequency.

[0056] It should be noted that the system clock profile, wireless communication circuit, and wireless channel in different system scenario fields may be partially different or completely different, while the spread spectrum clock type and spread rate in different spread spectrum clock setting fields may be partially different, completely different, or completely the same. In one example, system clock profile S1 and wireless channel x1 are different from system clock profile S2 and wireless channel x2, respectively, while wireless communication circuit M1 is the same as wireless communication circuit M2 (representing the impact of different system clock profiles on signal reception of the same wireless communication circuit on different wireless channels).

[0057] The preliminary predefined lookup table obtained by the predefined lookup table creation method 300 can be directly used in the production line for mass production of integrated circuit devices, or it can be adjusted first and then used in the production line for mass production of integrated circuit devices.

[0058] In some embodiments, a predefined lookup table may first be written to the non-volatile memory of each integrated circuit device, and then each integrated circuit device may be measured to adjust the spread spectrum clock setting in the predefined lookup table of each integrated circuit device. Figure 7This is a flowchart illustrating a spread spectrum clock setting adjustment method 700 according to some embodiments of the present invention. First, operation S702 is performed to expand multiple candidate spread spectrum clock settings for the system scenario. Next, operation S704 is performed to apply these multiple candidate spread spectrum clock settings to the integrated circuit device. Then, operation S706 is performed to measure the candidate signal-to-noise ratio (SNR) of the integrated circuit device under each of the multiple candidate spread spectrum clock settings. After operation S706 is completed, operation S708 is performed to select the selected spread spectrum clock setting with the highest SNR for the corresponding system scenario from the multiple candidate spread spectrum clock settings. Then, operation S710 is performed to determine if there are any other system scenarios that have not yet been measured. If there are other system scenarios that have not yet been measured, the process returns to operations S702 to S708 to select the selected spread spectrum clock setting with the highest SNR for the corresponding other system scenarios. After selecting the spread spectrum clock setting with the highest signal-to-noise ratio for all system scenarios, operation S712 is performed to adjust the predefined lookup table according to the selected spread spectrum clock setting for each system scenario. That is, the spread spectrum clock setting for each system scenario stored in the predefined lookup table of non-volatile memory is replaced by the selected spread spectrum clock setting for each system scenario, thereby updating the predefined lookup table.

[0059] In other embodiments, a predefined lookup table may first be written to several integrated circuit devices (e.g., hundreds to tens of thousands, the number of which may be adjusted according to, for example, specifications and / or production line environment), and these integrated circuit devices may be measured to adjust the spread-frequency clock settings in the predefined lookup table. Then, the adjusted predefined lookup table is written to the non-volatile memory of all integrated circuit devices. Figure 8This is a flowchart illustrating a spread spectrum clock setting adjustment method 800 according to some embodiments of the present invention. First, operation S802 is performed to expand multiple candidate spread spectrum clock settings for the system scenario. Next, operation S804 is performed to apply these multiple candidate spread spectrum clock settings to an integrated circuit device. Then, operation S806 is performed to measure the candidate signal-to-noise ratio (SNR) of the integrated circuit device under each of the multiple candidate spread spectrum clock settings. After operation S806 is completed, operation S808 is performed to select the selected spread spectrum clock setting with the highest SNR for the corresponding system scenario from the multiple candidate spread spectrum clock settings. Then, operation S810 is performed to determine if there are any other system scenarios that have not yet been measured. If there are other system scenarios that have not yet been measured, operations S802 to S808 are returned to select the selected spread spectrum clock setting with the highest SNR for the other system scenarios. After selecting the selected spread spectrum clock setting with the highest SNR for all system scenarios, operation S812 is performed to determine if there are any other integrated circuit devices that have not yet been measured. If there are still other integrated circuit devices that have not been measured, the process returns to operation S802 to measure the next integrated circuit device for all system scenarios. After all integrated circuit devices have been measured, operation S814 is performed to adjust the predefined lookup table according to the selected spread spectrum clock settings corresponding to each integrated circuit device and each system scenario. The spread spectrum clock settings corresponding to a certain system scenario in the predefined lookup table can be adjusted according to the selected spread spectrum clock settings corresponding to all integrated circuit devices in the same system scenario. For example, the spread spectrum clock settings corresponding to a certain system scenario can be adjusted to the selected spread spectrum clock settings corresponding to the most integrated circuit devices in the same system scenario. In other embodiments, the predefined lookup table can also be adjusted in a manner other than majority vote, for example, adjusting the spread spectrum clock settings corresponding to a certain system scenario to the candidate spread spectrum clock settings that are closest to the average of the selected spread spectrum clock settings of all integrated circuit devices in the same system scenario, but is not limited to this. The spread spectrum clock settings corresponding to each system scenario stored in the predefined lookup table in non-volatile memory can be replaced by the adjusted spread spectrum clock settings corresponding to each system scenario, thereby updating the predefined lookup table.

[0060] By using the predefined lookup table updated by the spread spectrum clock setting adjustment method 700 or 800, performance thresholds for specific system scenarios can be pre-set during the production stage of the integrated circuit device, and defective products below the performance thresholds can be rejected during testing. Furthermore, after the integrated circuit device is integrated with other chips or modules, it is possible to quickly identify which components will cause coupling frequencies and / or interference to the wireless transmission of the integrated circuit device.

[0061] Figure 9This is a flowchart illustrating a wireless packet receiving method 900 according to some embodiments of the present invention. The wireless packet receiving method 900 can be performed by an integrated circuit device (e.g., integrated circuit device 100 or other similar integrated circuit device) to reduce interference to wireless transmission by switching wireless channels. The wireless packet receiving method 900 is described below. First, operation S902 is performed to initialize the wireless communication circuit (e.g., Wi-Fi circuit) of the integrated circuit device according to the system scenario. Then, operation S904 is performed to select the wireless channel (e.g., channel 1 in the 2.4 GHz band or channel 36 in the 5 GHz band) for wireless transmission via the wireless communication circuit. Next, operation S906 is performed to adopt the corresponding spread spectrum clock setting according to the system clock profile in the current system scenario by referring to a predefined lookup table. The predefined lookup table can be stored in the non-volatile memory of the integrated circuit device. The spread spectrum clock setting includes a spread spectrum clock type and a spread rate, wherein the spread spectrum clock type can be no spread, center spread, downward spread, and upward spread, etc., and the spread rate is the ratio of the spread spectrum width to the center frequency of the system clock profile. Next, operation S908 is performed, controlling the wireless communication circuit to receive packets from other wireless communication devices via the wireless channel. After receiving packets, operation S910 is performed to determine whether more packets need to be received. If more packets need to be received, operation S912 is performed; otherwise, operation S914 (ending wireless packet reception method 900) is performed. In operation S912, it is determined whether the wireless communication circuit needs to switch to another wireless channel. If so (for example, the currently used wireless channel is experiencing severe interference), operation S904 is returned to reselect the wireless channel for wireless transmission; otherwise, operation S908 is returned to use the same wireless channel to receive packets from other wireless communication devices.

[0062] Figure 10This is a schematic flowchart of a wireless packet receiving method 1000 according to some embodiments of the present invention. The wireless packet receiving method 1000 can be performed by an integrated circuit device (e.g., integrated circuit device 100 or other similar integrated circuit devices) to reduce interference to wireless transmission by switching wireless channels and / or wireless communication modules. The wireless packet receiving method 1000 is described as follows: First, operation S1002 is performed to initialize the wireless communication circuit (e.g., Wi-Fi circuit) of the integrated circuit device according to the system scenario. Then, operation S1004 is performed to select a wireless channel for wireless transmission via the wireless communication circuit. Next, operation S1006 is performed to set the corresponding spread spectrum clock according to the system clock profile in the current system scenario by referring to a predefined lookup table. Then, operation S1008 is performed to control the wireless communication circuit to receive packets from other wireless communication devices via the wireless channel. After receiving packets, operation S1010 is performed to determine whether to receive more packets. If more packets need to be received, operation S1012 is performed; otherwise, operation S1014 (end wireless packet reception method 1000) is performed. In operation S1012, it is determined whether to switch to another wireless communication circuit. If yes, operation S1016 is performed; otherwise, operation S1018 is performed. In operation S1016, the integrated circuit device switches the original wireless communication circuit to another wireless communication circuit and initializes it. After operation S1016 is completed, it returns to operation S1004 to select the wireless channel for wireless transmission. In operation S1018, it is determined whether the wireless communication circuit needs to switch to another wireless channel. If yes, it returns to operation S1004 to reselect the wireless channel for wireless transmission; otherwise, it returns to operation S1008 to control the wireless communication circuit to receive packets from other wireless communication devices via the wireless channel.

[0063] Figure 11This is a schematic flowchart of a wireless packet receiving method 1100 according to some embodiments of the present invention. The wireless packet receiving method 1100 can be performed by an integrated circuit device (e.g., integrated circuit device 100 or other similar integrated circuit devices) to reduce interference to wireless transmission by switching wireless channels and / or changing the clock rate of interference sources. The wireless packet receiving method 1100 is described as follows: First, operation S1102 is performed to initialize the wireless communication circuit (e.g., Wi-Fi circuit) of the integrated circuit device according to the system scenario. Then, operation S1104 is performed to select a wireless channel for wireless transmission via the wireless communication circuit. Next, operation S1106 is performed to adopt the corresponding spread spectrum clock setting according to the system clock profile in the current system scenario by referring to a predefined lookup table. The spread spectrum clock setting includes the spread spectrum clock type and spread rate. Next, operation S1108 is performed to control the wireless communication circuit to receive packets from other wireless communication devices via the wireless channel. After receiving packets, operation S1110 is performed to determine whether to receive more packets. If more packets are to be received, operation S1112 is performed to change the clock rate of interference sources (including high-speed hardware blocks such as the CPU, image processors, and encoders, and / or high-speed interfaces such as PCIe or USB3 interfaces, and / or other hardware that can interfere with wireless transmission and reception) (thus changing the system clock profile). Otherwise, operation S1114 is performed (ending wireless packet reception method 1100). After operation S1112 is completed, operation S1116 is performed to determine whether the wireless communication circuit needs to switch to another wireless channel. If so, operation S1104 is returned to reselect the wireless channel for wireless transmission, and operation S1106 is performed to adopt the corresponding spread spectrum clock setting according to the changed system clock profile. Otherwise, operation S1106 is returned directly to adopt the corresponding spread spectrum clock setting according to the changed system clock profile.

[0064] Figure 12This is a schematic flowchart of a wireless packet receiving method 1200 according to some embodiments of the present invention. The wireless packet receiving method 1200 can be performed by an integrated circuit device (e.g., integrated circuit device 100 or other similar integrated circuit devices) to reduce interference to wireless transmission by switching wireless channels and / or wireless communication modules. The wireless packet receiving method 1200 is described as follows: First, operation S1202 is performed to initialize the wireless communication circuit (e.g., Wi-Fi circuit) of the integrated circuit device according to the system scenario. Then, operation S1204 is performed to select a wireless channel for wireless transmission via the wireless communication circuit. Next, operation S1206 is performed to set the corresponding spread spectrum clock according to the system clock profile in the current system scenario by referring to a predefined lookup table. Then, operation S1208 is performed to control the wireless communication circuit to receive packets from other wireless communication devices via the wireless channel. After receiving packets, operation S1210 is performed to determine whether to receive more packets. If more packets need to be received, operation S1212 is performed; otherwise, operation S1214 (ending wireless packet reception method 1200) is performed. In operation S1212, it is determined whether to switch to another wireless communication circuit. If yes, operation S1216 is performed; otherwise, operation S1218 is performed. In operation S1216, the integrated circuit device switches the original wireless communication circuit to another wireless communication circuit and initializes it. After operation S1216 is completed, operation S1220 is performed to change the clock rate of the interference source (thus changing the system clock profile), and then it returns to operation S1204 to select the wireless channel for wireless transmission. In operation S1218, it is determined whether the wireless communication circuit needs to switch to another wireless channel. If yes, it returns to operation S1104 to reselect the wireless channel for wireless transmission; otherwise, it returns to operation S1208 to control the wireless communication circuit to receive packets from other wireless communication devices via the wireless channel.

[0065] In summary, the present invention provides a method for adjusting a spread spectrum clock setting, comprising: expanding a system scenario to generate multiple candidate spread spectrum clock settings; applying these candidate spread spectrum clock settings to an integrated circuit device storing a predefined lookup table; measuring multiple candidate signal-to-noise ratios (SNRs) of the integrated circuit device under these candidate spread spectrum clock settings; selecting the selected spread spectrum clock setting that corresponds to the system scenario and has the highest SNR among these candidate SNRs from these candidate spread spectrum clock settings; and replacing the spread spectrum clock setting corresponding to the system scenario in the predefined lookup table with the selected spread spectrum clock setting to update the predefined lookup table stored in the integrated circuit device. In one embodiment, the predefined lookup table is established by the following operations: initializing at least one clock rate corresponding to at least one piece of hardware in the sample integrated circuit device according to a preset system scenario among a plurality of preset system scenarios; initializing at least one affected element of these preset system scenarios; applying a plurality of spread spectrum clock settings to the spread spectrum clock generator of the integrated circuit device; measuring a plurality of power spectral densities of the integrated circuit device under these preset system scenarios and these spread spectrum clock settings; selecting a plurality of selected power spectral densities corresponding to these preset system scenarios with the least interference and the highest signal-to-noise ratio from these power spectral densities; and establishing a predefined lookup table based on these preset system scenarios and these spread spectrum clock settings. In one embodiment, the aforementioned at least one piece of hardware includes at least one of a central processing unit, a high-speed hardware block, and a high-speed interface. In one embodiment, the high-speed hardware block is an image processor, an encoder, a neural network circuit, a media access control circuit, or a coprocessor. In one embodiment, the high-speed interface is a PCIe interface or a USB3 interface. In one embodiment, these candidate spread spectrum clock settings are used by the spread spectrum clock generator to adjust at least one clock rate of the aforementioned at least one piece of hardware. In one embodiment, the aforementioned at least one affected element includes at least one of a wireless communication circuit and a wireless channel. In one embodiment, the wireless communication circuit is a Wi-Fi circuit, a Bluetooth circuit, a cellular communication circuit, a ZigBee circuit, or a near-field communication circuit. In one embodiment, the wireless channel is a channel in the 2.4 GHz band, the 5 GHz band, or the 6 GHz band. In one embodiment, each of these candidate spread spectrum clock settings includes a spread spectrum clock type and a spread rate. In one embodiment, the spread spectrum clock type is no spread, center spread, downward spread, or upward spread.

[0066] In summary, the present invention further provides a wireless packet receiving method applicable to an integrated circuit device, wherein the non-volatile memory of the integrated circuit device stores a predefined lookup table obtained by performing the aforementioned spread spectrum clock setting adjustment method. This wireless packet receiving method includes: initializing a first wireless communication circuit of the integrated circuit device according to a first system scenario; selecting a first wireless channel for wireless transmission via the first wireless communication circuit; adopting a corresponding first spread spectrum clock setting based on a first system clock profile in the first system scenario by referring to the predefined lookup table; and controlling the first wireless communication circuit to receive packets via the first wireless channel. In one embodiment, the wireless packet receiving method further includes: selecting a second wireless channel for wireless transmission via the first wireless communication circuit; adopting a corresponding second spread spectrum clock setting based on a second system clock profile in a second system scenario including the first wireless communication circuit and the second wireless channel by referring to the predefined lookup table; and controlling the first wireless communication circuit to receive another packet via the second wireless channel. In one embodiment, the wireless packet receiving method further includes: initializing a second wireless communication circuit of an integrated circuit device; selecting a second wireless channel for wireless transmission via the second wireless communication circuit; adopting a corresponding second spread spectrum clock setting based on a second system clock profile in a second system scenario including the second wireless communication circuit and the second wireless channel by referring to a predefined lookup table; and controlling the second wireless communication circuit to receive another packet via the second wireless channel. In one embodiment, the wireless packet receiving method further includes: changing the clock rate of an interference source in the integrated circuit device; selecting a second wireless channel for wireless transmission via a first wireless communication circuit; adopting a corresponding second spread spectrum clock setting based on a second system clock profile in a second system scenario including the interference source, clock rate, first wireless communication circuit, and second wireless channel by referring to a predefined lookup table; and controlling the first wireless communication circuit to receive another packet via the second wireless channel. In one embodiment, the wireless packet receiving method further includes: changing the clock rate of an interference source in the integrated circuit device; adopting a corresponding second spread spectrum clock setting based on a second system clock profile in a second system scenario including the interference source, the clock rate, the first wireless communication circuit, and the first wireless channel by referring to a predefined lookup table; and controlling the first wireless communication circuit to receive another packet via the first wireless channel. In another embodiment, the wireless packet receiving method further includes: initializing the second wireless communication circuit of the integrated circuit device; changing the clock rate of an interference source in the integrated circuit device; selecting a second wireless channel used for wireless transmission via the second wireless communication circuit; adopting a corresponding second spread spectrum clock setting based on a second system clock profile in a second system scenario including the interference source, the clock rate, the second wireless communication circuit, and the second wireless channel by referring to a predefined lookup table; and controlling the second wireless communication circuit to receive another packet via the second wireless channel.

[0067] In summary, the present invention provides a method for adjusting a spread spectrum clock setting, comprising: expanding a system scenario to generate multiple candidate spread spectrum clock settings; applying these candidate spread spectrum clock settings to multiple integrated circuit devices storing a predefined lookup table; measuring multiple candidate signal-to-noise ratios (SNRs) for each integrated circuit device under these candidate spread spectrum clock settings; selecting, for each integrated circuit, a selected spread spectrum clock setting corresponding to the system scenario with the highest SNR among these candidate SNRs; ​​and adjusting the predefined lookup table according to the selected spread spectrum clock setting corresponding to each integrated circuit device to update the predefined lookup table stored in each integrated circuit device. In one embodiment, adjusting the predefined lookup table according to the selected spread spectrum clock setting corresponding to each integrated circuit device involves adjusting the spread spectrum clock setting corresponding to the system scenario to the selected spread spectrum clock setting that corresponds to the most among these integrated circuit devices in the system scenario. In one embodiment, the predefined lookup table is established by the following operations: initializing at least one clock rate corresponding to at least one piece of hardware in a sample integrated circuit device according to a preset system scenario among a plurality of preset system scenarios; initializing at least one affected element of these preset system scenarios; applying a plurality of spread spectrum clock settings to the spread spectrum clock generator of the integrated circuit device; measuring a plurality of power spectral densities of the integrated circuit device under these preset system scenarios and under these spread spectrum clock settings; selecting a plurality of selected power spectral densities corresponding to these preset system scenarios with minimum interference and highest signal-to-noise ratio from these power spectral densities; and establishing a predefined lookup table according to these preset system scenarios and these spread spectrum clock settings.

[0068] Although the present invention has been disclosed above with reference to embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. The scope of protection of the present invention shall be defined by the claims of the present invention.

Claims

1. A method for adjusting a spread spectrum clock setting, comprising: Multiple candidate spread spectrum clock settings are extended for a system scenario; Apply the plurality of candidate spread spectrum clock settings to an integrated circuit device that stores one of the predefined lookup tables; The signal-to-noise ratios of the integrated circuit device under the multiple candidate spread spectrum clock settings were measured. Select a preferred spread spectrum clock setting that has the highest signal-to-noise ratio among the multiple candidate spread spectrum clock settings for the system scenario; as well as The spread spectrum clock setting corresponding to one of the system scenarios in the predefined lookup table is replaced with the selected spread spectrum clock setting to update the predefined lookup table stored in the integrated circuit device.

2. The spread spectrum clock setting and adjustment method according to claim 1, characterized in that, The predefined lookup table is created by the following operations: Initialize at least one clock rate of at least one hardware component in a sample integrated circuit device according to one of multiple preset system scenarios; Initialize at least one affected element of the plurality of preset system scenarios; Apply the plurality of spread spectrum clock settings to one of the spread spectrum clock generators of the integrated circuit device; The power spectral density of the integrated circuit device is measured under multiple preset system scenarios and multiple spread spectrum clock settings. From the plurality of power spectral densities, select a plurality of selected power spectral densities that correspond to the plurality of preset system scenarios and have the minimum interference and the highest signal-to-noise ratio; as well as The predefined lookup table is established based on the multiple preset system scenarios and the multiple spread spectrum clock settings.

3. The spread spectrum clock setting and adjustment method according to claim 2, characterized in that, The plurality of candidate spread spectrum clock settings are used by the spread spectrum clock generator to adjust the clock rate of the at least one piece of hardware.

4. The spread spectrum clock setting and adjustment method according to claim 2, characterized in that, The at least one affected element includes at least one of a wireless communication circuit and a wireless channel.

5. The spread spectrum clock setting and adjustment method according to claim 1, characterized in that, Each of the plurality of candidate spread spectrum clock settings includes a spread spectrum clock type and a spread rate.

6. A wireless packet receiving method, applicable to an integrated circuit device, wherein a non-volatile memory of the integrated circuit device stores a predefined lookup table obtained by performing the spread spectrum clock setting adjustment method according to claim 1, the wireless packet receiving method comprising: Initialize a first wireless communication circuit of one of the integrated circuit devices according to a first system scenario; Select one of the first wireless channels for wireless transmission via the first wireless communication circuit; By referring to the predefined lookup table, a corresponding first spread spectrum clock setting is adopted according to a first system clock profile in the first system scenario; as well as Control the first wireless communication circuit to receive a packet via the first wireless channel.

7. The wireless packet receiving method according to claim 6, characterized in that, Also includes: Initialize the second wireless communication circuit of one of the integrated circuit devices; Select one of the second wireless channels for the wireless transmission via the second wireless communication circuit; By referring to the predefined lookup table, a corresponding second spread spectrum clock setting is adopted based on a second system clock profile in a second system scenario including the second wireless communication circuit and the second wireless channel; and Control the second wireless communication circuit to receive another packet via the second wireless channel.

8. The wireless packet receiving method according to claim 6, characterized in that, Also includes: Change the clock rate of one of the interference sources in the integrated circuit device; Select one of the second wireless channels for the wireless transmission via the first wireless communication circuit; By referring to the predefined lookup table, a corresponding second spread spectrum clock setting is adopted according to a second system clock profile in a second system scenario including the interference source, the clock rate, the first wireless communication circuit and the second wireless channel; as well as Control the first wireless communication circuit to receive another packet via the second wireless channel.

9. A method for adjusting a spread spectrum clock setting, comprising: Multiple candidate spread spectrum clock settings are extended for a system scenario; The multiple candidate spread spectrum clock settings are applied to multiple integrated circuit devices that store a predefined lookup table; The signal-to-noise ratios of each of the plurality of integrated circuit devices were measured under the plurality of candidate spread spectrum clock settings; For each of the plurality of integrated circuits, select a preferred spread spectrum clock setting that has the highest signal-to-noise ratio among the plurality of candidate spread spectrum clock settings for the system scenario; as well as The predefined lookup table is adjusted according to the selected spread spectrum clock setting for each of the plurality of integrated circuit devices to update the predefined lookup table stored in each of the plurality of integrated circuit devices.

10. The spread spectrum clock setting and adjustment method according to claim 9, characterized in that, The predefined lookup table is adjusted according to the selected spread spectrum clock setting for each of the plurality of integrated circuit devices as follows: The spread spectrum clock setting corresponding to one of the system scenarios is adjusted to the selected spread spectrum clock setting among the most of the multiple integrated circuit devices in the system scenario.