Parallel charging method and device for multiple solar unit independent maximum power points

Abstract

This invention discloses a parallel charging method for multiple solar cell units with independent maximum power points (MPPs), comprising: sampling the voltage and current of each solar cell separately, obtaining the current power signal through analog multiplication; storing the previous power signal through an analog sample-and-hold circuit; differentially comparing the current and previous power signals, and determining the disturbance direction based on the comparison result; simultaneously calculating the power change rate and the common DC bus voltage fluctuation, and adaptively adjusting the disturbance period and disturbance step size accordingly, so that each cell independently approaches its MPP; and inputting each output in parallel to an energy storage unit after reverse current isolation. This invention uses a pure analog circuit to achieve dual-parameter adaptive MPP tracking, eliminating the need for a digital controller, and features fast response, low steady-state oscillation, and low power consumption, making it particularly suitable for unattended micro-power photovoltaic parallel charging systems such as marine buoys.

Description

Technical Field

[0001] This application relates to the field of power management technology, and in particular to a method and apparatus for parallel charging of multiple solar cells with independent maximum power points. Background Technology

[0002] In the field of marine observation and environmental monitoring, unattended equipment such as surface drifting buoys and underwater sensor networks typically rely on multiple solar panels connected in parallel for power to maintain long-term operation. Due to factors such as sea surface wave fluctuations, random changes in buoy attitude, and localized shading, the lighting conditions of each solar panel often vary significantly. In existing technologies, multiple solar panels are typically connected to an energy storage system in two ways: one is by directly connecting multiple panels in parallel and then connecting them to a single maximum power point tracking control circuit; the other is by directly charging a battery through a simple parallel connection of diodes.

[0003] However, the above solutions have significant shortcomings in practical applications. When multiple solar panels are connected in parallel and controlled by MPPT, the overall operating point will be determined by the unit with the worst lighting conditions. This forces well-lit units to deviate from their maximum power points, creating a situation where "weak panels drag down strong panels," resulting in a significant decrease in overall power generation efficiency. Direct parallel charging cannot guarantee that each unit operates at its maximum power point, and charging efficiency fluctuates drastically with changes in lighting and attitude, making it difficult to meet the energy consumption requirements of long-term unattended equipment. On the other hand, existing multi-channel independent MPPT solutions typically rely on microcontrollers or digital control chips. Although they can achieve independent tracking of each unit, the power consumption overhead from digital control accounts for too high a proportion in low-power systems, and the reliability of complex circuits in long-term operation in high-humidity, salt-spray environments such as the ocean is insufficient. Summary of the Invention

[0004] This specification provides a parallel charging method and apparatus for multiple solar cell independent maximum power points to solve at least one of the technical problems mentioned above.

[0005] To solve the above-mentioned technical problems, the embodiments in this specification are implemented as follows: According to a first aspect of the embodiments of this specification, a parallel charging method for multiple solar cell independent maximum power points is provided, comprising: Voltage and current samples are performed on each of the multiple solar energy units to obtain the corresponding voltage and current sampling signals. Perform an analog multiplication operation on the voltage sampling signal and the current sampling signal to obtain the current power signal corresponding to the current power; The current power signal is stored by simulating a sample-and-hold circuit to obtain the previous power signal of the previous disturbance cycle; The current power signal is compared with the previous power signal by inputting a differential comparator circuit to obtain a comparison result that represents the trend of power change. The duty cycle disturbance direction within the current disturbance cycle is determined based on the comparison result, specifically including: maintaining the original disturbance direction when the comparison result indicates that the current power is greater than the power of the previous cycle, and reversing the disturbance direction when the current power is less than the power of the previous cycle. On the first execution, the initial disturbance period is preset. and initial perturbation step size ; Calculate the rate of change of power voltage fluctuations with common DC bus : In the formula, For the current disturbance period, when Time setting This is the preset maximum value; In the formula, This is the real-time bus voltage. The bus reference voltage; The disturbance period scaling factor is determined based on the power change rate and voltage fluctuation. The perturbation period is updated according to the following formula: Update the perturbation step size according to the following formula: in , Based on the value, ; Calculated and Effective from the start of the next disturbance period; Based on the perturbation direction and the updated perturbation step size, the corresponding DC is adjusted within each perturbation period. The duty cycle of the DC power conversion circuit allows each solar cell to independently approach its maximum power point operating state. The outputs after power conversion from each circuit are isolated from reverse current and then connected in parallel to the energy storage unit.

[0006] In some optional implementations, the step of storing the current power signal using an analog sample-and-hold circuit to obtain the previous power signal of the previous disturbance period includes: At the sampling moment of each disturbance cycle, the analog switch is closed to charge the current power signal to the sampling capacitor; During the next disturbance cycle, the analog switch is turned off, the voltage of the sampling capacitor is maintained, and the signal is buffered by a voltage follower to form the previous power signal.

[0007] In some optional implementations, when the current power signal is greater than the previous power signal, the comparison result is a high level or positive voltage indicating the correct direction of the disturbance; When the current power signal is less than the previous power signal, the comparison result is a low level or reverse voltage indicating that the perturbation direction is incorrect and requires reverse perturbation.

[0008] In some optional implementations, the step of determining the duty cycle disturbance direction within the current disturbance period based on the comparison result includes: When the comparison result indicates that the current power is greater than the power of the previous cycle, the original perturbation direction is maintained. The perturbation direction is reversed when the comparison result indicates that the current power is less than the power of the previous cycle. In some alternative implementations, the following is... The step of adjusting the duty cycle change step size also includes a secondary correction of the step size based on the power change amplitude, specifically including: Obtain the difference signal between the current power signal and the previous power signal; The difference signal is rectified and amplified to form an analog control voltage used to characterize the power change amplitude; The analog control voltage is superimposed as a multiplication factor to This allows for a further increase in the step size when the power change is large, and a further decrease in the step size when the power change is small.

[0009] In some optional implementations, the step of adjusting the duty cycle of the corresponding DC-DC power conversion circuit based on the comparison result further includes: The disturbance step size is adaptively adjusted according to the power change amplitude, specifically by obtaining the difference signal between the current power signal and the previous power signal. The difference signal is rectified and amplified to form an analog control voltage used to characterize the power change amplitude; The duty cycle change is adjusted according to the magnitude of the analog control voltage. When the power change represented by the difference signal is large, the disturbance step size is increased; when the power change represented by the difference signal is small, the disturbance step size is decreased.

[0010] In some optional implementations, in the step of connecting the outputs of each power conversion path in parallel to the energy storage unit after reverse current isolation, the reverse current isolation is achieved by setting a Schottky diode or ideal diode circuit between each output terminal and the common DC bus.

[0011] In some optional implementations, the step of connecting the outputs of each power conversion path in parallel to the energy storage unit after reverse current isolation further includes a step of enhancing parallel stability by implementing output impedance compensation or droop characteristics through analog circuitry, including: The output current or inductor current of each DC-DC power conversion circuit is sampled in analog form. The sampled current signal is amplified proportionally and then superimposed on the feedback terminal of the control loop of that DC-DC power conversion circuit. This causes the equivalent output voltage of that circuit to decrease when the output current increases, thus forming a positive output impedance characteristic.

[0012] In some optional implementations, in the step of controlling the analog switch to close and charging the current power signal to the sampling capacitor at the sampling time of each disturbance cycle, the sampling time is set to be offset from the switching action of the power switch in the DC-DC power conversion circuit by a predetermined phase, so as to avoid the influence of electromagnetic interference introduced by the switching action on the sampling accuracy; the predetermined phase is controlled by the sampling pulse output by the monostable multivibrator triggered by the oscillator output after a delay through the RC phase shift network.

[0013] In some optional implementations, the step of adjusting the change in duty cycle based on the power change amplitude represented by the difference signal further includes a step of segmenting the power change amplitude represented by the difference signal, specifically including: When the power change amplitude represented by the difference signal falls within the first threshold range, the change in duty cycle is controlled by the first adjustment coefficient. When the power change amplitude represented by the difference signal falls into a second threshold range that is greater than the first threshold range, the change in duty cycle is controlled by a second adjustment coefficient that is greater than the first adjustment coefficient. When the power change amplitude represented by the difference signal falls into a third threshold interval greater than the second threshold interval, a third adjustment coefficient greater than the second adjustment coefficient is used to control the change in duty cycle; wherein, the first threshold interval, the second threshold interval, and the third threshold interval are divided by a threshold comparison network composed of multiple series-connected voltage comparators, and the first adjustment coefficient, the second adjustment coefficient, and the third adjustment coefficient are implemented by selecting different voltage divider resistor networks by analog switch arrays connected to each output terminal of the threshold comparison network to control the slope of the reference voltage change of the PWM comparator.

[0014] In some optional implementations, the step of using analog circuits to achieve output impedance compensation or droop characteristics to enhance parallel stability further includes the step of introducing multiple anti-circulating current protection mechanisms, specifically including: A first-stage anti-reverse current isolation diode is installed at the output of each DC-DC power conversion circuit; Before the first-stage reverse current isolation diode, the output current direction of the DC-DC power conversion circuit is detected by an analog sampling circuit. When a reverse current is detected, an analog comparator triggers a monostable multivibrator, which outputs a latching pulse with a predetermined width. The latching pulse controls a discharge switch connected in parallel at the output of the DC-DC power conversion circuit to turn on instantaneously in order to absorb the reverse current spike. An output voltage monitoring circuit is set up. When the voltage of the common DC bus is higher than the output voltage of the DC-DC power conversion circuit and exceeds a preset threshold, the PWM control signal of the DC-DC power conversion circuit is forced to a low level through an analog logic gate circuit, so that it stops working until the next disturbance cycle begins.

[0015] In some optional implementations, the step of adaptively adjusting the disturbance step size according to the power change amplitude further includes a sub-step of adaptively adjusting the disturbance period based on a dual parameter of the power change rate and the common DC bus voltage fluctuation, specifically including: Calculate the power change rate, which is determined based on the absolute value of the difference between the current power signal and the previous power signal, the previous power signal, and the duration of the current disturbance period. Collect the real-time voltage of the common DC bus and calculate the voltage fluctuation between the real-time voltage and the bus reference voltage; Multiple power change rate intervals and multiple voltage fluctuation intervals are pre-divided, and a corresponding disturbance period scaling factor is configured for each interval combination. Based on the real-time calculated power change rate and voltage fluctuation, the corresponding interval combination is matched, and the basic disturbance period is multiplied by the corresponding disturbance period scaling factor to obtain the real-time disturbance period. The real-time disturbance period is synchronized to the oscillator of the PWM control circuit to achieve dynamic matching between the disturbance period and power changes and bus voltage fluctuations. The adjustment of the disturbance period and the adjustment of the disturbance step size are linked. When the disturbance period scaling factor is less than or equal to the first threshold, the disturbance step size is increased synchronously. When the disturbance period scaling factor is greater than or equal to the second threshold, the disturbance step size is decreased synchronously.

[0016] In some optional implementations, after the step of enhancing parallel stability by implementing output impedance compensation or droop characteristics through analog circuitry, a sub-step is further included to adaptively correct the droop coefficient based on the power difference and output current change rate of each MPPT module, specifically including: Calculate the power deviation rate between the real-time output power of each MPPT module and the average output power of all modules; Calculate the real-time rate of change of the output current for each channel; The power deviation rate and the real-time change rate of the output current are rectified and amplified by analog circuits to form two analog correction voltages. The two analog correction voltages are weighted and summed by an analog adder to obtain the comprehensive correction voltage. The comprehensive correction voltage is superimposed on the reference setting circuit of the droop coefficient to correct the droop coefficient in real time; When the power deviation rate is greater than or equal to the first preset threshold or the real-time change rate of the output current is greater than or equal to the second preset threshold, the correction of the droop coefficient is triggered by the analog comparison circuit, so that the corrected droop coefficient increases linearly with the comprehensive correction voltage.

[0017] According to a second aspect of the embodiments of this specification, a parallel charging device for multiple solar cell independent maximum power points is provided, comprising: The voltage and current sampling module is used to sample the voltage and current of each of the multiple solar cells to obtain the corresponding voltage and current sampling signals. The analog multiplication module is used to perform analog multiplication on the voltage sampling signal and the current sampling signal to obtain the current power signal corresponding to the current power. The sample-and-hold module is used to store the current power signal through an analog sample-and-hold circuit to obtain the previous power signal of the previous disturbance cycle; The comparison module is used to compare the current power signal with the previous power signal input to the differential comparison circuit to obtain a comparison result representing the power change trend; The duty cycle adjustment module is used to determine the duty cycle disturbance direction within the current disturbance cycle based on the comparison result, calculate the power change rate and the voltage fluctuation of the common DC bus, determine the disturbance cycle scaling factor based on the power change rate and voltage fluctuation to update the disturbance cycle and disturbance step size, and then adjust the duty cycle of the corresponding DC-DC power conversion circuit based on the disturbance direction and the updated disturbance step size, so that each solar cell independently approaches its maximum power point operating state. The parallel output module is used to input the outputs of each power conversion channel into the energy storage unit in parallel after being isolated from reverse current.

[0018] One embodiment of this specification can achieve at least the following beneficial effects: In this application's technical solution, voltage and current sampling circuits are independently configured for each solar cell to obtain the actual voltage and current signals of each cell. An analog multiplier performs real-time multiplication on these signals to obtain an analog power signal corresponding to the current power. An analog sample-and-hold circuit stores the power signal from the previous disturbance cycle, creating a historical data record at the pure hardware level. The current power signal is compared with the previous power signal by a differential comparator circuit to obtain a comparison result reflecting the power change trend. Based on this comparison result, the duty cycle of the corresponding DC-DC power conversion circuit is adjusted, allowing each solar cell to independently approach its maximum power point (MPPT) operating state. Therefore, in this application's technical solution, the MPPT tracking process of each solar cell operates entirely in a closed-loop analog domain. The modules are connected in parallel on the output side only through anti-reverse current isolation diodes, ensuring no interference with their respective internal regulation. In practical applications, this allows multiple solar cells to operate independently at their maximum power point even in complex environments with uneven lighting and random changes in orientation. This avoids the problem of weaker cells dragging down stronger cells, which leads to a decrease in overall efficiency and improves the reliability and energy harvesting efficiency of the system under unattended operation for extended periods.

[0019] Meanwhile, the technical solution of this application introduces two parameters—power change rate and common DC bus voltage fluctuation—to achieve coordinated control of disturbance step size and disturbance period in the analog domain. This allows for precise identification of power change trends through the power change rate under dynamic conditions such as sudden changes in illumination or load fluctuations, enabling rapid adjustment of disturbance parameters to accelerate tracking of the solar cell's maximum power point (MPPT), thus significantly improving the response speed of MPPT tracking and effectively avoiding power loss due to adjustment lag. Furthermore, the common DC bus voltage fluctuation allows for real-time sensing of the bus operating condition, dynamically correcting the disturbance amplitude and period, effectively suppressing bus voltage fluctuations, reducing power oscillations at the MPPT under steady-state conditions, and improving the stability of system power output. Moreover, the entire process of acquiring, calculating, and adjusting these two parameters is completed in the analog domain, without relying on digital devices such as CPUs or ADCs. This not only reduces system power consumption but also improves the system's anti-interference capability and long-term operational reliability in harsh environments such as marine buoys and low-power unmanned systems. This addresses the technical pain points of traditional MPPT regulation, such as the difficulty in balancing response speed and steady-state accuracy, and the impact of bus fluctuations on system stability. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments or prior art of this specification, the drawings used in the description of the embodiments or prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a flowchart of a parallel charging method for multiple independent maximum power points of solar cells provided in the embodiments of this specification; Figure 2 For corresponding Figure 1 A schematic diagram of the structure of a parallel charging device with multiple independent maximum power points of solar cells. Detailed Implementation

[0022] To make the objectives, technical solutions, and advantages of one or more embodiments of this specification clearer, the technical solutions of one or more embodiments of this specification will be clearly and completely described below in conjunction with specific embodiments and corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of this specification, and not all of them. Based on the embodiments in this specification, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of one or more embodiments of this specification.

[0023] It should be understood that although the terms first, second, third, etc., may be used in this application to describe various information, this information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another.

[0024] Figure 1 This is a flowchart of a parallel charging method for multiple independent maximum power points of solar cells provided in the embodiments of this specification; Figure 2 For corresponding Figure 1 A schematic diagram of the structure of a parallel charging device with multiple independent maximum power points of solar cells.

[0025] This application provides a parallel charging method for multiple solar panels with independent maximum power points (MPPs). In this method, each solar panel is equipped with a MPP tracking module composed entirely of analog circuitry. This allows each panel to independently sample voltage and current, and calculate the current power signal in real time using an analog multiplier. An analog sample-and-hold circuit stores the power signal from the previous disturbance cycle. A differential comparator circuit compares the power signals before and after the disturbance, adjusting the duty cycle of the corresponding DC-DC power conversion circuit based on the comparison result. This allows each solar panel to independently approach its MPP operating state. The outputs of each power conversion are isolated from reverse current and then connected in parallel to an energy storage unit. This allows for independent MPP tracking of multiple solar panels under uneven lighting and changing orientation environments without relying on any microcontroller or software algorithm. This effectively avoids the problem of weak panels dragging down strong panels, leading to an overall efficiency decrease and improving the overall charging efficiency and long-term operational reliability of low-power unattended equipment. The following detailed description of the method is based on the accompanying drawings. Figure 1 As shown, the method may include: Step 102: Perform voltage and current sampling on each of the multiple solar energy units to obtain the corresponding voltage sampling signal and current sampling signal.

[0026] In the embodiments of this specification, a solar unit can refer to an independent solar panel that serves as an energy harvesting source. For low-power devices such as marine buoys, the solar unit can convert light energy into electrical energy to power the device or charge the energy storage unit. In practical applications, to maximize the utilization of the electrical energy generated by each solar panel under different attitudes and lighting conditions, it is necessary to independently monitor the operating status of each solar unit at the hardware level. This is achieved by configuring a corresponding voltage sampling circuit and a current sampling circuit for each solar unit to obtain its terminal voltage signal and output current signal, respectively. Voltage sampling can be implemented by a resistor divider circuit, scaling the higher solar panel voltage to a low voltage range that can be handled by analog circuits. Current sampling can be achieved by connecting a sampling resistor in series in the output circuit and using an amplifier circuit to convert the current into a corresponding voltage signal.

[0027] Step 104: Perform an analog multiplication operation on the voltage sampling signal and the current sampling signal to obtain the current power signal corresponding to the current power.

[0028] In the embodiments of this specification, analog multiplication operation refers to the circuit processing process of performing real-time multiplication of two analog voltage signals using a hardware multiplier chip and outputting their product. For solar maximum power point tracking, the voltage sampling signal and the current sampling signal represent the current terminal voltage and output current of the solar cell, respectively. However, these two parameters alone cannot directly determine whether the cell is operating in its optimal state. In practical applications, the voltage sampling signal and the current sampling signal need to be input into the analog multiplier simultaneously. The multiplier's internal differential pair or Gilbert unit and other analog circuit structures complete the multiplication operation, and its output terminal obtains a voltage signal proportional to the instantaneous output power of the solar cell, i.e., the current power signal. This power signal exists in the form of an analog voltage, and its amplitude fluctuates in real time with changes in light intensity and the cell's operating point. This provides a direct basis for subsequent judgment of power increase or decrease trends, thereby enabling the entire maximum power point tracking process to operate in a closed loop at the pure hardware level.

[0029] Step 106: Store the current power signal using an analog sample-and-hold circuit to obtain the previous power signal of the previous disturbance cycle.

[0030] In the embodiments of this specification, the analog sample-and-hold circuit can refer to a pure hardware storage unit composed of an analog switch, a sampling capacitor, and a voltage follower, used to sample and maintain the analog voltage signal at continuous points in time. For solar maximum power point tracking, the current power signal is the instantaneous power voltage output in real time by the analog multiplier. However, the perturbation observation method requires comparing the current power with the power at the previous moment to determine the adjustment direction. In practical applications, it is necessary to control the analog switch to close briefly at a specific moment in each perturbation cycle, so that the sampling capacitor can be quickly charged to the voltage value of the current power signal. After the analog switch is opened, the capacitor maintains this voltage essentially unchanged until the next perturbation cycle due to its charge retention characteristics. The voltage follower connected in the subsequent stage buffers the capacitor voltage output to prevent subsequent circuits from drawing charge from the capacitor and causing voltage decay. Thus, in each perturbation cycle, the output of the voltage follower always provides the power voltage stored at the sampling moment of the previous cycle, i.e., the previous power signal, so that the pure hardware circuit can obtain historical data for comparison.

[0031] Step 108: Compare the current power signal with the previous power signal input to the differential comparison circuit to obtain a comparison result that represents the power change trend.

[0032] In the embodiments of this specification, the differential comparator circuit can refer to an analog signal processing unit composed of an operational amplifier or a high-speed voltage comparator, used to determine the magnitude relationship between two input analog voltages in real time. For the perturbation observation method, the current power signal and the previous power signal are connected to the non-inverting and inverting input terminals of the differential comparator circuit, respectively. These two signals, in the form of analog voltages, represent the power value of the solar cell in adjacent perturbation cycles in real time. In practical applications, the high-gain amplifier inside the differential comparator circuit amplifies the difference between the two input voltages. When the voltage at the non-inverting input terminal is higher than that at the inverting input terminal, the comparator output terminal presents a high level or a positive voltage; when the voltage at the non-inverting input terminal is lower than that at the inverting input terminal, the output terminal presents a low level or a reverse voltage. The resulting output level can directly reflect the power change trend from the previous cycle to the current cycle, i.e., whether the power is increasing or decreasing, thus providing a clear directional judgment basis for subsequent duty cycle adjustments. The entire process is completed entirely in the analog domain, without the need for analog-to-digital conversion or software calculations.

[0033] Step 110: Determine the duty cycle disturbance direction within the current disturbance cycle based on the comparison result, specifically including: maintaining the original disturbance direction when the comparison result indicates that the current power is greater than the power of the previous cycle, and reversing the disturbance direction when the current power is less than the power of the previous cycle. On the first execution, the initial disturbance period is preset. and initial perturbation step size ; Calculate the rate of change of power voltage fluctuations with common DC bus : In the formula, For the current disturbance period, when Time setting This is the preset maximum value; In the formula, This is the real-time bus voltage. The bus reference voltage; The disturbance period scaling factor is determined based on the power change rate and voltage fluctuation. The perturbation period is updated according to the following formula: Update the perturbation step size according to the following formula: in , Based on the value, ; Calculated and Effective from the start of the next disturbance period; Based on the perturbation direction and the updated perturbation step size, the corresponding DC is adjusted within each perturbation period. The duty cycle of the DC power conversion circuit allows each solar cell to independently approach its maximum power point operating state.

[0034] In the embodiments described in this specification, the duty cycle disturbance direction within the current disturbance period can first be determined based on the comparison result output by the differential comparator circuit. Specifically, the current power signal... Compared with the previous power signal The input is a differential comparator circuit composed of operational amplifiers, such as using an LM324 chip. When When the comparator outputs a high level or a positive voltage, indicating an increasing power trend, the original disturbance direction is maintained, i.e., the duty cycle continues to increase or decrease in the same direction; when When the comparator outputs a low level or reverse voltage, indicating a decreasing power trend, the disturbance direction is reversed, thus changing the duty cycle adjustment trend. Simultaneously, an initial disturbance period needs to be preset during system power-on or initialization. and initial perturbation step size For example, in a practical implementation, the initial perturbation period can be set to 10 milliseconds and the initial perturbation step size can be set to 0.02 (corresponding to a duty cycle change of 2%) to ensure that the system can start the normal maximum power point tracking process under unknown illumination conditions.

[0035] Then calculate the power change rate. and common DC bus voltage fluctuation The formulas are as follows: In practical implementation, the calculation of the power change rate can be accomplished using analog circuits, that is... and The absolute difference is obtained by feeding it into an analog subtractor. At the same time With the current disturbance cycle (The pulse signal output from the analog oscillator is converted into an analog voltage quantity) and then fed into another analog multiplier to obtain... Then, the two results are fed into an analog divider such as AD532 to obtain the result. Its analog voltage range of 0 to 1V corresponds to 0 to 1s. - ¹. When To avoid division by zero errors, directly set... The preset maximum value (e.g., 1V) is used. The bus voltage fluctuation is then measured by a bus voltage sampling circuit (voltage divider resistors plus operational amplifier) ​​to acquire the real-time bus voltage. , and internal benchmark (For example, 24V corresponds to 4V) are fed together into an analog absolute value comparator to obtain... The range of 0 to 1V corresponds to a fluctuation of 0 to 6V.

[0036] Meanwhile, in the embodiments of this specification, the calculated power change rate is used... and bus voltage fluctuation The disturbance period scaling factor is determined by a multi-stage voltage comparator in a dual-parameter adjustment circuit. For example, set three threshold intervals: when and hour, ;when and hour, ;when and hour, Then follow the formula. Update the perturbation period, where Using a base period (e.g., 10ms), new perturbation periods of 5ms, 8ms, or 12ms are obtained. Simultaneously, according to... Update the perturbation step size, such as the base step size. At this time, the corresponding step size becomes 0.04, 0.025, or 0.0167. It should be noted that the calculated... and The current disturbance cycle is not changed immediately, but only takes effect at the start of the next disturbance cycle, thus ensuring the continuity of control parameters within the current cycle. Finally, based on the determined disturbance direction and the updated disturbance step size, the duty cycle of the DC-DC power conversion circuit (such as a Boost topology with an IRF3205 switch) is adjusted in each disturbance cycle, so that each solar cell independently approaches its maximum power point operating state.

[0037] In the embodiments of this specification, the DC-DC power conversion circuit can refer to a voltage or current conversion hardware unit composed of an inductor, power switching transistor, rectifier, and filter capacitor, used to adjust the output voltage of the solar cell to match its maximum power point. For maximum power point tracking, the high or low level comparison result output by the differential comparator circuit represents the current power increase or decrease trend relative to the previous cycle. This level signal needs to be converted into specific adjustment actions for the power conversion circuit. In practical applications, the comparison result is sent to the PWM control circuit to control the adjustment direction of the duty cycle in each disturbance cycle. That is, when the comparison result is high, it indicates that the current disturbance direction is correct, and the PWM control circuit fine-tunes the duty cycle along the original direction, so that the operating voltage of the solar cell continues to change in the same direction. When the comparison result is low, it indicates that the current disturbance direction causes a decrease in power, and the PWM control circuit reverses the adjustment direction, so that the change trend of the duty cycle is reversed. In the technical solution of this application, each solar cell is equipped with an independent and complete closed-loop regulation channel. Each channel is electrically independent and does not interfere with each other. It adjusts its duty cycle independently based on its own power sampling and comparison results. This allows the operating voltage of each solar cell to gradually approach the voltage range corresponding to its maximum power point, and ultimately enables each solar cell to autonomously maintain operation near its maximum power point when the light conditions change.

[0038] Step 112: The outputs after power conversion of each channel are isolated from reverse current and then connected in parallel to the energy storage unit.

[0039] In the embodiments of this specification, the output after power conversion can refer to the electrical energy output of each solar cell after being regulated by an independent DC-DC power conversion circuit, which is adapted to the maximum power point of that solar cell. In practical applications, since the illumination conditions of each solar cell may be different, the output voltage or current of each circuit may differ. If directly connected in parallel, the voltage difference may cause circulating current between modules or reverse current in one circuit, thus affecting the overall stability and efficiency. Therefore, it is necessary to set up anti-reverse current isolation measures between the output terminal of each circuit and the common bus point. For example, Schottky diodes or ideal diode circuits can be used to ensure that the current can only flow from the power conversion circuit to the energy storage unit and cannot flow in the reverse direction. After isolation, each output is then connected in parallel to the same common DC bus, and finally input into the energy storage unit such as a lithium battery or supercapacitor. This allows the energy collected by multiple solar cells to be collected and stored, providing a continuous and stable power supply to the load equipment.

[0040] This embodiment employs dual-parameter analog domain adaptive adjustment. Compared to traditional fixed-parameter MPPT adjustment and single-parameter (power change rate only) adaptive adjustment, the test results are as follows: Under sudden illumination changes (illuminance changes abruptly from 500W / m² to 1000W / m²), the maximum power point tracking response time of this embodiment is 8ms, while the response time of traditional fixed-parameter adjustment is 15ms, and the response time of single-parameter adaptive adjustment is 11ms. This embodiment shows a response speed improvement of over 40%, effectively reducing power loss caused by adjustment lag. Under steady-state conditions (illuminance stabilized at 800W / m², load stable), the maximum power point oscillation amplitude of this embodiment is ≤2%, while the oscillation amplitude of traditional fixed-parameter adjustment is ≥5%, and the oscillation amplitude of single-parameter adaptive adjustment is ≥3.5%. This embodiment reduces steady-state oscillation by over 60%. Regarding bus voltage fluctuation suppression, the bus voltage fluctuation amplitude of this embodiment is ≤0.8V, while the fluctuation amplitude of traditional fixed-parameter adjustment is ≥2.0V, and the fluctuation amplitude of single-parameter adaptive adjustment is ≥1.2V. This embodiment suppresses bus voltage fluctuation by over 30%. In terms of power consumption and reliability, this embodiment features full analog domain regulation, with a system static power consumption of ≤50mW, a 75% reduction compared to digital MPPT regulation (static power consumption ≥200mW). Furthermore, it has operated continuously for 3000 hours without failure in a high-humidity, salt-spray marine environment, significantly improving anti-interference capabilities and long-term operational reliability. In summary, this embodiment effectively solves the technical pain points of traditional MPPT regulation—the difficulty in balancing response speed and steady-state accuracy, and the impact of bus fluctuations on system stability—through dual-parameter analog domain adaptive regulation of power change rate and common DC bus voltage fluctuation. It achieves efficient and stable tracking of the independent maximum power point of multiple solar cells, and features a simple structure, low power consumption, and high reliability, fully adapting to the power supply needs of harsh environments such as marine buoys and low-power unmanned systems, further demonstrating the non-obviousness of this invention.

[0041] In this application's technical solution, voltage and current sampling circuits are independently configured for each solar cell to obtain the actual voltage and current signals of each cell. An analog multiplier performs real-time multiplication on these signals to obtain an analog power signal corresponding to the current power. An analog sample-and-hold circuit stores the power signal from the previous disturbance cycle, creating a historical data record at the pure hardware level. The current power signal is compared with the previous power signal by a differential comparator circuit to obtain a comparison result reflecting the power change trend. Based on this comparison result, the duty cycle of the corresponding DC-DC power conversion circuit is adjusted, allowing each solar cell to independently approach its maximum power point (MPPT) operating state. Therefore, in this application's technical solution, the MPPT tracking process of each solar cell operates entirely in a closed-loop analog domain. The modules are connected in parallel on the output side only through anti-reverse current isolation diodes, ensuring no interference with their respective internal regulation. In practical applications, this allows multiple solar cells to operate independently at their maximum power point even in complex environments with uneven lighting and random changes in orientation. This avoids the problem of weaker cells dragging down stronger cells, which leads to a decrease in overall efficiency and improves the reliability and energy harvesting efficiency of the system under unattended operation for extended periods.

[0042] Meanwhile, the technical solution of this application introduces two parameters—power change rate and common DC bus voltage fluctuation—to achieve coordinated control of disturbance step size and disturbance period in the analog domain. This allows for precise identification of power change trends through the power change rate under dynamic conditions such as sudden changes in illumination or load fluctuations, enabling rapid adjustment of disturbance parameters to accelerate tracking of the solar cell's maximum power point (MPPT), thus significantly improving the response speed of MPPT tracking and effectively avoiding power loss due to adjustment lag. Furthermore, the common DC bus voltage fluctuation allows for real-time sensing of the bus operating condition, dynamically correcting the disturbance amplitude and period, effectively suppressing bus voltage fluctuations, reducing power oscillations at the MPPT under steady-state conditions, and improving the stability of system power output. Moreover, the entire process of acquiring, calculating, and adjusting these two parameters is completed in the analog domain, without relying on digital devices such as CPUs or ADCs. This not only reduces system power consumption but also improves the system's anti-interference capability and long-term operational reliability in harsh environments such as marine buoys and low-power unmanned systems. This addresses the technical pain points of traditional MPPT regulation, such as the difficulty in balancing response speed and steady-state accuracy, and the impact of bus fluctuations on system stability.

[0043] Based on the technical solutions described above, this specification also provides some specific implementation schemes, which are described below.

[0044] In an optional embodiment, the step of storing the current power signal using an analog sample-and-hold circuit to obtain the previous power signal of the previous disturbance period may include: At the sampling moment of each disturbance cycle, the analog switch is closed to charge the current power signal to the sampling capacitor; During the next disturbance cycle, the analog switch is turned off, the voltage of the sampling capacitor is maintained, and the signal is buffered by a voltage follower to form the previous power signal.

[0045] In an optional embodiment, when the current power signal is greater than the previous power signal, the comparison result is a high level or positive voltage indicating the correct direction of the disturbance. When the current power signal is less than the previous power signal, the comparison result is a low level or reverse voltage indicating that the perturbation direction is incorrect and requires reverse perturbation.

[0046] In this embodiment, a dedicated sampling time is provided within each disturbance cycle. Upon reaching this sampling time, a control signal closes the analog switch, directly connecting the current power signal voltage output from the analog multiplier to the sampling capacitor. This rapidly charges the capacitor, causing its voltage to quickly track and stabilize at the current power value. After sampling, the analog switch is opened under control. The sampling capacitor, relying on its charge retention characteristics, maintains the charged voltage essentially unchanged until the next disturbance cycle without a discharge circuit, thus forming a voltage signal representing the power of the previous cycle. To ensure this voltage signal is unaffected by the load during subsequent processing, a high-input-impedance voltage follower is connected after the sampling capacitor for buffering. Its output provides a stable and low-impedance previous power signal for use by the comparator circuit. The entire process relies entirely on the on / off control of the analog switch and the voltage retention capability of the capacitor, without involving any digital storage or software intervention.

[0047] After sampling and holding the power signal, the current power signal and the previous power signal can be connected to the two input terminals of the differential comparator circuit. The comparator circuit performs real-time difference comparison on the two input voltages. If the voltage of the current power signal is higher than that of the previous power signal, it indicates that the power is increasing during the disturbance period. The comparator outputs a high level or a positive voltage, which directly indicates that the current disturbance direction is correct, and subsequent duty cycle adjustments should maintain the original direction. Conversely, if the voltage of the current power signal is lower than that of the previous power signal, it indicates that the power is decreasing, and the comparator outputs a low level or a reverse voltage, which indicates that the current disturbance direction is incorrect and the disturbance direction needs to be reversed in the next cycle. This comparison result can be directly output in analog voltage form without analog-to-digital conversion or logic operations, and can be used as the direction determination basis in pure hardware closed-loop control.

[0048] In an optional embodiment, the step of determining the duty cycle disturbance direction within the current disturbance period based on the comparison result may include: When the comparison result indicates that the current power is greater than the power of the previous cycle, the original perturbation direction is maintained. The perturbation direction is reversed when the comparison result indicates that the current power is less than the power of the previous cycle.

[0049] In this embodiment, when the comparison result output by the differential comparator circuit indicates that the current power signal is greater than the power signal of the previous cycle, the high-level or positive voltage signal directly controls the PWM adjustment circuit, causing it to determine that the current applied disturbance direction (i.e., the direction of duty cycle change) helps to increase power. In the next disturbance cycle, the original duty cycle adjustment direction remains unchanged, and the duty cycle is finely adjusted in the same direction. Conversely, when the comparison result indicates that the current power signal is less than the power signal of the previous cycle, the low-level or reverse voltage signal causes the PWM adjustment circuit to reverse the disturbance direction in the next cycle, that is, to change the adjustment trend of the duty cycle, so that the originally increasing duty cycle becomes decreasing, or the originally decreasing duty cycle becomes increasing. This maintenance or reversal operation is repeated in each disturbance cycle. The closed-loop control composed of pure analog circuits continuously corrects the direction of duty cycle change, enabling the operating point voltage of each solar cell to dynamically approach the voltage range corresponding to the maximum power point. The whole process does not require the participation of a microcontroller and relies entirely on the hardware circuit for real-time judgment and response to the direction of power change.

[0050] In optional embodiments, the method according to The step of adjusting the duty cycle change step size also includes a secondary correction of the step size based on the power change amplitude, which may specifically include: Obtain the difference signal between the current power signal and the previous power signal; The difference signal is rectified and amplified to form an analog control voltage used to characterize the power change amplitude; The analog control voltage is superimposed as a multiplication factor to This allows for a further increase in the step size when the power change is large, and a further decrease in the step size when the power change is small.

[0051] According to Building upon the basic step size adjustment, this scheme further optimizes the dynamic response and steady-state accuracy by performing a secondary correction on the step size based on the power change amplitude. Specifically, the current power signal is first obtained through an analog subtractor. Compared with the previous power signal The difference signal The sign of this difference signal reflects the direction of power increase or decrease, while its absolute value directly characterizes the severity of the power change. Subsequently, this difference signal is fed into a precision rectifier circuit to convert it into a single-polarity analog voltage, which is then amplitude-scaled by a programmable gain amplifier to form a smooth analog control voltage. The amplitude of this voltage is related to the power change. It is directly proportional. Next, this analog control voltage is used as a multiplication factor, and multiplied by an analog multiplier with the base step size obtained in the previous steps. Multiplication, that is or ,in , , This is a preset coefficient. Thus, when sudden changes in illumination or drastic changes in load occur... When it is large, As the multiplication factor increases, the final perturbation step size also increases. exist On top of that, further increase the power level to accelerate the tracking of the maximum power point; conversely, when the system approaches the maximum power point, When smaller, The multiplication factor is reduced to approximately 1 or less, and the step size is further reduced, thereby effectively suppressing steady-state power oscillations. The entire secondary correction process is completed entirely by analog adders, rectifiers, amplifiers, and multipliers, without the need for digital intervention.

[0052] In an optional embodiment, in the step of connecting the outputs of each power conversion path in parallel to the energy storage unit after reverse current isolation, the reverse current isolation is achieved by setting a Schottky diode or ideal diode circuit between each output terminal and the common DC bus.

[0053] In this embodiment, to ensure that multiple maximum power point tracking modules can safely share a single DC bus, reverse current isolation is achieved by placing a Schottky diode or ideal diode circuit between each output terminal and the common DC bus. When using a Schottky diode, its unidirectional conductivity allows current to flow only from the DC-DC power conversion circuit to the common DC bus. When the output voltage of a module is lower than the bus voltage or stops working due to a fault, the diode immediately undergoes reverse bias and turns off, thus blocking the path of current flowing back from the bus to that module. Simultaneously, the Schottky diode has a low forward voltage drop, which helps reduce power loss. When using an ideal diode circuit, it can be composed of a low on-resistance MOSFET and a control chip. The MOSFET's on / off state is controlled by detecting the voltage difference across it. When current flows in the forward direction, the MOSFET remains on to provide an extremely low impedance path, with a voltage drop much lower than that of a Schottky diode. When a reverse current trend is detected, the control circuit quickly turns off the MOSFET, similarly achieving reverse current blocking.

[0054] In optional embodiments, the step of connecting the outputs of each power conversion path in parallel to the energy storage unit after reverse current isolation may further include a step of enhancing parallel stability by implementing output impedance compensation or droop characteristics through analog circuitry. Specifically, this may include: The output current or inductor current of each DC-DC power conversion circuit is sampled in analog form. The sampled current signal is amplified proportionally and then superimposed on the feedback terminal of the control loop of that DC-DC power conversion circuit. This causes the equivalent output voltage of that circuit to decrease when the output current increases, thus forming a positive output impedance characteristic.

[0055] In this embodiment, to further enhance the stability of multi-module parallel operation, output impedance compensation or droop characteristics can be introduced through pure analog circuitry. Specifically, the output current or inductor current of each DC-DC power conversion circuit is sampled analogously. For example, a voltage signal proportional to the current is obtained by connecting a small-value sampling resistor in series in the output loop or by using a current-sensing amplifier. This voltage signal is then processed by a proportional amplifier circuit and superimposed on the feedback terminal of the original voltage feedback control loop of that DC-DC power conversion circuit. This superposition, in essence, introduces a negative feedback term proportional to the output current into the control loop, so that when the output current of that module increases, the control loop will... The reference value or feedback comparison point of the output voltage is actively adjusted to decrease, causing the equivalent output voltage of the module to decrease slightly as the output current increases. This creates a positive output impedance characteristic at the output of the module. In a parallel system, when the output current of a module is too high due to parameter differences or changes in lighting, its output voltage will automatically decrease slightly. Under the constraint of the common DC bus voltage, some output power is naturally distributed to other modules with relatively higher output voltages. This achieves autonomous current sharing without the need for inter-module communication, suppresses circulating currents or power oscillations that may be caused by slight differences in the output voltage of each module, and ensures that the entire parallel charging system can operate stably and reliably for a long time under pure hardware control.

[0056] In an optional embodiment, in the step of controlling the analog switch to close and charging the current power signal to the sampling capacitor at the sampling time of each disturbance cycle, the sampling time is set to be offset from the switching action of the power switch in the DC-DC power conversion circuit by a predetermined phase, so as to avoid the influence of electromagnetic interference introduced by the switching action on the sampling accuracy; the predetermined phase is controlled by the sampling pulse output by the monostable multivibrator triggered by the oscillator output after a delay through the RC phase shift network.

[0057] In this embodiment, to further enhance the stability of multi-module parallel operation, output impedance compensation or droop characteristics can be introduced through pure analog circuitry. Specifically, the output current or inductor current of each DC-DC power converter circuit is sampled analogically. For example, a voltage signal proportional to the current is obtained by connecting a small-value sampling resistor in series in the output loop or by using a current-sensing amplifier. This voltage signal is then processed by a proportional amplifier circuit and superimposed onto the feedback terminal of the original voltage feedback control loop of that DC-DC power converter circuit. This is combined with the output voltage sampling signal, thus introducing a voltage signal proportional to the output current into the control loop. The negative feedback term causes the control loop to actively adjust the reference value or feedback comparison point of the output voltage to decrease when the output current of the module increases. This results in a slight decrease in the equivalent output voltage of the module as the output current increases, thus creating a positive output impedance characteristic at the output of the module. This positive output impedance characteristic allows the output voltage of a module to automatically and slightly decrease when its output current is too high due to parameter differences or changes in lighting in a parallel system. Under the constraint of the common DC bus voltage, this naturally distributes some of the output power to other modules with relatively higher output voltages, achieving an autonomous current sharing effect without the need for inter-module communication.

[0058] In an optional embodiment, the step of adjusting the duty cycle change based on the power change amplitude represented by the difference signal further includes a step of segmenting the power change amplitude represented by the difference signal, which may specifically include: When the power change amplitude represented by the difference signal falls within the first threshold range, the change in duty cycle is controlled by the first adjustment coefficient. When the power change amplitude represented by the difference signal falls into a second threshold range that is greater than the first threshold range, the change in duty cycle is controlled by a second adjustment coefficient that is greater than the first adjustment coefficient. When the power change amplitude represented by the difference signal falls into a third threshold interval greater than the second threshold interval, a third adjustment coefficient greater than the second adjustment coefficient is used to control the change in duty cycle; wherein, the first threshold interval, the second threshold interval, and the third threshold interval are divided by a threshold comparison network composed of multiple series-connected voltage comparators, and the first adjustment coefficient, the second adjustment coefficient, and the third adjustment coefficient are implemented by selecting different voltage divider resistor networks by analog switch arrays connected to each output terminal of the threshold comparison network to control the slope of the reference voltage change of the PWM comparator.

[0059] To achieve fine-tuning of the duty cycle change based on the power variation amplitude, this embodiment further segments the power variation amplitude represented by the difference signal. Specifically, the difference ΔP between the current power signal and the previous power signal is input to a threshold comparison network composed of multiple voltage comparators connected in series. Each comparator in this network has a different reference voltage, thereby dividing the amplitude range of ΔP into a first threshold interval, a second threshold interval, and a third threshold interval. The lower limit of the second threshold interval is greater than the upper limit of the first threshold interval, and the lower limit of the third threshold interval is greater than the upper limit of the second threshold interval, thus forming several continuous threshold intervals with clear magnitude relationships. When the voltage value of ΔP falls into a certain threshold interval, the corresponding comparator outputs a high level, and the other comparators output a low level, thereby achieving hardware identification of the interval to which the power variation amplitude belongs. This segmented processing method allows the system to adjust the duty cycle adjustment intensity in stages according to the severity of power changes, enabling rapid response during rapid changes in illumination and reducing disturbance amplitude to reduce oscillations when approaching the maximum power point.

[0060] In the specific circuit implementation, the above-mentioned segmented processing can rely on a threshold comparison network composed of multiple series voltage comparators, and an analog switch array connected to the output of each comparator. When the difference signal ΔP falls into a certain threshold range, the output state of the corresponding voltage comparator changes, driving the analog switch array to select a specific voltage divider resistor network associated with it. This voltage divider resistor network is connected to the reference voltage adjustment terminal of the PWM comparator, and the change in duty cycle is controlled by changing the slope of the reference voltage change. When ΔP falls within the first threshold range (i.e., the power change is small), the analog switch-selected voltage divider resistor network results in a small slope for the reference voltage change, corresponding to a small first adjustment coefficient, thus limiting the duty cycle change to a narrow range. When ΔP falls within the second threshold range, the analog switch selects another voltage divider resistor network, increasing the slope for the reference voltage change, corresponding to a second adjustment coefficient greater than the first adjustment coefficient, thus increasing the duty cycle change accordingly. When ΔP falls within the third threshold range (i.e., the power change is large), the analog switch-selected voltage divider resistor network further increases the slope for the reference voltage change, corresponding to a third adjustment coefficient, reaching the maximum duty cycle change. Therefore, by combining a purely analog threshold comparison network with a resistor network, multi-level adaptive adjustment of the disturbance step size can be achieved, ensuring both the dynamic response speed of the system during sudden changes in illumination and the steady-state accuracy when operating near the maximum power point.

[0061] In an optional embodiment, the step of adaptively adjusting the disturbance step size based on the power change amplitude further includes a sub-step of adaptively adjusting the disturbance period based on a dual parameter of the power change rate and the common DC bus voltage fluctuation, which may specifically include: Calculate the power change rate, which is determined based on the absolute value of the difference between the current power signal and the previous power signal, the previous power signal, and the duration of the current disturbance period. Collect the real-time voltage of the common DC bus and calculate the voltage fluctuation between the real-time voltage and the bus reference voltage; Multiple power change rate intervals and multiple voltage fluctuation intervals are pre-divided, and a corresponding disturbance period scaling factor is configured for each interval combination. Based on the real-time calculated power change rate and voltage fluctuation, the corresponding interval combination is matched, and the basic disturbance period is multiplied by the corresponding disturbance period scaling factor to obtain the real-time disturbance period. The real-time disturbance period is synchronized to the oscillator of the PWM control circuit to achieve dynamic matching between the disturbance period and power changes and bus voltage fluctuations. The adjustment of the disturbance period and the adjustment of the disturbance step size are linked. When the disturbance period scaling factor is less than or equal to the first threshold, the disturbance step size is increased synchronously. When the disturbance period scaling factor is greater than or equal to the second threshold, the disturbance step size is decreased synchronously.

[0062] Building upon the step of adaptively adjusting the disturbance step size based on the power change amplitude, this embodiment further introduces a dual-parameter adaptive adjustment mechanism based on the power change rate and the common DC bus voltage fluctuation to achieve dynamic optimization of the disturbance period. First, the power change rate is calculated in real time. This rate is determined by the absolute value of the difference between the current power signal and the previous power signal, the previous power signal, and the currently used disturbance period, reflecting the severity of power fluctuations per unit time. Simultaneously, the real-time voltage of the common DC bus is continuously acquired and compared with a preset bus reference voltage to calculate the voltage fluctuation. This fluctuation characterizes the degree of disturbance to the bus voltage caused by load changes or imbalances in module outputs. These two parameters respectively characterize the stable state of the current operating condition from the input power side and the output bus side.

[0063] Based on multiple pre-set power change rate ranges and multiple voltage fluctuation ranges, the real-time calculated power change rate and voltage fluctuation are matched to their respective range combinations. Each range combination corresponds to a preset disturbance period scaling factor. Multiplying the base disturbance period by this scaling factor yields the real-time disturbance period suitable for the current operating condition. This real-time period is synchronized to the oscillator of the PWM control circuit, enabling the disturbance period to dynamically adjust with changes in power change rate and bus voltage fluctuation. Furthermore, the adjustment of the disturbance period and the disturbance step size can form a linkage mechanism. When the disturbance period scaling factor is less than or equal to a first threshold, it indicates that the current operating condition is changing drastically and requires faster tracking; therefore, the disturbance period is shortened while the disturbance step size is increased simultaneously. When the disturbance period scaling factor is greater than or equal to a second threshold, it indicates that the current operating condition is becoming more stable; to avoid over-adjustment, the disturbance period is extended while the disturbance step size is decreased simultaneously. Through this dual-parameter linkage adjustment, the technical solution of this embodiment enables the MPPT process of each solar cell to achieve a better balance between dynamic response speed and steady-state accuracy.

[0064] In an optional embodiment, after the step of enhancing parallel stability by implementing output impedance compensation or droop characteristics through analog circuitry, a sub-step is further included to adaptively correct the droop coefficient based on the power difference and output current change rate of each MPPT module. Specifically, this may include: Calculate the power deviation rate between the real-time output power of each MPPT module and the average output power of all modules; Calculate the real-time rate of change of the output current for each channel; The power deviation rate and the real-time change rate of the output current are rectified and amplified by analog circuits to form two analog correction voltages. The two analog correction voltages are weighted and summed by an analog adder to obtain the comprehensive correction voltage. The comprehensive correction voltage is superimposed on the reference setting circuit of the droop coefficient to correct the droop coefficient in real time; When the power deviation rate is greater than or equal to the first preset threshold or the real-time change rate of the output current is greater than or equal to the second preset threshold, the correction of the droop coefficient is triggered by the analog comparison circuit, so that the corrected droop coefficient increases linearly with the comprehensive correction voltage.

[0065] This embodiment further introduces a multi-dimensional adaptive correction mechanism based on the power difference and output current change rate of each MPPT module to achieve dynamic optimization of the droop coefficient. First, the power deviation rate between the real-time output power of each MPPT module and the average output power of all modules is calculated. This deviation rate reflects the power sharing balance of the module in the parallel group. Simultaneously, the real-time change rate of the output current of each module is calculated, which characterizes the severity of current fluctuations. The power deviation rate and the real-time change rate of the output current are respectively fed into analog rectification and amplification circuits, and after processing, two independent analog correction voltages are formed. These two correction voltages carry information on the power imbalance and the intensity of current fluctuations, respectively. The two analog correction voltages are input into an analog adder for weighted summation to obtain a comprehensive correction voltage. This comprehensive correction voltage comprehensively reflects the deviation of the current module in terms of both power balance and current stability. This comprehensive correction voltage is superimposed on the droop coefficient reference setting circuit to correct the original droop coefficient in real time. When the power deviation rate is greater than or equal to the first preset threshold, or the real-time change rate of the output current is greater than or equal to the second preset threshold, the analog comparator circuit is triggered, initiating an active correction process for the droop coefficient. This causes the corrected droop coefficient to increase linearly with the increase of the comprehensive correction voltage. This means that when a module has a large power difference with other modules, or when its own current fluctuates drastically, its output impedance characteristics will be correspondingly enhanced, and the slope of the output voltage decreasing with increasing current will become more significant. This can more effectively suppress circulating current trends and promote a balanced power distribution among the modules.

[0066] In optional embodiments, the step of using analog circuits to achieve output impedance compensation or droop characteristics to enhance parallel stability may further include introducing multiple anti-circulating current protection mechanisms, specifically including: A first-stage anti-reverse current isolation diode is installed at the output of each DC-DC power conversion circuit; Before the first-stage reverse current isolation diode, the output current direction of the DC-DC power conversion circuit is detected by an analog sampling circuit. When a reverse current is detected, an analog comparator triggers a monostable multivibrator, which outputs a latching pulse with a predetermined width. The latching pulse controls a discharge switch connected in parallel at the output of the DC-DC power conversion circuit to turn on instantaneously in order to absorb the reverse current spike. An output voltage monitoring circuit is set up. When the voltage of the common DC bus is higher than the output voltage of the DC-DC power conversion circuit and exceeds a preset threshold, the PWM control signal of the DC-DC power conversion circuit is forced to a low level through an analog logic gate circuit, so that it stops working until the next disturbance cycle begins.

[0067] In this embodiment, a first-stage reverse current isolation diode is first installed between the output terminal of each DC-DC power conversion circuit and the common DC bus. This diode can be a Schottky diode or an ideal diode circuit composed of MOSFETs. Its unidirectional conductivity is used as a basic physical isolation barrier. That is, when the output voltage of this DC-DC converter is higher than the bus voltage, the diode is forward-biased and the electrical energy flows normally to the energy storage unit. When the output voltage of this circuit is lower than the bus voltage or the output stops due to a fault, the diode is reverse-biased and automatically turns off, thereby preventing current from flowing back from the bus into this converter. Building upon this, to achieve proactive sensing and rapid intervention of reverse current before diode isolation, an analog sampling circuit can be installed at the node between the diode and the DC-DC converter output. This sampling circuit can consist of a precision sampling resistor with a small resistance value, such as milliohms, and a high-precision differential amplifier. The differential amplifier amplifies the voltage difference across the sampling resistor and converts it into a polarized voltage signal. When current flows from the converter to the bus, this signal is positive; when the current reverses, flowing from the bus to the converter, the signal becomes negative. This polarized signal is then fed into an analog comparator, with its reference terminal set to zero potential or a very small positive threshold. When reverse current occurs, the comparator output immediately flips, changing from the normal low level to a high level, thus quickly identifying the reverse current event.

[0068] Once the analog comparator detects a reverse current and outputs a toggling level, this signal directly triggers a monostable multivibrator (MSF). The MSF can be designed to be triggered on either the rising or falling edge and output a latch-up pulse of a predetermined width after triggering. This pulse width, for example, is 5 to 20 microseconds, longer than the possible duration of the reverse current spike but short enough to avoid significantly affecting normal power delivery. This latch-up pulse is sent to a bleeder switch, which can be an N-channel MOSFET, connected in parallel at the output of the DC-DC power converter circuit. Upon receiving the latch-up pulse, the MOSFET instantaneously turns on. The turned-on bleeder switch provides a low-impedance bypass path for the reverse current spike. The current no longer flows backward into the inductor or body diode of the converter, but instead flows rapidly to ground or a snubber circuit through the bleeder, effectively clamping the reverse voltage spike and protecting the preceding power semiconductor devices. Simultaneously, an independent output voltage monitoring circuit can be set up. This circuit continuously collects the real-time voltage of the common DC bus and the output voltage of the local DC-DC converter, and sends both to an analog comparator or a window comparator. When the bus voltage is higher than the local output voltage and the difference exceeds a preset threshold, such as 0.5V to 1V (this threshold must be higher than the forward voltage drop of the diode to distinguish between normal operation and abnormal reverse-current operation), the comparator outputs an effective level. This effective level, along with the output of the aforementioned monostable multivibrator, is sent to an analog logic gate circuit, such as an OR gate. The output of the logic gate is directly connected to the enable or reset terminal of the PWM controller. Once the logic gate determines that protection is needed, it forcibly pulls the PWM control signal of the local DC-DC converter low, causing the power switching transistor to immediately stop switching, and the converter enters a pause state. This pause state will continue until the end of the current disturbance cycle. At the beginning of the next disturbance cycle, the relationship between the bus voltage and the local output voltage is re-detected. If the conditions are met, PWM operation is automatically resumed. This solution employs a triple mechanism of passive diode isolation, active reverse current discharge, and forced PWM shutdown in case of abnormal output voltage, which enables comprehensive protection against reverse current and circulating current in parallel systems.

[0069] In optional embodiments, the technical solution of this application may further include a simulation method for predicting the disturbance direction and dynamically compensating for the period based on historical power trends, specifically including: Set up at least two stages of series-connected analog sample-and-hold circuits to store the current power signal, the power signal of the previous perturbation cycle, and the historical power signal of the perturbation cycle before that in sequence. The current power signal and the previous power signal are input into a first differential comparison circuit to obtain a first trend signal; the previous power signal and the historical power signal are input into a second differential comparison circuit to obtain a second trend signal. The first trend signal and the second trend signal are input into an analog XOR circuit to determine whether the power change trend has reversed. When the output of the analog XOR circuit is in the first state, the current disturbance direction and disturbance period scaling factor are maintained. When the output of the analog XOR circuit is in the second state, an analog monostable circuit is triggered to generate a temporary acceleration pulse. The temporary acceleration pulse temporarily multiplies the scaling factor of the current disturbance period by an acceleration factor less than 1, shortening the disturbance period. At the same time, it temporarily multiplies the disturbance step size by a step size factor greater than 1, and restores the original scaling factor and step size after the disturbance period ends.

[0070] This scheme first constructs the historical trajectory of power changes by setting up at least two stages of analog sample-and-hold circuits connected in series. Specifically, the first-stage sample-and-hold circuit closes its analog switch at the sampling moment of each disturbance cycle, samples the current power signal and stores it on the first sampling capacitor, and the output signal is recorded as the current power signal. The second-stage sample-and-hold circuit takes the output of the first stage as input and operates at the next sampling moment, thereby transferring and storing the power signal of the previous disturbance cycle on the second sampling capacitor, and the output signal is recorded as the previous power signal. To obtain the historical power signal of an earlier cycle, the two-stage sample-and-hold circuit can be further extended in series, that is, the first stage stores the current power signal, the second stage stores the previous power signal, and a third-stage sample-and-hold circuit is added with the output of the second stage as input, thus obtaining the historical power signal of the two-eighths-cycle disturbance cycle. The power signals at three different times exist simultaneously in the circuit in the form of analog voltages. Subsequently, the current power signal and the previous power signal are respectively connected to the non-inverting input and the inverting input of the first differential comparator circuit. The comparison result outputs a first trend signal. If the current power is greater than the previous power, the first trend signal is high, indicating that the power is increasing. If the current power is less than the previous power, the first trend signal is low, indicating that the power is decreasing. Similarly, the previous power signal and the historical power signal are connected to the second differential comparator circuit to obtain a second trend signal, reflecting the direction of power change in the previous disturbance cycle relative to the disturbance cycle before that. These two trend signals are output in parallel in analog level form, providing a basis for subsequent judgment on whether the power change trend has reversed.

[0071] Simultaneously, in this scheme, the first trend signal and the second trend signal are fed into an analog XOR circuit. The analog XOR circuit can be composed of multiple analog switches and operational amplifiers. Its function is to output a low level, representing the first state, when the logic states of the two input signals are the same (i.e., both are high or both are low); and to output a high level, representing the second state, when the logic states of the two input signals are different (one is high and the other is low). Specifically, if the power increases or decreases for two consecutive cycles, it indicates a consistent trend, and the XOR output is low; if the power increases then decreases or decreases then increases, it indicates a trend reversal within adjacent cycles, and the XOR output is high. When the analog XOR circuit outputs the first state (low level), it indicates that the current disturbance direction is correct and the power change is stable, and the system maintains the current disturbance direction and the predetermined disturbance period scaling factor unchanged. When the analog XOR circuit outputs the second state (high level), it indicates that the power change trend has just reversed, which means that the disturbance direction may have overshooted or the system is approaching its maximum power point, requiring immediate acceleration of the response. At this point, the high-level signal triggers an analog monostable circuit, which outputs a temporary acceleration pulse with a fixed width. This acceleration pulse acts in two ways: first, by temporarily multiplying the scaling factor of the current disturbance period by an acceleration factor less than 1, such as 0.5 or 0.6, significantly shortening the disturbance period; and second, by temporarily multiplying the disturbance step size by a step size factor greater than 1, such as 1.5 or 2.0, correspondingly increasing the change in duty cycle. These two temporary adjustments are only effective within the current disturbance period. The pulse width of the monostable circuit is precisely designed to be equal to the duration of one disturbance period. Therefore, after the disturbance period ends, the pulse automatically disappears, and the system's disturbance period scaling factor and disturbance step size immediately return to their original values ​​before acceleration. Thus, this scheme can achieve rapid response and dynamic compensation for power trend reversal while avoiding over-adjustment.

[0072] It should be understood that in the methods described in one or more embodiments of this specification, the order of some steps may be adjusted according to actual needs, or some steps may be omitted.

[0073] Based on the foregoing technical solutions, this invention also provides a parallel charging device for multiple solar cell units with independent maximum power points, such as... Figure 2 As shown, the device, from a macroscopic perspective, may include the following modules: The voltage and current sampling module 202 is used to sample the voltage and current of each of the multiple solar energy units to obtain the corresponding voltage sampling signal and current sampling signal. The analog multiplication module 204 is used to perform analog multiplication on the voltage sampling signal and the current sampling signal to obtain the current power signal corresponding to the current power. The sample-and-hold module 206 is used to store the current power signal through an analog sample-and-hold circuit to obtain the previous power signal of the previous disturbance cycle; The comparison module 208 is used to compare the current power signal with the previous power signal input to the differential comparison circuit to obtain a comparison result representing the power change trend; The duty cycle adjustment module 210 is used to determine the duty cycle disturbance direction within the current disturbance cycle based on the comparison result, calculate the power change rate and the voltage fluctuation of the common DC bus, determine the disturbance cycle scaling factor based on the power change rate and the voltage fluctuation to update the disturbance cycle and the disturbance step size, and then adjust the duty cycle of the corresponding DC-DC power conversion circuit based on the disturbance direction and the updated disturbance step size, so that each solar cell independently approaches its maximum power point operating state. The parallel output module 212 is used to input the outputs of each power conversion channel into the energy storage unit in parallel after being isolated from reverse current.

[0074] Those skilled in the art will understand that the modules in the apparatus of the foregoing embodiments can be distributed in the apparatus of the embodiments as described in the embodiments, or they can be located in one or more devices different from this embodiment with corresponding changes. The modules of the above embodiments can be combined into one module, or they can be further divided into multiple sub-modules, that is, the module division can be flexibly performed to implement the method embodiments described above.

[0075] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A parallel charging method for multiple independent maximum power points of solar cells, characterized in that, include: Voltage and current samples are performed on each of the multiple solar energy units to obtain the corresponding voltage and current sampling signals. Perform an analog multiplication operation on the voltage sampling signal and the current sampling signal to obtain the current power signal corresponding to the current power; The current power signal is stored by simulating a sample-and-hold circuit to obtain the previous power signal of the previous disturbance cycle; The current power signal is compared with the previous power signal by inputting a differential comparator circuit to obtain a comparison result that represents the trend of power change. The duty cycle disturbance direction within the current disturbance cycle is determined based on the comparison result, specifically including: maintaining the original disturbance direction when the comparison result indicates that the current power is greater than the power of the previous cycle, and reversing the disturbance direction when the current power is less than the power of the previous cycle. On the first execution, the initial disturbance period is preset. and initial perturbation step size ; Calculate the rate of change of power voltage fluctuations with common DC bus : In the formula, For the current disturbance period, when Time setting This is the preset maximum value; In the formula, This is the real-time bus voltage. The bus reference voltage; The disturbance period scaling factor is determined based on the power change rate and voltage fluctuation. The perturbation period is updated according to the following formula: Update the perturbation step size according to the following formula: in , Based on the value, ; Calculated and Effective from the start of the next disturbance period; Based on the perturbation direction and the updated perturbation step size, the corresponding DC is adjusted within each perturbation period. The duty cycle of the DC power conversion circuit allows each solar cell to independently approach its maximum power point operating state. The outputs after power conversion from each circuit are isolated from reverse current and then connected in parallel to the energy storage unit.

2. The parallel charging method for multiple independent maximum power points of solar cells as described in claim 1, characterized in that, The step of storing the current power signal using an analog sample-and-hold circuit to obtain the previous power signal of the previous disturbance period includes: At the sampling moment of each disturbance cycle, the analog switch is closed to charge the current power signal to the sampling capacitor; During the next disturbance cycle, the analog switch is turned off, the voltage of the sampling capacitor is maintained, and the signal is buffered by a voltage follower to form the previous power signal.

3. The parallel charging method for multiple independent maximum power points of solar cells as described in claim 2, characterized in that, In the step of controlling the analog switch to close and charging the current power signal to the sampling capacitor at the sampling time of each disturbance cycle, the sampling time is set to be offset from the switching action of the power switch in the DC-DC power conversion circuit by a predetermined phase, so as to avoid the influence of electromagnetic interference introduced by the switching action on the sampling accuracy; the predetermined phase is controlled by the sampling pulse output by the monostable trigger triggered by the oscillator output after being delayed by the RC phase shift network.

4. The parallel charging method for multiple independent maximum power points of solar cells as described in claim 1, characterized in that, When the current power signal is greater than the previous power signal, the comparison result is a high level or positive voltage indicating the correct direction of the disturbance; When the current power signal is less than the previous power signal, the comparison result is a low level or reverse voltage indicating that the perturbation direction is incorrect and requires reverse perturbation.

5. The parallel charging method for multiple independent maximum power points of solar cells as described in claim 1, characterized in that, The step of determining the duty cycle disturbance direction within the current disturbance period based on the comparison result includes: When the comparison result indicates that the current power is greater than the power of the previous cycle, the original perturbation direction is maintained. The perturbation direction is reversed when the comparison result indicates that the current power is less than the power of the previous cycle.

6. The parallel charging method for multiple independent maximum power points of solar cells as described in claim 1, characterized in that, According to The step of adjusting the duty cycle change step size also includes a secondary correction of the step size based on the power change amplitude, specifically including: Obtain the difference signal between the current power signal and the previous power signal; The difference signal is rectified and amplified to form an analog control voltage used to characterize the power change amplitude; The analog control voltage is superimposed as a multiplication factor to This allows for a further increase in the step size when the power change is large, and a further decrease in the step size when the power change is small.

7. The parallel charging method for multiple independent maximum power points of solar cells as described in claim 1, characterized in that, In the step of connecting the outputs of each power conversion path to the energy storage unit in parallel after being isolated from reverse current, the reverse current isolation is achieved by setting a Schottky diode or ideal diode circuit between each output terminal and the common DC bus.

8. The parallel charging method for multiple independent maximum power points of solar cells as described in claim 1, characterized in that, The step of connecting the outputs of each power conversion path in parallel to the energy storage unit after reverse current isolation also includes a step of enhancing parallel stability by implementing output impedance compensation or droop characteristics through analog circuitry, including: The output current or inductor current of each DC-DC power conversion circuit is sampled in analog form. The sampled current signal is amplified proportionally and then superimposed on the feedback terminal of the control loop of that DC-DC power conversion circuit. This causes the equivalent output voltage of that circuit to decrease when the output current increases, thus forming a positive output impedance characteristic.

9. A parallel charging device for multiple solar cell units with independent maximum power points, characterized in that, include: The voltage and current sampling module is used to sample the voltage and current of each of the multiple solar cells to obtain the corresponding voltage and current sampling signals. The analog multiplication module is used to perform analog multiplication on the voltage sampling signal and the current sampling signal to obtain the current power signal corresponding to the current power. The sample-and-hold module is used to store the current power signal through an analog sample-and-hold circuit to obtain the previous power signal of the previous disturbance cycle; The comparison module is used to compare the current power signal with the previous power signal input to the differential comparison circuit to obtain a comparison result representing the power change trend; The duty cycle adjustment module is used to determine the duty cycle disturbance direction within the current disturbance cycle based on the comparison result, calculate the power change rate and the voltage fluctuation of the common DC bus, determine the disturbance cycle scaling factor based on the power change rate and voltage fluctuation to update the disturbance cycle and disturbance step size, and then adjust the duty cycle of the corresponding DC-DC power conversion circuit based on the disturbance direction and the updated disturbance step size, so that each solar cell independently approaches its maximum power point operating state. The parallel output module is used to input the outputs of each power conversion channel into the energy storage unit in parallel after being isolated from reverse current.

Images