Printed circuit board and method of manufacturing the same

Abstract

The present disclosure provides a printed circuit board and a manufacturing method thereof, which can include an insulating layer, a pad disposed on the insulating layer, a solder resist layer disposed on the insulating layer and having an opening exposing at least a portion of the pad, and a solder bump at least partially disposed in the opening of the solder resist layer. The solder bump has a rectangular shape in a cross-sectional view cut in a direction parallel to a height direction, the height direction being perpendicular to a surface of the solder resist layer.

Description

Technical Field

[0001] This disclosure relates to a printed circuit board and a method for manufacturing the same. Background Technology

[0002] As electronic devices (including mobile phones) in the information technology (IT) field become smaller, the size of the metal pillars (or solder bumps) formed on the printed circuit boards on which electronic components are mounted is also decreasing.

[0003] During the manufacturing process of forming solder bumps on the pad layer, anisotropic etching of the solder mask layer can cause thickness variations in the solder mask layer, which can reduce the reliability of solder bumps located in the openings of the solder mask layer. Summary of the Invention

[0004] The embodiments of this disclosure attempt to provide a printed circuit board and a method for manufacturing the same, which can prevent reliability degradation of solder bumps.

[0005] However, the problems solved by the embodiments of this disclosure are not limited to those described above, and various extensions can be made within the scope of the technical concepts included in this disclosure.

[0006] A printed circuit board according to an embodiment may include: an insulating layer; pads disposed on the insulating layer; solder bumps; and a solder resist layer disposed on the insulating layer and having openings that expose at least a portion of the pads to the solder bumps. The solder bumps are at least partially disposed in the openings of the solder resist layer. In a cross-sectional view cut along a direction parallel to the height direction, the cross-section of the solder bumps may have a rectangular shape, the height direction being perpendicular to the surface of the solder resist layer.

[0007] The solder bump may include: a first portion disposed in the opening; and a second portion extending from the first portion and protruding over the solder resist layer along the height direction.

[0008] In the cross-sectional view, the first width of the first portion and the second width of the second portion may be substantially the same.

[0009] In the cross-sectional view, the third width of the opening may be substantially the same as the first width of the first portion.

[0010] The second portion may not extend onto the solder resist layer along a plane direction parallel to the surface of the solder resist layer.

[0011] In a plan view parallel to the surface of the solder resist layer, the planar shape of the solder bump may be substantially the same as the planar shape of the opening.

[0012] The solder bumps may not extend onto the solder resist layer in a plane direction parallel to the surface of the solder resist layer.

[0013] A method for manufacturing a printed circuit board according to an embodiment may include: forming pads disposed on an insulating layer; forming a solder resist layer on the insulating layer, the solder resist layer having openings that expose at least a portion of the pads; forming solder bumps in the openings of the solder resist layer; and removing a portion of the solder resist layer by plasma treatment.

[0014] The step of forming the solder bump may include: applying a solder material layer to fill the opening and disposing it on the solder resist layer; and removing the portion of the solder material layer disposed on the solder resist layer.

[0015] The step of forming the solder bump may include: forming a mask layer on the solder resist layer, the mask layer covering a first region of the solder resist layer and exposing a second region of the solder resist layer, the second region corresponding to the opening of the solder resist layer and a portion surrounding the opening; applying a solder material layer to fill the opening of the solder resist layer and disposed on the second region of the solder resist layer; and removing the portion of the solder material layer disposed on the second region of the solder resist layer.

[0016] After the step of removing a portion of the solder resist layer by plasma treatment, the second portion of the solder bump may protrude from the solder resist layer along the height direction.

[0017] The mask layer can be a metal mask.

[0018] The mask layer may include a dry film.

[0019] The method for manufacturing the printed circuit board may further include removing the mask layer.

[0020] The step of removing the mask layer can be performed together with the step of removing the solder material layer.

[0021] According to an embodiment, a printed circuit board and a method for manufacturing the same can be provided to prevent reliability degradation of solder bumps.

[0022] However, it is readily understood that the effects of the embodiments are not limited to those described above, and various extensions can be made without departing from the concept and scope of this disclosure. Attached Figure Description

[0023] Figure 1 This is a plan view showing a portion of a printed circuit board according to an embodiment.

[0024] Figure 2 It is along Figure 1A cross-sectional view of line I-I'.

[0025] Figures 3 to 7 This is a cross-sectional view illustrating a method for manufacturing a printed circuit board according to an embodiment.

[0026] Figure 8 and Figure 9 This is a cross-sectional view illustrating a method for manufacturing a printed circuit board according to another embodiment. Detailed Implementation

[0027] In the following, various embodiments of the present disclosure will be described in detail with reference to the accompanying drawings, enabling those skilled in the art to readily implement the present disclosure. The present disclosure may be implemented in various different forms and is not limited to the embodiments described herein.

[0028] For clarity of description, parts not related to the description have been omitted in the drawings, and the same reference numerals are designated for the same or similar elements throughout the specification.

[0029] The accompanying drawings are provided merely to facilitate understanding of the embodiments disclosed in this specification, and the drawings should not be construed as limiting the technical concepts disclosed in this specification. It will be understood that this disclosure includes all modifications, equivalents and alternatives without departing from the scope and technical concepts of this disclosure.

[0030] Furthermore, for ease of illustration, the dimensions of each element (such as thickness) are arbitrarily shown in the accompanying drawings, therefore this disclosure is not limited to the drawings. In the drawings, thickness is enlarged to clearly show layers and regions. Additionally, in the drawings, the thickness of some layers and regions is exaggerated for ease of illustration.

[0031] Furthermore, it will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it may be directly on said other element, or there may be an intermediate element present. Conversely, when an element is referred to as being "directly on" another element, there is no intermediate element present. Additionally, in the specification, the terms "on" or "above" mean located above or below the target portion, and do not necessarily mean located on the upper side of the target portion based on a direction opposite to the direction of gravity.

[0032] Furthermore, throughout the specification, unless explicitly stated otherwise, the words “comprising,” “including,” or “having” will be understood to imply the inclusion of other elements without excluding any other elements.

[0033] Throughout the instruction manual, the term "in plan view" refers to the target portion viewed from above, while the term "in section view" refers to the target portion viewed from the side after taking a vertical section.

[0034] Furthermore, throughout the specification, “connection” means two or more elements directly connected, two or more elements indirectly connected through other elements, two or more elements physically and electrically connected, or two or more elements that may be referred to by different names depending on their location or function but are actually one unit.

[0035] In the following, various embodiments and variations will be described in detail with reference to the accompanying drawings.

[0036] Reference Figure 1 and Figure 2 A printed circuit board according to an embodiment is described. Figure 1 This is a plan view showing a portion of a printed circuit board according to an embodiment, and Figure 2 It is along Figure 1 A cross-sectional view of line I-I'.

[0037] Reference Figure 1 and Figure 2 The printed circuit board according to the embodiment may include: an insulating layer 110; a wiring structure 120, at least partially embedded in the insulating layer 110 and including pads 122 disposed on or in the insulating layer 110; a solder mask layer 130 disposed on the insulating layer 110 and having a plurality of openings 131 exposing the pads 122; and a plurality of solder bumps 141, each at least partially disposed in the plurality of openings 131 of the solder mask layer 130.

[0038] The insulating layer 110 may include a thermosetting resin (such as epoxy resin), a thermoplastic resin (such as polyimide), or a material prepared by impregnating a reinforcing material such as glass fiber and / or inorganic filler into the resin (e.g., a prepreg), but the embodiments are not limited thereto. The insulating layer 110 may be multiple layers.

[0039] The wiring structure 120 may include a wiring layer 121 embedded in an insulating layer 110, pads 122 disposed on the insulating layer 110, and vias 123 connecting the wiring layer 121 and the pads 122.

[0040] Pad 122 can electrically connect external devices (such as semiconductor chips) to the printed circuit board.

[0041] Wiring structure 120 may include conductive metal (e.g., copper), but embodiments are not limited thereto.

[0042] The solder mask 130 may cover the insulating layer 110 and the wiring structure 120, and the opening 131 of the solder mask 130 may expose at least a portion of at least one of the pads 122.

[0043] The solder mask layer 130 may be a photoresist layer, but the embodiments are not limited to this.

[0044] At least a portion of each of the solder bumps 141 may be disposed in a corresponding one of the openings 131 in the solder mask layer 130.

[0045] In a cross-sectional view cut along a direction parallel to the third direction DR3, the cross-section of each of the solder bumps 141 may have a generally rectangular shape, where the third direction DR3 is a height direction perpendicular to a first direction DR1 and a second direction DR2 parallel to the surface of the solder mask 130 (e.g., at least one surface of the solder mask 130 on the third direction DR3). In this disclosure, the third direction DR3 (i.e., the height direction) may refer to the stacking direction of the various layers in the printed circuit board.

[0046] Each of the solder bumps 141 may include: a first portion 141A disposed in an opening 131 of the solder mask layer 130; and a second portion 141B extending from the first portion 141A and protruding over the solder mask layer 130 along a third direction DR3 (i.e., the height direction).

[0047] In the cross-sectional view, the first portion 141A of each of the solder bumps 141 may have a first width W1, and the second portion 141B may have a second width W2. The first width W1 and the second width W2 may be substantially the same. The second portion 141B of each of the solder bumps 141 may have a substantially constant second width W2 until the end.

[0048] In one embodiment, in a cross-sectional view cut along a direction parallel to the third direction DR3, each of the solder bumps 141 may have a generally trapezoidal shape.

[0049] For example, the first width W1 of the first portion 141A of each of the solder bumps 141 and the second width W2 of the second portion 141B of each of the solder bumps 141 may gradually increase along the third direction DR3. However, the embodiments are not limited thereto.

[0050] The width of each of the solder bumps 141 may be substantially equal to the third width W3 of each of the openings 131 of the solder mask layer 130 (see [reference]). Figure 4 Furthermore, the first portion 141A of each of the solder bumps 141 may fill each of the openings 131. W1, W2, and W3 can be measured using an electron microscope. Other methods and / or tools, as understood by one of ordinary skill in the art, may be used even if not described in this disclosure.

[0051] As used herein, and as those skilled in the art will understand, the expression “substantially identical” can mean having the same dimensions (such as width) relative to a size (in the context of a planar shape) and allows for approximations, inaccuracies, and measurement limitations in the relevant context. In one or more respects, the terms “substantially” and “approximately” can provide industry-accepted tolerances for the relativity of their respective items and / or between items, such as tolerances of ±1%, ±5%, or ±10% of the stated actual value, and other suitable tolerances.

[0052] The second portion 141B of each of the solder bumps 141 may not extend into the solder mask 130 along a planar direction parallel to the surface of the insulating layer 110 or the solder mask 130 (e.g., at least one surface of the insulating layer 110 or the solder mask 130 on the third-direction DR3).

[0053] In a plan view of the printed circuit board viewed from above (e.g., a plan view parallel to the surface of the solder mask 130), the planar shape of each of the solder bumps 141 may be substantially the same as the planar shape of each of the openings 131 in the solder mask 130.

[0054] exist Figure 1 In this embodiment, the planar shape of each of the openings 131 in the solder mask layer 130 and the planar shape of each of the solder bumps 141 are generally circular, but the embodiment is not limited to this, and the planar shape of each of the solder bumps 141 and the planar shape of each of the openings 131 in the solder mask layer 130 can be modified in various ways while having substantially the same planar shape.

[0055] In an embodiment, each of the solder bumps 141 may include: a first portion 141A disposed in an opening 131 of the solder mask layer 130; and a second portion 141B extending from the first portion 141A and protruding over the solder mask layer 130 along a third direction DR3 (i.e., the height direction), and the first portion 141A and the second portion 141B may have substantially the same width. Additionally, each of the solder bumps 141 may have a generally rectangular shape in a cross-sectional view cut along a direction perpendicular to a first direction DR1 and a second direction DR2 parallel to the surface of the insulating layer 110. Furthermore, the first portion 141A of each of the solder bumps 141 may have a shape that fills each of the openings 131 of the solder mask layer 130, the second portion 141B of each of the solder bumps 141 may not extend onto the solder mask layer 130 along a planar direction parallel to the surface of the insulating layer 110, and the thickness of the second portion 141B of each of the solder bumps 141 protruding over the solder mask layer 130 along a third direction DR3 (i.e., the height direction) may be substantially the same. Therefore, the planar area of ​​each of the openings 131 of the solder mask layer 130 (in which solder bumps 141 connected to the pads 122 are provided) is not greater than the planar area of ​​each of the solder bumps 141, so the pads 122 may not necessarily be exposed through the openings 131 of the solder mask layer 130. Furthermore, not only the first portion 141A of the solder bumps 141 but also the second portion 141B of the solder bumps 141 can be aligned with the openings 131 of the solder mask layer 130 along the height direction, so that misalignment between the solder bumps 141 and the pads 122 does not occur. In addition, the second portion 141B of each solder bump 141 protruding above the solder mask layer 130 can have a uniform thickness, thereby reducing thickness deviation of the solder bumps 141 and preventing a decrease in the reliability of the solder bumps 141.

[0056] Reference Figures 3 to 7 as well as Figure 1 and Figure 2 A method for manufacturing a printed circuit board according to an embodiment is described. Figures 3 to 7 This is a cross-sectional view illustrating a method for manufacturing a printed circuit board according to an embodiment.

[0057] Reference Figure 3 A wiring layer 121 can be formed, and an insulating layer 110 can be formed on the wiring layer 121 such that the wiring layer 121 is embedded in the insulating layer 110. A via can be formed in the insulating layer 110, and a via 123 in the via and a pad 122 connected to the via 123 can be formed together. Then, a solder mask layer 130 can be stacked on the insulating layer 110 and the pad 122 to form a wiring structure 120.

[0058] The thickness of the stacked solder mask 130 may be substantially equal to or greater than the sum of the thickness of the pad 122 and the thickness of the solder bump 141 to be formed in subsequent processes.

[0059] Reference Figure 4 The stacked solder mask 130 can be exposed and developed to form openings 131 that expose at least a portion of each of the pads 122.

[0060] In a cross-sectional view cut along the third direction DR3 (i.e., the height direction), each of the openings 131 may have a third width W3, and as referenced Figure 1 and Figure 2 As described, the third width W3 of each of the openings 131 may be substantially the same as the widths W1 and W2 of each of the solder bumps 141.

[0061] Reference Figure 5 A solder material layer 140 can be applied to fill the opening 131 of the solder mask layer 130 and disposed on the solder mask layer 130. The solder material layer 140 can be liquid. The solder material layer 140 is applied such that it overflows onto the solder mask layer 130 after filling the opening 131, such that the upper surface of the solder material layer 140 can be substantially flat.

[0062] Reference Figure 6 The portion of the solder material layer 140 disposed on the solder resist layer 130 can be removed by a method such as wet etching to form solder bumps 141 disposed in the opening 131 of the solder resist layer 130. The first thickness T1 of the portion of the solder resist layer 130 disposed on the pad 122 and the second thickness T2 of each of the solder bumps 141 can be substantially the same.

[0063] Reference Figure 7 A portion of the solder mask 130 can be etched by plasma treatment 200. By removing said portion of the solder mask 130, the thickness of the solder mask 130 can be reduced to expose the second portion 141B of each of the solder bumps 141.

[0064] Through such a process, such as Figure 2 As shown, solder bumps 141 can be formed, including a first portion 141A and a second portion 141B respectively. The first portion 141A is disposed in the opening 131 of the solder mask layer 130, and the second portion 141B extends from the first portion 141A and protrudes above the solder mask layer 130 along the third direction DR3 (i.e., the height direction).

[0065] According to an embodiment, after forming the opening 131 of the solder resist layer 130, coating the opening 131 of the solder resist layer 130 with a solder material layer 140 to fill the opening 131 of the solder resist layer 130 and disposing it on the solder resist layer 130, and removing the portion of the solder material layer 140 disposed on the solder resist layer 130 by a method such as wet etching, a portion of the solder resist layer 130 can be removed by plasma treatment 200 to form solder bumps 141.

[0066] When wet etching is used to remove a portion of the solder mask 130 during the manufacturing process, the etching solution can be sprayed unevenly depending on the location, and therefore the degree of etching of the solder mask may be uneven. However, according to an embodiment, after exposure and development of the solder mask 130, a portion of the solder mask 130 is etched and removed by plasma treatment 200, so that the solder mask 130 can be removed uniformly, and the thickness of the second portion 141B of the solder bump 141 protruding above the solder mask 130 can be uniform. Therefore, the thickness deviation of the second portion 141B of the solder bump 141 that may occur due to positional thickness deviations of the solder mask 130 can be reduced, thereby preventing degradation of the reliability of the solder bump 141.

[0067] The various features of the printed circuit board according to the above embodiments can be applied to the manufacturing method of the printed circuit board according to the embodiments.

[0068] Reference Figures 8 to 9 as well as Figures 1 to 4 A method for manufacturing a printed circuit board according to another embodiment is described.

[0069] For reference Figure 3 and Figure 4 As described, a wiring structure 120 can be formed that is at least partially embedded in the insulating layer 110. A solder mask layer 130 can be stacked on the insulating layer 110 and the pads 122, and the stacked solder mask layer 130 can be exposed and developed to form an opening 131 that exposes at least a portion of each of the pads 122.

[0070] like Figure 8 As shown, a mask layer 300 with an opening 31 can be formed on the solder mask layer 130, the opening 31 having a sufficiently large diameter to fully expose the opening 131. The mask layer 300 can be a metal mask layer, or it can include a dry film. However, the embodiments are not limited to this, and various mask layers can be used.

[0071] Reference Figure 9 Solder material layer 140 can be applied into the opening 31 of mask layer 300. Solder material layer 140 can fill the opening 31 of mask layer 300. Therefore, solder material layer 140 can fill the opening 131 of solder resist layer 130 and can be disposed on the portion of solder resist layer 130 not covered by mask layer 300.

[0072] According to this embodiment, since the solder material layer 140 is not coated onto the portion of the solder resist layer 130 covered by the mask layer 300, the amount of solder material layer 140 coated can be reduced, thereby reducing manufacturing costs.

[0073] Next, by removing the mask layer 300 and the portion of the solder material layer 140 disposed on the solder resist layer 130 via a method such as wet etching, solder bumps 141 disposed in the openings 131 of the solder resist layer 130 can be formed. The mask layer 300 can be removed together with the solder material layer 140.

[0074] Next, the thickness of the solder mask 130 can be reduced by etching a portion of the solder mask 130 via plasma treatment 200 to expose the second portion 141B of each of the solder bumps 141.

[0075] Through such a process, such as Figure 2 As shown, solder bumps 141 can be formed, including a first portion 141A and a second portion 141B respectively. The first portion 141A is disposed in the opening 131 of the solder mask layer 130, and the second portion 141B extends from the first portion 141A and protrudes above the solder mask layer 130 along the third direction DR3 (i.e., the height direction).

[0076] According to this embodiment, after forming the opening 131 of the solder resist layer 130, forming a mask layer 300 having an opening 31 (the opening 31 having a sufficiently large diameter to fully expose the opening 131), coating a solder material layer 140 to fill the opening 131 of the solder resist layer 130 and disposing it on the portion of the solder resist layer 130 not covered by the mask layer 300, and removing the solder material layer 140 disposed on the solder resist layer 130 by a method such as wet etching, a portion of the solder resist layer 130 can be etched by plasma processing 200 to form solder bumps 141. As a specific example, the solder bump 141 can be formed by: forming a mask layer 300 on the solder resist layer 130, the mask layer 300 covering a first region of the solder resist layer 130 and exposing a second region of the solder resist layer 130, the second region corresponding to the opening 131 of the solder resist layer 130 and the portion surrounding the opening 131; applying a solder material layer 140 to fill the opening 131 of the solder resist layer 130 and disposing it on the second region of the solder resist layer 130; and removing the portion of the solder material layer 140 disposed on the second region of the solder resist layer 130.

[0077] According to this embodiment, after the solder mask layer 130 is exposed and developed, a portion of the solder mask layer 130 can be etched and removed by plasma treatment 200, so that the solder mask layer 130 can be removed uniformly, and the second portion 141B of the solder bump 141 can protrude uniformly from the solder mask layer 130.

[0078] Therefore, the thickness deviation of the second portion 141B of the solder bump 141 that may occur due to the thickness deviation of the solder mask layer 130 can be reduced, thereby preventing a decrease in the reliability of the solder bump 141.

[0079] The various features of the printed circuit board and the method for manufacturing the printed circuit board according to the above embodiments can be applied to the method for manufacturing the printed circuit board according to this embodiment.

[0080] While embodiments of the present disclosure have been described above, the present disclosure is not limited thereto, and various modifications can be made within the scope of the claims, detailed description and drawings, which naturally also fall within the scope of the present disclosure.

Claims

1. A printed circuit board, comprising: Insulating layer; Solder pads are disposed on the insulating layer; Solder bumps; as well as A solder mask layer is disposed on the insulating layer and has an opening that exposes at least a portion of the solder pads to the solder bumps. Wherein, the solder bumps are at least partially disposed in the openings of the solder resist layer, and In a cross-sectional view cut along a direction parallel to the height direction, the cross-section of the solder bump has a rectangular shape, and the height direction is perpendicular to the surface of the solder resist layer.

2. The printed circuit board as claimed in claim 1, wherein: The solder bump includes: a first portion disposed in the opening; and a second portion extending from the first portion and protruding over the solder resist layer along the height direction.

3. The printed circuit board as described in claim 2, wherein: In the cross-sectional view, the first width of the first portion and the second width of the second portion are substantially the same.

4. The printed circuit board as claimed in claim 3, wherein: In the cross-sectional view, the third width of the opening is substantially the same as the first width of the first portion.

5. The printed circuit board as claimed in claim 4, wherein: The second portion does not extend onto the solder resist layer along a plane direction parallel to the surface of the solder resist layer.

6. The printed circuit board as claimed in claim 5, wherein: In a plan view parallel to the surface of the solder resist layer, the planar shape of the solder bump is substantially the same as the planar shape of the opening.

7. The printed circuit board as claimed in claim 1, wherein: In a plan view parallel to the surface of the solder resist layer, the planar shape of the solder bump is substantially the same as the planar shape of the opening.

8. The printed circuit board of claim 7, wherein: The solder bumps do not extend onto the solder resist layer along a plane direction parallel to the surface of the solder resist layer.

9. A method for manufacturing a printed circuit board, comprising: Forming pads on the insulating layer; A solder resist layer is formed on the insulating layer, the solder resist layer having an opening that exposes at least a portion of the solder pad; Solder bumps are formed in the openings of the solder mask layer; as well as A portion of the solder resist layer is removed by plasma treatment.

10. The manufacturing method as described in claim 9, wherein: The steps for forming the solder bumps include: A layer of solder material is applied to fill the opening and disposed on the solder resist layer; and Remove the portion of the solder material layer that is disposed on the solder resist layer.

11. The manufacturing method as described in claim 10, wherein: The solder bump includes: a first portion disposed in the opening; and a second portion extending from the first portion and projecting over the solder resist layer in a height direction perpendicular to the surface of the solder resist layer. After the step of removing a portion of the solder resist layer by plasma treatment, the second portion of the solder bump protrudes from the solder resist layer along the height direction.

12. The manufacturing method as claimed in claim 11, wherein: In a cross-sectional view cut along a direction parallel to the height direction, the first width of the first portion and the second width of the second portion are substantially the same.

13. The manufacturing method as described in claim 12, wherein: In the cross-sectional view, the third width of the opening is substantially the same as the first width of the first portion.

14. The manufacturing method as claimed in claim 11, wherein: In a cross-sectional view cut along a direction parallel to the height direction, the solder bump has a rectangular shape.

15. The manufacturing method as described in claim 9, wherein: The steps for forming the solder bumps include: A mask layer is formed on the solder resist layer, the mask layer covering a first region of the solder resist layer and exposing a second region of the solder resist layer, the second region corresponding to the opening of the solder resist layer and the portion surrounding the opening; A layer of solder material is applied to fill the opening in the solder resist layer and is disposed on the second region of the solder resist layer; and Remove the portion of the solder material layer disposed on the second region of the solder resist layer.

16. The manufacturing method as described in claim 15, wherein: The mask layer is a metal mask layer.

17. The manufacturing method as described in claim 15, wherein: The mask layer comprises a dry film.

18. The manufacturing method as described in claim 15, wherein: The solder bump includes: a first portion disposed in the opening; and a second portion extending from the first portion and projecting over the solder resist layer in a height direction perpendicular to the surface of the solder resist layer. After the step of removing a portion of the solder resist layer by plasma treatment, the second portion of the solder bump protrudes from the solder resist layer along the height direction.

19. The manufacturing method of claim 15, further comprising: Remove the mask layer.

20. The manufacturing method as claimed in claim 19, wherein: The step of removing the mask layer is performed together with the step of removing the solder material layer.

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