Multiple patterning and semiconductor device manufacturing method
By employing steps such as chemical vapor deposition, chemical mechanical planarization, and pressurized casting, the complex and costly processes of multiple exposure technology have been resolved, enabling further miniaturization of semiconductor device linewidths and cost reduction.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- 张秀云
- Filing Date
- 2025-01-05
- Publication Date
- 2026-07-10
AI Technical Summary
Existing multi-exposure technology is complex and costly, and cannot meet the requirements for further miniaturization of integrated circuit chips at the 7nm and below process linewidth.
Multiple patterned adhesive layers are formed by steps such as chemical vapor deposition, chemical mechanical planarization or etching technology, wet etching or dry etching, and pressure casting technology, including deposition, top removal, adhesive removal and pressure casting processes.
This has enabled further miniaturization of semiconductor device manufacturing linewidths, reducing device manufacturing costs.
Smart Images
Figure CN122373775A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductors, and more particularly to a method for manufacturing multiple patterned semiconductor devices. Background Technology
[0002] As the minimum linewidth and spacing of integrated circuit designs continue to shrink, the multi-exposure technology is complex and costly. Moreover, when integrated circuit chip processes enter the 7nm and below node, the lithographic dimension (ADI CD) after applying these technologies cannot be further reduced as previously expected, failing to meet the requirements for further miniaturization of process linewidth. Summary of the Invention
[0003] To achieve the above objectives, the present invention provides a method for manufacturing multiple patterned semiconductor devices, which can meet the requirements for further miniaturization of process linewidth and reduce device manufacturing costs.
[0004] A first aspect of the present invention provides a multiple patterning manufacturing method, the multiple patterning manufacturing method comprising the following steps:
[0005] A semiconductor substrate is provided, and a hard mask layer and a first patterned adhesive layer are sequentially formed on the surface of the semiconductor substrate;
[0006] The first patterned adhesive layer is deposited using a deposition technique to form a first deposition layer;
[0007] The top of the first deposited layer, which is covered by the top of the first patterned adhesive layer, is removed using a top removal technique.
[0008] The first patterned adhesive layer is removed using a de-adhesive technique to form a non-usable multi-pattern to be molded;
[0009] The non-usable multi-patterned adhesive layer is processed using pressure casting technology to form a usable multi-patterned adhesive layer.
[0010] According to a first aspect of the invention, the deposition technique is chemical vapor deposition.
[0011] According to a first aspect of the invention, the top removal technique includes a chemical mechanical planarization process or an etching technique.
[0012] According to a first aspect of the invention, the resist removal technique includes wet etching or dry etching.
[0013] A second aspect of the present invention provides a method for manufacturing a semiconductor device, characterized by comprising the following steps: Using the above-described multi-patterning manufacturing method, a hard mask layer and a first patterned adhesive layer are sequentially formed on the surface of the semiconductor substrate; The unusable multi-pattern to be molded is formed using top removal and adhesive removal techniques; The non-usable multi-patterned adhesive layer is processed using pressure casting technology to form a usable multi-patterned adhesive layer, thereby forming a semiconductor device. Attached Figure Description
[0014] To make the technical problems to be solved, the technical solutions, and the beneficial effects of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.
[0015] Figures 1 to 8 This is a schematic diagram of a process for manufacturing a multipatterned semiconductor device according to an embodiment of the present invention.
[0016] Symbol Explanation
[0017] 100: Semiconductor substrate
[0018] 101: Hard mask layer
[0019] 102: First patterned adhesive layer
[0020] 103: First sedimentary layer
[0021] 103': Multiple patterns not available for molding
[0022] 104: Casting Formwork Materials
[0023] 105: First Template
[0024] 106: Second Template
[0025] 107: Flat panel
[0026] 108: Tackifier
[0027] 109: Colloid
[0028] 110: Multiple patterned adhesive layers can be used Detailed Implementation
[0029] A method for manufacturing multiple patterned patterns includes the following steps: Please refer to Figure 1 A semiconductor substrate 100 is provided, and a hard mask layer 101 and a first patterned adhesive layer 102 are sequentially formed on the surface of the semiconductor substrate 100.
[0030] Please refer to Figure 2 The first patterned adhesive layer 102 is deposited using chemical vapor deposition technology to form the first deposition layer 103.
[0031] Please refer to Figure 3The top of the first deposited layer 103 covered by the top of the first patterned adhesive layer 102 is removed by chemical mechanical planarization or etching.
[0032] Please refer to Figure 4 The first patterned adhesive layer 102 is removed by wet etching or dry etching to form a non-usable multi-pattern 103' to be molded.
[0033] Please refer to Figures 5 to 8 The non-usable multiple pattern 103' to be molded is processed using pressure casting technology. Liquid casting template material 104 is pressure-cast onto the non-usable multiple pattern 103' using a flat plate 107 with uniform mechanical force. The cooled and solidified casting template material 104 is removed to form a first template 105. A release stencil layer is coated onto the first template 105, and the first template 105 coated with the release stencil layer is baked. After baking, the first template 105 coated with the release stencil layer is placed at room temperature. The first template 105 is pressed onto the flat plate 107 with uniform mechanical force. Vacuum-defoamed colloid 109 coated with tackifier 108 is then pressure-cast and poured into the gaps of the first template 105 coated with the release stencil layer using semiconductor material to be processed, with uniform mechanical force. The first template 105 coated with the release stencil layer serves as the bottom, and is then baked after standing. After baking, the planar plate 107 is placed on top, and then removed. The area of the colloid 109 is irradiated with ultraviolet light to cure the colloid 109. The first template 105 coated with the release-aiding spacer layer is removed using a release agent, and excess residual adhesive on the semiconductor material is removed using an etching solution to form a multi-patterned adhesive layer 110.
[0034] The present invention also provides a method for manufacturing a semiconductor device, comprising the following steps: Using the above-described multi-patterning manufacturing method, a hard mask layer and a first patterned adhesive layer are sequentially formed on the surface of the semiconductor substrate; The unusable multi-pattern to be molded is formed using top removal and adhesive removal techniques; The non-usable multi-patterned adhesive layer is processed using pressure casting technology to form a usable multi-patterned adhesive layer, thereby forming a semiconductor device.
[0035] Obviously, the examples or embodiments described above with reference to the accompanying drawings are only used to illustrate the technical solutions of this application, and not to limit it. Although this application has been described in detail with reference to the above embodiments, those skilled in the art should understand that this application can be applied to other similar scenarios based on these drawings without creative effort. Furthermore, it should be understood that although the effort made in this development process may be complex and lengthy, those skilled in the art should understand that some design modifications or equivalent substitutions of some technical features based on the technical solutions described in this application do not cause the essence of the corresponding technical solutions to deviate from the protection scope of the technical solutions of the various embodiments of this application, and changes in manufacturing or production are merely conventional technical means and should not be construed as insufficient disclosure of the content of this application.
Claims
1. The present invention provides a method for manufacturing multiple patterned layers, comprising providing a semiconductor substrate, wherein a hard mask layer and a first patterned adhesive layer are sequentially formed on the surface of the semiconductor substrate; and a deposition technique is used to deposit the first patterned adhesive layer to form a first deposition layer; The top of the first deposited layer, which is covered by the top of the first patterned adhesive layer, is removed using a top removal technique. The first patterned adhesive layer is removed using a de-adhesive technique to form a non-usable multi-pattern to be molded; The non-usable multi-patterned adhesive layer is processed using pressure casting technology to form a usable multi-patterned adhesive layer.
2. The multi-patterning manufacturing method as described in claim 1, characterized in that, The deposition technique is chemical vapor deposition.
3. The multi-patterning manufacturing method as described in claim 1, characterized in that, The top removal technology includes chemical mechanical planarization or etching technology.
4. The multi-patterning manufacturing method as described in claim 1, characterized in that, The resist removal technology includes wet etching or dry etching.
5. A method for manufacturing a semiconductor device, characterized in that, Includes the following steps: Using the multi-patterning manufacturing method described in claims 1 to 4, an underlayer and a first patterned adhesive layer are sequentially formed on the surface of the semiconductor substrate; The unusable multi-pattern to be molded is formed using top removal and adhesive removal techniques; The non-usable multi-patterned adhesive layer is processed using pressure casting technology to form a usable multi-patterned adhesive layer, thereby forming a semiconductor device.