Electronic device and chip package structure

Abstract

An electronic device and a chip package structure are disclosed. The chip package structure includes a package substrate including an insulating layer and two metal layers embedded in the insulating layer. One of the metal layers is adjacent to an outer surface of the insulating layer and includes an antenna layout section and a plurality of frequency adjustment pads. The antenna layout section is recessed from an edge to form a slot antenna and a plurality of configuration holes respectively located on opposite sides of the slot antenna. The plurality of frequency adjustment pads are respectively located in the plurality of configuration holes and do not contact the antenna layout section. The plurality of frequency adjustment pads are exposed to the outer surface. The antenna layout section has a plurality of slot-type adjustment pads exposed to the outer surface, which are adjacent to a bottom wall of the slot antenna and respectively located on the opposite sides of the slot antenna.

Description

Technical Field

[0001] This invention relates to a packaging structure, and more particularly to an electronic device and chip packaging structure. Background Technology

[0002] Existing chip packaging structures, after encapsulating antennas, often suffer from frequency shifts due to process or environmental factors. However, the frequency of these antennas, already encapsulated within existing chip packaging structures, is difficult to adjust. Therefore, the applicant believes that these shortcomings can be improved and proposes this invention, which is rationally designed and effectively addresses these deficiencies. Summary of the Invention

[0003] The present invention provides an electronic device and a chip packaging structure that can effectively improve the defects that may occur in existing chip packaging structures.

[0004] This invention discloses an electronic device comprising: a chip package structure including a package carrier plate defining a thickness direction, wherein the package carrier plate includes: an insulating layer having an inner surface and an outer surface located on opposite sides; an outer metal layer embedded within the insulating layer and adjacent to the outer surface, and the outer metal layer including: an antenna layout segment having a slot antenna recessed from an edge along a first direction perpendicular to the thickness direction, the slot antenna having a slot located at the edge, a bottom wall away from the slot, and two side walls connected to the bottom wall; wherein the antenna layout segment forms a plurality of configuration holes located on opposite sides of the slot antenna; and a plurality of frequency adjustment pads located on the plurality of configuration holes. The antenna layout segment is located within the aperture and not in contact with the antenna layout segment; wherein a plurality of frequency adjustment pads are exposed on the outer surface; wherein the antenna layout segment has a plurality of slotted adjustment pads exposed on the outer surface, adjacent to the bottom wall and located on opposite sides of the slotted antenna; and an inner metal layer embedded within the insulating layer and adjacent to the inner surface; a package formed on the inner surface of the insulating layer; and an electronic chip embedded within the package; and a circuit board selectively providing at least one adjustment line; wherein, when the chip package structure is soldered to the circuit board, the circuit board spans the slotted antenna with at least one adjustment line and connects two of the slotted adjustment pads or two of the frequency adjustment pads.

[0005] This invention also discloses a chip packaging structure, comprising: a packaging substrate defining a thickness direction, and the packaging substrate comprising: an insulating layer having an inner surface and an outer surface located on opposite sides; an outer metal layer embedded within the insulating layer and adjacent to the outer surface, and the outer metal layer comprising: an antenna layout segment having a slot antenna recessed from an edge along a first direction perpendicular to the thickness direction, the antenna layout segment having a bottom wall and two side walls connected to the bottom wall; wherein the antenna layout segment forms slots respectively located in the slot. The antenna includes multiple configuration holes on opposite sides; and multiple frequency adjustment pads, each located within the configuration holes and not in contact with the antenna layout segment; wherein the multiple frequency adjustment pads are exposed on the outer surface; wherein the antenna layout segment has multiple slotted adjustment pads exposed on the outer surface, adjacent to the bottom wall and located on opposite sides of the slotted antenna; and an inner metal layer embedded within the insulating layer and adjacent to the inner surface; a package formed on the inner surface of the insulating layer; and an electronic chip embedded within the package.

[0006] In summary, the electronic device and chip packaging structure disclosed in the embodiments of the present invention, after completion of manufacturing, can compensate for the frequency offset that may be generated by the chip packaging structure (or the packaging carrier) through at least one adjustment line of the circuit board, thereby effectively providing higher antenna design flexibility and significantly reducing the antenna design development time.

[0007] To further understand the features and technical content of this invention, please refer to the following detailed description and accompanying drawings. However, these descriptions and drawings are only for illustrating the invention and are not intended to limit the scope of protection of the invention in any way. Attached Figure Description

[0008] Figure 1 This is a three-dimensional schematic diagram of the electronic device according to Embodiment 1 of the present invention.

[0009] Figure 2 for Figure 1 A partial 3D schematic diagram.

[0010] Figure 3 for Figure 2 A schematic diagram of its breakdown.

[0011] Figure 4 for Figure 2 An exploded view of the outer metal layer, inner metal layer, and matching components.

[0012] Figure 5 for Figure 4 A top view of the outer metal layer.

[0013] Figure 6 for Figure 4 An exploded view of the implementation method of the variation.

[0014] Figure 7 for Figure 4 An exploded view of another variation of the implementation.

[0015] Figure 8 for Figure 2 A bottom view diagram omitting the substrate.

[0016] Figure 9 for Figure 8 A schematic diagram of the first variation of the implementation.

[0017] Figure 10 for Figure 8 A schematic diagram of the second variation of the implementation.

[0018] Figure 11 for Figure 8 A schematic diagram of the third variation of the implementation.

[0019] Figure 12 This is a schematic diagram showing the radiation efficiency of multiple embodiments of the electronic device according to Embodiment 1 of the present invention compared to the radiation efficiency without any circuit adjustments.

[0020] Figure 13 This is a schematic diagram showing the reflection loss of multiple embodiments of the electronic device according to Embodiment 1 of the present invention compared to the reflection loss without any adjustment of the circuit.

[0021] Figure 14 for Figure 8 A schematic diagram of the fourth variation of the implementation.

[0022] Figure 15 for Figure 8 A schematic diagram of the fifth variation of the implementation.

[0023] Figure 16 This is a partial perspective view of the electronic device according to Embodiment 2 of the present invention.

[0024] Figure 17 for Figure 16 A schematic diagram of its breakdown.

[0025] Figure 18 for Figure 16 An exploded view of the outer metal layer, inner metal layer, amplification metal layer, and matching components. Detailed Implementation

[0026] The following specific embodiments illustrate the implementation of the "electronic device, chip packaging structure, and its packaging carrier" disclosed in this invention. Those skilled in the art can understand the advantages and effects of this invention from the content disclosed in this specification. This invention can be implemented or applied through other different specific embodiments, and various details in this specification can also be modified and changed based on different viewpoints and applications without departing from the concept of this invention. Furthermore, the accompanying drawings of this invention are for simple illustrative purposes only and are not depictions of actual dimensions; this is stated in advance. The following embodiments will further describe the relevant technical content of this invention in detail, but the disclosed content is not intended to limit the scope of protection of this invention.

[0027] It should be understood that while terms such as "first," "second," and "third" may be used in this document to describe various components or features, these components or features should not be limited by these terms. These terms are primarily used to distinguish one component from another, or one feature from another. Furthermore, the term "or" as used in this document should, as appropriate, include any combination of one or more related listed items.

[0028] [Example 1] Please see Figures 1 to 15 As shown, this is an embodiment of the present invention. Figures 1 to 3 As shown, this embodiment discloses an electronic device 1000, which includes a chip package structure 100 and a circuit board 200 for soldering onto the circuit board 200. It should be noted that although the chip package structure 100 is described in this embodiment as being used in conjunction with the circuit board 200, the present invention is not limited thereto. For example, in other embodiments of the present invention not shown, the chip package structure 100 may also be used independently (e.g., for sale) or in conjunction with other components, depending on actual needs.

[0029] In this embodiment, the chip packaging structure 100 includes a mounting plate 1, a matching component 2 mounted on the mounting plate 1, a package body 3 formed on the mounting plate 1, and an electronic chip 4 embedded within the mounting plate 1. The mounting plate 1 has an internal antenna function, and the subsequent descriptions of this embodiment primarily focus on the partial structure of the mounting plate 1 related to the antenna function. Other structures of the mounting plate 1 related to the electronic chip 4 can be adjusted and varied according to actual needs, and will not be elaborated here. Furthermore, for ease of explanation, in this embodiment, the mounting plate 1 is defined with a thickness direction T, a first direction D1, and a second direction D2 that are perpendicular to each other.

[0030] like Figures 3 to 5As shown, the packaging substrate 1 in this embodiment includes an insulating layer 11, an outer metal layer 12 embedded within the insulating layer 11, and an inner metal layer 13 embedded within the insulating layer 11. The insulating layer 11 has an inner surface 111 and an outer surface 112 located on opposite sides. The insulating layer 11 may be composed of multiple layers of insulating material stacked together (the attached figure shows a single-layer structure pressed together) and two solder resist layers formed on both sides of the multiple layers of insulating material. The thickness of each insulating layer may be between 20 micrometers (μm) and 100 micrometers, but is not limited thereto.

[0031] Furthermore, in this embodiment, the thicknesses of the outer metal layer 12 and the inner metal layer 13 are each between 10 micrometers and 30 micrometers, and the outer metal layer 12 and the inner metal layer 13 are spaced apart from each other along the thickness direction T. The outer metal layer 12 is adjacent to the outer surface 112, while the inner metal layer 13 is adjacent to the inner surface 111.

[0032] More specifically, the outer metal layer 12 includes an antenna layout segment 121 and a plurality of frequency adjustment pads 122 disposed corresponding to the antenna layout segment 121. The antenna layout segment 121 has a slotted antenna 1212 recessed from one of its edges 1211 along the first direction D1, and the slotted antenna 1212 has a slot 1212a located at the edge 1211, a bottom wall 1212b away from the slot 1212a, and two sidewalls 1212c (vertically) connected to the bottom wall 1212b.

[0033] In this embodiment, the slot antenna 1212 has a slot depth L1212 along the first direction D1 and a slot width W1212 along the second direction D2. In other words, the slot depth L1212 is the distance between the slot opening 1212a and the bottom wall 1212b, preferably between 6.5 mm and 7 mm, while the slot width W1212 is the distance between the two side walls 1212c, preferably between 1 mm and 1.5 mm. However, the invention is not limited to these values.

[0034] Furthermore, the antenna layout segment 121 has a plurality of slotted adjustment pads 1213 exposed on the outer surface 112, and the plurality of slotted adjustment pads 1213 are adjacent to the bottom wall 1212b and are respectively located on opposite sides of the slotted antenna 1212. Furthermore, the plurality of slotted adjustment pads 1213 are spaced apart from the bottom wall 1212b along the first direction D1 by a maximum spacing distance L1, which is preferably within 30% of the slot depth L1212, but the invention is not limited thereto.

[0035] In other words, the plurality of grooved adjusting pads 1213 are respectively adjacent to but do not touch the two sidewalls 1212c, and the number of grooved adjusting pads 1213 adjacent to each sidewall 1212c is described as two in this embodiment, but it can be adjusted and varied according to actual needs. For example, such as Figure 6 As shown, the number of groove-shaped adjusting pads 1213 adjacent to any one of the sidewalls 1212c can be a single one.

[0036] Furthermore, the antenna layout segment 121 forms a plurality of configuration holes 1214 located on opposite sides of the slot antenna 1212. The plurality of configuration holes 1214 are recessed into the two sidewalls 1212c of the slot antenna 1212 (that is, each configuration hole 1214 is connected to the slot antenna 1212 in the second direction D2).

[0037] Furthermore, in this embodiment, the number of the plurality of configuration holes 1214 is described as two, and the two configuration holes 1214 are arranged facing each other along the second direction D2, but the present invention is not limited thereto. For example, such as Figure 7 As shown, the plurality of configuration holes 1214 may be adjacent to but not touching the two sidewalls 1212c (that is, each configuration hole 1214 is not connected to the slot antenna 1212 in the second direction D2). Alternatively, in other embodiments of the invention not illustrated, the plurality of configuration holes 1214 may be staggered.

[0038] The plurality of frequency adjustment pads 122 are respectively located within the plurality of configuration holes 1214 and do not contact the antenna layout segment 121, and the plurality of frequency adjustment pads 122 are exposed on the outer surface 112. In this embodiment, two frequency adjustment pads 122 are disposed within each configuration hole 1214, which are adjacent to each other and spaced apart from each other. Each frequency adjustment pad 122 does not protrude from the corresponding sidewall 1212c of the slot antenna 1212, and each frequency adjustment pad 122 is partially exposed on the outer surface 112, but is not limited thereto.

[0039] Furthermore, the plurality of frequency adjustment pads 122 are respectively located on opposite sides of the slot antenna 1212, and the plurality of frequency adjustment pads 122 are further away from the bottom wall 1212b than the plurality of slot adjustment pads 1213. In this embodiment, the plurality of frequency adjustment pads 122 and the plurality of slot adjustment pads 1213 are arranged in two columns approximately along the two side walls 1212c.

[0040] Furthermore, the plurality of frequency adjustment pads 122 are spaced apart by a configuration distance L2 along the first direction D1 from the slot 1212a (or the edge 1211), which is at least 30% of the slot depth L1212.

[0041] Furthermore, the outer metal layer 12 also has a plurality of grounding pads 1215 exposed on the outer surface 112, which are located (or surround) the outside of the antenna layout segment 121 to provide a complete grounding loop. In this embodiment, the plurality of grounding pads 1215 are generally U-shaped and surround the outside of the plurality of frequency adjustment pads 122 and the plurality of slotted adjustment pads 1213, and the number of the plurality of grounding pads 1215 is greater than the sum of the number of the plurality of frequency adjustment pads 122 and the plurality of slotted adjustment pads 1213, but the invention is not limited thereto.

[0042] The slot antenna 1212 defines an extension space along the thickness direction T, and the inner metal layer 13 includes a feed line 131 spanning the extension space, a metal pad 132 located on one side of the extension space, and two coupling regions 133 located on opposite sides of the extension space. The feed line 131 is adjacent to the slot 1212a of the slot antenna 1212, the metal pad 132 can be used for grounding, and the metal pad 132 is spaced apart and adjacent to one end of the feed line 131.

[0043] More specifically, in this embodiment, the feed line 131 includes a spanning section 1311, a first extension section 1312 connected to one end of the spanning section 1311, and a second extension section 1313 connected to the other end of the spanning section 1311. The spanning section 1311 is an elongated structure parallel to the second direction D2 and adjacent to the slot 1212a (or the edge 1211). The first extension section 1312 extends from the spanning section 1311 in a direction away from the slot 1212a, and has a length between 0.6 mm and 1 mm in the first direction D1 and a width between 0.4 mm and 0.5 mm in the second direction D2. Furthermore, the second extension 1313 is formed by extending from the transverse section 1311 in a direction away from the slot 1212a, the metal pad 132 is adjacent to and spaced from the second extension 1313, and the second extension 1313 and the metal pad 132 face the first extension 1312 along the second direction D2.

[0044] Two coupling regions 133 are electrically coupled to the antenna layout segment 121, and the two coupling regions 133 are respectively spaced between the first extension segment 1312 of the feed line 131 and the metal pad 132. The two coupling regions 133 respectively shield the plurality of configuration holes 1214 and the plurality of frequency adjustment pads 122 along the thickness direction T. It should be further noted that, in this embodiment, the packaging substrate 1 preferably does not have other metal layers disposed between the outer metal layer 12 and the inner metal layer 13, thus providing coupling for the plurality of frequency adjustment pads 122 through the two coupling regions 133, but the present invention is not limited thereto.

[0045] The matching component 2 connects the feed line 131 and the metal pad 132. In this embodiment, the matching component 2 is described as a capacitor with a capacitance value between 2.5 pF and 4 pF, but the invention is not limited thereto. For example, in other embodiments not shown in the invention, the matching component 2 can be replaced by other components or omitted depending on actual needs.

[0046] The electronic chip 4 is mounted on the packaging substrate 1 and located on the inner surface 111 of the insulating layer 11, and the electronic chip 4 can be electrically coupled to the feed line 131 of the inner metal layer 13 through the packaging substrate 1. Furthermore, the package 3 is formed on the inner surface 111 of the insulating layer 11 so that the electronic chip 4 and the mating component 2 are embedded within the package 3. In this embodiment, the circumferential edge of the package 3 is flush with the outer edge of the packaging substrate 1.

[0047] It should be further noted that although the packaging substrate 1 is described in this embodiment as being used in conjunction with the package 3 and the electronic chip 4, the present invention is not limited thereto. For example, in other embodiments of the present invention not shown, the packaging substrate 1 may also be used alone (e.g., for sale) or in conjunction with other components, depending on actual needs.

[0048] The above describes the construction of the packaging substrate 1 in this embodiment, so that the slot antenna 1212 of the chip package structure 100 has an initial center frequency. The following describes the structural pairing between the packaging substrate 1 and the circuit board 200, and the electronic device 1000 defines a default center frequency. The chip package structure 100 is soldered and fixed to the circuit board 200 using the packaging substrate 1, so that the electronic chip 4 is electrically coupled to the circuit board 200 through the packaging substrate 1.

[0049] Furthermore, the circuit board 200 includes a substrate 203 and a ground layer 201 formed on the substrate 203 and electrically coupled to a plurality of ground pads 1215, and the ground layer 201 forms a clearance hole 2011. Moreover, the circuit board 200 includes at least one adjustment line 202 formed on the substrate 203, which is located within the clearance hole 2011 and does not contact the ground layer 201. The plurality of ground pads 1215 are located (or surround) the outside of the clearance hole 2011, and the slot antenna 1212 is orthographically projected along the thickness direction T onto a projection area formed by the ground layer 201, which is located within the clearance hole 2011.

[0050] As described above, when the chip package structure 100 is soldered to the circuit board 200, at least one adjustment line 202 of the circuit board 200 spans the slot antenna 1212 and connects to two slot adjustment pads 1213 or two frequency adjustment pads 122. Accordingly, after the chip package structure 100 has been manufactured, it can compensate for possible frequency shifts in the chip package structure 100 (or the package carrier 1) through at least one adjustment line 202 of the circuit board 200, thereby effectively providing greater antenna design flexibility and significantly reducing antenna design development time.

[0051] In other words, the chip package structure 100 in this embodiment provides a calibrated frequency adjustment function, and the chip package structure 100 is connected to at least one adjustment line 202 to adjust the initial center frequency toward the default center frequency. It should be further noted that the circuit board 200 compensates for or eliminates the frequency deviation between the initial center frequency and the default center frequency of the chip package structure 100 by forming at least one adjustment line 202. That is, if there is no frequency deviation between the initial center frequency and the default center frequency, the circuit board 200 does not need to form the adjustment line 202. Accordingly, the circuit board 200 selectively provides at least one adjustment line 202 in this embodiment.

[0052] More specifically, the number of at least one adjustment line 202 on the circuit board 200 may be zero; or, depending on the situation, the circuit board 200 may use at least one adjustment line 202 to connect to two slotted adjustment pads 1213 (e.g.: Figure 9 and Figure 10 ) or two of the aforementioned frequency adjustment pads 122 (e.g.: Figure 8 and Figure 11This allows for frequency adjustment. In other words, both the frequency adjustment pad 122 and the slotted adjustment pad 1213 in this embodiment can provide frequency adjustment functionality through at least one adjustment line 202.

[0053] Furthermore, the radiation efficiency charts obtained after simulation experiments (e.g.: Figure 12 ) and reflection loss charts (e.g.: Figure 13 In the above, curve C0 corresponds to the electronic device 1000's circuit board 200 having no adjustment lines 202, and curve C1 corresponds to... Figure 9 The electronic device 1000 shown, curve C2 corresponds to Figure 10 The electronic device 1000 shown, curve C3 corresponds to Figure 8 The electronic device 1000 shown, curve C4 corresponds to Figure 11 The electronic device 1000 is shown. It can be seen that the electronic device 1000 can indeed effectively adjust the initial center frequency of the chip package structure 100 by means of the chip package structure 100 and at least one adjustment line 202, and its frequency adjustment range can reach at least 150MHz, thereby conforming to various wireless communication protocols (such as Bluetooth).

[0054] Furthermore, the number of at least one adjustment line 202 on the circuit board 200 can be adjusted to multiple (e.g., two) according to actual needs; for example, such as Figure 14 As shown, one of the adjustment lines 202 connects to two of the slotted adjustment pads 1213 and is defined as a slotted adjustment line 202a, while the other adjustment line 202 connects to two of the frequency adjustment pads 122 and is defined as a frequency adjustment line 202b.

[0055] To better understand this embodiment, the following further describes the plurality of slot adjustment pads 1213 and the plurality of frequency adjustment pads 122. In this embodiment, the plurality of slot adjustment pads 1213 include a plurality of first slot adjustment pads 1213-1 located on one side of the slot antenna 1212, and a plurality of second slot adjustment pads 1213-2 located on the other side of the slot antenna 1212. Each first slot adjustment pad 1213-1 can be connected to any one of the second slot adjustment pads 1213-2 through the slot adjustment line 202a, so that the bottom edge of the slot antenna 1212 can be changed from the bottom wall 1212b to the slot adjustment line 202a, thereby adjusting the initial center frequency.

[0056] Furthermore, the plurality of frequency adjustment pads 122 include a plurality of first frequency adjustment pads 122-1 located on one side of the slot antenna 1212, and a plurality of second frequency adjustment pads 122-2 located on the other side of the slot antenna 1212. Each of the first frequency adjustment pads 122-1 can be connected to any one of the second frequency adjustment pads 122-2 via the frequency adjustment line 202b, thereby forming a capacitive effect to change the initial center frequency.

[0057] It should be further noted that each of the first slotted adjustment pads 1213-1 faces a second slotted adjustment pad 1213-2 along the second direction D2, and each of the first frequency adjustment pads 122-1 faces a second frequency adjustment pad 122-2 along the second direction D2. Preferably, both the slotted adjustment line 202a and the frequency adjustment line 202b are parallel to the second direction D2, but this invention is not limited thereto. For example, such as... Figure 15 As shown, the slot-shaped adjustment line 202a and the frequency adjustment line 202b can also be non-parallel to the second direction D2.

[0058] [Example 2] Please see Figures 16 to 18 As shown, this is Embodiment Two of the present invention. Since this embodiment is similar to Embodiment One described above, the similarities between the two embodiments will not be repeated. The differences between this embodiment and Embodiment One are roughly explained as follows: In this embodiment, the inner metal layer 13 of the packaging substrate 1 does not have two coupling regions 133, and the packaging substrate 1 further includes at least one amplification metal layer 14 embedded within the insulating layer 11, located between the inner metal layer 13 and the outer metal layer 12. At least one amplification metal layer 14 shields a plurality of configuration holes 1214 and a plurality of frequency adjustment pads 122 along the thickness direction T.

[0059] Furthermore, at least one of the amplification metal layers 14 forms a coupling slot 141, the inner wall of which at least 80% overlaps along the thickness direction T with the bottom wall 1212b and the two side walls 1212c of the slot antenna 1212. It should be noted that the number of at least one amplification metal layer 14 is described as two in this embodiment, but the invention is not limited thereto.

[0060] [Technical Effects of the Embodiments of the Invention] In summary, the electronic device, chip packaging structure and its packaging substrate disclosed in the embodiments of the present invention, after completion of manufacturing, can compensate for the frequency offset that may be generated by the chip packaging structure (or the packaging substrate) through at least one adjustment line of the circuit board, thereby effectively providing higher antenna design flexibility and significantly reducing the antenna design development time.

[0061] Furthermore, the packaging substrate disclosed in the embodiments of the present invention can effectively achieve miniaturization through structural matching (such as the slot antenna of the outer metal layer matching the inner metal layer and the matching component), thereby enabling the chip packaging structure to effectively integrate the antenna function inside, thereby saving space and reducing the time for antenna design and shortening the development process.

[0062] The content disclosed above is only a preferred and feasible embodiment of the present invention, and is not intended to limit the patent scope of the present invention. Therefore, all equivalent technical changes made based on the content of the present invention specification and drawings are included within the patent scope of the present invention.

[0063] [Symbol Explanation] 1000: Electronic devices 100: Chip Packaging Structure 1: Packaging carrier board 11: Insulation layer 111: Inner surface 112: Outer surface 12: Outer metal layer 121: Antenna Layout Section 1211: Edge 1212: Slotted Antenna 1212a: Groove 1212b: Bottom wall 1212c: Sidewall 1213: Groove Adjustment Shim 1213-1: First groove-shaped adjusting shim 1213-2: Second groove-shaped adjusting shim 1214: Configuration Hole 1215: Grounding mat 122: Frequency Adjustment Pad 122-1: First frequency adjustment pad 122-2: Second frequency adjustment pad 13: Inner metal layer 131: Feeder line 1311: Cross-section 1312: First extension 1313: Second extension 132: Metal pad 133: Coupling Region 14: Amplifying the metal layer 141: Coupling slot hole 2: Matching Component 3: Package 4: Electronic Chips 200: Circuit board 201: Grounding layer 2011: Clearance Hole 202: Adjust the route 202a: Slot Adjustment Circuit 202b: Frequency Adjustment Circuit 203: Substrate T: Thickness direction D1: First Direction D2: Second Direction L1212: Groove depth W1212: Slot width L1: Maximum interval distance L2: Configuration Distance L3: Minimum Interval Distance C0, C1, C2, C3, C4: Curves

Claims

1. An electronic device, characterized in that, include: A chip package structure comprising: A packaging carrier plate is defined in a thickness direction, and the packaging carrier plate comprises: An insulating layer having an inner surface and an outer surface located on opposite sides; An outer metal layer is embedded within the insulating layer and adjacent to the outer surface, and the outer metal layer comprises: An antenna layout segment has a slotted antenna recessed from one edge along a first direction perpendicular to the thickness direction. The antenna has a slot at the edge, a bottom wall away from the slot, and two side walls connected to the bottom wall. The antenna layout segment has multiple configuration holes located on opposite sides of the slotted antenna. Multiple frequency adjustment pads are located within multiple configuration holes and do not contact the antenna layout segment; wherein, multiple frequency adjustment pads are exposed on the outer surface; The antenna layout section has multiple slotted adjustment pads exposed on the outer surface, adjacent to the bottom wall and located on opposite sides of the slotted antenna; and An inner metal layer is embedded within the insulating layer and adjacent to the inner surface; An encapsulation body is formed on the inner surface of the insulating layer; and An electronic chip is embedded within the package; and A circuit board selectively provides at least one adjustment line; wherein, when the chip package structure is soldered to the circuit board, the circuit board spans the slot antenna with at least one adjustment line and connects two slot adjustment pads or two frequency adjustment pads.

2. The electronic device as claimed in claim 1, characterized in that, The number of at least one adjustment line on the circuit board is further limited to multiple; one of the adjustment lines connects two of the slotted adjustment pads and is defined as a slotted adjustment line, while another adjustment line connects two of the frequency adjustment pads and is defined as a frequency adjustment line.

3. The electronic device as claimed in claim 2, characterized in that, The plurality of slotted adjustment pads include a plurality of first slotted adjustment pads located on one side of the slotted antenna and a plurality of second slotted adjustment pads located on the other side of the slotted antenna; wherein each of the first slotted adjustment pads can be connected to any one of the second slotted adjustment pads via the slotted adjustment line.

4. The electronic device as claimed in claim 2, characterized in that, The plurality of frequency adjustment pads include a plurality of first frequency adjustment pads located on one side of the slot antenna and a plurality of second frequency adjustment pads located on the other side of the slot antenna; wherein each of the first frequency adjustment pads can be connected to any one of the second frequency adjustment pads via the frequency adjustment line.

5. The electronic device as claimed in claim 1, characterized in that, The slotted antenna has a slot depth along the first direction, and the plurality of slotted adjustment pads are spaced apart from the bottom wall along the first direction by a maximum interval distance, which is within 30% of the slot depth.

6. The electronic device as claimed in claim 1, characterized in that, The slot antenna defines an extension space along the thickness direction, and the inner metal layer includes a feed line spanning the extension space and a metal pad located on one side of the extension space; wherein, the chip package structure includes a matching component that connects the feed line and the metal pad and is embedded within the package.

7. The electronic device as claimed in claim 1, characterized in that, The outer metal layer has a plurality of grounding pads exposed on the outer surface. The circuit board includes a grounding layer electrically coupled to the plurality of grounding pads, and the grounding layer forms a clearance hole, with the plurality of grounding pads located outside the clearance hole. The slot antenna is projected orthogonally along the thickness direction onto a projection area formed by the grounding layer, which is located within the clearance hole. At least one of the adjustment lines is located within the clearance hole and does not contact the grounding layer.

8. The electronic device as claimed in claim 1, characterized in that, The packaging substrate includes at least one amplification metal layer embedded within the insulating layer, located between the inner metal layer and the outer metal layer; wherein at least one of the amplification metal layers forms a coupling slot, the inner wall of which at least 80% overlaps along the thickness direction with the bottom wall and two side walls of the slot antenna.

9. A chip packaging structure, characterized in that, include: A packaging carrier plate is defined in a thickness direction, and the packaging carrier plate comprises: An insulating layer having an inner surface and an outer surface located on opposite sides; An outer metal layer is embedded within the insulating layer and adjacent to the outer surface, and the outer metal layer comprises: An antenna layout segment has a slotted antenna recessed from one edge along a first direction perpendicular to the thickness direction. The antenna has a slot at the edge, a bottom wall away from the slot, and two side walls connected to the bottom wall. The antenna layout segment has multiple configuration holes located on opposite sides of the slotted antenna. Multiple frequency adjustment pads are located within multiple configuration holes and do not contact the antenna layout segment; wherein, multiple frequency adjustment pads are exposed on the outer surface; The antenna layout section has multiple slotted adjustment pads exposed on the outer surface, adjacent to the bottom wall and located on opposite sides of the slotted antenna; and An inner metal layer is embedded within the insulating layer and adjacent to the inner surface; An encapsulation body is formed on the inner surface of the insulating layer; and An electronic chip is embedded within the package.

10. The chip packaging structure as described in claim 9, characterized in that, The packaging substrate includes at least one amplification metal layer embedded in the insulating layer, located between the inner metal layer and the outer metal layer; wherein the at least one amplification metal layer forms a coupling slot, the inner wall of which at least 80% overlaps along the thickness direction with the bottom wall and two side walls of the slot antenna.

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