Semiconductor device

Abstract

The present application obtains a semiconductor device capable of adjusting the output period of an error signal from the outside without increasing the number of external terminals. A control semiconductor element (3b) controls a switching element (1d-1f). A capacitor adjustment section (5) has a capacitor (C3) and a conductive section (16c). A molding resin (7) seals the switching element (1d-1f), the control semiconductor element (3b), and the capacitor adjustment section (5). The control semiconductor element (3b) has a protection circuit (8) that outputs an error signal when an abnormality of the semiconductor device is detected. The protection circuit (8) is connected to the capacitor (C3) via the conductive section (16c), charges the capacitor (C3) during the output of the error signal, and stops the output of the error signal and discharges the capacitor (C3) if the voltage of the charged capacitor (C3) exceeds a threshold value. An opening 7a is provided in the molding resin (7). The conductive section (16c) of the capacitor adjustment section (5) is exposed from the molding resin (7) through the opening (7a).

Description

Technical Field

[0001] This disclosure relates to a semiconductor device. Background Technology

[0002] In semiconductor devices that use molding resin to seal switching elements and control semiconductor elements that control these switching elements, the output period of an error signal can be adjusted by adjusting the capacitance of a protection circuit that outputs an error signal. However, if a capacitor is placed outside the device, the area around the device increases. On the other hand, if the capacitor is built inside the device, the capacitance value cannot be adjusted externally. To address this, a semiconductor device has been proposed in which an opening is formed in the molding resin, exposing a portion of the terminals of the lead frame (see, for example, Patent Document 1). By accommodating a surface-mount capacitor in the opening and connecting one end of the surface-mount capacitor to the exposed terminals, the capacitance can be adjusted externally.

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2021-190522 Summary of the Invention

[0006] The technical problem that the invention aims to solve

[0007] However, in existing semiconductor devices, the need to bring the other end of the chip capacitor to the outside increases the number of external terminals.

[0008] This disclosure was made to solve the above-mentioned problems, and therefore its object is to obtain a semiconductor device that can adjust the output of an error signal from the outside without increasing the number of external terminals.

[0009] Technical means for solving technical problems

[0010] The semiconductor device disclosed herein is characterized by comprising: a switching element; a control semiconductor element for controlling the switching element; a capacitor adjustment portion having a capacitor and a conductive portion; and a molding resin for sealing the switching element, the control semiconductor element, and the capacitor adjustment portion. The control semiconductor element has a protection circuit that outputs an error signal when an abnormality of the semiconductor device is detected. The protection circuit is connected to the capacitor via the conductive portion, and charges the capacitor during the output of the error signal. If the voltage of the charged capacitor exceeds a threshold, the output of the error signal is stopped and the capacitor is discharged. An opening is provided in the molding resin, through which the conductive portion of the capacitor adjustment portion is exposed from the molding resin.

[0011] Invention Effects

[0012] In this disclosure, the capacitance value of the capacitor connected to the protection circuit can be adjusted depending on whether the conductive portion exposed from the molding resin is cut off from the outside. Furthermore, since it is not necessary to house the capacitor within the opening in the molding resin, the number of external terminals does not increase. As a result, the output period of the error signal can be adjusted externally without increasing the number of external terminals. Attached Figure Description

[0013] Figure 1 This is a top view showing the semiconductor device of Embodiment 1.

[0014] Figure 2 This is a circuit diagram showing the semiconductor device of Embodiment 1.

[0015] Figure 3 This is a circuit diagram showing the protection circuit of the second control semiconductor element in Embodiment 1.

[0016] Figure 4 This is a top view showing the capacitor adjustment section of Embodiment 1.

[0017] Figure 5 This is a top view showing the capacitor adjustment section of Embodiment 1.

[0018] Figure 6 This is a cross-sectional view showing the capacitor adjustment section of Embodiment 1.

[0019] Figure 7 This is a top view showing the semiconductor device of Embodiment 2.

[0020] Figure 8 This is a circuit diagram showing the protection circuit of the second control semiconductor element in Embodiment 2.

[0021] Figure 9 This is a top view showing the capacitor adjustment section of Embodiment 2.

[0022] Figure 10 This is a cross-sectional view showing the capacitor adjustment section of Embodiment 2.

[0023] Figure 11 This is a top view showing the semiconductor device of Embodiment 3.

[0024] Figure 12 This is a circuit diagram showing the protection circuit of the second control semiconductor element in Embodiment 3.

[0025] Figure 13 This is a top view showing the capacitor adjustment section of Embodiment 3.

[0026] Figure 14 This is a top view showing the semiconductor device of Embodiment 4.

[0027] Figure 15 This is a cross-sectional view showing the capacitor adjustment section of Embodiment 4.

[0028] Figure 16 This is a top view showing the semiconductor device of Embodiment 5. Detailed Implementation

[0029] The semiconductor device according to the embodiments will be described with reference to the accompanying drawings. For the same or corresponding components, the same reference numerals are sometimes used, and repeated descriptions are omitted.

[0030] Implementation method 1.

[0031] Figure 1 This is a top view showing the semiconductor device of Embodiment 1. Figure 2 This is a circuit diagram illustrating the semiconductor device of Embodiment 1. This semiconductor device is an Intelligent Power Module (IPM) that modularizes switching elements 1a-1f, diodes 2a-2f, and first and second control semiconductor elements 3a and 3b into a single electronic component. The switching elements 1a-1f and diodes 2a-2f constitute an inverter that converts DC voltage into three-phase AC voltage.

[0032] Switching elements 1a, 1b, and 1c form the upper arm of the three-phase inverter. Switching elements 1d, 1e, and 1f form the lower arm of the three-phase inverter. Switching elements 1a to 1f are, for example, insulated-gate bipolar transistors (IGBTs), but can also be field-effect transistors. Diodes 2a to 2f are freewheeling diodes connected in reverse parallel with switching elements 1a to 1f. The first control semiconductor element 3a is an HVIC (high voltage integrated circuit) that controls switching elements 1a, 1b, and 1c. The second control semiconductor element 3b is an LVIC (low voltage integrated circuit) that controls switching elements 1d, 1e, and 1f.

[0033] Lead terminal 4 P 4 U 4 V 4 W 4 NU 4 NV 4 NW 4 VNC 4 VP1 4 VUFB 4UP 4 VVFB 4 VP 4 VWFB 4 WP 4 VN1 4 CFo 4 UN 4 VN 4 WN 4 FO 4 CIN It is a lead frame.

[0034] Switching elements 1a, 1b, 1c and diodes 2a, 2b, 2c are mounted on lead terminal 4. P The chip pad portion. The collectors of switching elements 1a, 1b, and 1c, and the cathodes of diodes 2a, 2b, and 2c, and the lead terminals 4. P Connection. Switching element 1d and diode 2d are mounted on lead terminal 4. U The chip pad portion. The collector of switching element 1d and the cathode of diode 2d with lead terminal 4. U Connection. Switching element 1e and diode 2e are mounted on lead terminal 4. V The chip pad portion. The collector of switching element 1e and the cathode of diode 2e are connected to terminal V. Switching element 1f and diode 2f are mounted on lead terminal 4. W The chip pad portion. The collector of switching element 1f and the cathode of diode 2f, and lead terminal 4. W connect.

[0035] The emitter of switching element 1a, the anode of diode 2a, and lead terminal 4 U Connect them sequentially via wires. The emitter of switching element 1b, the anode of diode 2b, and lead terminal 4. V Connect them sequentially via wires. The emitter of switching element 1c, the anode of diode 2a, and lead terminal 4. W Connect them sequentially via wires. The emitter of switching element 1d, the anode of diode 2d, and lead terminal 4. NU Connect them sequentially via wires. The emitter of switching element 1e, the anode of diode 2e, and lead terminal 4. NV Connect them sequentially via wires. The emitter of switching element 1f, the anode of diode 2f, and lead terminal 4. NW Connect them sequentially using wires.

[0036] The first control semiconductor element 3a and the second control semiconductor element 3b are mounted on the lead terminal 4. VNCOn the chip pad portion. Terminals UOUT, VOUT, and WOUT of the first control semiconductor element 3a are connected to the gates of switching elements 1a, 1b, and 1c, respectively. Terminals UOUT, VOUT, and WOUT of the second control semiconductor element 3b are connected to the gates of switching elements 1d, 1e, and 1f, respectively. Terminals UOUT, VOUT, and WOUT are the terminals for outputting drive signals to the switching elements. Terminals VUS, VVS, and VWS of the first control semiconductor element 3a are connected to the emitter electrodes of switching elements 1a, 1b, and 1c via wires, and are connected to lead terminal 4. U 4 V 4 W superior.

[0037] The terminals VCC, VUB, UP, VVB, VP, VWB, WP, and COM of the first control semiconductor element 3a are respectively connected to the lead terminal 4 via wires. VP1 4 VUFB 4 UP 4 VVFB 4 VP 4 VWFB 4 WP 4 VNC Terminal VCC is the power supply terminal. Terminals VUB, VVB, and VWB are the P-side drive power supply voltage terminals. Terminals UP, VP, and WP are input terminals for control signals from external logic circuits (not shown). Terminal COM is the ground terminal.

[0038] The terminals VCC, UN, VN, WN, Fo, CFO, VNC, and CIN of the second control semiconductor element 3b are respectively connected to the lead terminal 4 via wires. VN1 4 UN 4 VN 4 WN 4 Fo 4 CFo 4 VNC 4 CIN Terminals UN, VN, and WN are input terminals for control signals from external logic circuits. Terminal Fo is the error signal output terminal. Terminal VNC is the ground terminal. During short-circuit detection, if a signal is input to terminal CIN, the second control semiconductor element 3b will disconnect the lower arm's switching element.

[0039] Diode 2g is mounted on lead terminal 4 VUFB Above. Cathode and lead terminal 4 of diode 2g. VUFB Connection. The anode of diode 2g is connected to lead terminal 4 via a wire. VP1 Diode 2h is mounted on lead terminal 4. VVFBAbove. Cathode and lead terminal 4 of diode 2h. VVFB Connection. The anode of diode 2h is connected to lead terminal 4 via a wire. VP1 Diode 2i is mounted on lead terminal 4. VWFB Above. Cathode and lead terminal 4 of diode 2i. VWFB Connection. The anode of diode 2i is connected to lead terminal 4 via a wire. VP1 The capacitor adjustment section 5 is located at the lead terminal 4. CFo 4 VNC superior.

[0040] Insulating sheet 6 is attached to lead terminals 4 on which switching elements 1a-1f and diodes 2a-2f are mounted. P 4 U 4 V 4 W The lower surface of the chip pad portion. Molding resin 7 seals the switching elements 1a-1f, diodes 2a-2i, the first control semiconductor element 3a and the second control semiconductor element 3b, the capacitor adjustment part 5, each lead terminal, and each wire. The front end of each lead terminal protrudes from the molding resin 7. Additionally, lead terminal 4... CFo The front end does not protrude from the molding resin 7. The insulating sheet 6 protrudes from the molding resin 7 on the lower surface of the device. The heat from the switching elements 1a-1f and the diodes 2a-2f is dissipated via the insulating sheet 6. An opening 7a is provided in the molding resin 7, through which a portion of the capacitor adjustment part 5 protrudes.

[0041] The first control semiconductor element 3a controls the operation of switching elements 1a, 1b, and 1c respectively through outputs from terminals UOUT, VOUT, and WOUT. The terminals UOUT, VOUT, and WOUT of the second control semiconductor element 3b are connected to the gates of switching elements 1d, 1e, and 1f respectively. The second control semiconductor element 3b controls the operation of switching elements 1d, 1e, and 1f respectively through outputs from terminals UOUT, VOUT, and WOUT.

[0042] Diodes 2g, 2h, and 2i are boost diodes used for charging external bootstrap capacitors (not shown). Specifically, bootstrap capacitors are connected between terminals VUB and VUS, terminals VVB and VVS, and terminals VWB and VWS of the first control semiconductor element 3a to realize a bootstrap circuit. The bootstrap capacitor connected between terminals VUB and VUS is connected in series with diode 2g and switching element 1d between terminals VP1 and NU of the semiconductor device. If the switching element 1d is turned on by a signal from terminal UOUT of the second control semiconductor element 3b, the bootstrap capacitor is charged. The bootstrap capacitors connected between terminals VVB and VVS and between terminals VWB and VWS are also charged. These bootstrap capacitors are used to supply the power consumption of the first control semiconductor element 3a. By mounting the boost diodes inside the device, it is not necessary to mount the boost diodes outside the device, thus enabling miniaturization of the semiconductor device substrate area.

[0043] Figure 3 This is a circuit diagram showing the protection circuit of the second control semiconductor element in Embodiment 1. The second control semiconductor element 3b has a protection circuit 8 that outputs an error signal when abnormalities of the semiconductor device such as overcurrent, control power supply voltage drop, or overheating are detected. Internal capacitors C1 and C2 and external capacitor C3 of the second control semiconductor element 3b are connected in parallel between the protection circuit 8 and ground potential. Capacitor C3 is connected to the protection circuit 8 via terminal CFo.

[0044] In protection circuit 8, the error signal generated by error signal generation unit 9 is output from terminal Fo via SR flip-flop 10 and N-MOS transistor 11. Specifically, if SR flip-flop 10 receives an error signal from input S, output Q becomes H level, N-MOS transistor 11 is turned on, and terminal Fo becomes L level. At this time, P-MOS transistor 12 is turned off, so the current from constant current source 13 charges capacitors C1, C2, and C3. If the voltage of the charged capacitors C1, C2, and C3 exceeds the threshold of comparator 14, a reset signal is input to input R of SR flip-flop 10, N-MOS transistor 11 is turned off, thereby causing terminal Fo to become H level. At this time, P-MOS transistor 12 is turned on, so capacitors C1, C2, and C3 are discharged.

[0045] Therefore, during the output of the error signal, the protection circuit 8 charges capacitors C1, C2, and C3. If the voltage of the charged capacitors C1, C2, and C3 exceeds the threshold, the output of the error signal stops, and capacitors C1, C2, and C3 are discharged. The larger the combined capacitance of capacitors C1, C2, and C3, the longer it takes to reach the threshold of comparator 14, and therefore the longer the output time of the error signal. To adjust the output time of this error signal, the capacitance values ​​of the capacitors connected to the protection circuit 8 need to be adjusted.

[0046] Figure 4 , Figure 5 This is a top view showing the capacitor adjustment section of Embodiment 1. Figure 6 This is a cross-sectional view showing the capacitor adjustment section of Embodiment 1. In the second control semiconductor element 3b, the protection circuit 8 is connected to terminals Fo and CFo, respectively. The protection circuit 8 is connected to one end of capacitors C1 and C2 via wirings 15a and 15b, respectively. The other ends of capacitors C1 and C2 and terminal VNC are connected to wiring 15c, which is at ground potential. Terminal Fo is connected to lead terminal 4 via wire 16a. Fo Connections. Wiring 15a, 15b, 15c, for example, aluminum wiring.

[0047] At lead terminal 4 VNC and lead terminal 4 CFo A capacitor C3, acting as a surface-mount capacitor, is connected between them. Terminal V NC Through wire 16b and lead terminal 4 VNC Connection. Terminal CFo is connected to lead terminal 4 via wire 16c. CFo Connection. That is, the protection circuit 8 is connected to the capacitor C3 via wire 16c. The capacitor C3 and wires 16b and 16c constitute the capacitor adjustment part 5.

[0048] Wires 16b and 16c are exposed from the molding resin 7 through opening 7a. Therefore, as... Figure 5 , Figure 6 As shown, the wire 16c can be cut using an external laser trimmer. Alternatively, it can be cut using a cutting tool such as scissors. This disconnects the protection circuit 8 from the capacitor C3, reducing the capacitance value of the capacitor connected to the protection circuit 8. In other words, the wire is not cut when it is desired to increase the capacitance value of the capacitor connected to the protection circuit 8, and the wire is cut without connecting the capacitor C3 in parallel when it is desired to decrease the capacitance value.

[0049] As explained above, in this embodiment, the capacitance value of the capacitor connected to the protection circuit 8 can be adjusted depending on whether the wire 16c exposed from the molding resin 7 is cut from the outside. Furthermore, since it is not necessary to house the capacitor in the opening 7a of the molding resin 7, the number of external terminals does not increase. As a result, the output period of the error signal can be adjusted from the outside without increasing the number of external terminals. Furthermore, since it is not necessary to add a capacitor around the device for adjusting the output period of the error signal, the area around the semiconductor device can also be reduced. In cases where it is desired to connect a capacitance value larger than the capacitance value inside the second control semiconductor element 3b to the protection circuit 8, an external capacitor C3 is used as in this embodiment.

[0050] Implementation method 2.

[0051] Figure 7 This is a top view showing the semiconductor device of Embodiment 2. The capacitor adjustment unit 5 is built into the second control semiconductor element 3b.

[0052] Figure 8 This is a circuit diagram showing the protection circuit of the second control semiconductor element in Embodiment 2. No capacitor C3 is provided outside the second control semiconductor element 3b; capacitors C1 and C2 inside the second control semiconductor element 3b constitute the capacitance adjustment section 5.

[0053] Figure 9 This is a top view showing the capacitor adjustment section of Embodiment 2. Figure 10 This is a cross-sectional view showing the capacitor adjustment section of Embodiment 2. Capacitors C1 and C2, connected in parallel, constitute the capacitor of the capacitor adjustment section 5. Wiring 15a and 15b connect capacitors C1 and C2 and the protection circuit 8, respectively.

[0054] A portion of the wiring 15a, 15b is exposed from the molding resin 7 through the opening 7a. Therefore, as... Figure 10 As shown, one or both of the wirings 15a and 15b can be cut off by external laser trimming. This disconnects the protection circuit 8 from capacitors C1 and C2, reducing the capacitance value of the capacitors connected to the protection circuit 8. In other words, the capacitance value of the capacitors connected to the protection circuit 8 can be adjusted depending on whether the wirings 15a and 15b exposed from the molding resin 7 are cut off from the outside. Therefore, similar to Embodiment 1, the output period of the error signal can be adjusted externally without increasing the number of external terminals. Furthermore, by selecting whether to cut off the connection of multiple capacitors C1 and C2 connected in parallel, the capacitance value can be adjusted more precisely.

[0055] Implementation method 3.

[0056] Figure 11This is a top view showing the semiconductor device according to Embodiment 3. The capacitor adjustment unit 5 is disposed on the lead terminal 4 outside the second control semiconductor element 3b. CFo superior.

[0057] Figure 12 This is a circuit diagram showing the protection circuit of the second control semiconductor element in Embodiment 3. The internal capacitors C1 and C2 of the second control semiconductor element 3b and the external capacitors C3 and C4 are connected in parallel between the protection circuit 8 and the ground potential. Capacitors C3 and C4 are connected to the protection circuit 8 via terminal CFo.

[0058] Figure 13 This is a top view showing the capacitor adjustment section of Embodiment 3. As the capacitor adjustment section 5, a semiconductor chip 18 is disposed on the lead terminal 4. CFo On the upper surface of the semiconductor chip 18, electrodes 18a and 18b and wiring 18c and 18d are disposed. The electrodes 18a and 18b and wiring 18c and 18d are made of, for example, aluminum.

[0059] Electrode 18a is connected to the grounding terminal 4 via wire 16b. VNC Electrode 18b is connected to the lower surface electrode of semiconductor chip 18 through a through-hole. The lower surface electrode is connected to lead terminal 4 via solder or the like. CFo Connection. Lead terminal 4 CFo The capacitors C3 and C4 are connected to the terminal CFo of the second control semiconductor element 3b via wire 16c. One end of the capacitors C3 and C4 is connected to the electrode 18a, and the other end is connected to the electrode 18b via wires 18c and 18d, respectively.

[0060] A portion of the wirings 18c and 18d are exposed from the molding resin 7 through the opening 7a. Therefore, one or both of the wirings 18c and 18d can be cut off by external laser trimming. That is, the capacitance value of the capacitor connected to the protection circuit 8 can be adjusted depending on whether the wirings 18c and 18d exposed from the molding resin 7 are cut off from the outside. Thus, similar to Embodiment 1, the output period of the error signal can be adjusted from the outside without increasing the number of external terminals. Furthermore, the capacitance value can be adjusted more precisely by selectively cutting off the connection of the multiple capacitors C3 and C4 that are connected in parallel.

[0061] Implementation method 4.

[0062] Figure 14 This is a top view showing the semiconductor device of Embodiment 4. Figure 15This is a cross-sectional view showing the capacitor adjustment section of Embodiment 4. An openable and closable cover 19 is provided on the opening 7a. With the cover 19, the upper part of the capacitor adjustment section 5 can be opened only when adjusting the capacitor, and the opening 7a can be closed when not adjusting the capacitor. This prevents foreign objects from entering the device, thus improving the reliability of the semiconductor device. Other structures and effects are the same as in Embodiment 1.

[0063] Implementation method 5.

[0064] Figure 16 This is a top view showing the semiconductor device of Embodiment 5. Switching elements 1a to 1f are switching elements that integrate a transistor and a freewheeling diode onto a single chip, such as an RC-IGBT (Reverse Conductive IGBT) consisting of an IGBT and a freewheeling diode on a single chip. Therefore, diodes 2a to 2f can be omitted to miniaturize the semiconductor device, thus reducing the substrate area of ​​the semiconductor device. Other structures and effects are the same as in Embodiment 1.

[0065] Furthermore, the switching elements 1a-1f and diodes 2a-2f are not limited to being formed of silicon, but can also be formed of wide-bandgap semiconductors with a larger bandgap compared to silicon. Examples of wide-bandgap semiconductors include silicon carbide, gallium nitride-based materials, or diamond. Semiconductor chips formed from such wide-bandgap semiconductors can be miniaturized due to their high voltage withstand capability and allowable current density. By using such miniaturized semiconductor chips, semiconductor devices assembled with these chips can also achieve miniaturization and high integration. In addition, because semiconductor chips have high heat resistance, the heat sink fins can be miniaturized, and water cooling can be replaced with air cooling, further miniaturizing the semiconductor device. Moreover, because semiconductor chips have low power loss and high efficiency, the efficiency of the semiconductor device can be improved.

[0066] While preferred embodiments have been described in detail above, the present invention is not limited to the embodiments described above, and various modifications and substitutions can be made to the embodiments without departing from the scope of the claims. Hereinafter, various aspects of this disclosure will be summarized as appendices.

[0067] (Note 1)

[0068] A semiconductor device, characterized in that it comprises: a switching element; The control semiconductor element that controls the switching element; A capacitor adjustment section having a capacitor and a conductive part; and The molding resin used to seal the switching element, the control semiconductor element, and the capacitor adjustment section. The control semiconductor element has a protection circuit that outputs an error signal when an abnormality is detected in the semiconductor device. The protection circuit is connected to the capacitor via the conductive part. During the output of the error signal, the capacitor is charged. If the voltage of the charged capacitor exceeds a threshold, the output of the error signal is stopped and the capacitor is discharged. An opening is provided in the molding resin. The conductive portion of the capacitor adjustment section is exposed from the molding resin through the opening.

[0069] (Note 2)

[0070] The semiconductor device as described in Appendix 1 is characterized in that the capacitor is a surface-mount capacitor. The conductive part has wires connecting the chip capacitor and the protection circuit. The wire is exposed from the molding resin through the opening.

[0071] (Note 3)

[0072] The semiconductor device as described in Appendix 1 is characterized in that the capacitor has a plurality of capacitors connected in parallel with each other. The conductive portion has multiple wirings that respectively connect the multiple capacitors and the protection circuit. Multiple of the wirings are exposed from the molding resin through the opening.

[0073] (Note 4)

[0074] The semiconductor device as described in Appendix 3 is characterized in that the capacitance adjustment unit is built into the control semiconductor element.

[0075] (Note 5)

[0076] The semiconductor device as described in Appendix 3 is characterized in that the capacitance adjustment section is disposed on a lead terminal outside the control semiconductor element.

[0077] (Note 6)

[0078] The semiconductor device as described in any one of Appendices 1 to 5 is characterized in that it further includes an openable and closable cover disposed on the opening.

[0079] (Note 7)

[0080] The semiconductor device as described in any one of Appendices 1 to 6 is characterized in that the switching element is a switching element that integrates a transistor and a freewheeling diode on a single chip.

[0081] (Note 8)

[0082] The semiconductor device as described in any one of Appendix 1 to 7 is characterized in that the switching element is formed of a wide-bandgap semiconductor.

[0083] Label Explanation

[0084] 1a~1f Switching elements, 3b Second control semiconductor element, 4 CFo 5. Lead terminal, 7. Capacitor adjustment part, 8. Molding resin, 9. Opening, 10. Protection circuit, 11. Wiring, 12. Wiring wire, 13. Wiring wire, 14. Wiring wire, 15. Cover, 15. Capacitors, 16. Capacitors, 17. Capacitors, 18. Capacitors, 19. Capacitors, 10. Capacitors, 11. Capacitors, 12. Capacitors, 13. Capacitors, 14. Capacitors, 15. Capacitor adjustment part, 16. Capacitors, 18. Protective circuit, 19. Wiring wire, 10. Wiring wire, 18. Wiring wire, 19. Capacitors, 10. Capacitors, 11. Capacitors, 12. Capacitors, 13. Capac

Claims

1. A semiconductor device, characterized in that, include: Switching elements; The control semiconductor element that controls the switching element; A capacitor adjustment section having a capacitor and a conductive part; as well as The molding resin used to seal the switching element, the control semiconductor element, and the capacitor adjustment section. The control semiconductor element has a protection circuit that outputs an error signal when an abnormality is detected in the semiconductor device. The protection circuit is connected to the capacitor via the conductive part. During the output of the error signal, the capacitor is charged. If the voltage of the charged capacitor exceeds a threshold, the output of the error signal is stopped and the capacitor is discharged. An opening is provided in the molding resin. The conductive portion of the capacitor adjustment section is exposed from the molding resin through the opening.

2. The semiconductor device as claimed in claim 1, characterized in that, The capacitor is a surface-mount capacitor. The conductive part has wires connecting the chip capacitor and the protection circuit. The wire is exposed from the molding resin through the opening.

3. The semiconductor device as claimed in claim 1, characterized in that, The capacitor has multiple capacitors connected in parallel. The conductive portion has multiple wirings that respectively connect the multiple capacitors and the protection circuit. Multiple of the wirings are exposed from the molding resin through the opening.

4. The semiconductor device as claimed in claim 3, characterized in that, The capacitor adjustment section is built into the control semiconductor element.

5. The semiconductor device as claimed in claim 3, characterized in that, The capacitance adjustment section is disposed on the lead terminal on the outside of the control semiconductor element.

6. The semiconductor device according to any one of claims 1 to 5, characterized in that, It also includes an openable and closable cover disposed on the opening.

7. The semiconductor device according to any one of claims 1 to 5, characterized in that, The switching element is a switching element that combines a transistor and a freewheeling diode on a single chip.

8. The semiconductor device according to any one of claims 1 to 5, characterized in that, The switching element is formed of a wide-bandgap semiconductor.

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