Low-cost moisture-resistant photodetector core and method of making same

Abstract

The application relates to the technical field of photoelectric sensors, and particularly provides a low-cost moisture-resistant photoelectric detector core and a preparation method thereof. The photoelectric detector core comprises a substrate layer, a cadmium selenide layer arranged on the substrate layer, an electrode layer arranged on the end face of the cadmium selenide layer away from the substrate layer, wherein the electrode layer comprises positive and negative electrode regions arranged in an interdigital manner, a PTFE layer deposited in situ and covering the region of the cadmium selenide layer which is not provided with the electrode layer, and the PTFE layer forms a dense and combined hydrophobic passivation interface with the cadmium selenide photosensitive layer through a magnetron sputtering process. The PTFE layer is used for blocking the penetration of water molecules and passivating the surface defect states of the cadmium selenide photosensitive layer. The water molecules are prevented from being adsorbed and condensed on the exposed semiconductor surface between the electrodes, the surface leakage current channel is cut off, and the baseline drift under a high-humidity environment is reduced. The dangling bonds and defect states on the surface of the cadmium selenide are passivated, the dark current is reduced, the photocurrent is improved, and the photoelectric response performance is improved.

Description

Technical Field

[0001] This application relates to the field of photoelectric sensor technology, and in particular to a low-cost, moisture-resistant photodetector chip and its fabrication method. Background Technology

[0002] With the rapid development of modern facility agriculture, factory-style seedling raising has become a crucial link in ensuring crop yield and quality. During seedling raising, the light environment is not only the energy source for crop photosynthesis but also a vital signal source for regulating plant growth morphology; light intensity directly determines the development quality and growth cycle of seedlings. Therefore, real-time monitoring of light intensity within the seedling raising shed and accordingly driving precise LED supplemental lighting is a core function of modern seedling raising equipment. Developing highly sensitive, highly stable, and low-cost light sensors is a prerequisite for achieving intelligent control of the light environment.

[0003] Currently, the core materials for agricultural light sensors mainly involve silicon-based semiconductors, cadmium sulfide, perovskite, and cadmium selenide. While silicon-based semiconductors are technologically mature and easy to integrate, their limited absorption in the red light band leads to insufficient detection sensitivity. Although cadmium sulfide has a high light absorption coefficient, its slow photoelectric response makes it difficult to meet real-time monitoring requirements. Perovskite materials, while possessing excellent photoelectric properties, are extremely sensitive to water and oxygen, exhibiting poor environmental stability. In contrast, cadmium selenide (CdSe) has a high absorption coefficient across the entire visible light band, and is inexpensive and simple to fabricate, making it a highly promising core material suitable for agricultural applications.

[0004] However, in practical agricultural applications, light sensors face harsh high-humidity operating environments, which places extremely high demands on device packaging technology. Existing agricultural light sensors suffer from the following main drawbacks in packaging and material application: First, organic encapsulation has poor moisture resistance. Most existing light sensors use organic materials such as epoxy resin for encapsulation. These materials are highly hygroscopic and have high water vapor permeability. In high-humidity agricultural environments, moisture easily penetrates into the device, causing electrode oxidation, core performance deterioration, and baseline shift, severely shortening the sensor's lifespan. Second, hermetic encapsulation is costly. Although hermetic encapsulation technology using glass or metal tube bases can effectively block moisture, its manufacturing process is complex and production costs are high. Furthermore, due to its rigid physical characteristics, it cannot meet the needs of future flexible agricultural equipment, making large-scale application difficult. Third, high performance and low cost are difficult to balance. Existing technologies cannot solve the failure problem in high-humidity environments while ensuring the photoelectric performance of the core material through low-cost encapsulation structures.

[0005] In summary, developing a novel light sensor packaging structure that can be adapted to high-performance cores such as cadmium selenide while also achieving low cost and excellent moisture resistance has become an urgent problem to be solved in the field of modern agricultural detection technology. Summary of the Invention

[0006] In view of the shortcomings of the prior art, the purpose of this application is to provide a low-cost, moisture-resistant photodetector core and its preparation method, aiming to solve the problem that agricultural photodetectors in the prior art cannot achieve both low cost and excellent moisture resistance.

[0007] The technical solution adopted by this application to solve the technical problem is as follows: a low-cost, moisture-resistant photodetector core, comprising: basal layer; A cadmium selenide layer is disposed on the substrate layer; An electrode layer is disposed on the end face of the cadmium selenide layer away from the substrate layer, and the electrode layer includes positive electrode regions and negative electrode regions arranged in an interlocking finger-like manner. A PTFE layer is deposited in situ and covers the area on the cadmium selenide layer where no electrode layer is provided; The PTFE layer forms a densely bonded hydrophobic passivation interface with the cadmium selenide photosensitive layer through a magnetron sputtering process. The PTFE layer is used to block water molecule penetration and passivate the surface defect states of the cadmium selenide photosensitive layer.

[0008] Optionally, the thickness of the PTFE layer is H1, the thickness of the cadmium selenide layer is H2, wherein 0.01≤H1 / H2≤0.2, and the thickness H1 of the PTFE functional passivation layer ranges from 5nm to 100nm.

[0009] Optionally, the PTFE layer has a nanoscale microporous structure, and the surface water contact angle of the PTFE layer is greater than 110°.

[0010] Optionally, the electrode layer is a Ti / Al bilayer metal structure, or the electrode layer is a Ni / Au bilayer metal structure, wherein the Ti layer or Ni layer serves as a transition layer in contact with the cadmium selenide photosensitive layer.

[0011] Optionally, the positive and negative electrode regions have club-shaped interdigitators, and the ends of the club-shaped interdigitators are provided with stress-relieving rounded corners to prevent interface cracks from occurring during the deposition of the PTFE functional passivation layer.

[0012] The technical solution adopted by this application to solve the technical problem is as follows: a method for preparing a low-cost, moisture-resistant photodetector core as described above, comprising: Step S10: Substrate pretreatment, which involves multi-stage cleaning and drying of the substrate layer; Step S20: Photosensitive layer growth, depositing a cadmium selenide layer with a thickness of H2 on the substrate layer; Step S30: Electrode construction, using a masking process to deposit an electrode layer on the photosensitive layer having positive and negative electrode regions arranged in an interlaced pattern; Step S40: In a vacuum environment, a PTFE layer with a thickness of H1 is deposited on the surface of the cadmium selenide layer away from the substrate in the region where no electrode layer is set, using a low-power long-time sputtering method.

[0013] Optionally, in step S20, magnetron sputtering is used with cadmium selenide compound as the target material; the sputtering power is controlled at 20-150W, the working gas is argon, the working pressure is 1-30mTorr, and the deposition time is 1-60min, so as to obtain a cadmium selenide layer with a thickness H2 of 50-1000nm.

[0014] Optionally, step S20 further includes: Vacuum purification: Before deposition, the growth chamber is evacuated to a vacuum level of 1.0 × 10⁻⁶. -4 Below Pa, to remove water vapor from the cavity; The target material undergoes self-cleaning. The ignition process is initiated and a 3-minute pre-sputtering is performed to remove oxides or contaminants from the target surface.

[0015] Optionally, in step S40, magnetron sputtering is used with PTFE as the target material; the sputtering power is controlled at 30-120W, the working gas is argon, the working pressure is 1-30mTorr, and the deposition time is 1-60min.

[0016] Optionally, step S40 further includes: A high-vacuum environment was constructed by evacuating the growth chamber to a vacuum level of 1.0 × 10⁻⁶. -4 Pa; Target activation: Perform 3 minutes of pre-sputtering to activate the PTFE target surface; The deposition rate of the PTFE layer is controlled at 0.5-5 nm / min to precisely adjust H1 so that it satisfies the functional relationship H1=kH2, where the coefficient k ranges from 0.02 to 0.1.

[0017] Beneficial effects: This application provides a low-cost, moisture-resistant photodetector chip and its fabrication method. The low-cost, moisture-resistant photodetector chip utilizes magnetron sputtering to deposit a dense PTFE functional layer in situ on the surface of a cadmium selenide photosensitive layer without an electrode layer, effectively solving the problem of balancing low cost and high moisture resistance in existing technologies. On one hand, the strong hydrophobicity and dense interface structure of the PTFE layer effectively prevent water molecules from adsorbing and condensing on the exposed semiconductor surface between the electrodes, completely cutting off the surface leakage current channel, thereby significantly reducing baseline drift in high-humidity environments and greatly extending device lifespan. On the other hand, the PTFE layer directly contacts the cadmium selenide thin film, effectively passivating dangling bonds and defect states on the cadmium selenide surface, significantly reducing non-radiative recombination of photogenerated carriers, reducing dark current while increasing photocurrent, thereby significantly improving the sensitivity, specific detectivity, and photoelectric response performance of the photodetector chip. Attached Figure Description

[0018] Figure 1 This is a cross-sectional schematic diagram of the photodetector core provided in this application; Figure 2 This is a top view of the photodetector chip provided in this application; Figure 3 This is a schematic diagram comparing the resistance to humidity interference of photodetector chips with and without a PTEE layer; among them... Figure 3 (a) A graph showing the environmental humidity changes of a photoelectric sensor core without a PTEE layer in the prior art. Figure 3 (b) A graph showing the change in ambient humidity of the photoelectric sensor core with a PTEE layer in this application. Figure 3 (c) For photoelectric sensor chips in the prior art that do not have a PTEE layer Figure 3 (a) is a graph showing the trend of real-time baseline current (microamps) in response to changes in ambient humidity. Figure 3 (d) The photoelectric sensor core with a PTEE layer provided in the application Figure 3 (b) shows the trend of real-time baseline current (microamps) changing with ambient humidity.

[0019] Figure 4 This is a schematic diagram comparing the resistance to humidity interference of photodetector chips with and without a PTEE layer; among them... Figure 4 (a) A graph showing the environmental humidity changes of a photoelectric sensor core without a PTEE layer in the prior art. Figure 4 (b) A graph showing the change in ambient humidity of the photoelectric sensor core with a PTEE layer in this application. Figure 4 (c) For photoelectric sensor chips in the prior art that do not have a PTEE layer Figure 4 (a) is a graph showing the trend of real-time baseline current (microamps) in response to changes in ambient humidity. Figure 4 (d) The photoelectric sensor core with a PTEE layer provided in the application Figure 4 (b) shows the trend of real-time baseline current (microamps) changing with ambient humidity.

[0020] Figure 5 This is a schematic diagram comparing the responsivity of the photodetector chip provided in this application with the responsivity of photodetector chips in the prior art; Figure 6 This is a schematic diagram of the photoelectric response test of a photodetector chip with a TPEE layer provided in this application; Figure 7 This is another cross-sectional schematic diagram of the photodetector core provided in this application; Figure 8 This is a schematic flowchart of the method for fabricating the photodetector chip provided in this application; Explanation of reference numerals in the attached figures: 10. Photodetector core; 11. Substrate layer; 12. Cadmium selenide; 13. Electrode layer; 14. PTFE layer; 131. Positive electrode region; 132. Negative electrode region. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of this application clearer and more explicit, the following detailed description of this application is provided with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.

[0022] In the description of this application, it should be understood that the terms "center," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, unless otherwise stated, "a plurality of" means two or more.

[0023] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection between two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0024] Example 1 Please refer to the following: Figure 1 and Figure 2 In Embodiment 1 of this application, a low-cost, moisture-resistant photodetector core 10 for use in agricultural production and research scenarios is provided. This low-cost, moisture-resistant photodetector core 10 can achieve good moisture resistance while maintaining low cost, thereby meeting the requirements of high-humidity environments in agricultural production or research.

[0025] The low-cost, moisture-resistant photodetector core 10 includes a substrate layer 11, a cadmium selenide (CdSe) 12 layer, an electrode layer 13, and a PTFE layer 14. The substrate layer 11 uses a glass substrate with high light transmittance, providing physical support for the CdSe 12 layer, electrode layer 13, and PTFE layer 14 while ensuring effective light penetration. The CdSe 12 layer is disposed on the substrate layer 11 and is the core photosensitive layer of the photodetector. CdSe 12 has a high light absorption coefficient in the visible light band, effectively converting light signals into electrical signals. The electrode layer 13 is disposed on the end face of the CdSe 12 layer facing away from the substrate layer 11. The electrode layer 13 includes positive electrode regions 131 and negative electrode regions 132 arranged in an interlaced, finger-like pattern, thereby maximizing the expansion and utilization of the photosensitive area. A PTFE layer 14 is deposited in situ and continuously covers the area of ​​the cadmium selenide 12 layer where the electrode layer 13 is not provided. The PTFE layer 14 forms a densely bonded hydrophobic passivation interface with the cadmium selenide 12 photosensitive layer through a magnetron sputtering process. The PTFE layer 14 is used to block water molecule penetration and passivate the surface defect states of the cadmium selenide 12 photosensitive layer.

[0026] Existing epoxy resin encapsulations, commonly used in technology, are hydrophilic and porous, allowing water vapor to easily permeate. However, the PTFE layer 14 in this embodiment utilizes the extremely strong hydrophobic properties of fluorine atoms to construct a physical barrier on the device surface, preventing water molecules from adhering to or accumulating there. In particular, the PTFE layer 14, prepared by magnetron sputtering, forms a densely bonded interface with the underlying cadmium selenide 12 photosensitive layer, effectively preventing potential micropores and blocking the permeation path of water molecules into the core.

[0027] Please refer to section 3 for further details. Figure 3This is a comparison chart of the resistance to humidity interference of photodetector cores with and without PTFE layer. Under the protection of PTFE layer 14, when the ambient humidity changes drastically from 20%RH to 70%RH, the baseline current fluctuation of the photodetector core provided in this application is only 0.3%, which is an order of magnitude higher than the 3.1% fluctuation of the device without PTFE layer 14, and completely solves the baseline drift problem in high humidity environment. Figure 3 It includes four parts: a, b, c, and d. Figure 3 (a) and Figure 3 (c) A parameter chart for the photoelectric sensor core without a PTEE layer in the prior art; Figure 3 (b) and Figure 3 (d) A parameter chart for the photoelectric sensor core with a PTEE layer provided in this application; Figure 3 (a) and Figure 3 (b) is a graph showing changes in ambient humidity; Figure 3 (c) For photoelectric sensor chips in the prior art that do not have a PTEE layer Figure 3 (a) Trend graph of real-time baseline current (microamps) in response to changes in ambient humidity; Figure 3 (d) The photoelectric sensor core with a PTEE layer provided in the application Figure 3 (b) shows the trend of real-time baseline current (microamps) changing with ambient humidity; it can be seen that... Figure 3 In (c), when humidity changes, the baseline current of the existing photodetector core increases significantly, by approximately 3.1%; in (d), the baseline current of the photodetector core with a PTFE passivation layer provided in this application does not change significantly with humidity, only 0.3%. It can be seen that the PTFE layer can effectively improve the stability of the detector's baseline current, making it less susceptible to humidity interference, thereby effectively improving the stability and reliability of the detector in high-humidity agricultural applications.

[0028] Please refer to section 4 for further details. Figure 4 This is a comparison chart of the resistance to humidity interference of photodetector cores with and without PTFE layer. Under the protection of PTFE layer 14, when the ambient humidity changes drastically from 40%RH to 70%RH, the baseline current fluctuation of the photodetector core provided in this application is only 0.04%, compared with the 0.11% fluctuation of the device without PTFE layer 14. The stability is improved by an order of magnitude, and the baseline drift problem in high humidity environment is completely solved. Figure 4 It includes four parts: a, b, c, and d. Figure 4 (a) and Figure 4 (c) A parameter chart for the photoelectric sensor core without a PTEE layer in the prior art; Figure 4 (b) and Figure 4 (d) A parameter chart for the photoelectric sensor core with a PTEE layer provided in this application; Figure 4 (a) and Figure 4 (b) is a graph showing changes in ambient humidity; Figure 4 (c) For photoelectric sensor chips in the prior art that do not have a PTEE layer Figure 4 (a) Trend graph of real-time baseline current (microamps) in response to changes in ambient humidity; Figure 4 (d) The photoelectric sensor core with a PTEE layer provided in the application Figure 4 (b) shows the trend of real-time baseline current (microamps) changing with ambient humidity; it can be seen that... Figure 4 In (c), when humidity changes, the baseline current of the existing photodetector core increases significantly, by approximately 0.11%; in (d), the baseline current of the photodetector core with a PTFE passivation layer provided in this application does not change significantly with humidity, only by 0.04%. It can be seen that the PTFE layer can effectively improve the stability of the detector's baseline current, making it less susceptible to humidity interference, thereby effectively improving the stability and reliability of the detector in high-humidity agricultural applications.

[0029] Meanwhile, the surface of the cadmium selenide (CdSe) 12 layer typically contains numerous dangling bonds or lattice defects (surface defect states). These defects trap photogenerated carriers, leading to a decrease in photocurrent (reduced sensitivity) and an increase in dark current. In this embodiment, the PTFE layer 14 acts not only as a barrier layer but also as a passivation layer. During in-situ deposition, PTFE molecules interact with the CdSe 12 surface, effectively filling or modifying the surface defect states of the CdSe 12 photosensitive layer and reducing nonradiative recombination of carriers on the surface. This interfacial passivation effect significantly improves the photoelectric conversion efficiency of the device.

[0030] Please refer to section 5. Figure 5 This is a comparison chart of the responsivity of photodetector chips with and without a PTFE layer. According to the test results, adding a PTFE layer of 14 improves the responsivity of the detector chip under the same illumination conditions by approximately 10%-30%, for example, at an illumination intensity of 1.4 mW / cm². 2 After adding the PTFE layer, the responsivity of the photodetector chip increased from 54.97 mA / W to 67.96 mA / W, an increase of approximately 24%, thereby improving the sensitivity of the photodetector chip.

[0031] Please refer to the following: Figure 6 , Figure 6 This is a photoelectric response test diagram of a photodetector chip with a TPEE layer provided in this application; the photoelectric response curve of the photodetector chip with a PTFE layer was experimentally tested, and the light source was a white LED. Figure 6The vertical axis represents the current (microamps) of the photodetector chip, and the horizontal axis represents time. It can be seen that the current of the detector chip changes significantly under different light intensities, with the current increasing significantly with stronger light. When the light is removed, the current of the detector chip quickly returns to the baseline current, demonstrating good switching characteristics.

[0032] Finally, the photodetector chip 10 abandons expensive metal casings or ceramic hermetic encapsulation, achieving the same or even better protection effect simply by sputtering a nano-scale PTFE film on the chip surface. This simplifies the manufacturing process, reduces raw material costs, and enables the photodetector chip 10 to meet the demand for massive amounts of low-cost sensors in smart agriculture IoT.

[0033] Furthermore, the PTFE layer 14 can also cover part of the electrode layer 13, thereby protecting the cadmium selenide layer 12 while protecting the motor layer, further improving the moisture resistance of the low-cost moisture-resistant photodetector core 10.

[0034] In some embodiments, the thickness of the PTFE layer 14 is H1, and the thickness of the cadmium selenide layer 12 is H2, with the ratio 0.01 ≤ H1 / H2 ≤ 0.2, and the thickness H1 of the PTFE functional passivation layer ranging from 5 nm to 100 nm. By limiting the thickness ratio of the PTFE layer 14 (H1) to the cadmium selenide layer 12 (H2) to between 0.01 and 0.2, and H1 to be 5-100 nm, the passivation layer is ensured to possess both density and low interfacial stress. Within this preferred range, the PTFE layer 14 can form a continuous, non-porous hydrophobic interface, effectively blocking water vapor penetration, significantly reducing the baseline fluctuation of the device from 3.1% to 0.3% at 20%-70% RH humidity. Simultaneously, this thickness matching achieves optimal light transmission and surface defect passivation, reducing carrier recombination and improving photoelectric responsivity by approximately 24%. This avoids the protective failure caused by an excessively thin PTFE layer 14 or the stress peeling caused by an excessively thick PTFE layer 14, achieving a synergistic optimization of high moisture resistance and high sensitivity.

[0035] In some embodiments, the PTFE layer 14 has a nanoscale microporous structure, and the PTFE layer 14 is prepared using a magnetron sputtering process. By precisely controlling the sputtering power of 100 W, the working pressure of 3 mTorr, and the substrate temperature (room temperature), the nucleation and growth mode of PTFE molecules on the cadmium selenide 12 surface is regulated. Consequently, the PTFE layer 14 does not form a completely flat mirror film, but rather self-assembles to form a rough surface with a nanoscale microporous structure, with nanoscale PTFE particles or islands stacked together, forming a physically microscopic "uneven" morphology.

[0036] Furthermore, the surface water contact angle of the PTFE layer 14 is greater than 110°. The nanoscale microporous structure traps a small amount of air pockets on the surface of the PTFE layer 14. When a water droplet contacts this surface, due to the presence of air in the micropores, the water droplet cannot completely wet the interior of the pores, but is in a "gas-liquid-solid" composite contact state. This significantly increases the surface water contact angle of the PTFE layer 14 to over 110°. The superhydrophobic structure utilizes the synergistic effect of "microscopic roughness" and "low surface energy" to make the surface water droplets exhibit a Cassie-Baxter state, greatly reducing the contact area between water molecules and the device, effectively suppressing water vapor condensation. A physical barrier is constructed, cutting off the path for water molecules to penetrate into the cadmium selenide 12 photosensitive layer, effectively preventing water molecules from adsorbing and condensing on the exposed semiconductor surface between the electrodes, and completely cutting off the surface leakage current channel.

[0037] Please refer to further details. Figure 7 , Figure 7 This is a cross-sectional schematic diagram of the photodetector core provided in this application. In some embodiments, the electrode layer 13 is a Ti / Al bilayer metal structure, or the electrode layer 13 is a Ni / Au bilayer metal structure, wherein the Ti layer or Ni layer serves as a transition layer in contact with the cadmium selenide 12 photosensitive layer. On the surface of the cadmium selenide 12 photosensitive layer, a Ti layer or Ni layer (e.g., 5-20 nm) is first sputtered and deposited. Due to the high chemical reactivity of Ti and Ni, both Ti and Ni can undergo microscopic chemical bonding or diffusion with Se or Cd atoms on the cadmium selenide 12 surface, thereby establishing a stable mechanical attachment anchor. Without disrupting the vacuum environment, a thicker Al layer (e.g., 50-200 nm) is immediately sputtered and deposited on the transition layer.

[0038] This invention employs a Ti / Al or Ni / Au bilayer metal electrode structure, utilizing Ti or Ni as a transition layer in direct contact with the cadmium selenide-12 photosensitive layer. This significantly solves the problems of easy oxidation, poor adhesion, and high potential barriers associated with single-layer aluminum electrodes. The high chemical reactivity of the Ti / Ni layer enables it to form a strong mechanical anchor with cadmium selenide-12, enhancing the electrode's resistance to peeling. Simultaneously, this transition layer effectively reduces the contact resistance at the metal-semiconductor interface, forming an ideal ohmic contact and eliminating the Schottky barrier's obstruction of carrier transport. Combined with the excellent conductivity of the upper Al / Au layer, this significantly improves the photocurrent collection efficiency and response speed, ensuring the detector's high sensitivity and long-term stability.

[0039] Please refer to the reference again. Figure 2In some embodiments, the positive electrode region 131 and the negative electrode region 132 are club-shaped, meaning that the opposite edges of the positive electrode region 131 and the negative electrode region 132 are flush, and the adjacent edges of the positive electrode region 131 and the negative electrode region 132 are spaced apart and interlaced, similar to the interlacing of two fingers, but the positive electrode region 131 and the negative electrode region 132 do not contact each other. Furthermore, the ends of the club-shaped club-shaped fingers are provided with stress-relieving rounded corners to prevent interface cracks from forming between the positive electrode region 131 and the negative electrode region 132 during the deposition of the PTFE functional passivation layer.

[0040] Example 2 Please refer to further details. Figure 8 Embodiment 2 of this application provides a method for fabricating a low-cost, moisture-resistant photodetector chip based on the embodiment provided, comprising: Step S10: Substrate pretreatment, which involves multi-stage cleaning and drying of the substrate layer; The substrate material includes, but is not limited to, flexible polymers (such as polyethylene terephthalate, polyimide, polyethylene naphthalate, or polydimethylsiloxane), or other rigid insulating materials (such as glass, quartz, sapphire, or silicon wafers with an insulating oxide layer). In this embodiment, the substrate is preferably a glass substrate. The glass substrate is ultrasonically cleaned sequentially with anhydrous ethanol, acetone, and deionized water for 5-10 minutes to remove surface contaminants such as particles and oil. Finally, the cleaned glass substrate is dried with a nitrogen gun to ensure that there are no residual solvent traces on the substrate surface, providing a clean interface for the subsequent deposition of the cadmium selenide layer.

[0041] Step S20: Photosensitive layer growth, depositing a cadmium selenide layer with a thickness of H2 on the substrate layer; The photosensitive layer is a semiconductor thin film layer in the detector that is sensitive to light radiation. When light shines on this layer, the energy of the photons is absorbed, generating electron-hole pairs (i.e., photogenerated carriers). In this embodiment, cadmium selenide (CdSe) is used as the photosensitive layer material. Cadmium selenide has extremely high light absorption rate throughout the entire visible light band (especially the red light band), and its fabrication process is simple and inexpensive. Light irradiation induces a significant decrease in the resistance of the cadmium selenide layer, and the change in resistance shows a good linear relationship with the light intensity. This is the fundamental principle that allows the photodetector chip to accurately measure light intensity. In the fabrication method of this embodiment, the physical specifications of the photosensitive layer directly determine the sensitivity of the detector; the thickness H2 of the cadmium selenide layer is typically set between 50-1000 nm; this ensures that photons are fully absorbed while avoiding recombination losses of carriers during transmission due to excessive film thickness.

[0042] Furthermore, in step S20, a cadmium selenide photosensitive layer is grown in situ on the pretreated substrate using magnetron sputtering, with cadmium selenide compound as the target material; the sputtering power is controlled at 20-150W, the working gas is argon, the working pressure is 1-30 mTorr, and the deposition time is 1-60 min to obtain a cadmium selenide layer with a thickness H2 of 50-1000 nm; vacuum purification is performed, and the growth chamber is evacuated to 1.0 × 10⁻⁶ m / s before deposition. -4 Below Pa, the residual water vapor and oxygen in the cavity are eliminated to the maximum extent, ensuring the purity of the cadmium selenide film and preventing impurity energy levels from affecting the photoelectric performance of the photodetector core; the target material self-cleaning, the ignition program is started and 3 minutes of pre-sputtering is performed, and the oxide layer or adsorbed contaminants that may exist on the target material surface are removed by plasma bombardment, thereby ensuring the cleanliness of the interface in the initial stage of deposition.

[0043] Specifically, deposition was carried out for 60 minutes under working conditions of 5 mTorr and sputtering power of 5 W. By reducing particle collision losses in a low-pressure environment, sputtered particles were given appropriate kinetic energy, allowing them to migrate and arrange into a high-quality crystal structure on the substrate, ultimately obtaining a dense cadmium selenide layer with a thickness of approximately 500 nm.

[0044] Step S30: Electrode construction, using a masking process to deposit an electrode layer on the photosensitive layer having positive and negative electrode regions arranged in an interlaced pattern; By constructing an efficient carrier collection structure on the surface of the cadmium selenide layer, and employing a combination of physical masking and magnetron sputtering, good electrical contact with the cadmium selenide layer in the photodetector core is achieved. A precision-machined physical mask with a specific opening pattern is applied to the surface of the grown cadmium selenide layer to define the geometry of the electrodes. To maximize the collection efficiency of photogenerated carriers and reduce the risk of electric field concentration, the positive and negative electrode regions are designed as interdigitated staggered structures with club-shaped ends and stress-relieving rounded corners. This not only increases the contact area at the electrode ends but, more importantly, effectively disperses the interfacial stress generated during film growth during the subsequent PTFE layer deposition step S40, preventing stress concentration at sharp electrode edges that could lead to interfacial cracks or delamination.

[0045] Furthermore, the electrode layer has a bilayer metal structure. During deposition, a transition layer is first deposited. A Ti or Ni metal layer with a thickness of 5-20 nm is deposited as the transition layer. Ti or Ni has strong chemical reactivity and can form strong chemical bonds with atoms on the cadmium selenide surface, significantly enhancing the mechanical adhesion between the electrode layer and the cadmium selenide layer. Simultaneously, the transition layer can also form a low-resistance ohmic contact with cadmium selenide, ensuring that photogenerated electrons can cross the interface barrier without hindrance.

[0046] Then, an Al or Au metal layer with a thickness of 50-200 nm is deposited in situ on the transition layer as the main conductive layer. Al or Au has extremely low bulk resistivity, which can reduce transmission loss. In the structure of the Ni / Au electrode layer, the top Au provides excellent oxidation resistance, forming a double protection with the external passivation layer.

[0047] It is important to emphasize that the interdigitated structure significantly shortens the path for photogenerated carriers to diffuse from the cadmium selenide layer to the electrodes, thereby significantly reducing the device's response time and improving photocurrent collection efficiency. By incorporating stress-relieving rounded corners, the mechanical stability issue caused by the mismatch in thermal expansion coefficients between the metal electrodes and the subsequent PTFE passivation layer is resolved. Furthermore, by employing a physical mask method to replace traditional photolithography, which eliminates expensive photoresist and complex development and etching steps, the production process is greatly simplified, effectively reducing the fabrication cost of the photodetector chip.

[0048] Step S40: In a vacuum environment, a PTFE layer with a thickness of H1 is deposited on the surface of the cadmium selenide layer and the electrode layer away from the substrate using a low-power long-time sputtering method.

[0049] A continuous and dense polytetrafluoroethylene (PTFE) film was in situ constructed on the surface of the cadmium selenide layer and electrode layer away from the substrate (i.e., the top surface of the device) by magnetron sputtering in a vacuum environment.

[0050] First, the base vacuum level of the growth chamber was strictly evacuated to 1.0 × 10⁻⁶. -4 Pa, through a high vacuum state, completely eliminates residual air and water vapor in the cavity, providing an absolutely clean interface for subsequent film growth, preventing trace water molecules from being trapped at the interface between PTFE and cadmium selenide, and eliminating the possibility of increased internal dark current and electrochemical corrosion of the interface from the source.

[0051] While maintaining a high vacuum, high-purity argon gas is introduced as the working gas. Using pure PTFE as the sputtering target, the initiation process is started, but before actual deposition onto the device surface, the sample baffle is kept closed, and the PTFE target is pre-sputtered for 3-5 minutes. Plasma bombardment is used to strip and remove moisture, oxides, and aging impurities adsorbed from the target surface due to long-term exposure or previous processes. The activated target exposes pure polymer molecules, ensuring that the subsequently sputtered fluorine-containing groups (such as CF2 and CF3) have extremely high purity and chemical activity.

[0052] After pre-sputtering, the sample baffle is opened, and the formal film deposition stage begins. The working pressure is stabilized in the low-pressure range of 1-30 mTorr; the sputtering power is limited to a low-power state of 30-120 W; and the deposition time is set for a long-term operation of 1-60 min. Using "low power" is to avoid the high-energy plasma directly breaking the PTFE fluorocarbon backbone structure; by controlling the deposition time, sufficient time is allowed for molecular migration and self-assembly on the surface, thus avoiding the pores or island defects that can easily occur with rapid film deposition, ultimately forming a dense film with superhydrophobic properties.

[0053] Meanwhile, by configuring the aforementioned low-power parameters, the deposition rate of the PTFE layer is strictly limited to 0.5-5 nm / min. Through precise rate control and accurate adjustment of the deposition time, the final PTFE layer thickness (H1) and the underlying cadmium selenide layer thickness (H2) perfectly satisfy the functional relationship H1=kH2, with the proportionality coefficient k ranging from 0.02 to 0.1. This provides sufficient physical water-blocking thickness while avoiding the obstruction of incident light or interfacial thermal stress peeling due to excessive film thickness, achieving an optimal balance between high light transmittance and strong moisture resistance.

[0054] In summary, this application provides a low-cost, moisture-resistant photodetector chip and its fabrication method. The photodetector chip includes: a substrate layer; a cadmium selenide layer disposed on the substrate layer; an electrode layer disposed on the end face of the cadmium selenide layer facing away from the substrate layer, the electrode layer including positive and negative electrode regions arranged in an interlaced finger-like pattern; and a PTFE layer deposited in situ and covering the area of ​​the cadmium selenide layer where the electrode layer is not disposed. The PTFE layer forms a densely bonded hydrophobic passivation interface with the cadmium selenide photosensitive layer through magnetron sputtering, and the PTFE layer serves to block water molecule penetration and passivate the surface defect states of the cadmium selenide photosensitive layer. The low-cost, moisture-resistant photodetector chip effectively solves the problem of balancing low cost and high moisture resistance in existing technologies by in-situ depositing a dense PTFE functional layer on the surface of the cadmium selenide photosensitive layer where the electrode layer is not disposed through magnetron sputtering. On the one hand, the strong hydrophobicity and dense interface structure of the PTFE layer effectively prevent water molecules from adsorbing and condensing on the exposed semiconductor surface between the electrodes, completely cutting off the surface leakage current channel, thereby significantly reducing baseline drift in high humidity environments and greatly extending device lifespan. On the other hand, the PTFE layer is in direct contact with the cadmium selenide film, which can effectively passivate the dangling bonds and defect states on the cadmium selenide surface, greatly reducing the nonradiative recombination of photogenerated carriers, reducing dark current while increasing photocurrent, thereby significantly improving the sensitivity, specific detectivity and photoelectric response performance of the photodetector chip.

[0055] It should be understood that the application of this application is not limited to the examples above. Those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.

Claims

1. A low-cost, moisture-resistant photodetector chip, characterized in that, include: basal layer; A cadmium selenide layer is disposed on the substrate layer; An electrode layer is disposed on the end face of the cadmium selenide layer away from the substrate layer, and the electrode layer includes positive electrode regions and negative electrode regions arranged in an interlocking finger-like manner. A PTFE layer is deposited in situ and covers the area on the cadmium selenide layer where no electrode layer is provided; The PTFE layer forms a densely bonded hydrophobic passivation interface with the cadmium selenide photosensitive layer through a magnetron sputtering process. The PTFE layer is used to block water molecule penetration and passivate the surface defect states of the cadmium selenide photosensitive layer.

2. The low-cost, moisture-resistant photodetector chip according to claim 1, characterized in that, The thickness of the PTFE layer is H1, and the thickness of the cadmium selenide layer is H2, wherein 0.01≤H1 / H2≤0.2, and the thickness H1 of the PTFE functional passivation layer ranges from 5nm to 100nm.

3. The low-cost, moisture-resistant photodetector chip according to claim 1, characterized in that, The PTFE layer has a nanoscale microporous structure, and the surface water contact angle of the PTFE layer is greater than 110°.

4. The low-cost, moisture-resistant photodetector chip according to claim 1, characterized in that, The electrode layer is a Ti / Al bilayer metal structure, or the electrode layer is a Ni / Au bilayer metal structure, wherein the Ti layer or Ni layer serves as a transition layer in contact with the cadmium selenide photosensitive layer.

5. The low-cost, moisture-resistant photodetector chip according to claim 1, characterized in that, The positive and negative electrode regions have club-shaped inserts, and the ends of the club-shaped inserts are provided with stress-relieving rounded corners to prevent interface cracks from occurring during the deposition of the PTFE functional passivation layer.

6. A method for preparing a low-cost, moisture-resistant photodetector core as described in any one of claims 1-5, characterized in that, include Step S10: Substrate pretreatment, which involves multi-stage cleaning and drying of the substrate layer; Step S20: Photosensitive layer growth, depositing a cadmium selenide layer with a thickness of H1 on the substrate layer; Step S30: Electrode construction, using a masking process to deposit an electrode layer on the photosensitive layer having positive and negative electrode regions arranged in an interlaced pattern; Step S40: In a vacuum environment, a PTFE layer with a thickness of H1 is deposited on the surface of the cadmium selenide layer away from the substrate in the area where no electrode layer is set, using a low-power long-time sputtering method.

7. The preparation method according to claim 6, characterized in that, In step S20, magnetron sputtering is used with cadmium selenide compound as target material; the sputtering power is controlled at 20-150W, the working gas is argon, the working pressure is 1-30mTorr, and the deposition time is 1-60min to obtain a cadmium selenide layer with a thickness H1 of 50-1000nm.

8. The preparation method according to claim 7, characterized in that, Step S20 further includes: Vacuum purification: Before deposition, the growth chamber is evacuated to a vacuum level of 1.0 × 10⁻⁶. -4 Below Pa, to remove water vapor from the cavity; The target material undergoes self-cleaning. The ignition process is initiated and a 3-minute pre-sputtering is performed to remove oxides or contaminants from the target surface.

9. The preparation method according to claim 6, characterized in that: In step S40, magnetron sputtering is used with PTFE as the target material; the sputtering power is controlled at 30-120W, the working gas is argon, the working pressure is 1-30mTorr, and the deposition time is 1-60min.

10. The preparation method according to claim 9, characterized in that: Step S40 further includes: A high-vacuum environment was constructed by evacuating the growth chamber to a vacuum level of 1.0 × 10⁻⁶. -4 Pa; Target activation: Perform pre-sputtering for 3-5 minutes to activate the PTFE target surface; The deposition rate of the PTFE layer is controlled at 0.5-5 nm / min to precisely adjust H1 so that it satisfies the functional relationship H1=kH2, where the coefficient k ranges from 0.02 to 0.1.

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