Low-inertia charging pile rectifier system based on energy barrier constraint and starting method

Abstract

The application provides a low-inertia charging pile rectifying system based on energy barrier constraint and a starting method, and relates to the technical field of power electronic conversion. The system comprises: a DC charging stack applied to multi-module parallel connection, including a power conversion circuit, a DC inductor, a sampling circuit and a digital signal processor; the DC inductor is a micro-henry DC inductor; the DC output end of the power conversion circuit is connected to a DC bus through the DC inductor; the sampling circuit is connected to a three-phase power grid, the DC inductor and the DC bus respectively, and is used for collecting electrical data of the power grid side and the DC side in real time; the digital signal processor is configured to generate an optimal voltage injection critical slope with the saturation energy barrier of the DC inductor as a constraint boundary according to the electrical data; and is further configured to generate a virtual damping signal based on a liquid time constant network according to the electrical data, and to generate a PWM driving signal according to the critical slope and the virtual damping signal. The application can simultaneously solve the problems of energy barrier out-of-boundary and real-time suppression of high-frequency LC resonance of the low-inertia topology in the starting transient state.

Description

Technical Field

[0001] This invention relates to the field of power electronic conversion technology, and in particular to a low-inertia charging pile rectification system and starting method based on energy barrier constraint. Background Technology

[0002] With the widespread adoption of 800V high-voltage platforms for electric vehicles, charging piles are facing increasingly stringent requirements for power density and efficiency. While traditional three-phase Buck-type PFC (Power Factor Correction) rectifiers possess inherent step-down characteristics and are suitable for wide-range voltage regulation charging, they typically rely on large-inertia DC inductors of 0.5 pu or more to smooth ripple and limit starting current, resulting in bulky magnetic components that severely restrict the miniaturization of charging modules.

[0003] To overcome power density bottlenecks, low-inertia designs using microhenry-level inductors have become an inevitable trend. However, low-inertia systems face severe challenges at startup: firstly, the transient topology change effect causes the circuit to exhibit a boost-like voltage increase at startup, which can easily lead to severe voltage overshoot; secondly, the AC-side filter capacitor and the DC-side inductor form a high-frequency resonant cavity, which can easily generate strong LC resonance or even chaotic oscillations, which traditional PID controllers based on linear time-invariant assumptions cannot effectively suppress, while conventional deep learning models have a huge number of parameters, making it impossible to achieve microsecond-level real-time control in embedded DSPs (Digital Signal Processors).

[0004] Therefore, developing a control system that adapts to low inertia physical characteristics and supports seamless parallel operation is key to realizing the next generation of high-density charging piles. Summary of the Invention

[0005] This invention provides a low-inertia charging pile rectification system and startup method based on energy barrier constraints, in order to solve the problems of energy barrier overrunning during startup of low-inertia topologies and real-time suppression of high-frequency LC resonance.

[0006] In a first aspect, embodiments of the present invention provide a low-inertia charging pile rectification system based on energy barrier constraints, applied to a DC charging pile with multiple modules connected in parallel, including a power conversion circuit, a DC inductor, a sampling circuit and a digital signal processor; the DC inductor is a microhenry level DC inductor; The DC output terminal of the power conversion circuit is connected to the DC bus via a DC inductor; The sampling circuit is connected to the three-phase power grid, DC inductor and DC bus respectively, and is used to collect electrical data on the power grid side and DC side in real time; The digital signal processor is configured to generate an optimal voltage injection critical slope based on electrical data and constrained by the saturation energy barrier of the DC inductor; it is also configured to generate a virtual damping signal based on a liquid time constant network based on electrical data, and generate a PWM drive signal based on the critical slope and the virtual damping signal.

[0007] In one possible implementation, the digital signal processor includes a holographic signal sensing module, a CPU module, and a CLA coprocessor module; the CPU module and the CLA coprocessor module exchange data via shared memory. The holographic signal sensing module is configured to construct a high-dimensional phase space state matrix based on electrical data; the high-dimensional phase space state matrix is ​​used to describe the transient characteristics of the system. The CPU module is configured to perform inverse dynamics reasoning using a KAN network based on the high-dimensional phase space state matrix, and generate the optimal voltage injection critical slope with the saturation energy barrier of the DC inductor as the constraint boundary. The CLA coprocessor module is configured to generate a virtual damping signal based on a liquid time constant network according to the high-dimensional phase space state matrix, and to generate a PWM drive signal based on the critical slope and the virtual damping signal.

[0008] In one possible implementation, multiple rectifier systems are connected in parallel to form a multi-module charging pile. The AC input terminals of each rectifier system are connected to a three-phase power grid or connected in parallel to the same three-phase bus. The DC output terminals of each system are connected in parallel to the same common DC bus. There is no communication line connection between the rectifier systems. The electrical data includes the real-time DC bus voltage of each parallel system. The CPU module is also configured to execute unidirectional ratchet logic; the unidirectional ratchet logic is that the reference voltage of each parallel system is only allowed to jump upward to follow the real-time DC bus voltage, and is not allowed to reset downward, so that multiple rectifier systems connected in parallel on the same DC bus will automatically converge to the rectifier system with the highest voltage for synchronization in the absence of communication.

[0009] In one possible implementation, the saturation energy barrier of the DC inductor is represented by the constraint boundary as follows:

[0010]

[0011] in, This represents the magnetic field energy injected into the inductor at any point during the startup process; This represents the upper limit of the energy barrier determined by the physical properties of the magnetic core; This is the inductance value; The saturation current threshold of the inductor core; To reserve a safety margin of energy; This refers to the rated operating voltage of the DC bus of the charging pile. This refers to the switching frequency of the power switching transistor; This represents the maximum allowable peak-to-peak current ripple of the system.

[0012] In one possible implementation, the power conversion circuit adopts a three-phase Buck rectifier topology; the inductance value of the DC inductor ranges from 100μH to 200μH.

[0013] In one possible implementation, the switching transistor of the power conversion circuit is a silicon carbide MOSFET; the on-resistance of the silicon carbide MOSFET is less than or equal to 16mΩ.

[0014] Secondly, embodiments of the present invention provide a low-inertia charging pile startup method based on energy barrier constraint, applied to the low-inertia charging pile rectification system based on energy barrier constraint as described in the above embodiments, the method comprising: Acquire electrical data from the grid side and DC side, and construct a high-dimensional phase space state matrix based on the electrical data; the high-dimensional phase space state matrix is ​​used to describe the transient characteristics of the system; Based on the high-dimensional phase space state matrix, inverse dynamics reasoning is performed using the Kolmogorov-Arnold network, with the saturation energy barrier of the DC inductor as the constraint boundary, to solve for the optimal voltage injection critical slope under the current operating conditions. Based on the high-dimensional phase space state matrix, a virtual damping signal is generated using a liquid time constant network. A PWM drive signal is generated based on the critical slope and the virtual damping signal; the PWM drive signal is used to control the switching action of the power conversion circuit.

[0015] In one possible implementation, based on the high-dimensional phase space state matrix, inverse dynamics reasoning is performed using a Kolmogorov-Arnold network, with the saturation energy barrier of the DC inductor as the constraint boundary, to solve for the optimal voltage injection critical slope under the current operating condition, including: Constructing the Kolmogorov-Arnold network; The high-dimensional phase space state matrix is ​​input into the Kolmogorov-Arnold network for inverse dynamics reasoning. The saturation energy barrier of the DC inductor is used as the constraint boundary, and an energy barrier penalty term is introduced to train the Kolmogorov-Arnold network. The trained Kolmogorov-Arnold network is distilled into an explicit analytical mathematical formula through symbolic regression, and the optimal voltage injection critical slope is output.

[0016] In one possible implementation, a virtual damping signal is generated based on a liquid time constant network according to a high-dimensional phase space state matrix, including: Construct a liquid time constant network; the liquid time constant network follows the neurodynamic equations; A reference voltage trajectory is constructed based on the optimal voltage injection critical slope; Monitor the real-time DC bus voltage. When there is a real-time DC bus voltage that is higher than the current reference voltage trajectory, reset the starting point of the current reference voltage trajectory to this real-time DC bus voltage to perform phase synchronization between multiple systems. While performing phase synchronization, LTC feedforward control is activated, and the inductor current and its infinitesimal components in the high-dimensional phase space state matrix are input to the liquid time constant network. The neural dynamics equation is solved in real time using the numerical integration method to obtain the virtual damping signal.

[0017] In one possible implementation, the optimal voltage injection critical slope is expressed as:

[0018] in, The critical slope for optimal voltage injection; The nonlinear mapping function representing the Kolmogorov-Arnold network; This is the effective value of the grid voltage; This is the load resistance value; All are dimensionless weight coefficients obtained from offline training.

[0019] In this embodiment of the invention, by employing a microhenry-level DC inductor to construct a low-inertia transformation stage, the volume of magnetic components is significantly reduced, enabling a power density exceeding 4kW / dm³. However, low inertia leads to a surge in the transient current change rate during startup and a tendency to exceed the core saturation energy barrier. To address this, the digital signal processor (DSP) uses the DC inductor's saturation energy barrier as a constraint boundary to generate an optimal voltage injection critical slope, strictly limiting the injected energy within a safe range and physically eliminating the risk of overshoot and system failure. Simultaneously, the low-inertia LCL structure is prone to high-frequency LC resonance, which traditional PID controllers struggle to effectively suppress. The DSP generates a virtual damping signal based on a liquid time constant network, which is correlated in real-time with the current's minute components. This is equivalent to introducing adaptive viscous damping, instantaneously enhancing damping energy dissipation during the oscillation initiation phase, thereby suppressing chaotic oscillations in their nascent stage. The coordinated control of the critical slope and the virtual damping signal allows the system to smoothly transition from a zero initial state to a steady state, without startup overshoot or resonance, laying a stable foundation for subsequent dual-loop control. Attached Figure Description

[0020] Figure 1 This is an application scenario diagram of the low-inertia charging pile rectification system based on energy barrier constraint provided in the embodiments of the present invention; Figure 2 This is a structural topology diagram of a low-inertia charging pile rectifier system based on energy barrier constraint provided in an embodiment of the present invention; Figure 3This is a flowchart illustrating the implementation of the low-inertia charging pile startup method based on energy barrier constraint provided in this embodiment of the invention. Figure 4 This is a control flowchart of the low-inertia charging pile start-up method based on energy barrier constraint provided in the embodiments of the present invention; Figure 5 This is a schematic diagram of the symbolic regression trajectory shaping principle using KAN network provided in an embodiment of the present invention; Figure 6 This is a block diagram of the cluster anchoring and following control logic provided in an embodiment of the present invention; Figure 7 This is a block diagram of the neuromorphic damping control logic provided in an embodiment of the present invention; Figure 8 This is a schematic diagram of the structure of the low-inertia charging pile starting device based on energy barrier constraint provided in an embodiment of the present invention. Figure 9 This is a schematic diagram of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0021] This invention primarily addresses the "stability paradox" and "cluster coordination dilemma" faced by existing high-power-density charging facilities when using low-inertia magnetic components. When the DC-side inductance of a three-phase Buck rectifier topology is reduced to the microhenry level to achieve a power density of over 4kW / dm³, traditional control faces three major bottlenecks: First, the transient inductor current change rate during startup is extremely large, easily exceeding the magnetic saturation energy barrier and triggering destructive surges; second, the small inductor and AC-side filter capacitor form a high-frequency resonant cavity, and traditional PID controllers cannot provide effective high-frequency damping, leading to limiting loop oscillations on the phase space manifold; third, in scenarios with multiple modules connected in parallel and no communication lines, the reference coordinate systems of each module deviate, causing lagging modules to misjudge the bus voltage and trigger reverse cutoff, resulting in coordination failure and circulating current oscillations.

[0022] To address the aforementioned issues, this application proposes a low-inertia charging pile rectification system and startup method based on manifold dynamic energy barrier constraints. Its core concept lies in constructing a heterogeneous control system with deep physical-information fusion: the physical layer employs a low-inertia topology to achieve high power density; the information layer utilizes a Kolmogorov-Arnold (KAN) network to symbolize physical constraints to ensure startup safety boundaries; a liquid time constant (LTC) network is used to make damping control continuous to suppress high-frequency resonance; and state-aware anchoring enables multi-module cluster collaboration without communication lines.

[0023] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0024] Figure 1 This diagram illustrates an application scenario of the low-inertia charging pile rectification system based on energy barrier constraints, as provided in an embodiment of the present invention. Figure 1 As shown, the low-inertia charging pile rectification system proposed in this application is applicable to modular DC charging piles composed of multiple identical rectifier systems connected in parallel. Specifically, the charging pile includes N rectifier systems with identical structures. The AC input terminals of each system are connected to a three-phase power grid (or connected in parallel to the same AC bus), and the DC output terminals of each system are connected in parallel to the same common DC bus, which is used to connect the electric vehicle's power battery. There is no communication line connection between the rectifier systems; electrical coupling is achieved only through the common DC bus. During charging pile operation, each rectifier system independently completes AC-DC conversion and jointly feeds power to the DC bus. The output power of the charging pile can be expanded on demand through flexible configuration of the number of rectifier systems to meet the supercharging requirements of 480kW, 600kW, and even higher power levels. In this application scenario, each system needs to complete collaborative control such as startup, current sharing, and fault redundancy without communication coordination.

[0025] See Figure 2 The diagram illustrates the structural topology of a low-inertia charging pile rectifier system based on energy barrier constraints, as provided in an embodiment of the present invention. This system employs a two-layer architecture combining physical circuitry and heterogeneous neural computing, detailed below: A low-inertia charging pile rectification system based on energy barrier constraint is characterized in that it is applied to a DC charging pile with multiple systems connected in parallel, and the rectification system includes a power conversion circuit, a DC inductor, a sampling circuit and a digital signal processor.

[0026] The DC output terminal of the power conversion circuit is connected to the DC bus via a DC inductor.

[0027] The sampling circuit is connected to the three-phase power grid, DC inductor and DC bus respectively, and is used to collect electrical data on the power grid side and DC side in real time.

[0028] For example, the electrical data from the grid side and the DC side include, but are not limited to, the grid voltage and three-phase current on the grid side, and the bus voltage and inductor current on the DC side. This data is directly acquired in real time and input to a digital signal processor for the generation of the critical slope of the KAN network and the calculation of the virtual damping signal of the LTC network, thereby achieving precise control of the low-inertia charging pile rectifier system.

[0029] The digital signal processor is configured to generate an optimal voltage injection critical slope based on electrical data and constrained by the saturation energy barrier of the DC inductor; it is also configured to generate a virtual damping signal based on a liquid time constant network based on electrical data, and generate a PWM drive signal based on the critical slope and the virtual damping signal.

[0030] An LC filter is installed between the three-phase power grid and the power conversion circuit. The power conversion circuit adopts a three-phase Buck rectifier topology. The DC inductor is a low-inertia microhenry DC inductor with an inductance value ranging from 100μH to 200μH.

[0031] For example, the switching transistor in the power conversion circuit is a silicon carbide MOSFET; the on-resistance of the silicon carbide MOSFET is less than or equal to 16mΩ.

[0032] In this embodiment, by employing a microhenry-level DC inductor to construct the low-inertia conversion stage, the volume of magnetic components is significantly reduced, enabling a power density exceeding 4kW / dm³. However, low inertia leads to a surge in the transient current change rate during startup and a tendency to exceed the core saturation energy barrier. To address this, the digital signal processor uses the DC inductor's saturation energy barrier as a constraint boundary to generate an optimal voltage injection critical slope, strictly limiting the injected energy within a safe range and physically eliminating the risk of overshoot and system failure. Simultaneously, the low-inertia LCL structure is prone to high-frequency LC resonance, which traditional PID controllers struggle to effectively suppress. The digital signal processor, based on a liquid time constant network, generates a virtual damping signal that is correlated in real-time with the current's minute components. This is equivalent to introducing adaptive viscous damping, which instantaneously enhances damping energy dissipation during the oscillation initiation phase, thereby suppressing chaotic oscillations in their nascent stage. The coordinated control of the critical slope and the virtual damping signal allows the system to smoothly transition from a zero initial state to a steady state, without startup overshoot or resonance, laying a stable foundation for subsequent dual-loop control.

[0033] In one embodiment, the digital signal processor (DSP) is described. The DSP incorporates a heterogeneous neural computing layer, serving as the "brain" of the system, and employs a dual-core heterogeneous architecture of CPU + CLA (control law accelerator). The CPU module's runtime T_symbol is in the millisecond range, responsible for symbolic inference and trajectory updates of the KAN network; the CLA coprocessor module's runtime T_neural is in the nanosecond range, responsible for real-time numerical solutions to the LTC differential equation and PWM generation; the two modules achieve zero-copy data interaction through shared memory in a dual-port RAM.

[0034] For example, the digital signal processor includes a holographic signal sensing module, a CPU module, and a CLA coprocessor module. The CPU module and the CLA coprocessor module exchange data through shared memory.

[0035] The holographic signal sensing module is configured to construct a high-dimensional phase space state matrix based on electrical data. The high-dimensional phase space state matrix is ​​used to describe the transient characteristics of the system.

[0036] For example, electrical data can be standardized and then distributed to heterogeneous cores, including the CPU module and the CLA coprocessor module. The electrical data may include environmental sensing signals, state feedback signals, and physical constraint signals. Among these, environmental sensing signals include the grid short-circuit ratio and the load equivalent resistance. The short-circuit ratio (SCR) is the ratio of the short-circuit capacity of the power grid at the point of common coupling (PCC) to the power of the charging pile, reflecting the strength of the power grid; the state feedback signal includes the inductor current micro-component. and real-time value of DC bus voltage The physical constraint signal includes the inductor saturation energy determined by hardware parameters. and the maximum withstand voltage of MOSFETs .

[0037] To obtain a complete picture of the system, the holographic signal sensing module is equipped with a Super-Twisting Sliding Mode Observer, a high-order sliding mode observer. Compared to traditional sliding mode observers, it suffers from less high-frequency noise. The Super-Twisting algorithm can smoothly estimate the grid impedance, much like accurately extracting the necessary information from a noisy signal, without requiring additional sensors. It is used for real-time estimation of grid impedance and load disturbances. The observation equations for estimating grid impedance and load disturbances are as follows:

[0038] in, For current observation error, The inductor current estimated by the observer; The grid impedance estimated by the observer; This refers to the DC-side voltage of the power conversion circuit. and The observer gain coefficient, the gain coefficient and The value needs to be tuned based on system parameters, sampling frequency, noise level, and a trade-off between convergence speed and robustness. The value range can be 500 to 5000. The value range can be 0.1 to 10; For example, a switching function used for sliding mode control. .

[0039] For example, by grid voltage Inductor current and bus voltage It also reconstructs the grid impedance using a sliding mode observer. and load equivalent impedance This forms a high-dimensional phase space state matrix. , as the holographic input vector.

[0040]

[0041] Holographic input vector Every Each refresh writes the data to shared memory for use by the KAN network. The holographic signal perception module provides complete phase space information for subsequent AI inference.

[0042] For example, the CPU module is configured to perform inverse dynamics reasoning using a KAN network based on the high-dimensional phase space state matrix, and generate the optimal voltage injection critical slope with the saturation energy barrier of the DC inductor as the constraint boundary.

[0043] The saturation energy barrier of a DC inductor, represented by the constraint boundary, is as follows:

[0044] in, This represents the magnetic field energy injected into the inductor at any point during startup, measured in watts (H). This represents the upper limit of the energy barrier determined by the physical properties of the magnetic core; This is the DC inductance value, in watts (H). The saturation current threshold of the inductor core; To reserve a safety energy margin; This refers to the rated operating voltage of the DC bus of the charging pile, expressed in V. This refers to the switching frequency of the power switching transistor, in Hz. The maximum allowable peak-to-peak current ripple of the system is expressed in amperes (A). This inequality (4) defines the physical boundary of low inertia, meaning that the inductance value must be much smaller than the design value under the traditional continuous conduction mode (CCM), giving the system extremely high dynamic response speed and size advantages.

[0045] For example, the CLA coprocessor module is configured to generate a virtual damping signal based on a liquid time constant network according to a high-dimensional phase space state matrix, and to generate a PWM drive signal based on the critical slope and the virtual damping signal.

[0046] Among them, the liquid time constant network can simulate the nonlinear leakage characteristics of biological neuron cell membranes under synaptic input, constructing a continuous-time differential equation mapping. At the switching frequency scale, based on the current differential component... The virtual damping coefficient of the system is dynamically adjusted to suppress high-frequency resonance of the LC filter.

[0047] For example, multiple rectifier systems are connected in parallel to form a multi-module charging pile. The AC input terminals of each rectifier system are connected to a three-phase power grid or connected in parallel to the same three-phase bus. The DC output terminals of each system are connected in parallel to the same common DC bus. There is no communication line connection between the rectifier systems. The electrical data includes the real-time DC bus voltage of each parallel system.

[0048] The CPU module is also configured to execute one-way ratchet logic.

[0049] Specifically, the CPU module embeds a one-way ratchet logic circuit. This circuit is configured to execute one-way ratchet logic. The one-way ratchet logic works as follows: the reference voltage of each parallel system is only allowed to jump upwards to follow the real-time DC bus voltage, and is not allowed to reset downwards. This ensures that multiple rectifier systems connected in parallel to the same DC bus automatically converge to the rectifier system with the highest voltage for synchronization in the absence of communication. The function of the one-way ratchet logic is to monitor the common bus voltage in real time for multi-module parallel scenarios. When the bus voltage is detected to be higher than its own reference trajectory, it determines that there is a master system that started earlier, triggers an interrupt using a hardware comparator, and forces its own reference trajectory starting point to be "anchored" to the current bus voltage value, thereby achieving implicit phase synchronization without communication lines.

[0050] See Figure 3 and Figure 4 , Figure 3 The flowchart illustrating the implementation of the low-inertia charging pile startup method based on energy barrier constraint provided in an embodiment of the present invention is shown. Figure 4 The control flowchart of the low-inertia charging pile start-up method based on energy barrier constraint provided by an embodiment of the present invention is shown below in detail: A low-inertia charging pile startup method based on energy barrier constraint, applied to the low-inertia charging pile rectification system based on energy barrier constraint as described in the above embodiments, includes: Step 301: Obtain electrical data from the grid side and DC side, and construct a high-dimensional phase space state matrix based on the electrical data.

[0051] For example, by grid voltage Inductor current and bus voltage It also reconstructs the grid impedance using a sliding mode observer. and load equivalent impedance This forms a high-dimensional phase space state matrix. .

[0052]

[0053] Among them, the high-dimensional phase space state matrix is ​​used to describe the transient characteristics of the system.

[0054] For example, this invention views the startup process as finding the optimal path on a high-dimensional manifold surface. Based on defining the high-dimensional phase space state, it is necessary to delineate the safe manifold region determined by the inductive magnetic saturation characteristics. .

[0055]

[0056] in, This represents the set of safe manifold regions that the system is allowed to operate in. Represents real-time current variables. This represents the real-time current flow through the inductor, expressed in amperes (A). This represents the real-time voltage change across a DC bus or capacitor, in volts (V). Represents a two-dimensional real number space; This is the maximum magnetic field energy threshold that an inductor core can store, measured in J, and its value is determined by the core's saturation magnetic flux density. Decide; The overvoltage protection threshold set for the system, in units of V.

[0057] Step 302: Based on the high-dimensional phase space state matrix, use the KAN network to perform inverse dynamics reasoning, and use the saturation energy barrier of the DC inductor as the constraint boundary to solve for the optimal voltage injection critical slope under the current operating condition.

[0058] For example, step 302 includes: Step 3021: Construct the KAN network.

[0059] The KAN network structure is defined as follows:

[0060] in, This represents the final output value of the KAN network. The input vector contains Each input feature, i.e. ; The dimension of the input layer is the dimension of the high-dimensional phase space state matrix. and These are the summation indices for the intermediate and input layers of the network, respectively. For learnable univariate activation functions located on the network edge, this embodiment uses B-spline functions as basis functions; This is the aggregation transformation function of the outer network. This formula describes the forward propagation mathematical model of the KAN network, which approximates a high-dimensional multivariate function by combining and adding univariate nonlinear functions.

[0061] It should be noted that Equation (6) above is the general theoretical mathematical model of the KAN network, which is in the "black box" stage. At this time, the network still contains a large number of activation functions and nodes, and is a high-dimensional complex model, which is not suitable for direct writing into the DSP for operation.

[0062] Step 3022: Input the high-dimensional phase space state matrix into the KAN network for inverse dynamics reasoning. Use the saturation energy barrier of the DC inductor as the constraint boundary, introduce an energy barrier penalty term, and train the KAN network.

[0063] The KAN network is constructed based on the Kolmogorov-Arnold Representation Theorem. Unlike traditional neural networks that apply activation functions to nodes, it uses learnable spline functions at the network edges. Fit the system's energy barrier boundary and output a critical reference voltage trajectory. This allows the energy injected along this trajectory to... Always meet safety boundaries.

[0064] The saturation energy barrier of a DC inductor, represented by the constraint boundary, is as follows:

[0065] in, This represents the magnetic field energy injected into the inductor at any moment during startup, measured in J. This represents the upper limit of the energy barrier determined by the physical properties of the magnetic core, expressed in J. This is the DC inductance value, in watts (H). This is the saturation current threshold of the inductor core, measured in amperes (A). Once the current exceeds this value, the inductance will drop sharply, leading to a short circuit. The safety energy margin, measured in J, is reserved to offset errors caused by sampling noise and control delay. This refers to the rated operating voltage of the DC bus of the charging pile, expressed in V. This refers to the switching frequency of the power switching transistor, in Hz. This represents the maximum allowable peak-to-peak current ripple of the system, expressed in amperes (A).

[0066] For example, a sample set containing 500,000 sets of operating condition data is constructed. The energy barrier penalty term introduced in the loss function is the key "safety lock" used in this invention to connect the virtual algorithm and the physical hardware. When training the KAN neural network, the physical limits of the inductor core are transformed into mathematical constraints, forcing the network to learn safe operation. The objective function for training the KAN network is... The objective function consists of two parts: a prediction error term and a physical constraint penalty term. Represented as:

[0067] in, Inject a critical slope for the predicted voltage; The label value, i.e. the expected critical slope, is usually obtained through offline simulation or experimentation; This is a penalty coefficient used to balance prediction accuracy with the degree to which physical constraints are met. It is usually taken as a large value (such as 10~1000) to ensure that constraints are met first. To correct the activation function of the linear unit, a non-zero penalty is only generated when the constraint is violated. This represents the peak magnetic field energy. This represents the peak value of the inductor current. This is the saturation energy of the inductor.

[0068] For example, the Neuro-Symbolic Trajectory Planning strategy based on inverse dynamics embedding utilizes the KAN network to "white-box" complex physical constraints into mathematical operators, such as... Figure 5 As shown, Figure 5 This diagram illustrates the principle of symbolic regression trajectory shaping using a KAN network. The startup process is modeled as a constrained time-optimal control problem. The objective is to minimize the voltage settling time while ensuring the inductor remains unsaturated. The goal is to find the shortest startup time while preventing magnetic saturation of the inductor (i.e., ensuring the stored energy is less than the safety barrier). Minimizing the voltage settling time is the key objective. Represented as:

[0069] in, This indicates the voltage settling time, which is the time required for the bus voltage to rise from 0 to the set value, in seconds. The value of the inductor current at time t during the startup process is expressed in amperes (A). The saturation energy barrier of the inductor core, measured in J, is determined by the properties of the core material. This is a reserve of network security energy margin, measured in J, used to prevent oversaturation due to network errors.

[0070] Step 3023: The trained KAN network is distilled into an explicit analytical mathematical formula through symbolic regression, and the optimal voltage injection critical slope is output.

[0071] Leveraging the interpretability of KAN, the network inference results are "distilled" into a set of explicit algebraic equations, and the optimal voltage injection critical slope is expressed as:

[0072] in, The optimal voltage injection critical slope is the derivative of the reference voltage with respect to time, expressed in V / s. The nonlinear mapping function representing the KAN network; This is the effective value of the grid voltage, in volts (V). This is the load resistance value, in Ω; All are dimensionless weight coefficients obtained from offline training. Formula (9) transforms complex neural network reasoning into explicit algebraic operations. This process in the CPU only involves addition, subtraction, multiplication, division, and logarithmic operations, and is time-consuming. It can achieve the fastest start-up while satisfying the energy barrier constraint.

[0073] It should be noted that equation (9) above is the explicit algebraic equation after symbolic regression, which is in the "white box" stage. It utilizes the interpretability of KAN and performs pruning through the local support properties of B-spline basis functions, distilling the originally large and complex network into a simple analytical mathematical formula. This transformation turns the extremely computationally intensive deep learning inference into ordinary addition, subtraction, multiplication, division, and logarithmic operations that can be executed with just a few lines of CPU code, thereby achieving microsecond-level real-time control.

[0074] For example, using a pre-trained KAN network Directly using the currently sensed short-circuit capacity of the power grid and load resistance Mapped to the maximum allowable voltage injection slope that satisfies the above constraints. :

[0075] in, The maximum allowable voltage injection slope of the KAN network output, in V / s; This represents the mapped model of the trained KAN network; This represents the short-circuit capacity of the power grid, measured in MVA, and indicates the strength of the power grid. The load resistance is expressed in units of Ω. ; This represents the number of neurons / nodes in the hidden layer of the network. This is a B-spline activation function used to fit nonlinear relationships; For input weights, The bias term is used. Formula (10) shows that by utilizing the symbolic regression capability of KAN, complex power grid and load parameters can be directly mapped to the optimal control slope.

[0076] It should be noted that equation (10) above is a specific expression of the KAN network at a particular application layer (neural symbol trajectory planning strategy). Regarding the short-circuit capacity of the power grid... and load resistance These two specific input variables redefine or simplify specific network mappings. A variant of the product form was adopted ( To specifically fit these two physical quantities with the maximum allowable voltage injection slope The non-linear relationship between them.

[0077] By using the currently sensed grid short-circuit capacity and load resistance By mapping the maximum permissible voltage injection slope to satisfy the above constraints, the system can always start at the limit speed along the physically permissible limit edge under different grid strength and load conditions.

[0078] The core of this system is inverse dynamics reasoning based on the KAN network. Its role is not to perform fuzzy prediction like traditional AI, but rather to solve for the physical safety boundary in reverse. Traditional neural networks (such as MLPs) are "black boxes," their internal decision-making processes unknown, which is extremely dangerous in power electronics high-voltage control. The KAN network used in this invention possesses unique symbolic regression capabilities, enabling the training of complex nonlinear relationships into explicit mathematical formulas, making the control logic transparent and interpretable. This invention does not directly control the current, but rather deduces the control quantity from the physical limits. The upper energy limit of the inductor core saturation, i.e., the "energy barrier," is known. The KAN network receives the current grid voltage. and load As input, the fastest voltage ramp-up trajectory, i.e., the critical slope, is calculated in reverse. As long as the system follows this... The slope-based startup physically ensures that the current will never exceed the inductor's saturation value, thus achieving theoretical absolute safety. Through the distillation of the KAN network, the massive neural network is ultimately compressed into algebraic equations requiring only a few lines of code. This allows AI algorithms that previously required high-performance GPUs to run can now be executed in real-time at microsecond speeds on ordinary DSP chips, significantly reducing hardware costs.

[0079] Step 303: Generate a virtual damping signal based on the liquid time constant network according to the high-dimensional phase space state matrix.

[0080] For example, step 303 includes: Step 3031: Construct a liquid time constant network.

[0081] The liquid time constant network follows the neurodynamic equations, linearly mapping neuron states to actuator actions. The neurodynamic equations are expressed as:

[0082] in, This represents the neuron state, i.e., the virtual damping torque; The sampled inductor current is expressed in amperes (A). To simulate the synaptic conductance function of nonlinear synaptic conductance. When high-frequency oscillations are detected ( During drastic changes, the nonlinear synaptic conductance increases, and the equivalent time constant... Decrease, output strong damping signal. This is the final output control compensation amount, corresponding to the PWM duty cycle fine-tuning amount; These are the output layer weights; This is the output layer bias.

[0083] Step 3032: Construct a reference voltage trajectory based on the optimal voltage injection critical slope.

[0084] For example, the reference voltage trajectory The construction logic is represented as follows:

[0085] in, This is the actual value of the common DC bus voltage sampled at the current moment, in V; This is the forward bias voltage of the unidirectional ratchet mechanism, measured in volts (V), used to ensure that the voltage of the unidirectional ratchet logic circuit is slightly higher than the bus voltage to maintain parallel contribution. This is the set value of the reference voltage from the previous cycle; To prevent noise from falsely triggering the threshold, ; This is the system's sampling period, in seconds. This logic is triggered by a hardware comparator interrupt to ensure response latency. .

[0086] Step 3033: Monitor the real-time DC bus voltage. When there is a real-time DC bus voltage that is higher than the current reference voltage trajectory, reset the starting point of the current reference voltage trajectory to this real-time DC bus voltage and perform phase synchronization between multiple systems.

[0087] For example, in each control cycle In the process, when a real-time DC bus voltage is higher than the current reference voltage trajectory, the reference voltage trajectory is updated and constructed. :

[0088] This formula uses the maximum value function. Automatic phase synchronization without communication lines is achieved by enabling all parallel systems to automatically follow the highest bus voltage, eliminating parallel circulating current. In this embodiment, the aforementioned cluster anchoring and following control is executed in the CPU module, such as... Figure 6 As shown, this ensures the irreversibility of the phase space trajectory of the system. The forced lag module "anchors" its initial integral value to the current bus potential, thereby eliminating the phase difference within microseconds.

[0089] Step 3034: While performing phase synchronization, activate LTC feedforward control, input the inductor current and its differential components in the high-dimensional phase space state matrix to the liquid time constant network, and use the numerical integration method to solve the neural dynamics equation in real time to obtain the virtual damping signal.

[0090] For example, a neuromorphic variable damping control strategy with non-Newtonian fluid characteristics is employed. This strategy, located at the bottom layer of the control architecture, is used to address the inherent high-frequency resonance problem of low-inertia LCL filters, such as... Figure 7 As shown, Figure 7 This is a block diagram of the neuromorphic damping control logic. Its core principle is based on the biomimetic viscoelastic mechanism, utilizing the dynamic characteristics of the LTC network to simulate the "shear thickening" effect of non-Newtonian fluids—when the system experiences high-frequency oscillations, the virtual impedance increases instantaneously to dissipate energy, and in steady state, it returns to low impedance to maintain high efficiency.

[0091] Specifically, the system's virtual impedance It is no longer a constant, but rather determined by the state of the LTC neuron. The time-varying function that is determined:

[0092] in, The equivalent virtual impedance presented by the system, in units of ; The basic damping resistance, in units of ; This is the damping adjustment gain coefficient; This is the Sigmoid activation function, used to restrict the input to the (0,1) interval; The rate of change of neuron state; The current is the inductor current. This formula shows that the virtual impedance dynamically adjusts with the system state, exhibiting high impedance characteristics during oscillation.

[0093] neuron state The evolution follows the ordinary differential equation of the liquid time constant network:

[0094] in, It is the equivalent time constant; It is the synaptic conductance function; Ripple current; This is the bias parameter. When ripple current is detected... As it increases, the synaptic conductance function The dramatic increase leads to an equivalent time constant. The virtual impedance decreases sharply, thus reducing the virtual impedance. It responds quickly and dissipates resonant energy.

[0095] Through the above mechanism, this step achieves adaptive adjustment of virtual impedance, providing strong damping in the startup transient to suppress high-frequency LC resonance, and providing weak damping in the steady state to maintain the dynamic response of the system, thus resolving the contradiction between high efficiency in steady state and strong stability in transient state.

[0096] For example, the neuron state differential equation is solved numerically in the discrete time domain to obtain the neuron state in each control cycle. And map it as a virtual damping signal To achieve high-frequency real-time control (frequency range of 150kHz-300kHz), the second-order Runge-Kutta method (RK2) is used to solve the above differential equations. The specific process is as follows: First, based on the current neuron state Inductor current change rate And the synaptic conductance function, calculate the intermediate slope Used to predict trends in neuron state changes:

[0097] in, That is, the nonlinear conductance function Its value increases with the increase of ripple current, reflecting the adaptive adjustment of neuronal leakage conductance.

[0098] Secondly, utilize the intermediate slope Predict the intermediate state after half a step. :

[0099] in, To ensure numerical stability, the step size is set to be less than one-twentieth of the LC resonance period.

[0100] Then, the final slope is calculated based on the predicted intermediate states. Used to correct state updates:

[0101] Finally, the neuron state is updated using the final slope, and the virtual damping signal is obtained by mapping the output weights. :

[0102] Through the above solution process, the neuron state is determined. This reflects the dynamic response characteristics of the LTC network in real time. It should be noted that... The intrinsic time constant of the neuron is a fixed parameter. However, the dynamic characteristics of the system are determined by the effective time constant. Decision. In the neurodynamic equation, Let be the total conductance of the neuron. The effective time constant of the system is inversely related to the total conductance, i.e.: When the inductor current is stable, the nonlinear conductance term... As the time constant approaches zero, the differential equation degenerates into a linear system. The output damping signal is relatively weak, and the system maintains high-efficiency operation; however, when the system experiences high-frequency oscillations... Dramatic changes cause the nonlinear conductance term to increase rapidly, leading to an increase in the equivalent time constant. The instantaneous decrease causes the neuron to respond rapidly, significantly enhancing the output damping signal and generating a strong "viscous" effect to dissipate resonant energy.

[0103] The virtual damping signal output in this step It will be used as a feedforward compensation quantity, superimposed on the reference voltage trajectory generated by the critical slope, and jointly participate in the generation of the PWM drive signal to achieve adaptive suppression of high-frequency resonance of the low-inertia LCL filter.

[0104] Step 304: Generate a PWM drive signal based on the critical slope and the virtual damping signal; the PWM drive signal is used to control the switching action of the power conversion circuit.

[0105] For example, different control strategies are executed according to the system status flag (Flag_Mode) to achieve a smooth transition from the startup phase to the steady-state phase. When the system is in the startup phase, the control flag (Flag_Mode) is set to STARTUP. The core challenge in this phase lies in the large-signal nonlinear impact at startup and the saturation characteristics of low-inertia inductors. Traditional PI control is prone to overshoot in this phase, so an open-loop trajectory planning strategy is adopted: a reference voltage trajectory is constructed based on the critical slope generated by the KAN network, the virtual damping signal output by the LTC network is superimposed on the duty cycle command as a feedforward compensation, and the power conversion circuit is controlled in an open-loop manner to ensure that the system strictly follows the energy barrier constraint and safely reaches the target voltage region.

[0106] For example, when the actual bus voltage Compared with the target set value The deviation is less than the error threshold After a preset time, the control flag Flag_Mode is set from STARTUP to STEADY, which means the control flag is switched from startup mode to steady-state mode. In steady-state mode, the PWM drive signal is generated by the dual closed-loop PI controller, and the virtual damping signal continues to be retained as feedforward compensation.

[0107] For example, when After 10ms, the control flag Flag_Mode will be set from STARTUP to STEADY.

[0108] The core challenge at this stage lies in achieving high-precision voltage regulation and load disturbance immunity under steady-state conditions. At this point, control is smoothly transferred from open-loop trajectory planning to dual-closed-loop PI control. In the outer voltage loop, current inner loop commands are generated based on the deviation between the bus voltage feedback and the target value; in the inner current loop, inductor current is rapidly tracked to suppress load disturbances; the LTC damping module continues to be retained as a feedforward term to suppress high-frequency oscillations caused by grid disturbances.

[0109] The aforementioned switching mechanism achieves complementary advantages between the two control strategies. Through this collaborative control architecture of "AI planning for large-scale maneuvers and PI adjustment for small-scale locking," the system obtains safety assurance during startup and high-precision control during steady-state operation. Meanwhile, the LTC damping module continues to work, achieving stable operation throughout the entire process from startup to steady state.

[0110] This embodiment achieves an organic unity of startup safety, parallel coordination, and dynamic stability in a low-inertia charging pile rectifier system by constructing a three-layer heterogeneous control architecture of "perception-planning-execution".

[0111] First, heterogeneous neural computation based on the KAN network enables adaptive limit start-up under specific operating conditions. The KAN network replaces the traditional lookup table method, deeply integrating the inductor saturation energy barrier with grid operating conditions. Under weak grid conditions (SCR < 2.0), the KAN network automatically reduces the critical slope. To avoid voltage collapse at the point of common coupling due to a high-impedance power grid, ensuring safe startup in weak grid environments; under strong grid conditions (SCR>3.0), the KAN network outputs a large critical slope, fully utilizing the grid's support capacity to achieve ultra-fast startup (<100ms). Mathematically, the KAN network searches for an energy functional in a high-dimensional parameter space. The smallest geodesic ensures that the system always runs along the optimal energy path, guaranteeing both startup speed and eliminating the risk of energy exceeding limits.

[0112] Secondly, cluster collaboration based on state-aware anchoring enables plug-and-play parallel operation without communication lines. A "competition-retreat" mechanism addresses the core challenge of parallel operation of multiple modules without communication. During the competition phase, each module naturally generates a voltage leader based on the dispersion of its own parameters. During the retreat phase, lagging modules trigger anchoring by detecting the bus voltage, directly resetting the integrator to eliminate errors, achieving synchronization between modules without complex communication protocols. Especially in critical processing scenarios (voltage difference between two modules <0.5V), the system automatically achieves current sharing based on the virtual droop characteristics provided by LTC damping, avoiding the circulating current impact caused by forced hard switching. This implicit collaboration mechanism gives the charging stack "plug-and-play" capability, allowing for unlimited expansion of the number of modules and completely eliminating the single-point failure risk of communication line failure.

[0113] Furthermore, based on the variable damping mechanism of fluid neural morphology, a paradoxical balance between steady-state efficiency and transient stability is achieved. A variable structure damping field with online learning capabilities is constructed, and its synaptic weights... Based on bus voltage ripple rate Online adjustment: This allows for longer system operation time, resulting in better resonance suppression under specific operating conditions. The virtual damping signal output by the LTC... Mapped as dead-time compensation or duty cycle fine-tuning, this directly affects the PWM output register, achieving a nanosecond-level response from damping calculation to power execution. This mechanism enables the system to maintain low damping during steady-state operation to ensure charging efficiency, and instantaneously enhances damping during transient oscillations to dissipate resonant energy, perfectly solving the inherent high-frequency resonance problem of low-inertia LCL filters.

[0114] Finally, based on the final voltage vector calculated by CLA, an SVPWM (Space Vector Pulse Width Modulation) signal is generated to ensure high-precision control of the power conversion circuit. Simultaneously, the system incorporates dual fault protection: if the predicted current from the KAN network's planned trajectory exceeds the limit... If the sliding mode observer detects a phase loss in the power grid, it immediately blocks the pulse and uploads a fault code, thus eliminating the risk of equipment damage at the source.

[0115] In summary, this technical solution, through a heterogeneous control architecture of "AI planning for large-scale maneuvering, PI regulation for small-scale locking, liquid damping for dynamic stability, and state perception for cluster collaboration," enables the low-inertia charging pile rectifier system to simultaneously possess extreme start-up speed, non-communication parallel connection capability, adaptive resonance suppression, and full-link fault protection, providing a complete technical solution for the next generation of high-density modular charging piles.

[0116] In one embodiment, to further illustrate the collaborative working mechanism of the present invention under typical working conditions, the following two dynamic scenarios are used as examples: Scenario 1: In a dual-machine parallel asynchronous startup scenario, the system demonstrates its core capability without communication coordination. At time T0, rectifier system 1 and rectifier system 2 simultaneously receive the start-up command, with rectifier system 1 outputting voltage first due to its slightly faster internal crystal oscillator. At time T1, the bus voltage rises to 20V, and rectifier system 2 detects that its own reference voltage is only 5V, triggering a hardware interrupt. The state-aware anchoring module forcibly resets the reference voltage to 20V, achieving initial anchoring. At time T2, the reference voltages of the two systems are aligned. Due to the consistency characteristics of the KAN network, the critical slope calculated subsequently... The two are completely identical, with an output voltage waveform overlap of over 99% and a circulating current of less than 1A, verifying the effectiveness and stability of the unidirectional ratchet logic in a multi-module parallel scenario.

[0117] Scenario 2: Under a sudden load unloading scenario, the system demonstrates the rapid suppression capability of the liquid neuromorphic damping module for transient disturbances. At time T0, the system is operating at full load, and the battery management system (BMS) suddenly disconnects, causing the DC bus voltage to surge. At time T1, the LTC network senses a minute component of the inductor current within 2μs. Instantaneous reverse surge, time constant It rapidly decays to a minimum value. At time T2, the LTC network outputs a strong damping signal, which is equivalent to connecting a "virtual braking resistor" in parallel on the DC side, quickly dissipating excess energy or feeding it back to the grid, limiting the voltage overshoot to within 5%, while traditional PID control usually exceeds 15%.

[0118] To achieve the aforementioned collaborative mechanism, the system must meet hard real-time constraints to ensure the real-time performance and stability of the control system. Hard real-time constraints include holographic sampling delay constraints, KAN inference delay constraints, LTC integral step size constraints, anchored response delay constraints, and data handshake cycle constraints.

[0119] Holographic sampling delay constraint: The time from the end of ADC sampling to data writing to shared memory is ≤500ns, ensuring the immediacy of state awareness. KAN inference delay constraint: The time for the CPU to complete one symbolic regression calculation is ≤20μs (at a 200MHz clock frequency), ensuring real-time updates of trajectory planning. LTC integration step size constraint: The step size of the CLA in solving differential equations. The time delay must be ≤1 / 20 of the LC resonant period; in this embodiment, it is set to 2μs to ensure numerical stability and fast damping response. Anchoring response delay constraint: the total delay from hardware comparator flipping to PWM duty cycle update ≤5μs, ensuring fast response without communication coordination. Data handshake cycle constraint: the frequency of data exchange between the CPU and CLA ≥20kHz, maintaining coordinated synchronization of heterogeneous computing. Meeting these constraints provides a solid real-time guarantee for the stable operation of the system under all operating conditions, including startup, parallel operation, and disturbance suppression.

[0120] This invention achieves a collaborative strategy through a three-layer hierarchical control approach. The neural symbolic trajectory planning strategy utilizes a KAN network to symbolize physical constraints, generating an optimal startup trajectory with the inductor saturation energy barrier as the boundary. This achieves maximum speed startup within the safety boundary, avoiding overshoot and magnetic saturation risks. The cluster implicit anchoring and following strategy, based on a unidirectional ratchet mechanism, enables autonomous synchronization of multiple modules without communication lines, eliminating startup dead zones and circulating current oscillations, and supporting plug-and-play unlimited expansion. The neuromorphic damping control strategy simulates the shear thickening effect of non-Newtonian fluids, maintaining low damping in steady state to ensure efficiency, and instantaneously increasing damping during transient oscillations to suppress high-frequency LC resonance. The synergistic effect of these three strategies enables the low-inertia rechargeable stack to simultaneously possess the triple advantages of physical safety boundary protection, communication-free cluster collaboration, and dynamic stability response, providing a complete control solution for realizing ultra-high power density modular rechargeable stacks.

[0121] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0122] The following are device embodiments of the present invention. For details not described in detail, please refer to the corresponding method embodiments described above.

[0123] Figure 8 A schematic diagram of the structure of the low-inertia charging pile rectifier device based on energy barrier constraint provided in an embodiment of the present invention is shown. For ease of explanation, only the parts related to the embodiment of the present invention are shown, and are described in detail below: like Figure 8 As shown, the low-inertia charging pile starting device 8 based on energy barrier constraint includes a holographic signal sensing module 801, a Kolmogorov trajectory shaping module 802, a liquid neuromorphic damping module 803, and a control signal generation module 804.

[0124] The holographic signal sensing module 801 is used to acquire electrical data from the power grid side and the DC side, and to construct a high-dimensional phase space state matrix based on the electrical data; the high-dimensional phase space state matrix is ​​used to describe the transient characteristics of the system.

[0125] The Kolmogorov trajectory shaping module 802 is used to perform inverse dynamics reasoning using a Kolmogorov-Arnold network based on the high-dimensional phase space state matrix, and to solve for the optimal voltage injection critical slope under the current operating conditions, with the saturation energy barrier of the DC inductor as the constraint boundary.

[0126] The liquid neuromorphic damping module 803 is used to generate a virtual damping signal based on a liquid time constant network according to the high-dimensional phase space state matrix.

[0127] The control signal generation module 804 is used to generate a PWM drive signal based on the critical slope and the virtual damping signal; the PWM drive signal is used to control the switching action of the power conversion circuit.

[0128] In one possible implementation, the Kolmogorov trajectory shaping module 802 is specifically used for: Constructing the Kolmogorov-Arnold network; The high-dimensional phase space state matrix is ​​input into the Kolmogorov-Arnold network for inverse dynamics reasoning. The saturation energy barrier of the DC inductor is used as the constraint boundary, and an energy barrier penalty term is introduced to train the Kolmogorov-Arnold network. The trained Kolmogorov-Arnold network is distilled into an explicit analytical mathematical formula through symbolic regression, and the optimal voltage injection critical slope is output.

[0129] In one possible implementation, the liquid neuromorphic damping module 803 is specifically used for: Construct a liquid time constant network; the liquid time constant network follows the neurodynamic equations; A reference voltage trajectory is constructed based on the optimal voltage injection critical slope; Monitor the real-time DC bus voltage. When a real-time DC bus voltage is higher than the current reference voltage trajectory, reset the starting point of the current reference voltage trajectory to this real-time DC bus voltage to perform phase synchronization between multiple systems. While performing phase synchronization, LTC feedforward control is activated, and the inductor current and its infinitesimal components in the high-dimensional phase space state matrix are input to the liquid time constant network. The neural dynamics equation is solved in real time using the numerical integration method to obtain the virtual damping signal.

[0130] In one possible implementation, the optimal voltage injection critical slope is expressed as:

[0131] in, The critical slope for optimal voltage injection; The nonlinear mapping function representing the Kolmogorov-Arnold network; This is the effective value of the grid voltage; This is the load resistance value; All of these are dimensionless weight coefficients obtained from offline training.

[0132] Figure 9 This is a schematic diagram of an electronic device provided in an embodiment of the present invention. For example... Figure 9As shown, the electronic device 5 of this embodiment includes a processor 50 and a memory 51. The memory 51 stores a computer program 52. When the processor 50 executes the computer program 52, it implements the steps in the various method embodiments described above. Alternatively, when the processor 50 executes the computer program 52, it implements the functions of each module / unit in the various device embodiments described above.

[0133] For example, computer program 52 may be divided into one or more modules / units, which are stored in memory 51 and executed by processor 50 to complete the present invention. The one or more modules / units may be a series of computer program instruction segments capable of performing a specific function, which describe the execution process of computer program 52 in electronic device 5.

[0134] Electronic device 5 may include, but is not limited to, processor 50 and memory 51. Those skilled in the art will understand that... Figure 9 This is merely an example of electronic device 5 and does not constitute a limitation on electronic device 5. It may include more or fewer components than shown, or combine certain components, or different components. For example, electronic device 5 may also include input / output devices, network access devices, buses, etc.

[0135] For the sake of simplicity and clarity, only the above-described functional modules / units are used as examples. In practical applications, the functions described above can be assigned to different functional modules / units as needed. These modules / units can be implemented in hardware, software, or a combination of both.

[0136] In the above embodiments, the descriptions of each embodiment have their own emphasis. Parts not detailed or described in a particular embodiment can be referred to in the relevant descriptions of other embodiments. Unless otherwise specified or in conflict with logic, the terminology and / or descriptions between different embodiments are consistent and can be referenced interchangeably. Technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships.

[0137] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A low-inertia charging pile rectification system based on energy barrier constraint, characterized in that, A DC charging stack for use with multiple modules in parallel includes a power conversion circuit, a DC inductor, a sampling circuit, and a digital signal processor; the DC inductor is a microhenry level DC inductor. The DC output terminal of the power conversion circuit is connected to the DC bus via a DC inductor; The sampling circuit is connected to the three-phase power grid, the DC inductor and the DC bus respectively, and is used to collect electrical data from the power grid side and the DC side in real time. The digital signal processor is configured to generate an optimal voltage injection critical slope based on the electrical data, with the saturation energy barrier of the DC inductor as a constraint boundary; and is further configured to generate a virtual damping signal based on a liquid time constant network based on the electrical data, and generate a PWM drive signal based on the critical slope and the virtual damping signal.

2. The low-inertia charging pile rectification system based on energy barrier constraint according to claim 1, characterized in that, The digital signal processor includes a holographic signal sensing module, a CPU module, and a CLA coprocessor module; the CPU module and the CLA coprocessor module exchange data through shared memory. The holographic signal sensing module is configured to construct a high-dimensional phase space state matrix based on the electrical data; the high-dimensional phase space state matrix is ​​used to describe the transient characteristics of the system. The CPU module is configured to perform inverse dynamics reasoning using a KAN network based on the high-dimensional phase space state matrix, and generate the optimal voltage injection critical slope with the saturation energy barrier of the DC inductor as the constraint boundary. The CLA coprocessor module is configured to generate a virtual damping signal based on the liquid time constant network according to the high-dimensional phase space state matrix, and to generate a PWM drive signal according to the critical slope and the virtual damping signal.

3. The low-inertia charging pile rectification system based on energy barrier constraint according to claim 2, characterized in that, Multiple rectifier systems are connected in parallel to form a multi-module charging pile. The AC input terminals of each rectifier system are connected to a three-phase power grid or connected in parallel to the same three-phase bus. The DC output terminals of each system are connected in parallel to the same common DC bus. There is no communication line connection between the rectifier systems. The electrical data includes the real-time DC bus voltage of each parallel system. The CPU module is also configured to execute unidirectional ratchet logic; the unidirectional ratchet logic is that the reference voltage of each parallel system is only allowed to jump upward to follow the real-time DC bus voltage, and is not allowed to reset downward, so that multiple rectifier systems connected in parallel on the same DC bus automatically tend to synchronize with the rectifier system with the highest voltage in the absence of communication.

4. The low-inertia charging pile rectification system based on energy barrier constraint according to claim 1, characterized in that, The saturation energy barrier of the DC inductor is represented by the constraint boundary as follows: in, This represents the magnetic field energy injected into the inductor at any point during the startup process; This represents the upper limit of the energy barrier determined by the physical properties of the magnetic core; This is the inductance value; The saturation current threshold of the inductor core; To reserve a safety energy margin; This refers to the rated operating voltage of the DC bus of the charging pile. This refers to the switching frequency of the power switching transistor; This represents the maximum allowable peak-to-peak current ripple of the system.

5. The low-inertia charging pile rectification system based on energy barrier constraint according to any one of claims 1 to 4, characterized in that, The power conversion circuit adopts a three-phase Buck rectifier topology; the inductance value of the DC inductor ranges from 100μH to 200μH.

6. The low-inertia charging pile rectification system based on energy barrier constraint according to any one of claims 1 to 4, characterized in that, The switching transistor of the power conversion circuit is a silicon carbide MOSFET; the on-resistance of the silicon carbide MOSFET is less than or equal to 16mΩ.

7. A method for starting a low-inertia charging pile based on energy barrier constraint, characterized in that, The system is applied to the low-inertia charging pile rectification system based on energy barrier confinement as described in any one of claims 1 to 6, comprising: Electrical data from the grid side and the DC side are acquired, and a high-dimensional phase space state matrix is ​​constructed based on the electrical data; the high-dimensional phase space state matrix is ​​used to describe the transient characteristics of the system. Based on the high-dimensional phase space state matrix, inverse dynamics reasoning is performed using a Kolmogorov-Arnold network, with the saturation energy barrier of the DC inductor as the constraint boundary, to solve for the optimal voltage injection critical slope under the current operating conditions. Based on the high-dimensional phase space state matrix, a virtual damping signal is generated using a liquid time constant network. A PWM drive signal is generated based on the critical slope and the virtual damping signal; the PWM drive signal is used to control the switching action of the power conversion circuit.

8. The low-inertia charging pile starting method based on energy barrier constraint according to claim 7, characterized in that, The step involves using the Kolmogorov-Arnold network to perform inverse dynamics reasoning based on the high-dimensional phase space state matrix, with the saturation energy barrier of the DC inductor as the constraint boundary, to solve for the optimal voltage injection critical slope under the current operating condition, including: Constructing the Kolmogorov-Arnold network; The high-dimensional phase space state matrix is ​​input into the Kolmogorov-Arnold network for inverse dynamics reasoning. The saturation energy barrier of the DC inductor is used as the constraint boundary, and an energy barrier penalty term is introduced to train the Kolmogorov-Arnold network. The trained Kolmogorov-Arnold network is distilled into an explicit analytical mathematical formula through symbolic regression, and the optimal voltage injection critical slope is output.

9. The low-inertia charging pile starting method based on energy barrier constraint according to claim 7, characterized in that, The step of generating a virtual damping signal based on the high-dimensional phase space state matrix and a liquid time constant network includes: A liquid time constant network is constructed; the liquid time constant network follows neurodynamic equations. A reference voltage trajectory is constructed based on the optimal voltage injection critical slope; Monitor the real-time DC bus voltage. When there is a real-time DC bus voltage that is higher than the current reference voltage trajectory, reset the starting point of the current reference voltage trajectory to this real-time DC bus voltage to perform phase synchronization between multiple systems. While performing phase synchronization, LTC feedforward control is activated, and the inductor current and its differential components in the high-dimensional phase space state matrix are input to the liquid time constant network. The neural dynamics equation is solved in real time using a numerical integration method to obtain the virtual damping signal.

10. The low-inertia charging pile starting method based on energy barrier constraint according to claim 8, characterized in that, The optimal voltage injection critical slope is expressed as: in, The optimal voltage injection critical slope; The nonlinear mapping function representing the Kolmogorov-Arnold network; This is the effective value of the grid voltage; This is the load resistance value; All of these are dimensionless weight coefficients obtained from offline training.

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