A composite silicon carbide etch ring and method of making the same

Abstract

The application provides a composite silicon carbide etching ring and a preparation method thereof. The composite silicon carbide etching ring comprises: an etching ring base body which is obtained by processing a SiC blank to a target size, and the SiC blank is obtained by hot isostatic pressing of SiC powder synthesized by a solid phase synthesis method; and a SiC coating which is deposited on the etching ring base body by CVD. The preparation method comprises the following steps: synthesizing SiC powder by a solid phase method; hot isostatic pressing and sintering the SiC powder to obtain a SiC blank; machining and cleaning the SiC blank to obtain an etching ring base body; and depositing a SiC coating on the surface of the etching ring base body by CVD. The hot isostatic pressed and sintered silicon carbide is sintered in a uniform pressure and temperature field, has a more uniform structure, smaller anisotropy, high density, high mechanical strength, and stress far smaller than that of solid SiC block material prepared by a CVD method due to the uniformity of the structure; and the high-purity SiC powder + hot isostatic pressing + low-temperature CVD process as a whole guarantees the purity requirement (greater than 5N) of etching.

Description

Technical Field

[0001] This invention relates to the field of materials technology for key components of semiconductor manufacturing equipment, and in particular to a composite silicon carbide etching ring and its preparation method. Background Technology

[0002] In advanced semiconductor manufacturing processes, plasma etching equipment places extremely high demands on the purity, plasma corrosion resistance, dimensional stability, and mechanical strength of key component materials. Currently, most mainstream high-performance etching rings are fabricated from solid SiC bulk materials prepared by full CVD. While this method can achieve extremely high purity (>5N) and excellent etching resistance, it has significant drawbacks: First, the CVD growth process is long and inefficient, leading to high material costs; second, the CVD SiC bulk material has high residual stress, which easily generates microcracks during subsequent machining or service, affecting device lifespan and reliability; third, it is difficult to fabricate large-sized (e.g., diameter ≥600 mm) components with complex geometries, limiting its application expansion in advanced etching equipment.

[0003] Although traditional sintered SiC (such as reaction sintering or pressureless sintering) has a lower cost, its purity is generally lower than 3N due to the introduction of sintering aids and insufficient density, which cannot meet the requirements of semiconductor-grade cleanliness. Furthermore, its mechanical properties and resistance to plasma corrosion are far inferior to those of CVD SiC.

[0004] Therefore, there is an urgent need to develop a SiC etching ring fabrication technology that combines high purity, high density, low internal stress, good machinability, and controllable cost. Summary of the Invention

[0005] The core of this invention lies in proposing a composite structure design and process route of "hot isostatic pressing bulk material + low temperature CVD coating". By organically combining a high-density, low-stress hot isostatic pressing SiC substrate with a high-purity CVD SiC functional surface layer, the internal stress is significantly reduced and the cost is reduced by more than 30% while ensuring that the overall purity of the etching ring is ≥5N and the etching resistance is equivalent to that of full CVD SiC.

[0006] A composite silicon carbide etching ring, comprising: The etched ring substrate is obtained by machining a SiC preform to the target size. The SiC preform is obtained by hot isostatic pressing of solid-phase synthesized SiC powder. The SiC coating is deposited on the etched ring substrate by CVD.

[0007] Preferably, the SiC coating thickness is 1-2 mm.

[0008] Preferably, the SiC powder has a purity ≥5N and a particle size of 0.01–0.1 mm.

[0009] Preferably, the SiC preform has a diameter of 500-700 mm, a thickness of ≤30 mm, a density of 96-99%, and a bending strength of 450-600 MPa.

[0010] A method for preparing the above-mentioned composite silicon carbide etching ring includes the following steps: SiC powder was synthesized using a solid-state method. The SiC powder is subjected to hot isostatic pressing sintering to obtain a SiC preform; The SiC preform is machined and cleaned to obtain an etched ring substrate; A SiC coating is formed by depositing on the surface of an etched ring substrate using CVD.

[0011] This patent uses high-purity SiC powder prepared by solid-state method to prepare high-purity SiC substrate by hot isostatic pressing sintering method. Then, it is processed into an etching ring according to the drawings. SiC coating is then applied to the blank by CVD Coating method. The coated part is then processed by post-processing process to become a usable etching ring.

[0012] High-purity SiC powder with a purity greater than 5N and a particle size between 0.01-0.1 mm was prepared using a solid-state method. The smaller the particle size, the better the ceramic consistency after hot isostatic pressing (HIP). High-density SiC ring and disk preforms with a purity greater than 5N and a diameter of 600 mm and a thickness of less than 30 mm were prepared by HIP. After machining the preforms into etched rings, semiconductor-grade acid and alkali cleaning was performed, followed by a low-temperature CVD SiC coating process (temperature between 1000-1150℃) to prepare usable SiC etched rings with a coating thickness of 1-2 mm and a purity greater than 5N after coating.

[0013] Preferably, SiC powder is synthesized using a solid-state method, comprising the following steps: using 6N purity silicon powder and 5N5 carbon black as raw materials, mixing them at a stoichiometric ratio of Si:C = 1:(0.9-1.1), and reacting them at 1800-1850°C for 3-5 hours under an inert atmosphere to obtain SiC powder. More preferably, using 6N purity silicon powder and 5N5 carbon black as raw materials, mixing them at a stoichiometric ratio of Si:C = 1:1, and reacting them at 1800°C for 4 hours under an inert atmosphere to obtain SiC powder.

[0014] Preferably, the SiC powder is subjected to hot isostatic pressing (HIP) sintering, comprising the following steps: loading the SiC powder into a graphite mold and pre-pressing it under vacuum conditions to a relative density of 55-65%; then placing it in a hot isostatic pressing furnace and holding it at 1900-2000°C and 180-190 MPa argon pressure for 1.5-3 hours to obtain a SiC preform. More preferably, the method comprises the following steps: loading the SiC powder into a graphite mold and pre-pressing it under vacuum conditions to a relative density of 60%; then placing it in a hot isostatic pressing furnace and holding it at 1950°C and 180 MPa argon pressure for 2 hours to obtain a SiC preform.

[0015] Preferably, the cleaning steps include: ultrasonic deionized water cleaning for 8-12 minutes; immersion in boiling SC-1 solution for 12-18 minutes; immersion in boiling SC-2 solution for 12-18 minutes; rinsing with ultrapure water 3-6 times, 4-6 minutes each time; and drying in a nitrogen atmosphere at 110-130°C for 1-3 hours. More preferably, the steps include: ultrasonic deionized water cleaning for 10 minutes; immersion in boiling SC-1 solution (NH4OH:H2O2:H2O = 1:1:5) for 15 minutes; immersion in boiling SC-2 solution (HCl:H2O2:H2O = 1:1:5) for 15 minutes; rinsing with ultrapure water (resistivity ≥18.2 MΩ·cm) 5 times, 5 minutes each time; and drying in a nitrogen atmosphere at 120°C for 2 hours.

[0016] Preferably, the CVD deposition includes the following steps: etching the ring substrate in a CVD reaction chamber, purging with high-purity H2 for 20-40 minutes, heating to 1120-1130°C, introducing methyltrichlorosilane and H2 at a volume ratio of 1:4, increasing the total pressure of the reaction chamber to 15-18 kPa, and depositing at 0.1-0.12 mm / h for 10-12 hours. More preferably, the CVD deposition includes the following steps: etching the ring substrate in a CVD reaction chamber, purging with high-purity H2 for 30 minutes, heating to 1120°C, introducing methyltrichlorosilane and H2 at a volume ratio of 1:4, increasing the total pressure of the reaction chamber to 15 kPa, and depositing at 0.1 mm / h for 12 hours.

[0017] Preferably, the method further includes the following steps: performing precision single-point diamond turning and chemical mechanical polishing on the SiC coating surface to reduce the surface roughness to Ra ≤ 0.05 μm; followed by annealing at 1050-1100°C in an Ar atmosphere for 1-3 hours. More preferably, the method further includes the following steps: performing precision single-point diamond turning and chemical mechanical polishing on the SiC coating surface to reduce the surface roughness to Ra ≤ 0.05 μm; followed by annealing at 1050°C in an Ar atmosphere for 2 hours.

[0018] The present invention has the following beneficial effects: 1. Hot isostatic pressing (HIP) sintered silicon carbide, due to sintering in a uniform pressure and temperature field, results in a more homogeneous structure, less anisotropy, higher density, and higher mechanical strength. Furthermore, the structural uniformity leads to significantly lower stress compared to solid SiC bulk materials prepared by CVD. 2. The high-purity SiC powder + hot isostatic pressing + low-temperature CVD process ensures the purity requirements of etching (greater than 5N), which is far higher than the purity of SiC bulk materials prepared by current traditional sintering processes (generally lower than 3N). 3. High-purity SiC prepared by hot isostatic pressing has a density between 96-99% and a high bending strength of 450-600MPa; 4. The etching ring prepared by this method has the same lifespan as the etching ring prepared by pure CVD, but with better stress and, more importantly, a cost reduction of more than 30%.

[0019] Other features and advantages of the invention will be set forth in the following description, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of the invention may be realized and obtained by means of the structures particularly pointed out in the written description and the accompanying drawings.

[0020] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0021] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used in conjunction with embodiments of the invention to explain the invention and do not constitute a limitation thereof. In the drawings: Figure 1 This is a schematic flowchart illustrating the composite silicon carbide etching ring and its preparation method provided in an embodiment of the present invention. Detailed Implementation

[0022] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are for illustration and explanation only and are not intended to limit the present invention.

[0023] like Figure 1 As shown, a method for preparing the above-mentioned composite silicon carbide etching ring includes the following steps: SiC powder was synthesized using a solid-state method. The SiC powder is subjected to hot isostatic pressing sintering to obtain a SiC preform; The SiC preform is machined and cleaned to obtain an etched ring substrate; A SiC coating is formed by depositing on the surface of an etched ring substrate using CVD.

[0024] High-purity SiC powder with a purity ≥5N and a particle size of 0.01–0.1 mm was used to prepare annular or disc-shaped SiC preforms with a diameter of up to 600 mm and a thickness of ≤30 mm by hot isostatic pressing (HIP) sintering after molding. The resulting preforms have a density of 96–99% and a flexural strength of 450–600 MPa. Furthermore, due to the densification achieved in an isotropic pressure field by the HIP process, the structure is uniform and the residual stress is significantly lower than that of CVD bulk materials.

[0025] The HIP-SiC preform was precision machined according to the etching ring drawing, and a semiconductor-grade acid and alkali cleaning process was used to thoroughly remove surface metal impurities and particulate contaminants to ensure a clean interface for subsequent CVD coating.

[0026] A 1–2 mm thick high-purity SiC coating is formed on the surface of the etching ring by chemical vapor deposition at a low temperature of 1000–1150℃. This low-temperature process effectively suppresses the thermal mismatch stress between the substrate and the coating, while ensuring that the coating purity is ≥5N, fully meeting the requirements of semiconductor processes for metal impurities (Fe, Ni, Cr, etc.) content <1 ppm.

[0027] Post-processing: The coated parts are subjected to surface polishing, stress-relieving annealing and final cleaning to obtain a finished etching ring that can be directly used in etching equipment.

[0028] The SiC etching ring prepared by this invention has the following outstanding advantages: Performance comparable to full CVD products: The surface CVD coating ensures that the area in direct contact with plasma has high purity (>5N) and excellent etching resistance comparable to full CVD SiC, and its service life is equivalent to existing CVD etching rings.

[0029] Significantly reduced internal stress: Thanks to the uniform microstructure of the HIP matrix and the low-temperature CVD process, the residual stress of the overall component is much lower than that of the full CVD SiC bulk material, which greatly improves the processing yield and service reliability and reduces the risk of microcracks.

[0030] Significant cost advantages: The HIP process can efficiently prepare large-sized near-net-shape preforms, avoiding the high energy consumption and low output caused by long-term CVD deposition; combined with the strategy of applying CVD coatings only to key surfaces, the combined material and time costs are reduced by more than 30%.

[0031] Scalable manufacturing: This process is compatible with existing ceramic molding and CVD equipment systems and is suitable for mass production of large-size etching rings of 600 mm and above, meeting the high consistency and high supply stability requirements of advanced semiconductor production lines for key consumables.

[0032] The preparation method of the composite silicon carbide etching ring provided by the present invention will be described below with reference to embodiments.

[0033] Example 1

[0034] This embodiment demonstrates an efficient method for fabricating a 400 mm diameter SiC etching ring, comprising the following steps: Step 1: Preparation of high-purity SiC powder A solid-state synthesis method was adopted, using high-purity silicon powder (99.9999% purity, 6N) and high-purity carbon black (99.9995% purity, 5N5) as raw materials, mixed at a stoichiometric ratio of Si:C = 1:1, and reacted at 1800°C for 4 hours under an inert atmosphere (Ar) to obtain β-SiC powder. After ball milling, acid washing (HF+HNO3 mixture), multiple rinsing with ultrapure water, and vacuum drying at 120°C, SiC powder with an average particle size of 0.05 mm (D50 = 50 μm) and a purity ≥5N (total metal impurity content <1 ppm) was obtained.

[0035] Step 2: Hot Isostatic Pressing (HIP) Molding The SiC powder was loaded into a graphite mold and pre-pressed under vacuum to a relative density of 60%. It was then placed in a hot isostatic pressing furnace and held at 1950°C and 180 MPa argon pressure for 2 hours to complete densification sintering. The resulting SiC preform was ring-shaped, with an outer diameter of 600 mm, an inner diameter of 480 mm, and a thickness of 25 mm. Testing showed a relative density of 98.3%, a flexural strength of 520 MPa, a Vickers hardness of 28 GPa, and XRD analysis revealed a single β-SiC phase with no free Si or C residue.

[0036] Step 3: Machining and Surface Cleaning The HIP-SiC preform is precision machined to the final dimensions of the etched ring (tolerance ±0.02 mm). The following cleaning process is then performed sequentially: Ultrasonic deionized water cleaning for 10 minutes; Immerse in boiling SC-1 solution (NH4OH:H2O2:H2O = 1:1:5) for 15 minutes; Immerse in boiling SC-2 solution (HCl:H2O2:H2O = 1:1:5) for 15 minutes; Rinse 5 times with ultrapure water (resistivity ≥18.2 MΩ·cm), 5 minutes each time; Dry in a nitrogen atmosphere at 120°C for 2 hours.

[0037] After cleaning, the total content of metallic impurities (Fe, Ni, Cr, Al, etc.) on the surface is <0.5 ppb (ICP-MS detection).

[0038] Step 4: High-speed low-temperature CVD SiC coating deposition The cleaned etching ring was placed in a modified horizontal 130-type hot-wall CVD reaction chamber and purged with high-purity H2 (99.9999%) for 30 minutes. The temperature was raised to 1120°C (slightly higher than usual to support a high deposition rate), and a mixture of methyltrichlorosilane (CH3SiCl3, MTS) and H2 was introduced, with the MTS concentration increased to a volume ratio of 1:4 (MTS:H2). The total pressure in the reaction chamber was increased to 15 kPa, and a rotating stage (5 rpm) was used to improve gas flow uniformity. Under these conditions, a stable deposition rate of 0.1 mm / h (100 μm / h) was achieved. To obtain the target coating thickness of 1.2 mm, the deposition time was controlled at 12 hours.

[0039] Test results show that the resulting coating is dense and non-porous, and the SEM cross-section shows a fine and uniform columnar crystal structure without cracks or delamination. XRD confirmed it to be the α-SiC phase, and ICP-MS analysis showed that the total amount of metallic impurities was <0.8 ppm, with a purity >5N. The surface roughness Ra = 0.25 μm (slightly higher than that of low-speed deposition, but can be optimized through subsequent polishing).

[0040] Step 5: Post-processing The coated surface was precision single-point diamond turning and chemical mechanical polishing (CMP) to reduce the surface roughness to Ra ≤ 0.05 μm. It was then annealed at 1050°C in an Ar atmosphere for 2 hours to alleviate the slight thermal stress introduced by the high-speed deposition. The final product passed the SEMI F57 particle release test (<10 particles / test, >0.05 μm particles) and helium mass spectrometry leak detection (leakage rate <1×10⁻⁻⁻⁶). 9 (atm·cm³ / s) and plasma tolerance verification.

[0041] The performance test results are as follows: Overall purity (ICP-MS): 5.1N Coating / substrate bond strength (scratch test): >42 N Thermal shock cycling (1000°C ↔ room temperature, 10 cycles): No visible cracks. Etching rate in CF4 / O2 plasma: 0.85 μm / h (comparable to full CVD SiC etching ring, deviation <5%) CVD process cycle: 12 hours (vs. traditional CVD bulk growth > 800 hours) Overall manufacturing costs are reduced by 38% compared to a full CVD process. Example 2

[0042] This embodiment mainly optimizes the coating thickness (under high-speed deposition conditions), and the rest is the same as in Embodiment 1.

[0043] Coatings of 1.0 mm, 1.5 mm, and 2.0 mm thickness were deposited at 1120°C, MTS:H2 = 1:4, and 15 kPa (corresponding to deposition times of 10 h, 15 h, and 20 h, respectively). The results show that: The 1.0 mm coating can effectively cover micro-defects on the surface of the HIP substrate, meeting the process requirements above 3 nm; The 1.5 mm coating performs better under extremely high-energy plasmas (such as high-power Cl2 / Ar) and is recommended for etching advanced logic chips. Although the 2.0 mm coating has redundant performance, slight stress concentration occurs in the edge area due to the deposition gradient, which requires optimization of the airflow field design.

[0044] Taking into account performance, efficiency and reliability, a coating thickness of 1.2–1.5 mm is the preferred range.

[0045] Comparative Example 1 (Full CVD SiC Etched Ring): Deposition at 1400°C, rate ≈ 0.008 mm / h, 600 mm parts require >800 hours, high cost, high internal stress, and 25% scrap rate.

[0046] Comparative Example 2 (conventional low-speed CVD coating, 0.008 mm / h): Although the coating quality is slightly better, a 1.2 mm coating requires 150 hours, resulting in low production efficiency and difficulty in meeting mass production requirements.

[0047] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. A composite silicon carbide etching ring, characterized in that, include: The etched ring substrate is obtained by machining a SiC preform to the target size. The SiC preform is obtained by hot isostatic pressing of solid-phase synthesized SiC powder. The SiC coating is deposited on the etched ring substrate by CVD.

2. The composite silicon carbide etching ring according to claim 1, characterized in that, The SiC coating thickness is 1-2 mm.

3. The composite silicon carbide etching ring according to claim 1, characterized in that, The SiC powder has a purity of ≥5N and a particle size of 0.01–0.1 mm.

4. The composite silicon carbide etching ring according to claim 1, characterized in that, The SiC preform has a diameter of 500-700 mm, a thickness of ≤30 mm, a density of 96-99%, and a bending strength of 450-600 MPa.

5. A method for preparing a composite silicon carbide etching ring according to any one of claims 1-4, characterized in that, Includes the following steps: SiC powder was synthesized using a solid-state method. The SiC powder is subjected to hot isostatic pressing sintering to obtain a SiC preform; The SiC preform is machined and cleaned to obtain an etched ring substrate; A SiC coating is formed by depositing on the surface of an etched ring substrate using CVD.

6. The preparation method according to claim 5, characterized in that, The solid-state method for synthesizing SiC powder includes the following steps: using 6N purity silicon powder and 5N5 carbon black as raw materials, mixing them at a stoichiometric ratio of Si:C = 1:(0.9-1.1), and reacting them at 1800-1850°C for 3-5 hours under an inert atmosphere to obtain SiC powder.

7. The preparation method according to claim 5, characterized in that, The SiC powder is subjected to hot isostatic pressing sintering, which includes the following steps: the SiC powder is loaded into a graphite mold and pre-pressed under vacuum to a relative density of 55-65%; then placed in a hot isostatic pressing furnace and held at 1900-2000°C and 180-190 MPa argon pressure for 1.5-3 hours to obtain a SiC preform.

8. The preparation method according to claim 5, characterized in that, The cleaning steps include: ultrasonic deionized water cleaning for 8-12 minutes; immersion in boiling SC-1 solution for 12-18 minutes; immersion in boiling SC-2 solution for 12-18 minutes; rinsing with ultrapure water 3-6 times, 4-6 minutes each time; and drying in a nitrogen atmosphere at 110-130°C for 1-3 hours.

9. The preparation method according to claim 5, characterized in that, CVD deposition includes the following steps: etching the ring substrate in the CVD reaction chamber, purging with high-purity H2 for 20-40 minutes, heating to 1120-1130°C, introducing methyltrichlorosilane and H2 in a volume ratio of 1:4, increasing the total pressure of the reaction chamber to 15-18 kPa, and depositing at 0.1-0.12 mm / h for 10-12 hours.

10. The preparation method according to claim 5, characterized in that, It also includes the following steps: The SiC coating surface was subjected to precision single-point diamond turning and chemical mechanical polishing to reduce the surface roughness to Ra ≤ 0.05 μm; then it was annealed at 1050-1100°C in an Ar atmosphere for 1-3 hours.

Images