A method for calibrating a three-phase mutual inductor load box

Abstract

The application provides a kind of three-phase mutual inductor load box verification method, it is related to data processing field.In the method, the verification parameter of the measured three-phase mutual inductor load box is obtained and the safe working environment is established, the low voltage excitation is output under the safety constraint and the measurement range is configured, the exploratory measurement is executed to the current phase loop and the impedance characteristic parameter is calculated;According to the effectiveness of the sampling signal, fault recovery or adaptive range selection is performed, and the procedure test or fixed-point test is carried out to obtain the test data;Then, according to the test phase sequence, the phase is switched and the measurement and test process are repeated, and finally a verification report containing the test data of each phase is generated. The technical solution provided by the application is convenient for safe detection of load characteristics under unknown load conditions, and automatically determines the excitation and sampling range based on the detection results, while realizing automatic sequence verification of three-phase without changing the line, to improve the overall verification efficiency.

Description

Technical Field

[0001] This application relates to the technical field of data processing, and specifically to a verification method for a three-phase mutual inductor load cell. Background Technology

[0002] Instrument transformer load boxes are used to simulate the load conditions of voltage or current transformers in actual operation. During the verification of electricity metering and instrument transformer testing, it is necessary to verify parameters such as the impedance characteristics and power factor of the three-phase instrument transformer load boxes using a comprehensive testing device to ensure the metering accuracy of the instrument transformers under actual operating conditions. However, the impedance parameters of three-phase instrument transformer load boxes of different models or specifications vary greatly. Before the verification begins, it is often impossible to accurately know the specific load characteristics, making it difficult for the verification device to directly determine the appropriate excitation voltage, current range, and sampling range.

[0003] Existing verification methods typically rely on manual experience to gradually explore test conditions and repeatedly switch transformer taps, voltage sampling taps, and current sampling taps to find a suitable measurement range. This not only results in low automation but also poses a risk of open circuits or abnormal overvoltages on the secondary side of the current transformer when applying high excitation under unknown load conditions. Furthermore, traditional three-phase verification usually requires disconnecting and rewiring different phases, a cumbersome process prone to wiring errors, thus reducing overall verification efficiency.

[0004] Therefore, how to safely detect load characteristics under unknown load conditions, automatically determine the excitation and sampling level based on the detection results, and simultaneously achieve automatic sequence verification of three-phase lines without modification to improve overall verification efficiency has become an urgent technical problem to be solved. Summary of the Invention

[0005] This application provides a verification method for a three-phase transformer load box, which facilitates the safe detection of load characteristics under unknown load conditions and automatically determines the excitation and sampling levels based on the detection results. At the same time, it realizes automatic sequence verification of three-phase without rewiring, thereby improving the overall verification efficiency.

[0006] The first aspect of this application provides a method for calibrating a three-phase transformer load cell. The method includes: acquiring calibration parameters and calibration type of the three-phase transformer load cell under test; performing system initialization and self-test processing based on the calibration parameters; activating pre-safety protection logic after successful self-test to establish a safe operating environment; outputting a safe low-voltage excitation signal under the constraints of the safe operating environment; configuring the transformer output tap, voltage sampling tap, and current sampling tap; simultaneously switching to the current phase circuit in the test phase sequence to perform a trial measurement; acquiring the sampled signal in the current phase circuit; and performing multiple sampling averaging and frequency domain analysis processing to calculate the resistance of the three-phase transformer load cell under test. The impedance characteristic parameters are used to determine the validity of the sampled signal. When the sampled signal does not meet the validity conditions, a fault recovery mechanism is executed, and the sampling range and test voltage are adjusted for a second trial measurement. At the same time, the range switching is performed according to a preset sequence. When the sampled signal meets the validity conditions, adaptive range selection is performed based on the impedance characteristic parameters, and the target range combination is locked. At the same time, procedural testing or fixed-point testing is performed according to the verification type to obtain verification data. After completing the current phase circuit test, the phase is switched according to the test phase sequence, and trial measurement and testing are performed until the phase verification is completed to generate a verification report of the tested three-phase transformer load box containing the verification data.

[0007] A second aspect of this application provides a calibration system for a three-phase transformer load cell. The system includes an acquisition module and a processing module. The acquisition module acquires the calibration parameters and calibration type of the three-phase transformer load cell under test, and performs system initialization and self-test processing based on the calibration parameters. After the self-test passes, it activates pre-safety protection logic to establish a safe operating environment. The processing module, under the constraints of the safe operating environment, outputs a safe low-voltage excitation signal, configures the transformer output tap, voltage sampling tap, and current sampling tap, and simultaneously switches to the current phase circuit in the test phase sequence to perform a trial measurement. The acquisition module also acquires the sampled signal in the current phase circuit and performs multiple sampling averaging and frequency domain analysis processing to calculate the three-phase transformer under test. The processing module measures the impedance characteristics of the load cell and determines the validity of the sampled signal. When the sampled signal does not meet the validity conditions, it executes a fault recovery mechanism and adjusts the sampling range and test voltage for a secondary trial measurement, while simultaneously switching ranges according to a preset sequence. When the sampled signal meets the validity conditions, it performs adaptive range selection based on the impedance characteristics and locks the target range combination, while performing procedural testing or fixed-point testing according to the verification type to obtain verification data. After completing the current phase circuit test, the processing module switches phases according to the test phase sequence and performs trial measurements and test processing until phase verification is completed, generating a verification report for the tested three-phase transformer load cell containing the verification data.

[0008] A third aspect of this application provides an electronic device including a processor, a memory, a user interface, and a network interface. The memory is used to store instructions, and both the user interface and the network interface are used to communicate with other devices. The processor is used to execute the instructions stored in the memory to cause the electronic device to perform the method described above.

[0009] A fourth aspect of this application provides a non-transitory computer-readable storage medium storing instructions that, when executed, perform the method described above.

[0010] In summary, one or more technical solutions provided in this application have at least the following technical effects or advantages: By establishing a safe operating environment and introducing low-voltage trial measurements before calibration, the system can pre-probe the impedance characteristics of the load box of the three-phase transformer under unknown load conditions, thus avoiding the safety risks associated with directly applying high excitation. Simultaneously, based on the trial results, adaptive range selection and locking of the target range combination ensure that subsequent procedural or fixed-point tests remain within the appropriate excitation range and sampling interval, improving the accuracy and stability of the calibration results. After completing single-phase testing, automatic phase switching reuses the same test procedure to achieve continuous three-phase calibration without rewiring, and automatically generates a calibration report after all phases are completed, thereby reducing manual operation complexity and improving calibration safety, automation, and overall calibration efficiency. Therefore, it facilitates safe detection of load characteristics under unknown load conditions, automatically determines the excitation and sampling range based on the detection results, and simultaneously achieves automatic sequential calibration of three-phase circuits without rewiring, thus improving overall calibration efficiency. Attached Figure Description

[0011] Figure 1 A schematic flowchart illustrating a verification method for a three-phase mutual inductor load cell provided in this application embodiment; Figure 2 A schematic diagram of a calibration system for a three-phase mutual inductor load cell provided in an embodiment of this application; Figure 3 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application.

[0012] Explanation of reference numerals in the attached figures: 21. Acquisition module; 22. Processing module; 31. Processor; 32. Communication bus; 33. User interface; 34. Network interface; 35. Memory. Detailed Implementation

[0013] To enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of this specification will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.

[0014] In the description of the embodiments of this application, the words "for example" or "for instance" are used to indicate examples, illustrations, or explanations. Any embodiment or design that is described as "for example" or "for instance" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design options. Rather, the use of the words "for example" or "for instance" is intended to present the relevant concepts in a specific manner.

[0015] In the description of the embodiments of this application, the term "multiple" means two or more. For example, multiple systems means two or more systems, and multiple screen terminals means two or more screen terminals. In addition, the terms "comprising," "including," "having," and variations thereof all mean "including but not limited to," unless otherwise specifically emphasized.

[0016] To address the aforementioned technical problems, this application provides a method for verifying a three-phase transformer load cell, referring to... Figure 1 , Figure 1 This is a flowchart illustrating a verification method for a three-phase mutual inductor load cell provided in an embodiment of this application. The method is applied to a server and includes steps S110 to S160, as follows:

[0017] S110. Obtain the calibration parameters and calibration type of the three-phase mutual inductor load box under test, and perform system initialization and self-test processing according to the calibration parameters. After the self-test is passed, start the pre-safety protection logic to establish a safe working environment.

[0018] Specifically, the server is the core control and computing node in the entire automatic calibration system for three-phase mutual inductor load cells. Essentially, it is a computing device with data processing, communication, and equipment control capabilities, used to uniformly manage calibration tasks, schedule the operation of various hardware modules, and process sampled data. In this calibration system, the server acts as the active control unit; that is, all process logic, equipment command issuance, status monitoring, and data analysis are initiated and executed by the server.

[0019] When establishing a verification task and entering verification parameters and verification type through the human-machine interface, a new verification process record is first created in the operation terminal interface of the inspection device. The operator then sequentially inputs the rated voltage range, rated current range, test phase sequence, blind test probe voltage threshold, and verification type in the same interface. The human-machine interface is an interactive medium for information exchange between personnel and the system. Its main functions include parameter input, process confirmation, status display, and result feedback. After receiving the input information submitted by the human-machine interface, the server writes the rated voltage range, rated current range, test phase sequence, blind test probe voltage threshold, and verification type into the verification task cache. A verification task refers to a complete verification process initiated around a specific three-phase transformer load box under test. Internally, it needs to continuously record parameter information, equipment status information, and subsequently generated test data. Verification parameters refer to the configuration data used to constrain the entire verification process. Among them, the rated voltage range limits the allowable range of subsequent excitation voltages, the rated current range limits the allowable range of the sampling current loop, the test phase sequence defines the order in which the three-phase automatic switching module performs phase switching, the blind test probe voltage threshold limits the maximum excitation voltage upper limit during the probing phase, and the verification type identifies whether the subsequent formal test uses a procedural testing method or a fixed-point testing method. Through this stage of processing, the server completes the centralized reception of the raw input information and organizes it into a unified data set, providing a data foundation for subsequent parameter verification and task structure establishment.

[0020] When performing format and range validation on the verification parameters, the server first reads the data for each field from the verification task cache and verifies the field type, field integrity, and field value range item by item. Format validation checks whether the input data conforms to the system's specified data structure. For example, whether the rated voltage range is a valid numerical range expression, whether the rated current range meets the numerical format requirements, whether the test phase sequence consists of valid phase identifiers, whether the blind test voltage threshold is expressed in a system-allowed numerical type, and whether the verification type belongs to the preset verification method set. Range validation checks whether each numerical parameter falls within the allowable operating range of the inspection device. For example, the rated voltage range must not exceed the maximum output capacity of the programmable power supply module, the rated current range must not exceed the safe carrying capacity of the current sampling circuit, and the blind test voltage threshold must not exceed the preset safety upper limit during the testing phase. After completing the above validations, the server generates a unique verification task identifier for the current verification process and binds this identifier with the verification parameters and verification type, thus forming the verification task data structure. The verification task identifier is a unique number used to identify this verification process. Its purpose is to ensure that all subsequent status information, sampling data, and test results belong to the same verification process. The verification task data structure is a set of structured data objects built around the verification task identifier, including parameter fields, process status fields, and data record fields. The parameter fields store verification parameters and verification types; the process status fields record initialization, self-test, and protection states; and the data record fields store subsequent sampling and test results. By establishing this structured data object, the server can manage the entire verification process uniformly at the logical level.

[0021] When initiating system initialization based on the verification task data structure, the server reads the parameter field area bound to the verification task identifier and generates a set of initialization control commands, which are then sent to the programmable power supply module, multi-range signal sampling system, three-phase automatic switching module, and safety protection circuit in the inspection device. System initialization refers to the preparatory process of restoring all hardware modules to a unified initial state before formally executing trial measurements. For the programmable power supply module, the server issues an output disable command, keeping the power supply module in a no-excitation output state while establishing a stable communication control link. For the multi-range signal sampling system, the server performs sampling channel initialization operations, including clearing the sampling buffer, resetting the range register, and establishing the data upload channel, thereby avoiding historical data residue affecting subsequent sampling. For the three-phase automatic switching module, the server controls the relay matrix to enter the default ready-to-switch state, keeping all phase circuits in an unconnected state and establishing the correspondence between relay drives and feedback contacts. For the safety protection circuit, the server checks whether the protection relay control interface is online and confirms that it can respond to subsequent control commands. Through system initialization, all functional modules are restored to a unified initial state with no excitation output, no phase access, no historical data interference, and stable communication, providing a basis for subsequent module self-testing.

[0022] During the sequential execution of module self-tests, the server performs functional checks on the programmable power supply module, multi-stage signal sampling system, three-phase automatic switching module, and safety protection circuit according to a preset order. Module self-tests involve performing operational status checks, communication status checks, and feedback consistency checks on each module. For the programmable power supply module, the server checks if its control communication link is online and reads the internal status register to confirm that the power output stage is off and there are no internal fault flags. For the multi-stage signal sampling system, the server triggers an no-load sampling test, reads the data returned from the sampling channel to determine if the analog-to-digital conversion link is normal, and simultaneously checks if the sampling buffer read / write is normal. For the three-phase automatic switching module, the server sequentially drives the key relays in the relay matrix to perform test closing and test opening actions, and reads the feedback contact status to confirm that the relay action and feedback status are consistent. For the safety protection circuit, the server focuses on checking whether the short-circuit protection relay in the current sampling circuit and the protection relay in the voltage sampling circuit can correctly respond to control commands. The current sampling circuit refers to the sampling path used to measure the current response of the load box of the three-phase mutual inductor under test. A short-circuit protection relay is an actuator used to keep the current path closed during switching or abnormal conditions. Its purpose is to prevent dangerous high voltage from being generated when the secondary side of the current transformer is momentarily disconnected. A voltage sampling circuit refers to the sampling path used to measure the voltage response of the load box of the three-phase transformer under test. A protection relay is an actuator used to control the connection or disconnection of the voltage sampling circuit. The server considers the module self-test to be passed only when all modules return normal status feedback; otherwise, it will record fault information and terminate the verification process.

[0023] After the module self-test passes and the pre-test protection logic is activated to establish a safe operating environment, the server switches the testing device from the initialization state to the protected test state. The pre-test protection logic is a set of control rules that ensure subsequent operations remain within safe boundaries through hardware protection actions and loop state constraints before any trial stimulus is established. A safe operating environment refers to an operating state that meets conditions such as no stimulus output, controlled loop, effective protection, and safe switching. The server first controls the short-circuit protection relay of the current sampling loop to close, forming a short-circuit protection path. The short-circuit protection path is a low-resistance closed path established by the protection relay, its function being to keep the current loop closed during range switching or phase switching, thereby preventing an open circuit on the secondary side of the current transformer. Subsequently, the server controls the protection relay of the voltage sampling loop to enter a controlled standby state. The controlled standby state means that the voltage sampling loop has completed hardware preparation but has not yet been formally connected to trial measurement; it will only be activated when subsequent procedures allow. By keeping the current sampling circuit in a short-circuit protection state and thus keeping the voltage sampling circuit in a controlled standby state, the server establishes a process sequence constraint of first protecting the circuit, then establishing the excitation, and finally sampling. This creates a stable and safe working environment, providing a reliable foundation for subsequent output of safe low-voltage excitation signals and the execution of trial measurements.

[0024] S120. Under the constraints of a safe working environment, output a safe low-voltage excitation signal, configure the transformer output range, voltage sampling range, and current sampling range, and simultaneously switch to the current phase circuit in the test phase sequence to perform exploratory measurements.

[0025] Specifically, when reading the verification parameters bound to the verification task identifier and generating the trial measurement configuration instruction set, the server first extracts the rated voltage range, rated current range, test phase sequence, and blind test voltage threshold from the verification task data structure, and maps the verification parameters to control constraints for the trial measurement phase. The verification task identifier is a task number used to uniquely identify the current three-phase transformer load box verification process, ensuring that subsequent control commands, status feedback, sampling results, and verification results all belong to the same process link. The trial measurement configuration instruction set is a set of structured control data generated by the server around the trial measurement phase. It includes the programmable power module's safety output boundary, transformer output tap candidate set, voltage sampling tap candidate set, current sampling tap candidate set, and the current phase circuit switching order. To avoid insufficient safety margin due to using only a single threshold limit for the output boundary in the trial measurement phase, the server constructs a weighted suppression-type safety output upper limit by combining the task threshold, system rated capacity, and task parameter complexity. Its expression is:

[0026] in, This indicates the upper limit of the safe low-voltage excitation allowed during the trial measurement phase. The larger the value, the higher the excitation capability allowed during the trial phase, but it is still subject to multiple safety constraints. This indicates the maximum allowed output of the programmable power supply module, which is given by the device parameters; This represents the blind test probe voltage threshold, which is given by the verification task parameters; The median of the rated voltage range is used to characterize the target center position of the current task in the voltage dimension. It is usually obtained by averaging the upper and lower bounds of the rated voltage range. The median of the rated current range is used to characterize the target center position of the current task in the current dimension. It is usually obtained by averaging the upper and lower bounds of the rated current range. This indicates the system's rated upper limit for the current side of the inspection device; This represents the suppression weight when the voltage load characteristics and current load characteristics are inconsistent, and is used to suppress the intensity of trial excitation in parameter mismatch tasks. This indicates the suppression weight of the test phase sequence complexity on the upper limit of the trial stimulus; This represents the test phase sequence complexity factor. It takes a smaller value when the test phase sequence is the default order, and a larger value when the test phase sequence involves jumps, duplicate checks, or custom orders.

[0027] When performing pre-configuration processing for transformer output taps, voltage sampling taps, and current sampling taps based on the rated voltage and rated current ranges in the verification parameters, the server first retrieves the tap resource table inside the inspection device and obtains the sets of transformer output taps, voltage sampling taps, and current sampling taps, respectively. A transformer output tap refers to multiple discrete output capability levels provided by the programmable power module through different taps or output stages; a voltage sampling tap refers to the measurement state of the voltage sampling circuit under different ranges and different front-end attenuation configurations; and a current sampling tap refers to the measurement state of the current sampling circuit under different ranges and different sampling sensitivities. To avoid subsequent signal occupancy imbalances caused by selecting taps solely based on single range proximity, the server constructs a comprehensive adaptation function with safety, coverage, and redundancy for each candidate transformer output tap. Its expression is:

[0028] in, Indicates the first The overall fit value of each transformer output range is the value of the range. The larger the fit value, the more suitable the range is as the transformer output range for the first trial measurement. Indicates the first The maximum output capacity corresponding to each transformer output level; This indicates the upper limit of safe low-voltage excitation during the exploratory measurement phase; Indicates the median value of the rated voltage range; It represents the span of the rated voltage range and is used to characterize the distribution width of the task in the voltage dimension. It is usually obtained by subtracting the lower bound of the rated voltage from the upper bound of the rated voltage. , , These represent the weights for magnitude proximity, target range coverage, and redundancy buffer, respectively, which are used to balance the importance of different evaluation dimensions in gear selection. This indicates a very small positive value, used to avoid zero denominators or abnormal logarithmic inputs.

[0029] When performing range pre-configuration for voltage and current sampling ranges, the server does not independently select a single voltage or current sampling range. Instead, it constructs a multidimensional sensitivity matching function based on the expected response distribution. To estimate the target current response level during the initial trial phase, the server establishes a flexible estimator based on the median of the rated voltage range, the median of the rated current range, and the upper limit of the safe low-voltage excitation. Its expression is as follows:

[0030] in, This indicates the expected current response level during the probing phase; Indicates the median value of the rated current range; This indicates the upper limit of safe low-voltage excitation during the exploratory measurement phase; Indicates the median value of the rated voltage range; This represents the nonlinear response compression coefficient, used to adjust the intensity of the effect of the safe low-voltage excitation relative to the rated voltage target; This represents the linear compensation coefficient, used to compensate for the underestimation of high-response scenarios when only a single nonlinear compression term is used.

[0031] After obtaining the expected current response level, the server calculates the overall sensitivity matching value for each voltage sampling level and each current sampling level, expressed as follows: in, Indicates the first The overall sensitivity matching value of each voltage sampling range. The larger the matching value, the more suitable the range is for voltage response measurement in the current trial phase. Indicates the first The maximum measurable voltage range for each voltage sampling level; This indicates the center value of the desired voltage range occupancy, used to control the target position of the signal's proportion of the range. and These represent the range occupancy proximity weight and the absolute proximity weight, respectively. Indicates the first The overall sensitivity matching value for each current sampling range; Indicates the first The maximum measurable current range for each current sampling range; This indicates the desired current range occupies the center value; and These represent the proximity weight and absolute proximity weight of the current range occupancy, respectively.

[0032] Based on the current phase identifier in the test phase sequence, a relay matrix control sequence is generated. When driving the relay matrix to switch to the current phase circuit after confirming that the non-target phase circuit remains open and the safety protection circuit is in an effective protection state, the server first reads the test phase sequence and determines the current phase identifier corresponding to this round of exploratory measurement based on the current process index. The test phase sequence is a description of the order in which each phase circuit enters the measurement process in the entire three-phase calibration task; the current phase identifier is the unique target phase number allowed to enter the excitation path and sampling path in the current round. The server converts the current phase identifier into a relay matrix control sequence according to the relay matrix mapping table. The relay matrix is ​​a switching network composed of multiple relay units, used to complete the connection switching between different phase circuits and the inspection device without rewiring; the relay matrix control sequence refers to the set of relay disconnect and close actions that need to be executed sequentially to establish a target phase circuit. To avoid multi-phase parallel connection or incorrect connection during phase switching, the server calculates the connection validity index of the current switching action before driving the relay matrix. Its expression is:

[0033] in, This indicates the connection validity index of the current phase cut-in action; Indicates the total number of relay control bits required to establish the current phase circuit; Indicates the first step in the relay matrix control sequence. The target state of each control bit is usually represented by a closed or open coded value; Indicates the first step in the relay matrix feedback sequence. The actual state of each feedback bit; the first fractional term is used to calculate the degree of consistency between the target state and the actual state. The higher the degree of consistency, the more accurate the control action. Indicates the number of monitoring branches for non-target phase loops; Indicates the first Whether there is a erroneous access state in the non-target phase circuit; if there is a erroneous access, set to 1; if there is no erroneous access, set to 0. This is to ensure that any incorrect connection to a non-target phase circuit will significantly reduce the connection effectiveness index; This represents the effectiveness factor of the safety protection circuit. It is set to 1 when the short-circuit protection path of the current sampling circuit has been established and the voltage sampling circuit is in a controlled standby state, and otherwise it is set to 0.

[0034] After the current phase circuit is switched in, the programmable power supply module outputs a safe low-voltage excitation signal under the blind test probe voltage threshold constraint. When performing a trial measurement on the current phase circuit under the action of the initial test measurement range combination, the server first issues a segmented ramp-up control command to the programmable power supply module, causing the output voltage to gradually rise from zero to the test target voltage. The programmable power supply module is a power supply device capable of outputting a controlled excitation signal according to the server's control commands. The safe low-voltage excitation signal is a low-energy excitation signal established under the safe output upper limit constraint. Its function is to detect the electrical response of the tested three-phase transformer load box under unknown load conditions without prematurely entering a high-excitation state. To reduce transient impact during excitation establishment and improve controllability during the test phase, the server uses a smooth ramp-up function to generate the output reference value at each moment, the expression of which is:

[0035] in, Indicates time The output reference voltage is as follows; This indicates the upper limit of safe low-voltage excitation during the exploratory measurement phase; This represents the exponential rate of increase coefficient; the larger the value, the faster the output increases. This represents the climbing waveform suppression coefficient, used to reduce local fluctuations in the early and late stages of climbing. Indicates the duration of a climb control window; This indicates the current control moment, and its value ranges from zero to the end of the current climb window.

[0036] S130. Obtain the sampled signal in the current phase circuit, and perform multiple sampling averaging and frequency domain analysis to calculate the impedance characteristic parameters of the tested three-phase transformer load box, and at the same time determine the validity of the sampled signal.

[0037] Specifically, after establishing a trial measurement path in the current phase circuit, the voltage and current responses in the current phase circuit are synchronously sampled to form voltage and current sampling signals. The server first confirms that the current phase circuit has established a unique connection with the excitation path and sampling path through the relay matrix, and confirms that the initial trial measurement range combination is still valid. Then, it issues a synchronous sampling command to the multi-range signal sampling system, enabling the voltage sampling channel and current sampling channel to start sampling simultaneously under the same clock reference. The current phase circuit refers to the target phase electrical path selected for connection to the inspection device in the current round of trial measurements. The trial measurement path refers to the temporary measurement path oriented towards the current phase circuit, composed of a programmable power supply module, transformer output range, voltage sampling range, current sampling range, and relay matrix. The voltage response refers to the voltage change result of the tested three-phase transformer load box under the current trial excitation in the current phase circuit. The current response refers to the current change result of the tested three-phase transformer load box under the same trial excitation in the current phase circuit. Synchronous sampling refers to a processing method in which voltage and current sampling channels simultaneously acquire discrete signal samples under a unified time reference. Its purpose is to ensure the time-series comparability of subsequent voltage and current responses, thereby providing a basis for phase relationship analysis, impedance characteristic parameter calculation, and consistency judgment. To ensure both time and frequency resolution in a single round of sampling, the server can determine the sampling frequency based on the trial excitation frequency and a preset analysis window. The sampling frequency can be expressed as:

[0038] in, This indicates the sampling frequency used for synchronous sampling, which determines how many discrete sampling points are acquired per unit time. This indicates the target dominant frequency of the trial excitation, which is used to reflect the reference frequency of the main response components in the current loop; This represents the oversampling factor, used to ensure that the main frequency component still has sufficient waveform reconstruction capability after discretization, and is usually taken as a positive value greater than 1; This indicates the minimum number of sampling points required within the analysis window, which is used to ensure basic resolution during frequency domain analysis. This indicates the duration of a single sampling window, used to limit the duration of a single synchronous sampling.

[0039] When performing multiple rounds of repeated sampling around the same current phase circuit, the same tap combination, and the same trial excitation conditions to obtain a candidate sampled signal dataset, and performing discreteness discrimination processing on the candidate sampled signal dataset to eliminate abnormal sampling results, while simultaneously performing averaging and fusion processing on the remaining candidate sampled signal dataset to obtain the average sampled signal, the server does not directly use the single round sampling result as the sole basis for subsequent calculations. Instead, while keeping the current phase circuit, tap combination, and trial excitation conditions unchanged, it continuously performs multiple rounds of repeated synchronous sampling, so that each round of sampling forms a set of candidate sampled signal datasets. Tap combination refers to the combined state of the transformer output tap, voltage sampling tap, and current sampling tap that are simultaneously effective during the current round of trial measurement. Trial excitation conditions refer to the excitation voltage amplitude, excitation frequency, excitation waveform, and excitation duration that remain unchanged during the current round of synchronous sampling. Candidate sampled signal dataset refers to the set of multiple sets of voltage and current sampled signals obtained through multiple rounds of repeated sampling under the same measurement conditions. Discreteness discrimination processing refers to the quantitative evaluation of the consistency among multiple candidate sampled signal datasets to identify deviation samples caused by transient noise, switching jitter, electromagnetic disturbances, or sampling channel anomalies. The server first extracts the root mean square (RMS) features of voltage, root mean square (RMS) features of current, and principal frequency phase features from each candidate sampled signal dataset, and then constructs a normalized dispersion index. When the dispersion of a candidate sampled signal dataset is significantly higher than that of other datasets, it is marked as an anomalous sampling result and removed. The dispersion index can be expressed as:

[0040] in, Indicates the first The dispersion index of a group of candidate sampled signal datasets; the larger the value, the more obvious the deviation of the data from the overall mean. Indicates the first The root mean square (RMS) eigenvalues ​​of voltage corresponding to the candidate sampled signal dataset; This represents the average value of the root mean square voltage eigenvalues ​​in the entire candidate sampled signal dataset; Indicates the first The root mean square eigenvalues ​​of the current corresponding to the candidate sampled signal dataset; This represents the average value of the root mean square eigenvalues ​​of the current in the entire candidate sampled signal dataset; Indicates the first The dominant frequency phase difference characteristics of the candidate sampled signal dataset; This represents the average value of the dominant frequency phase difference characteristics across all candidate sampled signal datasets; , , These represent the voltage amplitude deviation weight, current amplitude deviation weight, and phase deviation weight, respectively, and are used to adjust the contribution of each feature to the dispersion index. This represents a very small positive value, used to prevent the denominator from being zero. After the server removes candidate sampled signal datasets whose dispersion index exceeds a threshold, it performs an averaging and fusion process on the remaining dataset. This averaging and fusion process is not a simple point-by-point arithmetic average, but rather assigns different weights based on the stability of each data set, thus obtaining an average sampled signal. The average fused signal can be expressed as:

[0041] in, Indicates the average sampled signal at the 1st... The amplitude at each sampling point can correspond to the average voltage sampling signal or the average current sampling signal, respectively. This indicates the number of candidate sampled signal datasets remaining after removing outlier samples; Indicates the first The remaining candidate sampled signal dataset of the group in the first The amplitude at each sampling point; Indicates the first The fusion weight of group data is usually inversely related to its dispersion index; the smaller the dispersion, the greater the weight.

[0042] Frequency domain analysis is performed on the average sampled signal to identify the dominant frequency response component and suppress interference components. When a purified sampled signal is obtained, the server performs frequency domain transformation on the average voltage and average current sampled signals respectively to obtain the corresponding spectral distribution. Within this spectral distribution, the server locates the dominant frequency response component that is consistent with or approximately consistent with the test excitation frequency. Frequency domain analysis refers to converting a time-domain discrete signal into a frequency domain representation to observe the distribution of signal energy at different frequency positions. The dominant frequency response component refers to the target frequency component directly caused by the test excitation and occupying the majority of energy in the voltage and current responses. Interference components refer to non-target frequency components other than the dominant frequency response component, caused by power frequency spurious signals, switching noise, environmental electromagnetic disturbances, relay jitter, or sampling quantization errors. To balance dominant frequency positioning accuracy and interference suppression capability, the server first windows the average sampled signal and then transforms it, extracting the dominant frequency response component based on the frequency band energy concentration. The spectral transformation can be expressed as:

[0043] in, Indicates the average sampled signal at the 1st... Complex spectral values ​​at discrete frequency points; Indicates the average sampled signal at the 1st... The amplitude at each sampling point; This indicates the window function used in frequency domain analysis to reduce spectral leakage. This represents the total number of sampling points used in a single round of frequency domain analysis; Indicates frequency point index; This represents the imaginary unit. After obtaining the spectrum, the server constructs a narrow-band retention interval around the target frequency and performs suppression or zeroing on energy outside the interval. Then, it performs an inverse transform to obtain the cleaned sampled signal. The cleaned sampled signal refers to the time-domain signal that, after frequency domain interference suppression, primarily retains the frequency response components while significantly reducing non-target interference components. To evaluate the frequency fidelity after frequency domain processing, the server can also construct a frequency energy percentage index, expressed as:

[0044] in, The index represents the proportion of the main frequency energy, which is used to characterize the proportion of the main frequency response component in the total energy of the average sampled signal. The larger the value, the more prominent the target response. This represents the set of target frequency band indices constructed around the main frequency response; Indicates the first Complex spectral values ​​at each frequency point; This represents the total number of frequency points analyzed in the frequency domain.

[0045] Based on the purified sampling signal, a set of impedance characteristic parameters corresponding to the current phase circuit is generated. Simultaneously, sampling signal validity judgment processing is performed around signal amplitude validity, signal stability, and signal consistency to determine whether the purified sampling signal constitutes a valid sampling signal. When a valid sampling signal is established, the impedance characteristic parameters are output. The server first extracts steady-state amplitude and phase difference characteristics from the purified voltage and current sampling signals, and then constructs the impedance characteristic parameter set around the current phase circuit. The impedance characteristic parameter set refers to the set of parameters used to characterize the electrical load characteristics of the tested three-phase transformer load box under the current phase circuit, typically including at least the actual impedance value, admittance-related quantities, and power factor. Signal amplitude validity refers to whether the amplitude of the purified sampling signal falls within the measurable and appropriately resolved range of the current range combination. Signal stability refers to whether the target signal obtained after multiple rounds of repeated sampling, averaging and fusion processing, and frequency domain analysis processing maintains minimal fluctuations. Signal consistency refers to whether the purified voltage and current sampling signals satisfy logical and physical correspondences under the current phase circuit, current range combination, and current trial excitation conditions. The server can first calculate the complex impedance based on the purified sampled signal, and then derive other parameters from the complex impedance. The complex impedance can be expressed as:

[0046] in, This represents the equivalent complex impedance corresponding to the current phase loop, used to simultaneously characterize the magnitude and phase relationships; This represents the complex amplitude of the purified voltage sampling signal on the main frequency response component; This represents the complex amplitude of the purified current sampling signal on the main frequency response component. The server can further obtain admittance-related quantities and power factor from the complex impedance, expressed as follows:

[0047] in, It represents the equivalent complex admittance corresponding to the current phase loop, used to characterize the conductivity and admittance characteristics of the load; The power factor is used to characterize the degree of phase coordination between the voltage response and the current response. This represents the phase angle of the equivalent complex impedance. The calculation logic of this set of formulas is that the complex impedance can comprehensively describe the magnitude ratio and phase shift, while its reciprocal constitutes the complex admittance, and the cosine of the complex impedance phase angle corresponds to the power factor. After obtaining the set of impedance characteristic parameters, the server also needs to perform validity discrimination processing. For this purpose, a comprehensive validity scoring function can be constructed:

[0048] in, This represents the overall effectiveness score of the sampled signals; The signal amplitude validity score reflects whether the purified sampling signal is within a reasonable measurement range. This represents the signal stability score, used to reflect whether the target response converges before and after repeated sampling; The signal consistency score reflects whether the voltage and current sampling signals are consistent with each other and with the current phase loop identifier. , , These represent the weights of the three types of scores. When the overall validity score reaches a preset threshold, the server marks the purified sampled signal as a valid sampled signal and outputs a set of impedance characteristic parameters for subsequent adaptive gear selection. When the overall validity score does not reach the preset threshold, the server marks the current round's result as an invalid sampling result and transmits the corresponding anomaly information to the fault recovery mechanism. Through this process, the acquisition of sampled signals, multiple rounds of repeated sampling, dispersion discrimination, averaging and fusion processing, frequency domain analysis processing, impedance characteristic parameter generation, and sampled signal validity discrimination in the current phase loop form a logically closed processing chain, ensuring that the impedance characteristic parameters received in subsequent processes not only have a clear source but also possess stability and reliability.

[0049] S140. When the sampling signal does not meet the valid conditions, the fault recovery mechanism is executed and the sampling level and test voltage are adjusted to perform a secondary test measurement. At the same time, the level switching is performed in a preset sequence.

[0050] Specifically, after determining that the sampled signal does not meet the valid conditions, an anomaly handling record is generated, bound to the current phase identifier, sampling task identifier, and range combination identifier. When classifying the anomaly type based on the amplitude state, fluctuation state, and channel correspondence of the sampled signal, the server first receives the invalidity judgment result output by the validity judgment module of the previous round of sampling signals. This invalidity judgment result is then jointly bound to the current phase identifier, sampling task identifier, and range combination identifier to form an anomaly handling record for this round of exploratory measurement. The current phase identifier refers to the target phase number currently performing the exploratory measurement, indicating which phase circuit the anomaly originates from. The sampling task identifier is the unique sampling process number corresponding to this round of sampling action within the entire verification task, used to associate the anomaly state with the specific sampling round. The range combination identifier refers to the combination identifier of the transformer output range, voltage sampling range, and current sampling range actually used in the previous round of exploratory measurement, indicating the hardware measurement configuration at the time of the anomaly. An anomaly handling record refers to a structured state record established around an invalid sampling result. It includes at least the following fields: anomaly source field, anomaly type field, preceding test voltage field, current gear combination field, protection status field, and subsequent recovery action field. After generating the anomaly handling record, the server does not immediately enter the same recovery process; instead, it first performs anomaly classification on the sampled signal. Amplitude status refers to the overall amplitude level of the sampled signal under the current gear combination, used to distinguish between weak response, strong response, or amplitude overflow. Fluctuation status refers to the amplitude and trend of the sampled signal within the same sampling window or between multiple rounds of repeated sampling, used to distinguish between random jitter, continuous oscillation, or unstable fluctuations. Channel correspondence refers to whether the mapping relationship between the voltage sampling channel, current sampling channel, and the current phase circuit is consistent, used to determine whether there are channel misconnections, channel drift, or feedback mismatch problems. To quantify the anomaly classification process, the server can construct a comprehensive anomaly classification vector, the expression of which is:

[0051] in, This represents the anomaly classification vector corresponding to the current invalid sampling result, used to characterize the abnormal features of the sampled signal in three dimensions: amplitude, fluctuation, and channel mapping. This indicates an amplitude anomaly index, used to measure the degree of deviation of the sampled signal amplitude from the effective range of the current gear combination; This indicates an anomaly index, used to measure the degree of instability of a sampled signal in the time domain or during repeated sampling. This indicates a channel anomaly index, used to measure the degree of consistency between the voltage sampling channel, the current sampling channel, and the current phase circuit.

[0052] Before performing a gear shift, the server controls the programmable power module to stop the trial excitation output. Upon confirming that the current sampling circuit remains under short-circuit protection and the voltage sampling circuit is in a controlled standby state, the server first switches the current measurement process from the trial output state to the recovery preparation state based on the anomaly handling record. It then sends a stop trial excitation output command to the programmable power module, causing its output to gradually decrease to zero output or a safe residual output level according to a controlled reduction method. Trial excitation output refers to the controlled low-voltage excitation applied to the current phase circuit during the previous trial measurement. Stopping the trial excitation output is not a simple power cut-off; rather, it involves withdrawing the excitation according to a safe transition process under control logic constraints to avoid sudden changes in the circuit. After issuing the stop excitation command, the server continuously reads the power feedback status and confirms that the current output voltage has dropped to a safe range for allowed switching. Maintaining short-circuit protection in the current sampling circuit means that the server checks whether the short-circuit protection relay on the current sampling circuit remains closed, ensuring that the current path never becomes open during subsequent switching processes. The voltage sampling loop being in a controlled standby state means that the server has checked and confirmed that the voltage sampling path has switched from the sampling working state to the standby state. However, this standby state is still controlled by the program and cannot be accidentally connected before the switching action is completed. To quantify whether the recovery preparation conditions for allowing switching have been met, the server can construct a recovery preparation judgment value, the expression of which is:

[0053] in, This indicates the recovery preparation judgment value, used to comprehensively determine whether the current system meets the conditions for entering the gear shifting stage; This indicates the residual output voltage of the programmable power supply module after the test excitation output has stopped; This indicates the upper limit of the safe low voltage that can be output during the current probing phase; , , These represent the residual output safety weight, current protection state weight, and voltage standby state weight, respectively. This represents the short-circuit protection status factor of the current sampling circuit. It is set to 1 when the short-circuit protection relay remains closed, and 0 otherwise. This represents the standby state factor of the voltage sampling circuit. It is set to 1 when the voltage sampling circuit is in a controlled standby state, and 0 otherwise. This represents a very small positive value and is used to prevent the denominator from being zero.

[0054] Based on the anomaly type, the server performs sampling range adjustment processing on the voltage sampling range, current sampling range, and transformer output range. During the sampling range adjustment process, the server follows a preset sequence: first, the current path maintains short-circuit protection before switching to the current sampling range; second, the voltage path disconnects the original voltage sampling range before connecting the target voltage sampling range; and third, the transformer output range is switched after the sampling range stabilizes. When completing the range switching, the server first extracts the anomaly type from the anomaly handling record and calls the corresponding recovery rule set. Sampling range adjustment processing refers to the process by which the server reselects and resets the voltage sampling range, current sampling range, and transformer output range based on the anomaly type. The preset sequence refers to the control order that must be followed when switching ranges on different measurement paths; its purpose is to ensure that the measurement circuit and excitation circuit are always protected during the switching process. For anomalies with weak response, the server will prioritize increasing the sensitivity of the voltage and current sampling ranges, ensuring the sampled signal occupies a higher proportion of the effective range in the next round of testing. For anomalies with strong response, the server will prioritize expanding the range of the relevant sampling ranges and, if necessary, reducing the transformer output range. For anomalies with fluctuations, the server will prioritize maintaining the transformer output range without significant changes, and first switch to a more stable range on the sampling side. For channel anomalies, the server will first confirm the channel mapping relationship and then reload the sampling range matching the current phase circuit. Maintaining short-circuit protection before switching current sampling ranges means that before switching current sampling ranges, the server must ensure the short-circuit protection relay on the current sampling circuit remains closed, ensuring the current circuit remains in a closed protection state during range disconnection and reconnection. Disconnecting the original voltage sampling range before connecting the target voltage sampling range means that the server uses a method of first removing the old connection and then establishing a new connection on the voltage sampling circuit to avoid short-term parallel connection of two different range paths. The transformer output tap change is performed after the sampling tap has stabilized. This means that the output tap adjustment on the excitation side is scheduled to be executed after the sampling side tap change is complete and the state is stable, thus avoiding the superposition of uncertainties caused by simultaneous changes on the excitation source side and the sampling side. To quantitatively compare different candidate tap adjustment schemes, the server can construct a tap recovery objective function, the expression of which is:

[0055] in, This represents the overall cost of a candidate recovery level scheme. The smaller the cost, the more suitable the scheme is as the level configuration for the next round of recovery measurement. This represents the expected center value of the voltage response under the candidate recovery level scheme; This represents the center value of the effective range of the target voltage, used to characterize the range position to which the server expects to adjust the voltage response. This represents the expected center value of the current response under the candidate recovery gear scheme; Indicates the center value of the effective range of the target current; , These represent the weighting of voltage and current relative to range deviation, respectively. This indicates the cost of gear switching, which reflects the number of relay actions, switching complexity, and switching time involved in the scheme. This indicates the switching risk cost, reflecting the safety risks that the scheme may introduce during current path protection, voltage path disconnection, and transformer output adjustment.

[0056] After completing the sampling range adjustment, the test voltage is incrementally or decrementally adjusted according to the anomaly type to form a secondary test voltage configuration. The programmable power module is then controlled to re-output the test excitation based on the secondary test voltage configuration to establish secondary test measurement conditions. When acquiring new sampling signals and re-performing the sampling signal validity judgment process, the server first reads the anomaly type and new range status from the anomaly handling record and determines whether to increase or decrease the test voltage in this recovery round based on the anomaly type. Incremental test voltage adjustment refers to enhancing the measurable response of the current phase circuit by controlling the increase of the test voltage when the response is too weak or the main response is insignificant. Decremental test voltage adjustment refers to reducing the overload risk by controlling the decrease of the test voltage when the response is too strong, close to range overflow, or locally saturated. The secondary test voltage configuration refers to the target value and output boundary of the next round of test excitation recalculated by the server after range recovery. To ensure that the trial voltage adjustment not only reflects the type of anomaly but also comprehensively considers the inadequacy of the previous round of effectiveness scoring and the current level margin, the server can construct a secondary trial voltage configuration function, the expression of which is:

[0057] in, This indicates the secondary test voltage configuration value, which is used as the target output voltage for the next round of test excitation. This indicates the actual test voltage used in the previous round of tentative measurements; This represents the weak response increment coefficient, used to increase the voltage when the response is too weak; This represents the weak response factor, reflecting the degree to which the previous round of sampling signal was below the target effective range; the greater the degree, the larger the value. This represents the strong response reduction factor, used to reduce voltage when the response is too strong; This indicates a strong response factor, reflecting the degree to which the previous round of sampling signal exceeded the target effective range; This represents the risk suppression coefficient, used to suppress the secondary test voltage as a whole when the system approaches the safety boundary; The recovery risk factor is determined by a combination of the remaining range margin, switching complexity, and protection status of the current range combination. The calculation logic is as follows: the previous test voltage is used as the recovery starting point. If the anomaly manifests as a weak response, the target voltage is increased using a weak response factor; if the anomaly manifests as a strong response, the target voltage is decreased using a strong response factor. Simultaneously, the recovery risk factor performs secondary suppression on the overall voltage, ensuring the new configuration never deviates from the safety boundary. After obtaining the secondary test voltage configuration, the server reissues the test excitation output command to the programmable power module and establishes secondary test measurement conditions under the combined action of the new voltage sampling range, current sampling range, and transformer output range. The secondary test measurement conditions refer to the second round of pre-test measurement state, consisting of the new range combination, the new test voltage configuration, and a valid safe operating environment. After establishing the secondary test measurement conditions, the server reacquires new voltage and current sampling signals and performs multiple rounds of repeated sampling, dispersion discrimination, averaging and fusion processing, frequency domain analysis processing, and sampling signal validity discrimination processing. If the new sampled signal meets the valid conditions, the server outputs its corresponding impedance characteristic parameters to the subsequent adaptive range selection stage; if the new sampled signal still does not meet the valid conditions, the server continues to update the anomaly handling record and enters the next round of fault recovery mechanism based on the new anomaly characteristics.

[0058] S150. When the sampled signal meets the valid conditions, the adaptive range selection is performed based on the impedance characteristic parameters, and the target range combination is locked. At the same time, the procedure test or fixed-point test is performed according to the verification type to obtain the verification data.

[0059] Specifically, when marking the impedance characteristic parameter corresponding to the current phase circuit as the effective impedance characteristic parameter, and binding and storing the effective impedance characteristic parameter with the current phase identifier, sampling task identifier, and range combination identifier, the server first receives the valid judgment result output by the sampling signal validity judgment processing, and confirms that the impedance characteristic parameter obtained by the current phase circuit in this round of exploratory measurement meets the usage conditions for subsequent formal testing. The effective impedance characteristic parameter refers to the set of impedance characteristic parameters that have been jointly judged by signal amplitude validity, signal stability, and signal consistency, and can truly characterize the electrical load state of the tested three-phase transformer load box under the current phase circuit. The current phase identifier is the target phase number currently executing the subsequent formal test, used to indicate which phase circuit the effective impedance characteristic parameter belongs to. The sampling task identifier is the unique record number of the current round of exploratory measurement and sampling processing, used to trace the effective impedance characteristic parameter to the specific sampling source. The range combination identifier is the actual exploratory measurement range combination number used when generating the effective impedance characteristic parameter, used to indicate under what excitation path and sampling path configuration the parameter was obtained. When the server completes the binding and storage, it does not simply store a single impedance value. Instead, it encapsulates the effective impedance characteristic parameter along with the current phase identifier, sampling task identifier, and range combination identifier into a pre-test parameter unit. This allows subsequent target range combination selection and formal test result output to be traced back along the same parameter chain. To quantify the reliability of the current impedance characteristic parameter, the server can construct an effective impedance characteristic parameter reliability function, the expression of which is:

[0060] in, This indicates the overall reliability of the effective impedance characteristic parameters. The larger the value, the more suitable the current impedance characteristic parameters are as the basis for subsequent adaptive range selection. This indicator represents the proportion of main frequency energy and is used to reflect the prominence of the main frequency response component in the purified sampling signal. The residual dispersion index reflects the degree of sampling dispersion that remains after removing outlier sampling results and completing average fusion. The larger the value, the stronger the residual instability. This represents the overall effectiveness score of the sampled signal, which reflects the overall performance of the current sampled signal in three dimensions: amplitude effectiveness, stability, and consistency. , , These represent the weights for dominant frequency salience, discrete suppression, and overall effectiveness, respectively. The server stores this confidence level along with the effective impedance characteristic parameter, ensuring that subsequent joint screening is based not only on the parameter value itself but also on the reliability of the parameter.

[0061] Based on the effective impedance characteristic parameters, the set of verification parameters, and the verification type, a joint screening process is performed on the candidate sets of transformer output ranges, voltage sampling ranges, and current sampling ranges. When selecting a range combination that meets the safety constraints, response resolution requirements, and stability requirements as the target range combination, the server first extracts the set of verification parameters and the verification type from the verification task data structure, and simultaneously reads the impedance characteristic parameters that have been confirmed as valid during the exploratory measurement phase. The set of verification parameters refers to the set of parameters corresponding to this three-phase transformer load box verification task, including the rated voltage range, rated current range, test phase sequence, and blind test probe voltage threshold. The verification type refers to the test mode identifier used in the formal testing phase, which includes at least two types: standard testing and fixed-point testing. The candidate set of transformer output ranges is a set of transformer output ranges that, within the hardware capabilities of the inspection device, are retained after preliminary screening for subsequent formal test excitation configuration. The candidate set of voltage sampling ranges is a set of candidate ranges that can be used for voltage response acquisition in the formal testing phase. The candidate set of current sampling ranges is a set of candidate ranges that can be used for current response acquisition in the formal testing phase. Joint screening refers to the server not selecting the transformer output tap, voltage sampling tap, and current sampling tap independently, but treating them as a unified configuration unit for collaborative evaluation, ensuring that the target tap combination simultaneously meets the comprehensive requirements of both the excitation and sampling sides. To establish this joint evaluation process, the server first predicts the possible voltage and current response distributions at different formal test points based on the effective impedance characteristic parameters. Then, it constructs a matching function for candidate tap combinations based on the requirements of the verification type for the formal test point distribution. The expression is as follows:

[0062] in, Indicates by the first The transformer output tap, the first The voltage sampling level and the first The comprehensive fit value of the candidate range combination composed of current sampling ranges. The larger the value, the more suitable the range combination is as the target range combination in the formal testing phase. This represents the center value of the formal test voltage response predicted by combining the effective impedance characteristic parameters under the candidate range combination. This represents the center value of the effective range of the target voltage, used to characterize the optimal range position that the server expects the voltage response to fall into during the formal test. This represents the predicted center value of the formal test current response under this candidate gear combination; Indicates the center value of the effective range of the target current; This represents the safety constraint cost, used to characterize the degree to which the candidate gear combination approaches the safety boundary on both the excitation and sampling sides. The larger the value, the higher the safety risk. This represents the stability cost, used to characterize the degree of disadvantage of the candidate gear combination in terms of relay switching complexity, signal range margin, and expected noise immunity. , , , These represent the voltage resolution adaptation weight, current resolution adaptation weight, safety constraint weight, and stability constraint weight, respectively. This indicates a very small positive value, used to avoid anomalies in the logarithmic and denominator terms. After calculating the comprehensive fit value for all candidate range combinations, the server selects the candidate range combination that satisfies the safety constraints and has the largest comprehensive fit value as the target range combination. The target range combination is the final combination state of the transformer output range, voltage sampling range, and current sampling range used in the formal testing phase, and is used to maintain stable operation in subsequent procedural tests or fixed-point tests.

[0063] After ceasing the probing excitation and confirming that the output has fallen back to a safe state, when switching the transformer output range, voltage sampling range, and current sampling range from the probing measurement range combination to the target range combination and locking it according to the preset sequence, the server first sends a stop probing excitation output command to the programmable power module, causing the low voltage excitation during the probing phase to fall back to zero output or a safe residual output level. Then, it continuously receives power status feedback to confirm that the current output has exited the probing state. The probing measurement range combination refers to the actual combination state of the transformer output range, voltage sampling range, and current sampling range used during the probing measurement phase. The preset sequence refers to the hardware action sequence that must be followed when switching from the probing measurement range combination to the target range combination. Its core purpose is to ensure that the current path, voltage path, and excitation path are always in a protected and controllable state during the switching process. When the server performs a switch, it first confirms that the short-circuit protection path of the current sampling circuit is still effective before switching the current sampling range. Then, with the voltage sampling circuit in a controlled standby state, it first disconnects the original voltage sampling range connection and then connects the target voltage sampling range connection. Finally, after all sampling ranges have stabilized and the feedback is consistent, it performs the transformer output range switch. Locking is not simply completing a single switch action; rather, after completing the three types of range switching, the server continuously reads the range feedback status and writes the finally consistent target range status into the formal test configuration register, preventing unauthorized range changes during subsequent formal testing. To comprehensively determine whether the formal testing phase can begin, the server can construct a target range locking completion function, the expression of which is:

[0064] in, This indicates the degree of completion of locking the target gear combination; the larger the value, the closer it is to the state where it can be executed in the formal test. This represents the transformer output gear lock-in status factor. It is set to 1 when the transformer output gear has been switched to the target gear and the feedback is consistent, otherwise it is set to 0. This indicates the voltage sampling range lock-in status factor. It is set to 1 when the voltage sampling range has been switched to the target range and the feedback is consistent, otherwise it is set to 0. This indicates the current sampling range lock-in status factor. It is set to 1 when the current sampling range has been switched to the target range and the feedback is consistent, otherwise it is set to 0. This indicates the safety protection status factor after switching. It is set to 1 when the current path protection is effective and the voltage path is in the correct control state, and 0 otherwise. This indicates the residual output voltage that has not completely disappeared after the test excitation has stopped; Indicates the maximum safe output allowed at the current stage; , , , , These represent the transformer lockout weight, voltage lockout weight, current lockout weight, safety state weight, and residual output suppression weight, respectively.

[0065] After the target gear combination is locked, the server generates a test execution sequence based on the verification type and controls the programmable power supply module to output the corresponding voltage or current excitation. Simultaneously, it controls the multi-gear signal sampling system to synchronously sample the current phase circuit and processes the sampling results to generate verification parameters. The server first routes the data to the corresponding formal test strategy based on the verification type. If the verification type is a procedure test, the server reads the set of procedure test points in the procedure database that matches the type of the current three-phase transformer load box under test, and converts each procedure test point into a test execution unit. If the verification type is a fixed-point test, the server reads the preset fixed-point conditions and converts each target fixed-point working position into a test execution unit. The test execution sequence refers to an ordered set of test execution units organized by the server around the formal test phase. It includes at least the excitation setting value, holding duration, sampling window, result identifier, and execution order for each test execution unit. Voltage or current excitation refers to the formal test excitation amount applied to the current phase circuit by the programmable power supply module under the constraints of the target gear combination. Verification parameters refer to the set of parameters calculated based on synchronous sampling results during the formal testing phase, used to evaluate whether the tested three-phase transformer load box meets the verification requirements. When executing each test execution unit, the server first controls the programmable power supply module to output excitation according to the target value, then waits for the current phase circuit to enter the steady-state response range, and subsequently controls the multi-level signal sampling system to synchronously sample. The obtained voltage and current responses are then processed jointly in the time and frequency domains to finally generate the verification parameters for the corresponding test execution unit. To ensure that the test execution sequence takes into account the importance of different test points, response settling time, and sampling stability, the server can construct a test execution sequence priority function, the expression of which is:

[0066] in, Indicates the first The sequence priority of each test execution unit is used to determine the organizational order of each test execution unit in the formal testing phase; Indicates the first The importance weight of each test execution unit can be determined by the importance test point level specified in the procedure in the procedure test, and by the degree of attention to the target working condition in the fixed point test. This indicates the total number of test execution units in the test execution sequence; Indicates the first Expected steady-state setup time for each test execution unit; This represents the average expected steady-state setup time for all test execution units; Indicates the first The expected disturbance sensitivity of each test execution unit is used to reflect the degree to which the test point is affected by external disturbances or internal fluctuations under the current phase loop and the current target gear combination. , , These represent importance weight, fast and stable weight, and low-perturbation weight, respectively. This represents a very small positive value. Based on this, the server organizes the test execution sequence, executes the formal tests one by one, and generates verification parameters after each test execution unit is completed. For a given test execution unit, the server can also construct a verification parameter vector based on the main frequency complex amplitude value obtained from synchronous sampling, the expression of which is:

[0067] in, Indicates the first The verification parameter vector corresponding to each test execution unit; Indicates the first The impedance magnitude of the current phase circuit under each test execution unit is used to characterize the actual impedance magnitude. Indicates the first The real part of the complex admittance under each test execution unit is used to characterize conductivity-related properties; Indicates the first The imaginary part of the complex admittance under each test execution unit is used to characterize the reactive admittance-related characteristics. Indicates the first The power factor of each test execution unit is used to characterize the phase relationship between voltage and current responses. Thus, after the sampled signal meets the valid conditions, the current phase circuit, from binding effective impedance characteristic parameters, jointly screening target range combinations, locking the target range combination according to a preset sequence, to generating a test execution sequence based on the verification type and outputting verification parameters, forms a formal test implementation link that is logically closed and interconnected. This ensures that subsequent verification data is based on verified and valid trial measurement results and locked and stable target range combinations.

[0068] S160. After completing the current phase circuit test, switch phases according to the test phase sequence and perform trial measurements and test processing until the phase verification is completed, so as to generate a verification report of the tested three-phase transformer load box containing verification data.

[0069] Specifically, after the current phase loop forms a verification data set, the server first switches the formal test process corresponding to the current phase loop from the measurement state to the loop convergence state, and sends a stop excitation output command to the programmable power module, causing the voltage or current excitation on the current phase loop to fall back to a safe range in a controlled manner. The current phase loop refers to the target phase electrical path that has completed exploratory measurement, validity judgment, adaptive range selection, and formal test processing in the current round. The verification data set refers to the set of parameter results generated and processed during the procedure test or fixed-point test of the current phase loop, which includes at least the impedance parameters, admittance-related parameters, power factor-related parameters, and test status information corresponding to each test point. The loop convergence state means that before switching to the next phase loop, the current phase loop is first de-excited, de-sampled, and restored to a transitional state that allows safe switching. After stopping the excitation output, the server continuously reads the feedback status of the programmable power module and confirms that the output has dropped to within the safe residual range. Then, it controls the voltage sampling circuit to enter a controlled standby state, while simultaneously maintaining the current sampling circuit in a short-circuit protection state. The controlled standby state means that the voltage sampling circuit has left the current formal sampling state but remains under the server's logic control, and is not allowed to be accidentally turned on before the phase switching is completed. The short-circuit protection state means that the current sampling circuit maintains a closed protection path through a short-circuit protection relay to prevent the current path from opening during relay matrix switching. To comprehensively determine whether the current phase circuit has met the phase switching prerequisites, the server can construct a circuit convergence determination function, the expression of which is:

[0070] in, This indicates the current phase loop's loop convergence determination value; the larger the value, the closer it is to the state where phase switching is allowed. This indicates the residual output value of the programmable power supply module after the excitation output stops, and is used to characterize whether there is still residual excitation in the current phase circuit; Indicates the maximum safe output allowed at the current stage; , , , These represent the residual output suppression weight, the voltage loop standby state weight, the current loop short-circuit protection state weight, and the active connection clearing weight, respectively. This represents the voltage sampling loop state factor, which is set to 1 when the voltage sampling loop has entered a controlled standby state, and 0 otherwise. This represents the current sampling circuit status factor, which is 1 when the current sampling circuit is in short-circuit protection state, and 0 otherwise. This indicates the number of connection units that are currently active in the phase circuit. This indicates the total number of connection units configured during the current formal testing phase of the phase-separated circuit; This represents a very small positive value, used to prevent the denominator from being zero. The calculation logic of this formula is that only when the residual output is low enough, the voltage sampling circuit is in a controlled standby state, the current sampling circuit is kept in a short-circuit protection state, and the formal test connection of the current phase circuit has been basically withdrawn, can the current phase circuit truly reach the convergence condition for allowing switching, thereby ensuring that subsequent phase switching occurs within a safe working environment.

[0071] Based on the test phase sequence and the completed phase set, the next phase identifier is determined. The server then controls the relay matrix of the three-phase automatic switching module to disconnect the current phase loop and switch to the next phase loop. After confirming that the next phase loop is the only access loop, the server repeatedly performs trial measurements, sample signal processing, sample signal validity judgment, adaptive range selection, and procedural or fixed-point testing around the next phase loop to form the corresponding phase loop's verification data set. The server first reads the test phase sequence and the completed phase set. The test phase sequence refers to the defined order in which each phase loop enters the measurement process in this verification task; it can be a default order or a custom order specified by task parameters. The completed phase set refers to the set of phase identifiers that have completed the full verification process and formed the verification data set. The next phase identifier refers to the next phase number to be tested in the test phase sequence according to a predetermined order and that has not yet appeared in the completed phase set. After determining the next phase identifier, the server generates a relay matrix control sequence to disconnect the current phase loop and switch to the next phase loop based on the relay matrix mapping table. The three-phase automatic switching module refers to a hardware module that achieves automatic switching between multiple phases through a relay matrix. Its function is to complete the switching connection between different phase circuits and excitation paths and sampling paths without altering the wiring. The relay matrix is ​​a switching network composed of multiple relay units connected according to a preset relationship. "Unique access circuit" means that at any given switching moment, only the target phase circuit forms an excitation and sampling connection with the inspection device, while all other non-target phase circuits remain disconnected. After the server completes the relay matrix operation, it reads the relay feedback status and protection status, confirms that the next phase circuit has been uniquely accessed, and then re-executes the same complete process as the current phase circuit around the next phase circuit. This includes re-executing trial measurements, sampling signal processing, sampling signal validity judgment, adaptive range selection, and procedural or fixed-point testing, thereby forming the corresponding verification data set for the next phase circuit. Re-execution does not mean directly reusing the measurement conclusions of the previous phase circuit; rather, it independently establishes trial conditions, independently forms impedance characteristic parameters, independently locks the target range combination, and independently generates formal test results on the newly accessed next phase circuit. To ensure that the next phase identifier selection and phase switching action both conform to the test phase sequence and avoid repeatedly processing already completed phases, the server can construct a phase switching selection function, the expression of which is:

[0072] in, Indicates the first The switching priority value of each candidate phase is larger, indicating that it is more suitable as the next phase circuit; Indicates the first The order fit value of each candidate phase in the test phase sequence is larger the closer the current order is to the predetermined successor position; Indicates the first If a candidate phase already belongs to the set of completed phases, set it to 1; otherwise, set it to 0. Indicates the first The loop preparation status value of each candidate phase is used to characterize whether the corresponding path of the phase meets the hardware prerequisites for being switched at the current time. , , These represent the sequence adaptation weight, the incomplete state weight, and the loop preparation weight, respectively. The calculation logic of this formula is that the server prioritizes the phases in the test phase sequence that are correctly sequenced, not yet completed, and in good hardware preparation status as the next phase loop. This ensures that the entire multi-phase verification process strictly follows the test phase sequence and avoids repeated testing or incorrect switching. After the next phase loop forms the verification data set, the server adds it to the completed phase set and continues to search for subsequent phases to be tested according to the same logic until all phases in the test phase sequence have completed verification.

[0073] The server first establishes a unified phase result storage area around the verification task identifier. After each phase circuit completes its entire process, the server writes the corresponding trial measurement records, range selection records, verification data sets, and protection status records into the phase result storage area. Trial measurement records refer to the collection of excitation configuration, sampling configuration, impedance characteristic parameters, effectiveness judgment results, and recovery action records formed during the trial phase of a phase circuit. Range selection records refer to all range decisions and switching status records formed during the formal test execution process of a phase circuit, from the trial measurement range combination to the target range combination. Protection status records refer to the collection of records of the current sampling circuit short-circuit protection status, voltage sampling circuit controlled status, and related safety logic status during the switching, trial, and formal test processes of a phase circuit. The phase result set refers to a comprehensive result data structure organized according to phase dimensions. Each result unit corresponds to an independent phase circuit, and each result unit simultaneously contains preliminary trial information, intermediate stage decision information, formal verification information, and protection status information. After all phases in the test phase sequence have been verified, the server generates a verification report based on the phase result set. The verification report is a standardized result document output to the entire tested three-phase transformer load box, which includes at least task identification information, test phase sequence information, verification data for each phase, process records for each phase, and overall verification conclusions. To quantify the completeness of the verification report, the server can construct a report completeness function, the expression of which is:

[0074] in, This indicates the completeness of the verification report; a higher value indicates a more complete report and that it is more suitable as the final output. This indicates the number of phases that have been verified. This indicates the total number of phases that need to be verified in the test phase sequence; This indicates the number of test points or fixed workstations that have generated valid verification data. This indicates the total number of test points or fixed-point workstations that this verification task is required to cover. This indicates the number of process records that have been included in the report; The rules require that the total number of process records be included in the report; This indicates the number of protection status entries that have been correctly recorded and confirmed to be without any abnormalities or missing entries; The rule requires that the total number of protection status entries be included in the report; , , , These represent phase coverage weight, verification data coverage weight, process record coverage weight, and protection status coverage weight, respectively. This represents a very small positive value, used to prevent the denominator from being zero. The calculation logic of this formula is that the verification report not only requires all phases to be completed, but also requires the verification data, process records, and protection status records to be complete simultaneously. Therefore, by weighted fusion of the four types of coverage, it can be determined whether the current report has met the standardized output conditions. After the report completeness meets the threshold, the server arranges the phase result units in the phase result set according to the test phase sequence, generates a verification report containing the verification data and phase process records of each phase, and displays it through the human-machine interface or exports it through an external interface. In this way, the convergence processing after the current phase loop completes the test, the automatic switching and repeated execution of the next phase loop, and the final collection of the phase result set and the generation of the verification report form a continuous, closed, and traceable three-phase sequence automatic verification link.

[0075] This application also provides a calibration system for a three-phase transformer load cell, referring to... Figure 2 , Figure 2This is a schematic diagram of a three-phase transformer load cell calibration system provided in an embodiment of this application. The system is a server, which includes an acquisition module 21 and a processing module 22. The acquisition module 21 is used to acquire the calibration parameters and calibration type of the three-phase transformer load cell under test, and perform system initialization and self-test processing according to the calibration parameters. After the self-test is passed, the pre-safety protection logic is activated to establish a safe working environment. The processing module 22 is used to output a safe low-voltage excitation signal under the constraints of the safe working environment, and configure the transformer output tap, voltage sampling tap, and current sampling tap. At the same time, it switches to the current phase circuit in the test phase sequence to perform trial measurement. The processing module 22 is also used to acquire the sampled signal in the current phase circuit and perform multiple sampling averaging processing and frequency domain analysis. The processing module 22 is used to calculate the impedance characteristic parameters of the tested three-phase transformer load box and determine the validity of the sampled signal. When the sampled signal does not meet the validity conditions, the processing module 22 executes a fault recovery mechanism and adjusts the sampling range and test voltage for a secondary trial measurement, while simultaneously performing range switching according to a preset sequence. When the sampled signal meets the validity conditions, the processing module 22 performs adaptive range selection based on the impedance characteristic parameters and locks the target range combination. Simultaneously, it performs procedural testing or fixed-point testing according to the verification type to obtain verification data. After completing the current phase circuit test, the processing module 22 switches phases according to the test phase sequence and performs trial measurements and test processing until phase verification is completed, generating a verification report for the tested three-phase transformer load box containing verification data.

[0076] It should be noted that the above embodiments of the apparatus are only illustrated by the division of the above functional modules. In practical applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. In addition, the apparatus and method embodiments provided in the above embodiments belong to the same concept, and the specific implementation process can be found in the method embodiments, which will not be repeated here.

[0077] This application also provides an electronic device, with reference to... Figure 3 , Figure 3 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. The electronic device may include: at least one processor 31, at least one network interface 34, a user interface 33, a memory 35, and at least one communication bus 32.

[0078] The communication bus 32 is used to enable communication between these components.

[0079] The user interface 33 may include a display screen and a camera. Optionally, the user interface 33 may also include a standard wired interface and a wireless interface.

[0080] The network interface 34 may optionally include a standard wired interface or a wireless interface (such as a Wi-Fi interface).

[0081] The processor 31 may include one or more processing cores. The processor 31 connects to various parts of the server via various interfaces and lines, executing instructions, programs, code sets, or instruction sets stored in the memory 35, and calling data stored in the memory 35 to perform various server functions and process data. Optionally, the processor 31 may be implemented using at least one hardware form of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor 31 may integrate one or a combination of several of the following: Central Processing Unit (CPU), Graphics Processing Unit (GPU), and modem. The CPU primarily handles the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the content to be displayed on the screen; and the modem handles wireless communication. It is understood that the modem may also not be integrated into the processor 31 and may be implemented as a separate chip.

[0082] The memory 35 may include random access memory (RAM) or read-only memory. Optionally, the memory 35 may include a non-transitory computer-readable storage medium. The memory 35 can be used to store instructions, programs, code, code sets, or instruction sets. The memory 35 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as touch function, sound playback function, image playback function, etc.), instructions for implementing the above-described method embodiments, etc.; the data storage area may store data involved in the above-described method embodiments, etc. Optionally, the memory 35 may also be at least one storage device located remotely from the aforementioned processor 31. Figure 3As shown, the memory 35, which serves as a computer storage medium, may include an operating system, a network communication module, a user interface module, and an application program for a verification method of a three-phase sensor load cell.

[0083] exist Figure 3 In the electronic device shown, the user interface 33 is mainly used to provide an input interface for the user and to obtain the user input data; while the processor 31 can be used to call an application program stored in the memory 35 for a verification method of a three-phase mutual sensor load box. When executed by one or more processors, the electronic device performs one or more methods as described in the above embodiments.

[0084] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to this application.

[0085] This application also provides a non-transitory computer-readable storage medium storing instructions. When executed by one or more processors, these instructions cause an electronic device to perform one or more of the methods described in the above embodiments.

[0086] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0087] In the several embodiments provided in this application, it should be understood that the disclosed apparatus can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the shown or discussed mutual couplings or direct couplings or communication connections may be through some service interfaces; indirect couplings or communication connections between apparatuses or units may be electrical or other forms.

[0088] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0089] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0090] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage device (CMD). Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned memory includes various media capable of storing program code, such as USB flash drives, portable hard drives, magnetic disks, or optical disks.

[0091] The foregoing description is merely an exemplary embodiment of this disclosure and should not be construed as limiting the scope of this disclosure. Any equivalent changes and modifications made in accordance with the teachings of this disclosure shall still fall within the scope of this disclosure. Those skilled in the art will readily conceive of other embodiments of this disclosure upon considering the specification and the disclosure of practical truth. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not described in this disclosure. The specification and embodiments are considered exemplary only, and the scope and spirit of this disclosure are defined by the claims.

Claims

1. A method for verifying a three-phase transformer load cell, characterized in that, The method includes: Obtain the calibration parameters and calibration type of the three-phase mutual inductor load box under test, and perform system initialization and self-test processing according to the calibration parameters. After the self-test is passed, start the pre-safety protection logic to establish a safe working environment. Under the constraints of the safe working environment, a safe low-voltage excitation signal is output, and the transformer output range, voltage sampling range, and current sampling range are configured. At the same time, the current phase circuit in the test phase sequence is switched in to perform an exploratory measurement. The sampled signal in the current phase circuit is acquired, and multiple sampling averaging and frequency domain analysis are performed to calculate the impedance characteristic parameters of the tested three-phase transformer load box, and the validity of the sampled signal is determined. When the sampling signal does not meet the valid conditions, the fault recovery mechanism is executed and the sampling level and test voltage are adjusted to perform a secondary trial measurement. At the same time, the level switching is performed in a preset sequence. When the sampled signal meets the valid conditions, adaptive range selection is performed according to the impedance characteristic parameters, and the target range combination is locked. At the same time, procedural testing or fixed-point testing is performed according to the verification type to obtain verification data. After completing the current phase circuit test, the phase is switched according to the test phase sequence, and exploratory measurements and test processing are performed until the phase verification is completed, so as to generate a verification report of the tested three-phase transformer load box containing the verification data.

2. The calibration method for the three-phase transformer load cell according to claim 1, characterized in that, The process involves acquiring the calibration parameters and calibration type of the tested three-phase transformer load cell, performing system initialization and self-test based on the calibration parameters, and activating pre-safety protection logic after the self-test passes to establish a safe working environment. Specifically, this includes: A verification task is established through a human-computer interaction interface, and the verification parameters and verification type are entered. The verification parameters include the rated voltage range, rated current range, test phase sequence, and blind test probe voltage threshold. The verification parameters are subjected to format and range verification. After the verification parameters pass the verification, a verification task identifier is generated and the verification task identifier is bound to the verification parameters to form a verification task data structure. The system initialization process is initiated based on the verification task data structure, and the module self-test process is executed sequentially. After the module self-test process passes, the pre-safety protection logic is initiated. The short-circuit protection relay of the current sampling circuit is closed to form a short-circuit protection path, and the protection relay of the voltage sampling circuit is controlled to enter the controlled standby state to establish the safe working environment.

3. The verification method for the three-phase transformer load cell according to claim 1, characterized in that, Under the constraints of the safe working environment, a safe low-voltage excitation signal is output, and the transformer output tap, voltage sampling tap, and current sampling tap are configured. Simultaneously, the current phase circuit in the test phase sequence is switched in to perform an exploratory measurement, specifically including: The system reads and verifies the verification parameters bound to the task identifier, and generates a trial measurement configuration instruction set based on these parameters. This trial measurement configuration instruction set is used to constrain the output upper limit of the programmable power module, the candidate set of transformer output ranges, the candidate set of voltage sampling ranges, the candidate set of current sampling ranges, and the current phase circuit switching order. Based on the rated voltage range and rated current range in the verification parameters, the transformer output tap, voltage sampling tap, and current sampling tap are pre-configured to form the initial trial measurement tap combination; A relay matrix control sequence is generated based on the current phase identifier in the test phase sequence. After confirming that the non-target phase circuit remains open and the safety protection circuit is in an effective protection state, the relay matrix is ​​driven to switch into the current phase circuit. After the current phase circuit is switched in, the programmable power module is controlled to output a safe low voltage excitation signal under the blind test probe voltage threshold constraint, and a trial measurement is performed on the current phase circuit under the action of the first trial measurement range combination.

4. The calibration method for the three-phase transformer load cell according to claim 1, characterized in that, The process of acquiring the sampled signal in the current phase circuit and performing multiple sampling averaging and frequency domain analysis to calculate the impedance characteristic parameters of the tested three-phase transformer load box, and simultaneously determining the validity of the sampled signal, specifically includes: After establishing a trial measurement path in the current phase loop, the voltage response and current response in the current phase loop are synchronously sampled to form voltage sampling signals and current sampling signals; Multiple rounds of repeated sampling are performed around the same current phase circuit, the same gear combination, and the same trial excitation conditions to obtain a candidate sampled signal dataset. Discreteness discrimination processing is performed on the candidate sampled signal dataset to eliminate abnormal sampling results. At the same time, average fusion processing is performed on the remaining candidate sampled signal dataset to obtain an average sampled signal. Frequency domain analysis is performed on the average sampled signal to identify the dominant frequency response component and suppress interference components, thereby obtaining a purified sampled signal; Based on the purified sampling signal, a set of impedance characteristic parameters corresponding to the current phase circuit is generated. At the same time, sampling signal validity discrimination processing is performed around signal amplitude validity, signal stability, and signal consistency to determine whether the purified sampling signal constitutes a valid sampling signal. When the valid sampling signal is established, the impedance characteristic parameters are output.

5. The verification method for the three-phase transformer load cell according to claim 1, characterized in that, When the sampling signal does not meet the valid conditions, a fault recovery mechanism is executed, and the sampling level and test voltage are adjusted for a second trial measurement. Simultaneously, level switching is performed according to a preset sequence, specifically including: After determining that the sampling signal does not meet the valid conditions, an abnormal handling record is generated that is bound to the current phase identifier, sampling task identifier, and gear combination identifier, and the abnormal type is classified according to the amplitude state, fluctuation state, and channel correspondence of the sampling signal. Before performing gear switching, control the programmable power module to stop probing excitation output, and confirm that the current sampling circuit remains in short-circuit protection state and the voltage sampling circuit is in controlled standby state. Based on the type of anomaly, the voltage sampling range, current sampling range, and transformer output range are adjusted. During the adjustment process, the range switching is completed in a preset sequence: the current path is kept short-circuited and then the current sampling range is switched; the voltage path is disconnected and then the target voltage sampling range is connected; and the transformer output range is switched after the sampling range is stabilized. After completing the sampling level adjustment, the test voltage is adjusted incrementally or decrementally according to the type of anomaly to form a secondary test voltage configuration. The programmable power supply module is then controlled to re-output the test excitation according to the secondary test voltage configuration to establish secondary test measurement conditions, thereby acquiring a new sampling signal and re-performing the sampling signal validity judgment process.

6. The calibration method for the three-phase transformer load cell according to claim 1, characterized in that, When the sampled signal meets the valid condition, adaptive range selection is performed based on the impedance characteristic parameters, and the target range combination is locked. Simultaneously, procedural testing or fixed-point testing is performed according to the verification type to obtain verification data, specifically including: Mark the impedance characteristic parameter corresponding to the current phase circuit as the effective impedance characteristic parameter, and bind and store the effective impedance characteristic parameter with the current phase identifier, sampling task identifier, and gear combination identifier; Based on the effective impedance characteristic parameters, the set of verification parameters, and the verification type, a joint screening process is performed on the candidate set of transformer output taps, the candidate set of voltage sampling taps, and the candidate set of current sampling taps. The tap combination that meets the safety constraints, response resolution requirements, and stability requirements is selected as the target tap combination from the candidate tap combinations. After stopping the test excitation and confirming that the output has fallen back to a safe state, the transformer output range, voltage sampling range, and current sampling range are switched from the test measurement range combination to the target range combination in a preset sequence and locked. After the target gear combination is locked, a test execution sequence is generated according to the verification type, and the programmable power supply module is controlled to output the corresponding voltage excitation or current excitation. At the same time, the multi-gear signal sampling system is controlled to synchronously sample the current phase circuit and process the sampling results to generate verification parameters.

7. The calibration method for the three-phase transformer load cell according to claim 1, characterized in that, After completing the current phase circuit test, the phase is switched according to the test phase sequence, and trial measurements and testing are performed until the phase verification is completed, so as to generate a verification report of the tested three-phase transformer load box containing the verification data, specifically including: After the current phase circuit forms a set of verification data, the programmable power supply module is controlled to stop the excitation output, and the voltage sampling circuit is put into a controlled standby state while the current sampling circuit is kept in a short-circuit protection state. Based on the test phase sequence and the completed phase set, the next phase identifier is determined, and the relay matrix of the three-phase automatic switching module is controlled to disconnect the current phase circuit and switch to the next phase circuit. After confirming that the next phase circuit is the only access circuit, the trial measurement, sampling signal processing, sampling signal validity judgment, adaptive gear selection, and procedure test or fixed-point test processing are repeatedly performed around the next phase circuit to form the verification data set of the corresponding phase circuit. The trial measurement records, gear selection records, verification data sets, and protection status records corresponding to each phase circuit are collected to form a phase result set. After the phases in the test phase sequence have been verified, a verification report containing the verification data and phase process records of each phase is generated based on the phase result set.

8. A calibration system for a three-phase mutual inductor load cell, characterized in that, The system is used to perform the verification method for the three-phase mutual inductor load cell as described in any one of claims 1 to 7. The system includes an acquisition module and a processing module, wherein... The acquisition module is used to acquire the verification parameters and verification type of the three-phase mutual inductor load box under test, and to perform system initialization and self-test processing according to the verification parameters. After the self-test is passed, the pre-safety protection logic is started to establish a safe working environment. The processing module is used to output a safe low-voltage excitation signal under the constraints of the safe working environment, and configure the transformer output tap, voltage sampling tap, and current sampling tap, while simultaneously switching into the current phase circuit in the test phase sequence to perform exploratory measurements. The acquisition module is also used to acquire the sampled signal in the current phase circuit, and perform multiple sampling averaging and frequency domain analysis to calculate the impedance characteristic parameters of the tested three-phase transformer load box, and at the same time determine the validity of the sampled signal; The processing module is also used to execute a fault recovery mechanism and adjust the sampling level and trial voltage to perform a secondary trial measurement when the sampling signal does not meet the valid conditions, while performing level switching in a preset order. The processing module is also used to perform adaptive range selection based on the impedance characteristic parameters and lock the target range combination when the sampled signal meets the valid conditions, and perform procedural testing or fixed-point testing according to the verification type to obtain verification data. The processing module is further configured to, after completing the current phase circuit test, switch phases according to the test phase sequence and perform exploratory measurements and test processing until the phase verification is completed, so as to generate a verification report of the tested three-phase transformer load box containing the verification data.

9. An electronic device, characterized in that, The electronic device includes a processor, a memory, a user interface, and a network interface. The memory is used to store instructions. The user interface and the network interface are both used to communicate with other devices. The processor is used to execute the instructions stored in the memory to cause the electronic device to perform the method as described in any one of claims 1 to 7.

10. A non-transitory computer-readable storage medium, characterized in that, The non-transitory computer-readable storage medium stores instructions that, when executed, perform the method as described in any one of claims 1 to 7.

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