FPGA-based dual-frequency resonance locking system of NMOR atomic magnetometer

Abstract

The application relates to the technical field of magnetic field measurement, in particular to a double-frequency resonance locking system of an NMOR atomic magnetometer based on FPGA, which comprises an FPGA, a laser modulation driving unit and a signal acquisition and processing unit, a homologous synchronous reference signal source, a first demodulation branch and a second demodulation branch are arranged in the FPGA, signals corresponding to a single Larmor frequency and double Larmor frequency are synchronously demodulated respectively to obtain corresponding in-phase signals and quadrature signals. The FPGA determines corresponding weight coefficients according to the output signals of the two demodulation branches, fuses corresponding frequency correction amounts and obtains a frequency control amount to adjust the laser modulation frequency. The system is also provided with a frequency sweeping and peak searching logic and a host computer parameter configuration module. The application is used for realizing that there is always a feedback signal with sufficient signal-to-noise ratio in the whole space range, so that the measurement blind area of the single-frequency NMOR magnetometer is eliminated.

Description

Technical Field

[0001] This invention relates to the field of magnetic field measurement technology, specifically to a dual-frequency resonance locking system for an FPGA-based NMOR atomic magnetometer. Background Technology

[0002] Atomic magnetometers based on the nonlinear magneto-optical rotation effect have shown great application potential in precision measurement fields such as geomagnetic navigation, space magnetic field detection, and biological weak magnetic induction due to their advantages of simple structure, high sensitivity, and wide measurement range. In order to maintain the stable operation of the magnetometer in dynamic environments, it is usually necessary to use an electronic control system to lock the modulation frequency of the laser in real time to the Larmor precession frequency of alkali metal atoms and its second harmonic, thereby achieving tracking of the environmental magnetic field.

[0003] However, traditional NMOR atomic magnetometers mostly employ a single-frequency resonant detection structure, with the detection signal primarily concentrated at twice the Larmor precession frequency. When the direction of the external magnetic field to be measured is at a specific angle to the laser optical axis, the amplitude of the resonant signal will significantly attenuate, causing the system to enter a measurement dead zone and consequently leading to instability in the locking loop. Although elliptically polarized light can simultaneously excite resonant signals corresponding to both the first and second Larmor frequencies, existing systems typically employ a single-channel analog demodulation structure or an external lock-in amplifier, making it difficult to synchronously demodulate and fuse the first and second Larmor frequency signals. Furthermore, when the single-channel signal attenuates, existing systems lack real-time amplitude monitoring and weight allocation mechanisms for dual-frequency signals, failing to dynamically adjust the feedback control quantity according to the state of different frequency signals. This results in frequency loss of lock and discontinuous locking issues when the magnetic field direction changes. Therefore, it is necessary to propose an FPGA-based dual-frequency resonant locking system for NMOR atomic magnetometers. Summary of the Invention

[0004] The purpose of this invention is to provide a dual-frequency resonance locking system for an NMOR atomic magnetometer based on FPGA to solve the above-mentioned technical problems, thereby achieving a feedback signal with a sufficient signal-to-noise ratio that is always present in the entire space range, thus eliminating the measurement blind zone of a single-frequency NMOR magnetometer.

[0005] The objective of this invention can be achieved through the following technical solutions: A dual-frequency resonance locking system for an FPGA-based NMOR atomic magnetometer includes: FPGA; A laser modulation drive unit, connected to an FPGA, is used to drive an electro-optic modulator to modulate the laser according to the modulation signal output by the FPGA. The signal acquisition and processing unit, connected to the FPGA, is used to acquire photoelectric signals reflecting atomic Larmor precession information and convert them into digital signals for input to the FPGA; in, The FPGA has an internal synchronous reference signal source to generate a first reference signal and a second reference signal with a frequency ratio of 1:2. The FPGA has a first demodulation branch and a second demodulation branch. The first demodulation branch uses the first reference signal to synchronously demodulate the digital signal to obtain the in-phase signal and quadrature signal corresponding to one times the Larmor frequency. The second demodulation branch uses the second reference signal to synchronously demodulate the digital signal to obtain the in-phase signal and quadrature signal corresponding to two times the Larmor frequency. The FPGA determines the corresponding weighting coefficients based on the in-phase and quadrature signals output from the first demodulation branch and the second demodulation branch; it then fuses the frequency correction values ​​corresponding to the first and second demodulation branches based on the weighting coefficients to obtain a frequency control value; and finally adjusts the output frequency of the modulation signal based on the frequency control value.

[0006] Furthermore, the synchronous reference signal source includes a direct digital frequency synthesis module, which generates a first reference signal and a second reference signal based on the same system reference clock. The frequency of the first reference signal is the Larmor frequency, and the frequency of the second reference signal is twice the Larmor frequency.

[0007] Furthermore, the first demodulation branch includes a first multiplier and a first low-pass filter. The first multiplier multiplies the digital signal with the first reference signal, and the first low-pass filter filters the output signal of the first multiplier. The second demodulation branch includes a second multiplier and a second low-pass filter. The second multiplier multiplies the digital signal with the second reference signal, and the second low-pass filter filters the output signal of the second multiplier.

[0008] Furthermore, the FPGA is equipped with signal amplitude monitoring logic. The signal amplitude monitoring logic calculates the first signal amplitude based on the in-phase and quadrature signals output from the first demodulation branch, and calculates the second signal amplitude based on the in-phase and quadrature signals output from the second demodulation branch.

[0009] Furthermore, the FPGA has a weight allocation logic. The weight allocation logic determines the first weight coefficient and the second weight coefficient based on the first signal amplitude and the second signal amplitude. The first weight coefficient corresponds to the first demodulation branch, and the second weight coefficient corresponds to the second demodulation branch. The sum of the first weight coefficient and the second weight coefficient is 1.

[0010] Furthermore, the first demodulation branch is equipped with a first digital PID control logic, which generates a first frequency correction amount based on the quadrature signal output by the first demodulation branch; the second demodulation branch is equipped with a second digital PID control logic, which generates a second frequency correction amount based on the quadrature signal output by the second demodulation branch.

[0011] Furthermore, the FPGA is equipped with an adaptive fusion control module. The adaptive fusion control module multiplies the first frequency correction amount by the first weighting coefficient to obtain the first weighted correction amount, multiplies the second frequency correction amount by the second weighting coefficient to obtain the second weighted correction amount, and adds the first weighted correction amount and the second weighted correction amount to obtain the frequency control amount.

[0012] Furthermore, the laser modulation driving unit includes a digital-to-analog conversion module and a driving amplification module. The digital-to-analog conversion module receives the modulation signal output by the FPGA and converts it into an analog modulation signal. The driving amplification module amplifies the analog modulation signal and outputs it to the electro-optic modulator.

[0013] Furthermore, the FPGA is equipped with frequency sweep peak finding logic, which controls the modulation signal to change in a frequency step manner within a preset frequency band, and records the signal amplitude output by the first demodulation branch and the second demodulation branch. The FPGA determines the initial frequency lock point based on the recorded signal amplitude.

[0014] Furthermore, it also includes a host computer, which connects to the FPGA via a data communication interface. The host computer sends digital PID control parameters, filter bandwidth parameters, and weight allocation judgment thresholds to the FPGA, and receives the locked frequency data uploaded by the FPGA.

[0015] Compared with the prior art, the present invention has the following beneficial effects: (1) The present invention sets up dual demodulation branches corresponding to one times the Larmor frequency and two times the Larmor frequency, and combines the weight allocation logic to fuse the two frequency corrections. When the amplitude of the single-channel resonance signal decreases, the other frequency channel can still be used to maintain feedback control, thereby improving the locking continuity during the magnetic field direction change process.

[0016] (2) The present invention utilizes the internal synchronous reference signal source of the FPGA to generate a first reference signal and a second reference signal with a frequency ratio of 1:2, so that the two demodulation branches can be synchronously demodulated based on the same system reference clock, which is beneficial to improving the phase consistency in the demodulation process of dual-frequency signals.

[0017] (3) The present invention sets digital PID control logic in the two demodulation branches respectively, and performs weighted fusion of the two frequency correction quantities through the adaptive fusion control module, so that the feedback control quantity can be dynamically adjusted according to the state of the dual resonance signals, thereby improving the frequency tracking stability during the magnetic field change process.

[0018] (4) By setting up frequency sweep peak finding logic, the present invention scans the preset frequency band during the system startup phase and determines the initial frequency lock point based on the amplitude of the dual-path demodulation signal, which is beneficial to improving the stability of the system entering the closed-loop lock state.

[0019] (5) The present invention improves the stability of the dual-frequency feedback control process by setting up signal amplitude monitoring logic based on in-phase and quadrature signals, performing real-time analysis on the signal amplitude output of the dual demodulation branch, and adjusting the corresponding weight coefficients according to the analysis results. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of a dual-frequency resonance locking system for an NMOR atomic magnetometer based on FPGA, according to an embodiment of the present invention. Detailed Implementation

[0021] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments. These embodiments are based on the technical solution of the present invention and provide detailed implementation methods and specific operating procedures. However, the scope of protection of the present invention is not limited to the following embodiments.

[0022] like Figure 1 The illustrated dual-frequency resonance locking system for an FPGA-based NMOR atomic magnetometer includes: The FPGA, as the core of the system's logic control and signal processing, connects to the host computer through a data communication interface and coordinates the control of laser modulation, signal demodulation, and closed-loop feedback processes.

[0023] A laser modulation drive unit, connected to an FPGA, is used to drive an electro-optic modulator to modulate the laser according to the modulation signal output by the FPGA. The signal acquisition and processing unit, connected to the FPGA, is used to acquire photoelectric signals reflecting the Larmor precession information of atoms and convert them into digital signals for input to the FPGA. This allows for the acquisition and digital processing of the analog signals output from the photodetector. A laser beam, modulated by an electro-optic modulator, acts on the alkali metal gas cell to polarize the alkali metal atoms. Under the influence of an external magnetic field, the alkali metal atoms undergo Larmor precession. The emitted light after passing through the alkali metal gas cell is converted into a corresponding photoelectric signal by the photodetector. The signal acquisition and processing unit amplifies and performs analog-to-digital conversion on the photoelectric signal before transmitting the corresponding digital signal to the FPGA.

[0024] The FPGA internally includes a synchronous reference signal source to generate a first reference signal and a second reference signal with a frequency ratio of 1:2. The first reference signal corresponds to one times the Larmor frequency, and the second reference signal corresponds to two times the Larmor frequency. The first and second reference signals are generated based on the same system reference clock, thus providing phase-synchronized reference signals for dual-channel synchronous demodulation.

[0025] The FPGA has a first demodulation branch and a second demodulation branch. The first demodulation branch uses the first reference signal to synchronously demodulate the digital signal to obtain the in-phase signal and quadrature signal corresponding to one times the Larmor frequency. The second demodulation branch uses the second reference signal to synchronously demodulate the digital signal to obtain the in-phase signal and quadrature signal corresponding to two times the Larmor frequency. The FPGA determines the corresponding weighting coefficients based on the in-phase and quadrature signals output from the first demodulation branch and the second demodulation branch. It then fuses the frequency correction values ​​corresponding to the first and second demodulation branches based on the weighting coefficients to obtain a frequency control value. Finally, it adjusts the output frequency of the modulation signal based on the frequency control value so that the laser modulation frequency follows the change of the atomic Larmor precession frequency.

[0026] Specifically, the FPGA internally includes a phase accumulator, a frequency control word register, and a waveform lookup table. The frequency control word register stores the frequency control word corresponding to the Larmor frequency. The phase accumulator performs an accumulation operation on the frequency control word according to the system reference clock and inputs the accumulated phase data into the waveform lookup table to output the corresponding digital sine reference signal.

[0027] The FPGA integrates a dual-channel parallel digital phase-locked demodulation module, which is specifically configured as follows: the FPGA is equipped with a direct digital frequency synthesis module, which uses the same system reference clock to generate a first reference signal and a second reference signal with a frequency ratio locked at 1:2 through direct digital frequency synthesis (DDS) technology, providing a frequency synchronization reference signal for dual-channel synchronous demodulation.

[0028] Specifically, the first demodulation branch includes a first multiplier and a first low-pass filter, and the second demodulation branch includes a second multiplier and a second low-pass filter. The digital signal output from the signal acquisition and processing unit is simultaneously input to the first and second demodulation branches. In the first demodulation branch, the first multiplier performs a multiplication operation between the digital signal and a first reference signal to synchronously down-convert the signal component corresponding to one times the Larmor frequency; the first low-pass filter performs a low-pass filter on the signal output from the first multiplier to remove high-frequency components and outputs in-phase and quadrature components corresponding to one times the Larmor frequency. In the second demodulation branch, the second multiplier performs a multiplication operation between the digital signal and a second reference signal to synchronously down-convert the signal component corresponding to two times the Larmor frequency; the second low-pass filter performs a low-pass filter on the signal output from the second multiplier to remove high-frequency components and outputs in-phase and quadrature components corresponding to two times the Larmor frequency. By setting up a first demodulation branch corresponding to one times the Larmor frequency and a second demodulation branch corresponding to two times the Larmor frequency, and using the corresponding reference signal to perform synchronous down-conversion and low-pass filtering on the input digital signal, in-phase and quadrature signals of the corresponding frequencies are obtained respectively, providing the basic signals for subsequent signal amplitude analysis, weight coefficient allocation and frequency correction calculation.

[0029] Specifically, the FPGA has a signal amplitude monitoring logic. The signal amplitude monitoring logic calculates the first signal amplitude based on the in-phase and quadrature signals output from the first demodulation branch, and calculates the second signal amplitude based on the in-phase and quadrature signals output from the second demodulation branch.

[0030] Specifically, the FPGA has internal weighting logic that determines a first weighting coefficient between 0 and 1 based on the amplitudes of the first and second signals. Second weighting coefficient The formula for calculating the amplitude is: I represents the in-phase signal, and Q represents the quadrature signal. The first weighting coefficient corresponds to the first demodulation branch, and the second weighting coefficient corresponds to the second demodulation branch, where... The first and second weighting coefficients are used to characterize the reliability of each signal under the current magnetic field direction in real time. When the external magnetic field direction changes and causes the amplitude of one of the resonant signals to decrease, the weighting coefficient of the corresponding demodulation branch decreases, while the weighting coefficient of the other demodulation branch increases. This changes the proportion of the two frequency corrections in the feedback control, thereby ensuring that when a certain frequency signal is attenuated due to the magnetic field direction entering the dead zone, the system can automatically shift the feedback center to another frequency channel, improving reliability.

[0031] Specifically, the first demodulation branch is equipped with a first digital PID control logic, which generates a first frequency correction amount based on the quadrature signal output from the first demodulation branch. The second demodulation branch is equipped with a second digital PID control logic, which generates a second frequency correction value based on the quadrature signal output from the second demodulation branch. The FPGA internally incorporates an adaptive fusion control module. This module multiplies a first frequency correction by a first weighting coefficient to obtain a first weighted correction, multiplies a second frequency correction by a second weighting coefficient to obtain a second weighted correction, and then adds the first and second weighted corrections to obtain the frequency control value. By configuring the adaptive fusion control module within the FPGA, the frequency correction increments output from the two digital PID control logics are weighted and fused according to the two weighting coefficients to obtain the final frequency control value. This frequency control value adjusts the reference frequency of the FPGA's internal direct digital frequency synthesis module (DDS) in real time, thereby dynamically adjusting the frequency distribution of the superimposed modulation signal output to the electro-optic modulator (EOM), achieving closed-loop locking of the atomic precession frequency.

[0032] Specifically, the laser modulation drive unit includes a digital-to-analog converter (DAC) module and a drive amplification module. The DAC module receives the modulation signal output from the FPGA and converts it into an analog modulation signal. The drive amplification module amplifies the analog modulation signal and outputs it to the electro-optic modulator. The electro-optic modulator changes the laser modulation frequency according to the modulation signal, so that the laser modulation frequency follows the atomic Larmor precession frequency. This converts the digital modulation signal output from the FPGA into an analog modulation signal that can drive the electro-optic modulator and act on the laser modulation process.

[0033] In this embodiment, the FPGA internally incorporates frequency sweep and peak finding logic. This logic controls the modulation signal to perform frequency scanning within a preset frequency band during system startup and determines the initial frequency lock point based on the signal amplitudes output by the first and second demodulation branches. The FPGA controls the modulation signal to gradually change within the preset frequency band according to preset frequency step values. At each frequency step position, the FPGA acquires the first signal amplitude output by the first demodulation branch and the second signal amplitude output by the second demodulation branch, and stores the corresponding signal amplitudes. The FPGA determines the corresponding resonant peak position based on the amplitude curve formed by the first and second signal amplitudes changing with frequency, and uses the corresponding resonant peak frequency as the initial frequency lock point. After the FPGA completes the frequency sweep process, it generates corresponding frequency control parameters based on the initial frequency lock point and enters a closed-loop lock state. This achieves a smooth transition from frequency sweep mode to closed-loop lock mode by sweeping the preset frequency band and determining the corresponding resonant peak position based on the signal amplitudes output by the dual demodulation branches.

[0034] Specifically, the system also includes a host computer, which connects to the FPGA via a data communication interface. The host computer sends digital PID control parameters, filter bandwidth parameters, and weight allocation thresholds to the FPGA via the data communication interface. The FPGA configures the first digital PID control logic, the second digital PID control logic, and the weight allocation logic based on the received parameters. The FPGA uploads locked frequency data to the host computer via the data communication interface, and the host computer receives, displays, and stores the locked frequency data. In this embodiment, the host computer has a graphical monitoring interface, which displays the signal amplitude output from the first demodulation branch, the signal amplitude output from the second demodulation branch, and the corresponding locked frequency data.

[0035] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0036] It should be noted that the terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in sequences other than those illustrated or described herein.

[0037] The present invention has been further described above with reference to specific embodiments. However, it should be understood that the specific description herein should not be construed as limiting the nature and scope of the present invention. Various modifications made to the above embodiments by those skilled in the art after reading this specification are all within the scope of protection of the present invention.

Claims

1. A dual-frequency resonance locking system for an FPGA-based NMOR atomic magnetometer, characterized in that, include: FPGA; A laser modulation driving unit, connected to the FPGA, is used to drive an electro-optic modulator to modulate the laser according to the modulation signal output by the FPGA; The signal acquisition and processing unit, connected to the FPGA, is used to acquire photoelectric signals reflecting atomic Larmor precession information and convert them into digital signals for input to the FPGA. in, The FPGA is equipped with a synchronous reference signal source to generate a first reference signal and a second reference signal with a frequency ratio of 1:

2. The FPGA is internally configured with a first demodulation branch and a second demodulation branch. The first demodulation branch uses the first reference signal to synchronously demodulate the digital signal to obtain an in-phase signal and a quadrature signal corresponding to one times the Larmor frequency. The second demodulation branch uses the second reference signal to synchronously demodulate the digital signal to obtain an in-phase signal and a quadrature signal corresponding to two times the Larmor frequency. The FPGA determines corresponding weighting coefficients based on the in-phase and quadrature signals output from the first demodulation branch and the in-phase and quadrature signals output from the second demodulation branch; it then fuses the frequency correction amounts corresponding to the first and second demodulation branches based on the weighting coefficients to obtain a frequency control amount; and adjusts the output frequency of the modulation signal based on the frequency control amount.

2. The dual-frequency resonance locking system for an FPGA-based NMOR atomic magnetometer according to claim 1, characterized in that, The co-source synchronous reference signal source includes a direct digital frequency synthesis module, which generates the first reference signal and the second reference signal based on the same system reference clock. The frequency of the first reference signal is the Larmor frequency, and the frequency of the second reference signal is twice the Larmor frequency.

3. The dual-frequency resonance locking system for an FPGA-based NMOR atomic magnetometer according to claim 2, characterized in that, The first demodulation branch includes a first multiplier and a first low-pass filter. The first multiplier multiplies the digital signal with the first reference signal, and the first low-pass filter filters the output signal of the first multiplier. The second demodulation branch includes a second multiplier and a second low-pass filter. The second multiplier multiplies the digital signal with the second reference signal, and the second low-pass filter filters the output signal of the second multiplier.

4. The dual-frequency resonance locking system for an FPGA-based NMOR atomic magnetometer according to claim 1, characterized in that, The FPGA is equipped with signal amplitude monitoring logic. The signal amplitude monitoring logic calculates a first signal amplitude based on the in-phase and quadrature signals output from the first demodulation branch, and calculates a second signal amplitude based on the in-phase and quadrature signals output from the second demodulation branch.

5. A dual-frequency resonance locking system for an FPGA-based NMOR atomic magnetometer according to claim 4, characterized in that, The FPGA is internally configured with weight allocation logic. The weight allocation logic determines a first weight coefficient and a second weight coefficient based on the amplitude of the first signal and the amplitude of the second signal. The first weight coefficient corresponds to the first demodulation branch, and the second weight coefficient corresponds to the second demodulation branch. The sum of the first weight coefficient and the second weight coefficient is 1.

6. A dual-frequency resonance locking system for an FPGA-based NMOR atomic magnetometer according to claim 5, characterized in that, The first demodulation branch is equipped with a first digital PID control logic, which generates a first frequency correction amount based on the quadrature signal output by the first demodulation branch; the second demodulation branch is equipped with a second digital PID control logic, which generates a second frequency correction amount based on the quadrature signal output by the second demodulation branch.

7. A dual-frequency resonance locking system for an FPGA-based NMOR atomic magnetometer according to claim 6, characterized in that, The FPGA is equipped with an adaptive fusion control module. The adaptive fusion control module multiplies the first frequency correction amount by the first weighting coefficient to obtain a first weighted correction amount, multiplies the second frequency correction amount by the second weighting coefficient to obtain a second weighted correction amount, and adds the first weighted correction amount and the second weighted correction amount to obtain the frequency control amount.

8. The dual-frequency resonance locking system for an FPGA-based NMOR atomic magnetometer according to claim 1, characterized in that, The laser modulation driving unit includes a digital-to-analog conversion module and a driving amplification module. The digital-to-analog conversion module receives the modulation signal output by the FPGA and converts it into an analog modulation signal. The driving amplification module amplifies the analog modulation signal and outputs it to the electro-optic modulator.

9. A dual-frequency resonance locking system for an FPGA-based NMOR atomic magnetometer according to claim 1, characterized in that, The FPGA is equipped with a frequency sweep peak finding logic, which controls the modulation signal to change in a frequency step manner within a preset frequency band and records the signal amplitude output by the first demodulation branch and the second demodulation branch. The FPGA determines the initial frequency lock point based on the recorded signal amplitude.

10. A dual-frequency resonance locking system for an FPGA-based NMOR atomic magnetometer according to claim 1, characterized in that, It also includes a host computer, which is connected to the FPGA through a data communication interface. The host computer sends digital PID control parameters, filter bandwidth parameters and weight allocation judgment thresholds to the FPGA, and receives the locked frequency data uploaded by the FPGA.

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