Multi-phase constant-on-time controller and power converter employing the same

Abstract

A multi-phase constant-on-time controller and a power converter employing the same are disclosed. In the power converter, a phase controller divides a full COT control signal into a master COT control signal and at least one slave COT control signal. The master COT control signal triggers a master PWM signal generator to generate a master PWM signal accordingly, and each slave COT control signal triggers a corresponding slave PWM signal generator to generate a slave PWM signal for a corresponding slave driver by comparing a sensed current of a master driver with a sensed current of the corresponding slave driver, thereby adjusting a pulse width of the corresponding slave COT control signal. Subsequently, the master driver provides a master current output for a load device according to the master PWM signal, and each slave driver provides a slave current output for the load device according to the corresponding slave PWM signal.

Description

Technical Field

[0001] This invention relates to a multi-phase constant on-time (COT) controller and a power converter. More specifically, this invention relates to a multi-phase COT controller for multi-phase interleaving operation of a power converter, and a power converter incorporating the multi-phase COT controller. Background Technology

[0002] COT (Cyclic-Operated) is a control scheme in which the turn-on time of a switch (e.g., a transistor) remains constant, while the turn-off time varies according to load conditions. When dealing with multi-phase power converters, i.e., multi-phase circuits containing multiple power stages (phases) working together, maintaining consistency across the power converter stages to reduce ripple (i.e., current balance) is particularly important, especially when the sensed currents at each stage differ. Therefore, there is a pressing need in the technical field of this invention for a good solution for multi-phase interleaved operation of COT-based power converters. Summary of the Invention

[0003] To address at least the aforementioned problems, the present invention provides a multi-phase COT controller. The multi-phase COT controller may include a master PWM signal generator for a master driver, at least one slave PWM signal generator for at least one slave driver, and a phase controller. The phase controller is electrically connected to the master PWM signal generator and each slave PWM signal generator, and is configured to split a complete COT control signal into a master COT control signal and at least one slave COT control signal. The master COT control signal is configured to trigger the master PWM signal generator, and each slave COT control signal is configured to trigger a corresponding slave PWM signal generator. The master PWM signal generator may be configured to generate a master PWM signal based on the master COT control signal, and each slave PWM signal generator may be configured to generate a slave PWM signal by adjusting the pulse width of each pulse of the corresponding slave COT control signal by comparing a sensed current of the master driver with a sensed current of the corresponding slave driver.

[0004] To address at least the aforementioned problems, the present invention also provides a power converter. The power converter may include a master driver, at least one slave driver, a master PWM signal generator for the master driver, at least one slave PWM signal generator for each of the at least one slave driver, and a phase controller. The master driver may be configured to provide a master current output to a load device based on a master PWM signal. The at least one slave driver may be electrically connected to the master driver, and each slave driver may be configured to provide a slave current output to the load device based on a corresponding slave PWM signal. The phase controller may be electrically connected to the master driver, the master PWM signal generator, and each slave PWM signal generator, and is configured to split a complete COT control signal into a master COT control signal and at least one slave COT control signal. The master COT control signal is configured to trigger the master PWM signal generator, and each slave COT control signal is configured to trigger a corresponding slave PWM signal generator. The master PWM signal generator can be electrically connected to the master driver and is configured to generate the master PWM signal according to the master COT control signal, while each slave PWM signal generator can be configured to generate a corresponding slave PWM signal by comparing a sensed current of the master driver with a sensed current of the corresponding slave driver and adjusting the pulse width of each pulse of the corresponding slave COT control signal.

[0005] This invention balances the current output provided by multiple phases / channels (i.e., the master driver and at least one slave driver) by comparing the sensed current of the master driver and each slave driver and adjusting the pulse width of the corresponding COT control signal. This not only maintains the COT characteristics of each phase / channel but also provides current balancing functionality. Furthermore, this invention offers superior performance in reducing ripple effects, improving thermal management, and increasing efficiency.

[0006] The introductory paragraph describes the core concepts of the invention, covering the problem to be solved, the method for solving the problem, and the effects of the invention, so that those skilled in the art can have a basic understanding of the invention. However, it should be understood that this introductory paragraph is not intended to cover all embodiments of the invention, but only to present the core concepts of the invention in a concise form and as a basic introduction to the following description paragraphs. Detailed technical and preferred embodiments of the invention will be described in subsequent paragraphs with accompanying drawings to enable those skilled in the art to fully understand the features of the claimed invention. Attached Figure Description

[0007] The accompanying drawings are provided to illustrate embodiments of the present invention, wherein:

[0008] Figure 1This is a schematic diagram of a power converter and its multi-phase COT controller according to one or more embodiments of the present invention.

[0009] Figure 2 for Figure 1 A more detailed schematic diagram of the power converter and multi-phase COT controller shown;

[0010] Figure 3 This is a schematic diagram of signal transmission in a power converter according to one or more embodiments of the present invention; and

[0011] Figure 4 This is a schematic diagram of a PWM signal generator and a corresponding part of a phase controller that controls the PWM signal generator, according to one or more embodiments of the present invention.

[0012] Figures 1 to 4 The contents shown are for illustrative purposes only and are not intended to limit the scope of the invention.

[0013] [Symbol Explanation]

[0014] 1: Power Converter

[0015] 11: Main drive

[0016] 11a: COT controller

[0017] 11b: Main current sensor

[0018] 11c: PWM driver

[0019] 12_1~12_n: From the driver

[0020] 12_1a: From current sensor

[0021] 12_1b: PWM driver

[0022] 13: Multi-phase COT controller

[0023] 131: Main PWM signal generator

[0024] 132_1~132_n: From PWM signal generator

[0025] 132_1a: Comparator

[0026] 132_1b: Up / Down Counter

[0027] 132_1c: Pulse Width Regenerator

[0028] 133: Phase Controller

[0029] 133a: Counter

[0030] 133b: Demultiplexer

[0031] 133c: Reset Signal Generator

[0032] 133d: Counter

[0033] 2: Load device

[0034] CF1: Complete COT control signal

[0035] CLK: Clock signal

[0036] CNT: Signal

[0037] CS11: Sensing Current

[0038] CS21~CS2n sensing current

[0039] CSM1: Main COT control signal

[0040] CSS1~CSSn: Control signals from COT

[0041] DW1: Pulse width reduction signal

[0042] FB: Feedback Signal

[0043] MO1: Main current output

[0044] P1: Main PWM signal

[0045] P21~P2n: From PWM signals

[0046] PR: Comparison Results

[0047] RST: Reset signal

[0048] SEL: Selection signal

[0049] SO_1~SO_n: Output from current

[0050] UP1: Pulse width increase signal

[0051] VT: Current Output

[0052] Z1: Inverter

[0053] Z2: PMOS transistor

[0054] Z3: NMOS transistor

[0055] Z4: Power Supply

[0056] Z5: Capacitor

[0057] Z6: Reverse Schmitt trigger

[0058] Z7: Inverter Detailed Implementation

[0059] The embodiments disclosed below are not intended to limit the claimed invention to any particular environment, application, structure, process, or situation. In the drawings, elements not directly related to the invention have been omitted. The dimensions of the elements in the drawings and their dimensional relationships are merely illustrative examples and are not intended to limit the claimed invention. Unless otherwise stated, the same element numbers may correspond to the same elements in the following description and will not be inconsistent with the claimed invention.

[0060] The terminology used herein is for descriptive purposes only and is not intended to limit the claimed invention. The singular form “a” may also include the plural form unless the context clearly indicates otherwise. The terms “comprising,” “including,” etc., specify the presence of the stated features, numbers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, numbers, steps, operations, elements, components, and / or combinations thereof. The term “and / or” includes any and all combinations of the listed items. Although the terms “first,” “second,” “third,” etc., may be used herein to describe various elements, these elements should not be limited to these terms alone. These terms are used only to distinguish one element from another. Thus, for example, the first element described herein in sequence may also be referred to as the “second” element without departing from the spirit and scope of the claimed invention.

[0061] Please see Figure 1 The first embodiment of the present invention may be a power converter 1. The power converter 1 may substantially include a master driver 11, at least one slave driver (hereinafter referred to as "slave driver 12_1~12_n"), and a multi-phase COT controller 13 connected to the master circuit 11 and the at least one slave circuit. Each slave driver 12_1~12_n may be electrically connected to the master driver 11.

[0062] The power converter 1 can be used to provide a current output VT to the load device 2. The current output VT may include a main current output MO1 provided by the main driver 11 and at least one slave current output (hereinafter referred to as "slave current output SO_1~SO_n") provided by the slave drivers 12_1~12_n. To provide such a current output, the main driver 11 can provide a complete COT control signal CF1 to the multi-phase COT controller 13, and the multi-phase COT controller 13 can process the complete COT control signal CF1 to provide a main PWM signal P1 to the main driver 11, and provide at least one slave PWM signal (hereinafter referred to as "slave PWM signal P21~P2n") to the slave drivers 12_1~12_n respectively. Then, the main driver 11 can be used to provide the main current output MO1 to the load device 2 according to the main PWM signal P1, while the slave drivers 12_1~12_n provide slave current output SO_1~SO_n to the load device 2 according to the corresponding slave PWM signals P21~P2n respectively.

[0063] Please see Figure 1 and Figure 2 The master driver 11 may include a COT controller 11a, a master current sensor 11b, and a PWM driver 11c. Taking the slave driver 12_1 as an example, each slave driver 12_1 to 12_n may include a slave current sensor 12_1a and a PWM driver 12_1b. As for the multi-phase COT controller 13, it may include a master PWM signal generator 131, at least one slave PWM signal generator (hereinafter referred to as "slave PWM signal generators 132_1 to 132_n"), and a phase controller 133. The slave PWM signal generators 132_1 to 132_n correspond to the slave drivers 12_1 to 12_n, respectively.

[0064] Taking the PWM signal generator 132_1 as an example, each PWM signal generator 132_1~132_n may include a comparator 132_1a, an up / down counter 132_1b, and a pulse width regenerator 132_1c.

[0065] The phase controller 133 may generally include a counter 133a, a demultiplexer 133b, and a reset signal generator 133c. The counter 133a may be electrically connected to the COT controller 11a and the demultiplexer 133b. In some embodiments, the phase controller 133 may further include another counter 133d, which is electrically connected to the COT controller 11a and each of the up and down counters from the PWM signal generators 132_1 to 132_n.

[0066] Please see Figure 3 and for reference Figure 1 and Figure 2 . Figure 3 The diagram shows a signal configuration where power converter 1 includes a master driver and a slave driver. This is for the purpose of illustrating the transition between the master and slave drivers and the corresponding signals, and is not a limitation on the number of drivers that power converter 1 can have.

[0067] The COT controller 11a can be used to generate the complete COT control signal CF1, which is initially used to control the PWM signal generator of the single-phase power converter to generate a PWM signal. For example... Figure 3 As shown, a complete COT control signal CF1 can contain a series of pulses with the same pulse width, which is consistent with the concept of COT.

[0068] However, for COT control of a multi-phase power converter such as power converter 1, the complete COT control signal CF1 can be split by the phase controller 133 into multiple COT control signals corresponding to the master PWM signal generator 131 and the slave PWM signal generators (slave PWM signal generators 132_1~132_n). The multiple COT control signals may include the master COT control signal CSM1 and at least one slave COT control signal (hereinafter referred to as "slave COT control signals CSS1~CSSn").

[0069] Generally speaking, the master COT control signal CSM1 can be used to trigger the master PWM signal generator 131, while the slave COT control signals CSS1~CSSn can be used to trigger the corresponding slave PWM signal generators 132_1~132_n.

[0070] In some implementations, the COT controller 11a may accept the current output VT from the power converter 1 as a feedback signal FB, and generate or adjust the complete COT control signal CF1 based on the feedback signal FB.

[0071] To decompose the complete COT control signal CF1 into multiple COT control signals, the COT controller 11a can be electrically connected to the counter 133a and the demultiplexer 133b, and the complete COT control signal CF1 is provided to the counter 133a and the demultiplexer 133b. The counter 133a can generate a selection signal SEL based on the complete COT control signal CF1 as a clock signal. The selection signal SEL can indicate a series of numbers used to sequentially select the phase. These numbers can be binary numbers, decimal numbers, hexadecimal numbers, etc. For example, such as... Figure 3 As shown, the selection signal SEL represents the binary digits "0" and "1".

[0072] Figure 3The signal CNT displayed represents the count of the select signal SEL, where "0" represents the master phase and "1" represents the slave phase. In some other embodiments, the select signal may represent, for example, a binary digit from "00" to "11", where the count digit "00" may represent the master phase, and the count digits "01", "10", and "11" may respectively represent the three slave phases corresponding to the three slave drivers. The count of the select signal SEL may start from the number corresponding to the master phase, for example in... Figure 3 The case shown is "0", which means that the master drive 11 will start before the slave drives 12_1~12_n.

[0073] The demultiplexer 133b is electrically connected to the counter 133a, the master PWM signal generator 131, and the slave PWM signal generators (e.g., slave PWM signal generators 132_1 to 132_n), and generates a master COT control signal CSM1 and a slave COT control signal CSS1 according to the selection signal SEL. The master COT control signal CSM1 is supplied to the master PWM signal generator 131, and the slave COT control signal (e.g., slave COT control signal CSS1) is supplied to the corresponding slave PWM signal generator (e.g., slave PWM signal generator 132_1) so that they generate their respective PWM signals accordingly. In some embodiments, the pulses in the master COT control signal CSM1 and the slave COT control signals CSS1 to CSSn may have the same pulse width as the pulses in the complete COT control signal CF1.

[0074] The reset signal generator 133c can be electrically connected to the counter 133a and generate a reset signal RST for the counter 133a, switching it from the last slave phase back to the master phase.

[0075] The comparator in each slave PWM signal generator can be electrically connected to the main current sensor 11b and the slave current sensor to which the slave PWM signal generator belongs. The main current sensor 11b can be configured to provide the sensing current CS11 of the main driver 11, and each slave current sensor can be configured to provide the sensing current of its corresponding slave driver and provide this signal to the corresponding slave PWM signal generator. Therefore, the comparator in each slave PWM signal generator can compare the sensing current of the corresponding slave driver with the sensing current CS11 in the main driver 11 and provide the comparison result to the corresponding up / down counter.

[0076] Each up / down counter can be electrically connected to a corresponding comparator to receive the comparison result. Each up / down counter can also be electrically connected to a corresponding pulse width generator, which belongs to the same slave PWM signal generator and provides it with pulse width adjustment information. Furthermore, each up / down counter can be electrically connected to another counter 133d of the phase controller 133 to receive the clock signal CLK from counter 133d. Figure 3 (Not shown in the diagram). The clock signal CLK can be provided by counter 133d based on the complete COT control signal CF1.

[0077] Each pulse width regenerator can be electrically connected to the demultiplexer 133b to receive a corresponding slave COT control signal CSS1 and adjust the width of each pulse in the received slave COT control signal CSS1 according to pulse width adjustment information. The pulse width adjustment information may include a pulse width increase signal when the sensed current of the corresponding slave driver is weaker than the sensed current CS11 of the master driver 11, meaning that this particular slave phase requires a longer on-time to achieve current balance between phases. Conversely, when the sensed current of the corresponding slave driver is stronger than the sensed current CS11 of the master driver 11, the pulse width adjustment information may include a pulse width decrease signal, meaning that this particular phase can have a shorter on-time.

[0078] In some implementations, the pulse width adjustment information may further include one or more instructions for operating each pulse width regenerator.

[0079] Each adjusted COT control signal can be output as a slave PWM signal by the corresponding pulse width regenerator and transmitted to the corresponding PWM driver. The PWM driver in each slave driver can be electrically connected to the corresponding pulse width regenerator, receive the slave PWM signal, and provide the corresponding slave current output to the load device 2 according to the received slave PWM signal.

[0080] In some embodiments, in addition to increasing or decreasing the width of each pulse in the corresponding slave COT control signal, the pulse width regenerator can maintain the current pulse width of the corresponding slave COT control signal when the sensed current of the corresponding slave driver is equal to the sensed current CS11 of the master driver 11.

[0081] like Figure 1As shown, the current sensors in the drivers 12_1 to 12_n can provide sensing currents CS21 to CS2n to the corresponding slave PWM signal generators 132_1 to 132_n, respectively. However, this example only uses the driver 12_1 and its corresponding slave PWM signal generator 132_1. Those skilled in the art can understand the similar operation of other slave drivers and their corresponding slave PWM signal generators based on the following description of the driver 12_1 and its corresponding slave PWM signal generator 132_1. Figure 2 As shown, comparator 132_1a can first receive the sensed current CS11 from the main current sensor 11b and the sensed current CS21 from the slave current sensor 12_1a. Then, comparator 132_1a can compare the sensed current CS21 with the sensed current CS11 and provide the comparison result PR to the up / down counter 132_1b.

[0082] When the comparison result PR shows that the sensed current CS21 of the slave driver 12_1 is weaker than the sensed current CS11 of the master driver 11, the up-down counter 132_1b generates a pulse width increase signal UP1. Conversely, when the comparison result PR shows that the sensed current CS21 of the slave driver 12_1 is stronger than the sensed current CS11 of the master driver 11, the up-down counter 132_1b generates a pulse width decrease signal DW1.

[0083] The pulse width regenerator 132_1c can adjust the width of each pulse from the COT control signal CSS1 according to the pulse width increase signal UP1 or the pulse width decrease signal DW1. Please refer to [reference needed]. Figure 4 and with Figures 1 to 3 As an aid, a schematic diagram of the pulse width regenerator 132_1c is shown. In some embodiments, the pulse width regenerator 132_1c may include an inverter Z1, a PMOS transistor Z2, an NMOS transistor Z3, a power supply Z4, a capacitor Z5, an inverting Schmitt trigger Z6, and another inverter Z7. Inverter Z1 may be connected to multiplexer 133b to receive a COT control signal CSS1. The gates of transistors Z2 and Z3 may be electrically connected to each other and connected to the output of inverter Z1. Power supply Z4 may be coupled between NMOS transistor Z3 and ground. A pulse width increase signal UP1 or a pulse width decrease signal DW1 may be used to control power supply Z4 to adjust the width of each pulse of the input COT control signal CSS1.

[0084] The pulse width increase signal UP1 or pulse width decrease signal DW1 can be provided to power supply Z4 to control its operation, thereby adjusting the width of each pulse in the input COT control signal CSS1. The drain of PMOS transistor Z2 and the source of NMOS transistor Z3 can be coupled to each other and connected to capacitor Z5 and the input of inverted Schmitt trigger Z6. Inverter Z7 can accept the output of inverted Schmitt trigger Z6 and ultimately output the PWM signal P21.

[0085] The adjusted COT control signal CSS1 can be output as a slave PWM signal P21 by the pulse width generator 132_1c and transmitted to the corresponding PWM driver 12_1b. The PWM driver 12_1b can receive the slave PWM signal P21 and provide a corresponding slave current output SO_1 to the load device 2 according to the signal. The remaining slave current outputs can also be provided in the same manner as the master driver 11 and the slave PWM signal generator 132_1.

[0086] As for the main driver 11, the main PWM signal generator 131 may have similar hardware to the pulse width regenerator 132_1c, since they are both used to provide PWM signals. The main PWM signal generator 131 can generate a main PWM signal P1 according to the main COT control signal CSM1, so that the PWM driver 11c outputs the main current output MO1 according to the main PWM signal P1.

[0087] In some implementations, such as Figure 3 As shown, the master PWM signal generator 131 can increase the width of each pulse before providing the master COT control signal CSM1 to the PWM driver 11c, as indicated by the dashed line of the first pulse of the master COT control signal CSM1. Each pulse width regenerator (e.g., pulse width regenerator 132_1c) can also first increase the pulse width of each slave COT control signal, and then adjust the slave COT control signal according to the corresponding pulse adjustment information, as indicated by the dashed line of the first pulse of the slave COT control signal CSS1. The width of each pulse of each slave COT control signal can be increased by the corresponding slave pulse width regenerator to the same pulse width as the master COT control signal CSM1.

[0088] In some implementations, when the pulse width of each pulse of the COT control signal is reduced, its width may not be shorter than the width of each pulse of the main COT control signal CSM1.

[0089] The second embodiment of the present invention can be the multi-phase COT controller 13 described above. In some embodiments, the multi-phase COT controller 13 can be a standalone device and work in conjunction with the master driver 11 and the slave drivers 12_1 to 12_n, such as... Figure 1 As shown. In another embodiment, the master PWM signal generator 131 may be integrated with the master driver 11, while each slave PWM signal generator 132_1 to 132_n may be integrated with a corresponding slave driver, such as... Figure 2 As shown.

[0090] Based on the above, the multi-phase COT controller 13 described herein provides an excellent multi-phase interleaving method for the power converter 1. The width of each pulse in each slave COT control signal is adjusted based on a comparison of the induced current of the master driver 11 and each slave driver, which in turn affects the turn-on time of each slave phase. Therefore, the current output of the slave phase can be adjusted to reach the current output of the master phase. This approach provides a current balancing mechanism for the power converter 1 as a whole, while still maintaining the COT characteristics in all phases. Furthermore, this current balancing mechanism focuses on adjusting the pulse width of the slave drivers, rather than all drivers, which provides a more efficient multi-phase current balancing method.

[0091] The foregoing disclosure covers detailed technical content and its innovative features. Those skilled in the art can make various modifications and substitutions based on the disclosure without departing from its characteristics. However, although these modifications and substitutions are not fully disclosed in the foregoing description, they are substantially covered by the claims.

Claims

1. A multi-phase COT controller, comprising: Main PWM signal generator, used for the main driver; At least one PWM signal generator is used for at least one slave driver; as well as A phase controller, electrically connected to the master PWM signal generator and each slave PWM signal generator, is configured to split the complete COT control signal into a master COT control signal and at least one slave COT control signal, wherein... The master COT control signal is configured to trigger the master PWM signal generator, while each slave COT control signal is configured to trigger the corresponding slave PWM signal generator. in: The main PWM signal generator is configured to generate a main PWM signal based on the main COT control signal; as well as Each slave PWM signal generator is configured to generate a slave PWM signal by comparing the sensed current of the master driver with the sensed current of the corresponding slave driver and adjusting the pulse width of each pulse of the corresponding slave COT control signal.

2. The multi-phase COT controller as described in claim 1, wherein, The main PWM signal generator generates the main PWM signal by increasing the width of each pulse of the main COT control signal.

3. The multi-phase COT controller as described in claim 1, wherein, When the sensed current of the corresponding slave driver is weaker than the sensed current of the master driver, each slave PWM signal generator adjusts the corresponding slave COT control signal by increasing the width of each pulse of the corresponding slave COT control signal.

4. The multi-phase COT controller as described in claim 1, wherein, When the sensed current of the corresponding slave driver is stronger than the sensed current of the master driver, each slave PWM signal generator adjusts the corresponding slave COT control signal by reducing the width of each pulse of the corresponding slave COT control signal.

5. The multi-phase COT controller as described in claim 4, wherein, The width of each pulse of the slave COT control signal corresponding to each slave PWM signal generator is not less than the width of each pulse of the complete COT control signal.

6. The multi-phase COT controller as described in claim 3, wherein, When the sensed current of the corresponding slave driver is weaker than the sensed current of the master driver, each slave PWM signal generator adjusts the corresponding slave COT control signal by first increasing the width of each pulse of the corresponding slave COT control signal, and then increasing the width of each pulse of the corresponding slave COT control signal again.

7. The multi-phase COT controller as described in claim 4, wherein, When the sensed current of the corresponding slave driver is stronger than the sensed current of the master driver, each slave PWM signal generator adjusts the corresponding slave COT control signal by first increasing the width of each pulse of the corresponding slave COT control signal and then decreasing the width of each pulse of the corresponding slave COT control signal.

8. The multi-phase COT controller as described in claim 7, wherein, The width of each pulse of the slave COT control signal corresponding to each slave PWM signal generator is not less than the width of each pulse of the complete COT control signal.

9. The multi-phase COT controller as claimed in claim 1, wherein the phase controller comprises: A counter is configured to generate a selection signal based on the complete COT control signal; and A demultiplexer is electrically connected to the counter and is configured to generate the master COT control signal and the at least one slave COT control signal based on the selection signal and the complete COT control signal.

10. The multi-phase COT controller as described in claim 9, wherein, The selection signal indicates that the demultiplexer first outputs the master COT control signal, and then outputs at least one slave COT control signal.

11. The multi-phase COT controller as described in claim 9, wherein, The phase controller also includes a reset signal generator electrically connected to the counter, the reset signal generator being configured to generate a reset signal for use by the counter.

12. The multi-phase COT controller as described in claim 3, wherein, Each PWM signal generator includes: A comparator is configured to compare the sensed current of the slave driver corresponding to the slave PWM signal generator with the sensed current of the master driver; An up / down counter, electrically connected to the comparator, is configured to generate a pulse width increase signal when the sensed current of the slave driver is weaker than the sensed current of the master driver. as well as A pulse width regenerator is electrically connected to the up / down counter and the phase controller, and is configured to increase the width of each pulse of the corresponding slave COT control signal into the slave PWM signal according to the pulse width increase signal.

13. The multi-phase COT controller as described in claim 4, wherein, Each PWM signal generator includes: A comparator is configured to compare the sensed current of the slave driver corresponding to the slave PWM signal generator with the sensed current of the master driver; An up / down counter, electrically connected to the comparator, is configured to generate a pulse width reduction signal when the sensed current of the slave driver is stronger than the sensed current of the master driver. as well as A pulse width regenerator is electrically connected to the up / down counter and the phase controller, and is configured to reduce the width of each pulse of the corresponding slave COT control signal to the slave PWM signal according to the pulse width reduction signal.

14. The multi-phase COT controller as described in claim 1, wherein, The complete COT control signal is generated by the main driver, and the phase controller is further configured to receive the complete COT control signal from the main driver.

15. A power converter, comprising: The main driver is configured to provide main current output to the load device according to the main PWM signal; At least one slave driver is electrically connected to the master driver, wherein each slave driver is configured to provide a slave current output to the load device according to a corresponding slave PWM signal; A main PWM signal generator is used in the main driver and is electrically connected to the main driver; At least one PWM signal generator is used for the at least one slave driver; and A phase controller is electrically connected to the master driver, the master PWM signal generator, and each slave PWM signal generator. The phase controller is configured to divide the complete COT control signal into a master COT control signal and at least one slave COT control signal, wherein the master COT control signal is configured to trigger the master PWM signal generator, and each slave COT control signal is configured to trigger a corresponding slave PWM signal generator. in: The main PWM signal generator is configured to generate the main PWM signal according to the main COT control signal; and Each slave PWM signal generator is configured to generate a slave PWM signal corresponding to the corresponding slave driver by adjusting the pulse width of the corresponding slave COT control signal based on a comparison between the sensed current for the master driver and the sensed current of the slave driver corresponding to the slave PWM signal generator in the at least one slave driver.

16. The power converter of claim 15, wherein, The main PWM signal generator generates the main PWM signal by increasing the width of each pulse of the main COT control signal.

17. The power converter of claim 15, wherein, When the sensed current of the corresponding slave driver is weaker than the sensed current of the master driver, each slave PWM signal generator adjusts the corresponding slave COT control signal by increasing the width of each pulse of the corresponding slave COT control signal.

18. The power converter of claim 15, wherein, When the sensed current of the corresponding slave driver is stronger than the sensed current of the master driver, each slave PWM signal generator adjusts the corresponding slave COT control signal by reducing the width of each pulse of the corresponding slave COT control signal.

19. The power converter of claim 18, wherein, The width of each pulse of the slave COT control signal corresponding to each slave PWM signal generator is not less than the width of each pulse of the complete COT control signal.

20. The power converter of claim 17, wherein, Each slave PWM signal generator adjusts the corresponding slave COT control signal by first increasing the width of each pulse of the corresponding slave COT control signal and then increasing the width of each pulse of the corresponding slave COT control signal again when the sensed current of the corresponding slave driver is weaker than the sensed current of the master driver.

21. The power converter of claim 18, wherein, When the sensed current of the corresponding slave driver is stronger than the sensed current of the master driver, each slave PWM signal generator adjusts the corresponding slave COT control signal by first increasing the width of each pulse of the corresponding slave COT control signal and then decreasing the width of each pulse of the corresponding slave COT control signal.

22. The power converter of claim 21, wherein, The width of each pulse of the slave COT control signal corresponding to each slave PWM signal generator is not less than the width of each pulse of the complete COT control signal.

23. The power converter of claim 15, wherein, The phase controller includes: A counter is configured to generate a selection signal based on the complete COT control signal; and A demultiplexer is electrically connected to the counter and is configured to generate the master COT control signal and the at least one slave COT control signal based on the selection signal and the complete COT control signal.

24. The power converter of claim 23, wherein, The selection signal indicates that the demultiplexer first outputs the master COT control signal, and then outputs at least one slave COT control signal.

25. The power converter of claim 23, wherein, The phase controller also includes a reset signal generator electrically connected to the counter, and the reset signal generator is configured to generate a reset signal for the counter.

26. The power converter of claim 17, wherein, Each PWM signal generator includes: A comparator is configured to compare the sensed current of the slave driver corresponding to the slave PWM signal generator with the sensed current of the master driver; An up / down counter, electrically connected to the comparator, is configured to generate a pulse width increase signal when the sensed current of the corresponding slave driver is weaker than the sensed current of the master driver. as well as A pulse width regenerator, electrically connected to the up / down counter and the phase controller, is configured to increase the width of each pulse of the corresponding slave COT control signal into the slave PWM signal according to the pulse width increase signal.

27. The power converter of claim 18, wherein, Each PWM signal generator includes: A comparator is configured to compare the sensed current of the slave driver corresponding to the slave PWM signal generator with the sensed current of the master driver; An up-down counter, electrically connected to the comparator, is configured to generate a pulse width reduction signal when the sensed current of the corresponding slave driver is stronger than the sensed current of the master driver. as well as A pulse width regenerator is electrically connected to the up / down counter and the phase controller, and is configured to reduce the width of each pulse of the slave COT control signal to the slave PWM signal according to the pulse width reduction signal.

28. The power converter of claim 15, wherein, The complete COT control signal is generated by the main driver, and the phase controller is further configured to receive the complete COT control signal from the main driver.

29. The power converter of claim 15, wherein, The main PWM signal generator is integrated with the main driver.

30. The power converter of claim 15, wherein, The main drive contains: A COT controller is electrically connected to the phase controller and is configured to generate the complete COT control signal based on the total current output of the power converter, wherein the total current output is formed by the main current output and the slave current output. A main current sensor, electrically connected to the at least one slave PWM signal generator, and configured to provide the sensed current of the main driver to the at least one slave PWM signal generator; and A PWM driver is electrically connected to the main PWM signal generator and is configured to provide the main current output according to the main PWM signal.

31. The power converter of claim 15, wherein, Each slave driver contains: A current sensor, electrically connected to the slave PWM signal generator, and configured to provide the sensed current of the slave driver to the slave PWM signal generator; and A PWM driver is electrically connected to the slave PWM signal generator and is configured to provide the slave current output according to the slave PWM signal.

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