Semiconductor switching element driving device

Abstract

A semiconductor switching element driving device is provided. In a period in which overcurrent flows through an IGBT at the time of upper and lower arm short circuit, there is a risk that the IGBT will fail. A first gate driving section turns on and off a first semiconductor switching element, a second gate driving section turns on and off a second semiconductor switching element, a first insulation transfer section detects a voltage of a gate terminal of the first semiconductor switching element on a primary side, generates a first on signal on a secondary side when the voltage exceeds a first reference value and the second semiconductor switching element is on, a second insulation transfer section detects a voltage of a gate terminal of the second semiconductor switching element on the primary side, generates a second on signal on the secondary side when the voltage exceeds a second reference value and the first semiconductor switching element is on, a first gate voltage lowering section lowers the voltage applied to the gate terminal of the first semiconductor switching element based on the second on signal, and a second gate voltage lowering section lowers the voltage applied to the gate terminal of the second semiconductor switching element based on the first on signal.

Description

Technical Field

[0001] This disclosure relates to a semiconductor switching element driving device. Background Technology

[0002] In power conversion circuits such as inverters, overcurrent flows when a short circuit occurs in the upper and lower arms. In Patent Document 1, after detecting an overcurrent due to a short circuit, a protection circuit operates to put the IGBT into an off state before an IGBT failure occurs.

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: International Publication No. 2023 / 032024 Summary of the Invention

[0006] The problem the invention aims to solve

[0007] In Patent Document 1, during a short circuit in the upper and lower arms, there is a period when overcurrent flows in the IGBT, thus accumulating damage within the IGBT. Furthermore, when overcurrent flows, the gate-emitter voltage rises due to the current flowing from the capacitance between the IGBT's collector and gate, posing a risk of failure as the gate-emitter voltage exceeds the absolute maximum rated value of the IGBT.

[0008] This disclosure was made to solve the above-mentioned problems, and its purpose is to activate the short-circuit protection circuit before a short circuit is detected, thereby suppressing the overcurrent when the upper and lower arms are short-circuited and reducing damage to semiconductor switching elements such as IGBTs.

[0009] means for solving problems

[0010] The semiconductor switching element driving device disclosed herein includes: a first gate driving unit that applies a voltage to the gate terminal of a first semiconductor switching element to turn the first semiconductor switching element on and off; a second gate driving unit that applies a voltage to the gate terminal of a second semiconductor switching element connected in series with the first semiconductor switching element to turn the second semiconductor switching element on and off; a first insulation transmission unit that detects the voltage at the gate terminal of the first semiconductor switching element on the primary side and generates a first turn-on signal on the secondary side when the voltage exceeds a first reference value and the second semiconductor switching element is turned on; a second insulation transmission unit that detects the voltage at the gate terminal of the second semiconductor switching element on the primary side and generates a second turn-on signal on the secondary side when the voltage exceeds a second reference value and the first semiconductor switching element is turned on; a first gate voltage reduction unit that reduces the voltage applied to the gate terminal of the first semiconductor switching element based on the second turn-on signal; and a second gate voltage reduction unit that reduces the voltage applied to the gate terminal of the second semiconductor switching element based on the first turn-on signal.

[0011] The effects of the invention

[0012] According to this disclosure, overcurrent can be suppressed when the upper and lower arms are short-circuited, thereby reducing damage to semiconductor switching elements. Attached Figure Description

[0013] Figure 1 This is a diagram showing the outline structure of the semiconductor switching element driving device in Embodiment 1.

[0014] Figure 2 This is a time series diagram showing the state at various points in the semiconductor switching element driving device in Embodiment 1.

[0015] Figure 3 It is a time series diagram showing the state at various points in a conventional semiconductor switching element driving device.

[0016] Figure 4 It is Figure 2 Time series and Figure 3 The graph is obtained by overlaying time series data.

[0017] Explanation of reference numerals in the attached figures

[0018] 1. Gate drive circuit, 1a. First gate drive circuit, 1b. Second gate drive circuit.

[0019] 2a is the first power supply, 3a is the second power supply, and 4a is the first MOSFET.

[0020] 5a Second MOFSET, 6a First Control Unit, 7a Terminals for Upper Arm Output Stage Circuit, 8a First Resistor, 9a First Protection Action Detection Unit.

[0021] 2b is the third power supply, 3b is the fourth power supply, and 4b is the third MOSFET.

[0022] 5b 4th MOFSET, 6b 2nd control unit, 7b Terminals for the output stage circuit of the lower arm, 8b 2nd resistor, 9b 2nd protection action detection unit.

[0023] 20RTC circuit, 20a first RTC circuit, 20b second RTC circuit.

[0024] 21a is the 3rd resistor, 22a is the 4th resistor, and 23a is the 5th resistor.

[0025] 24a First overcurrent detection unit, 25a Connection point, 26a First diode,

[0026] 27a First gate voltage reduction section, 28a Connection point,

[0027] 29a, 6th resistor

[0028] 30a First optocoupler,

[0029] 30a1 is the first light-emitting diode, 30a2 is the first phototransistor, and 31a is the first Zener diode.

[0030] 21b is the 7th resistor, 22b is the 8th resistor, and 23b is the 9th resistor.

[0031] 24b Second overcurrent detection unit, 25b Connection point, 26b Second diode,

[0032] 27b Second gate voltage reduction section, 28a Connection point,

[0033] 29b, 10th resistor

[0034] 30b Second optocoupler,

[0035] 30b1 is the second light-emitting diode, and 30b2 is the second phototransistor.

[0036] 31b, the second Zener diode,

[0037] 100a upper arm, 100b lower arm, 101a first IGBT,

[0038] 101b is the second IGBT, and 102a is the first return current diode.

[0039] Diode 102b (second return current diode), connection point 103a, connection point 103b.

[0040] Connection point 104a, connection point 104b. Detailed Implementation

[0041] The embodiments for implementing this disclosure are described with reference to the accompanying drawings. Furthermore, in the drawings, identical or equivalent parts are labeled with the same reference numerals, and repetitive descriptions are simplified or omitted where appropriate.

[0042] Implementation method 1.

[0043] Figure 1 This diagram illustrates the general structure of the semiconductor switching element driving device in Embodiment 1. The driving device controls the semiconductor switching element forming the upper arm 100a, namely the first IGBT 101a, and the semiconductor switching element forming the lower arm 100b, namely the second IGBT 101b. Specifically, a gate voltage is applied to the gate terminal of the first IGBT 101a to perform on / off control. Furthermore, a gate voltage is applied to the gate terminal of the second IGBT 101b to perform on / off control.

[0044] Furthermore, IGBT ON means that the collector terminal C and emitter terminal E are in a conducting state, and OFF means that the collector terminal C and emitter terminal E are in a non-conducting state. In addition, the drive device mainly consists of a gate drive circuit (gate drive section) 1 and an RTC circuit (overcurrent protection circuit) 20.

[0045] The upper arm 100a has a first IGBT 101a, and a first return diode 102a is connected in anti-parallel. The lower arm 100b has a second IGBT 101b, and a second return diode 102b is connected in anti-parallel.

[0046] The gate drive circuit 1 is composed of a first gate drive circuit 1a and a second gate drive circuit 1b. The first gate drive circuit 1a includes an upper arm output stage circuit composed of a first power supply 2a, a second power supply 3a, a first MOSFET 4a, and a second MOSFET 5a. Furthermore, here, the voltage of the first power supply 2a is set to +15V relative to the reference potential VG1, and the voltage of the second power supply 3a is set to -10V relative to the reference potential VG1.

[0047] In addition, the first gate drive circuit 1a includes a first control unit 6a for controlling the first MOSFET 4a and the second MOSFET 5a, a first resistor 8a located between the terminal 7a of the upper arm output stage circuit and the gate terminal G of the first IGBT 101a, and a first protection operation detection unit 9a.

[0048] The connection point 103a on the emitter terminal side of the first IGBT 101a is connected to the reference potential VG1 of the first power supply 2a and the second power supply 3a. The first control unit 6a receives the on / off command signal SIN1 sent from the upper control device (not shown) and controls the first MOSFET 4a and the second MOSFET 5a based on the signal GSD from the first protection action detection unit 9a.

[0049] That is, by turning on the first MOSFET 4a and turning off the second MOSFET SET 5a, a positive voltage of the first power supply 2a is applied from the terminal 7a of the upper arm output stage circuit to the gate terminal G of the first IGBT 101a, and the collector terminal C and the emitter terminal E become in the on state.

[0050] Furthermore, by turning off the first MOSFET 4a and turning on the second MOSFET SET 5a, a negative voltage of the second power supply 3a is applied from the terminal 7a of the upper arm output stage circuit to the gate terminal G of the first IGBT 101a, and the collector terminal C and the emitter terminal E become non-conducting, i.e., disconnected.

[0051] Similarly, the second gate drive circuit 1b includes a lower arm output stage circuit composed of a third power supply 2b, a fourth power supply 3b, a third MOSFET 4b, and a fourth MOSFET 5b. Furthermore, here, the voltage of the third power supply 2b is set to +15V relative to the reference potential VG2, and the voltage of the fourth power supply 3b is set to -10V relative to the reference potential VG2.

[0052] In addition, the second gate drive circuit 1b includes a second control unit 6b for controlling the third MOSFET 4b and the fourth MOSFET 5b, a second resistor 8b located between the terminal 7b of the lower arm output stage circuit and the gate terminal G of the second IGBT 101b, and a second protection operation detection unit 9b.

[0053] The connection point 103b on the emitter terminal side of the second IGBT 101b is connected to the reference potential VG2 of the third power supply 2b and the fourth power supply 3b. The second control unit 6b receives the on / off command signal SIN2 sent from the upper control device (not shown) and controls the third MOSFET 4b and the fourth MOSFET 5b based on the signal GSD from the second protection action detection unit 9b.

[0054] That is, by turning on the 3rd MOSFET 4b and turning off the 4th MOSFET SET 5b, a positive voltage of the 3rd power supply 2b is applied from the terminal 7b of the lower arm output stage circuit to the gate terminal G of the 2nd IGBT 101b, and the collector terminal C and the emitter terminal E become in the on state.

[0055] Furthermore, by turning off the 3rd MOSFET 4b and turning on the 4th MOSFET SET 5b, a negative voltage of the 4th power supply 3b is applied from the terminal 7b of the lower arm output stage circuit to the gate terminal G of the 2nd IGBT 101b, and the collector terminal C and the emitter terminal E become non-conducting, i.e., disconnected.

[0056] The RTC circuit (overcurrent protection circuit) 20 consists of the first RTC circuit 20a and the second RTC circuit 20b.

[0057] The first RTC circuit 20a has a third resistor 21a located between the gate terminal G of the first IGBT 101a and the first resistor 8a.

[0058] The first RTC circuit 20a includes a branch circuit that is connected in parallel with the first IGBT 101a from the connection point 104a on the collector terminal side of the first IGBT 101a via the fourth resistor 22a and the fifth resistor 23a to the connection point 103a on the emitter terminal side of the first IGBT 101a. Furthermore, the midpoint between the fourth resistor 22a and the fifth resistor 23a is connected to the base terminal of the transistor in the first overcurrent determination unit 24a.

[0059] In the line connecting terminal 7a of the upper arm output stage circuit and the gate terminal of the first IGBT 101a, one end of the first gate voltage reduction section 27a is connected from the connection point 25a between the first resistor 8a and the third resistor 21a via the first diode 26a. Furthermore, the other end of the first gate voltage reduction section 27a is connected to the reference potential VG1.

[0060] In the line connecting terminal 7a of the upper arm output stage circuit to the gate terminal of the first IGBT 101a, a branch is formed at connection point 28a between the third resistor 21a and the gate terminal of the first IGBT 101a, connecting to a sixth resistor 29a, the primary side of the first insulation transfer unit, and one end of the first Zener diode 31a. The other end of the first Zener diode 31a is connected to a reference potential VG1. Furthermore, the connection between the sixth resistor 29a and the first Zener diode 31a stabilizes the line at a specified voltage. In this embodiment, a first optocoupler 30a is used as the first insulation transfer unit.

[0061] The first optocoupler 30a consists of a first light-emitting diode 30a1 on the primary side and a first phototransistor 30a2 on the secondary side. The first light-emitting diode 30a1 emits light when the detected voltage exceeds a first reference value. The first phototransistor 30a2 receives this light and becomes in an ON state, that is, the collector terminal is connected to the emitter terminal.

[0062] The collector terminal of the first phototransistor 30a2 is connected to the gate between the second resistor 8b and the connection point 25b in the second RTC circuit 20b. Furthermore, the emitter terminal of the first phototransistor 30a2 is connected to the second gate voltage reduction section 27b.

[0063] Similarly, the second RTC circuit 20b has a seventh resistor 21b located between the gate terminal G of the second IGBT 101b and the second resistor 8b.

[0064] The second RTC circuit 20b includes a branch circuit that is connected in parallel with the second IGBT 101b from the connection point 104b on the collector terminal side of the second IGBT 101b via the eighth resistor 22b and the ninth resistor 23b to the connection point 103b on the emitter terminal side of the second IGBT 101b. Furthermore, the midpoint between the eighth resistor 22b and the ninth resistor 23b is connected to the base terminal of the transistor in the second overcurrent determination section 24b.

[0065] In the wiring of terminal 7b of the lower arm output stage circuit and the gate terminal of the second IGBT 101b, one end of the second gate voltage reduction section 27b is connected via the second diode 26b from the connection point 25b between the second resistor 8b and the seventh resistor 21b. Furthermore, the other end of the second gate voltage reduction section 27b is connected to the reference potential VG2.

[0066] In the line connecting terminal 7b of the lower arm output stage circuit and the gate terminal of the second IGBT 101b, a branch is formed at connection point 28b between the seventh resistor 21b and the gate terminal of the second IGBT 101b, connecting to the tenth resistor 29b, the primary side of the second insulation transfer unit, and one end of the second Zener diode 31b. The other end of the second Zener diode 31b is connected to the reference potential VG2. Furthermore, the connection between the tenth resistor 29b and the second Zener diode 31b stabilizes the line at a specified voltage. In this embodiment, a second optocoupler 30b is used as the second insulation transfer unit.

[0067] The second optocoupler 30b consists of a second light-emitting diode 30b1 on the primary side and a second phototransistor 30b2 on the secondary side. The second light-emitting diode 30b1 emits light when the detected voltage exceeds a second reference value. This light is received by the second phototransistor 30b2, which then becomes ON, i.e., conducts from the collector terminal to the emitter terminal. Furthermore, the second reference value is the same as the first reference value.

[0068] The collector terminal of the second phototransistor 30b2 is connected to Gup between the first resistor 8a and the connection point 25a in the first RTC circuit 20a. Furthermore, the emitter terminal of the second phototransistor 30b2 is connected to the first gate voltage reduction section 27a.

[0069] In this circuit structure, typically, the first IGBT 101a of the upper arm 100a and the second IGBT 101b of the lower arm 100b are controlled to alternately be in the ON state. However, when a gate drive circuit or IGBT malfunctions and a short circuit occurs, causing both the first IGBT 101a and the second IGBT 101b to be ON simultaneously, overcurrent flows in both IGBTs. When this overcurrent continues to flow and exceeds the short-circuit withstand capability of the IGBT, the IGBT that was originally in operation also fails. Therefore, it is necessary to forcibly disconnect the IGBT.

[0070] The following section explains the control measures in the event of this short circuit.

[0071] As a possible cause of a short circuit, consider the scenario where a fault in the gate drive circuit results in a continuous application of a positive voltage to the gate terminal of the IGBT. Furthermore, consider the scenario where the IGBT malfunctions and the voltage applied to the gate terminal from the gate drive circuit changes from positive to negative, but the conduction between the collector and emitter terminals remains unbroken.

[0072] Figure 2 It is shown Figure 1 A time series diagram of the state at various points in a semiconductor switching element driving device.

[0073] based on Figure 1 and Figure 2 Describe the status.

[0074] Under normal conditions, an on / off command signal SIN1 is sent from a higher-level control device (not shown) to the first control unit 6a. Additionally, an on / off command signal SIN2 is sent to the second control unit 6b. The on / off command signals SIN1 and SIN2 are alternately and repeatedly switched on / off via a dead time Td.

[0075] The first control unit 6a receives the turn-on command signal SIN1, turning on the first MOSFET 4a and turning off the second MOSFET 5a, applying a positive voltage to the gate terminal of the first IGBT 101a. This turns on the first IGBT 101a, allowing current to flow through the load. The current flowing through the collector and emitter terminals of the first IGBT 101a is Icp.

[0076] At this time, the voltage detected by the first light-emitting diode 30a1 exceeds the first reference value, but since no voltage is applied to Gun, no current flows in the first phototransistor 30a2 on the secondary side. Therefore, the first turn-on signal Ip-n is not transmitted from the first phototransistor 30a2 to the second gate voltage reduction section 27b.

[0077] Similarly, the second control unit 6b receives the turn-on command signal of SIN2, the third MOSFET 4b turns on, and the fourth MOSFET 5b turns off, applying a positive voltage to the gate terminal of the second IGBT 101b. As a result, the collector terminal and emitter terminal of the second IGBT 101b are connected, allowing current to flow from the load. The current flowing through the collector terminal and emitter terminal of the second IGBT 101b is Icn.

[0078] At this time, the voltage detected by the second light-emitting diode 30b1 exceeds the second reference value, but since no voltage Gup is applied, no current flows in the second phototransistor 30b2 on the secondary side. Therefore, the second turn-on signal In-p is not transmitted from the second phototransistor 30b2 to the first gate voltage reduction section 27a.

[0079] Next, in Figure 2 At time t1, while SIN1 is holding the on command signal, SIN2 issues the on command signal.

[0080] First, a positive voltage is applied from the gate drive circuit 1b to the gate terminal of the second IGBT 101b, turning it on. During the voltage rise, a voltage is also applied to the gate.

[0081] In the first optocoupler 30a, the first light-emitting diode 30a1 emits light. Therefore, current flows through the first phototransistor 30a2 on the secondary side, generating a first turn-on signal Ip-n. Then, the first turn-on signal Ip-n is transmitted to the second gate voltage reduction section 27b. The second gate voltage reduction section 27b is activated based on the first turn-on signal Ip-n, and current IB flows from the connection point 25b. As a result, the voltage applied to the gate terminal of the second IGBT 101b is maintained at a lower value than normal.

[0082] Furthermore, during the rise of the voltage applied to the gate terminal of the second IGBT 101b, when the voltage detected by the second light-emitting diode 30b1 exceeds the second reference value, the second light-emitting diode 30b1 emits light. Because a voltage is applied to Gup, current flows through the second phototransistor 30b2 on the secondary side, generating a second turn-on signal In-p. Then, the second turn-on signal In-p is transmitted to the first gate voltage reduction section 27a. The first gate voltage reduction section 27a is activated based on the second turn-on signal In-p, and current IA flows from the connection point 25a. As a result, the voltage applied to the gate terminal of the second IGBT 101b decreases and is maintained at a lower value than normal.

[0083] In this state, although the first IGBT 10a1 and the second IGBT 10b1 are short-circuited, the voltage applied to the gate terminal is reduced, making it difficult for current to flow between the collector and emitter terminals compared to normal operation. Therefore, overcurrent flow is suppressed.

[0084] In the first gate drive circuit 1a, the first protection operation detection unit 9a detects that the first gate voltage reduction unit 27a has reduced the gate voltage, and generates a signal GSD at time t2, which is then sent to the first control unit 6a. Upon receiving the signal GSD, the first control unit 6a ignores the command signal SIN1, sets the first MOSFET 4a to off, and sets the second MOSFET 5a to on, thus turning off the first IGBT 101a. The same control is performed in the second gate drive circuit 1b.

[0085] Subsequently, at time t3, it becomes invalid (Fail), and the host control device (not shown) no longer sends SIN1 and SIN2.

[0086] For reference, the control of a conventional semiconductor switching element drive device in the event of a short circuit will be described. Conventional semiconductor switching element drive devices do not include the sixth resistor 29a, the first optocoupler 30a, or the first Zener diode 31a. Furthermore, they do not include the tenth resistor 29b, the second optocoupler 30b, or the second Zener diode 31b.

[0087] Figure 3 This is a time-series diagram showing the state at various points in a conventional semiconductor switching element drive device. Figure 3 At time t1, while SIN1 is holding the on command signal, SIN2 issues the on command signal.

[0088] First, a positive voltage is applied from the second gate drive circuit 1b to the gate terminal of the second IGBT 101b, turning it on. This connects the collector terminal of the second IGBT 101b to the emitter terminal. Consequently, a short circuit occurs between the first IGBT 101a and the second IGBT 101b, allowing current to flow.

[0089] When the voltage divided by resistors 4 and 5 exceeds the voltage Vbe required to drive the transistor of the first overcurrent determination unit 24a due to the overcurrent, the transistor is turned on. That is, an overcurrent is determined. Then, a first determination signal is sent from the first overcurrent determination unit 24a to the first gate voltage reduction unit 27a. The first gate voltage reduction unit 27a is activated based on the first determination signal, and current IA flows from the connection point 25a.

[0090] Similarly, the transistor in the second overcurrent determination unit 24b is turned on. Then, a second determination signal is sent from the second overcurrent determination unit 24b to the second gate voltage reduction unit 27b. The second gate voltage reduction unit 27b is activated, and current IB flows from the connection point 25b.

[0091] Figure 4 It is Figure 2 Time series and Figure 3 The graph is obtained by overlaying time series data.

[0092] The solid line is based on Figure 2 The resulting dashed line is based on Figure 3 Obtained.

[0093] When comparing Gup, Figure 2 In this process, the rise in the gate-emitter voltage after time t1 is suppressed. Furthermore, when comparing Icp and Icn, in... Figure 2 In this way, the rapid changes in current are suppressed.

[0094] Furthermore, there is a possibility that an IGBT malfunctions and the conduction between the collector terminal and the emitter terminal is not interrupted even when the voltage applied from the gate drive circuit to the gate terminal changes from positive to negative. In this case, the first turn-on signal Ip-n is not generated in the first optocoupler 30a. Similarly, the second turn-on signal In-p is not generated in the second optocoupler 30b.

[0095] Therefore, a first determination signal is sent from the first overcurrent determination unit 24a to the first gate voltage reduction unit 27a. Furthermore, a second determination signal is sent from the second overcurrent determination unit 24b to the second gate voltage reduction unit 27b. As a result, the conduction between the collector terminal and emitter terminal of the normally functioning IGBT is suppressed, thus preventing malfunctions of the normally functioning IGBT.

[0096] Thus, in this embodiment, by activating the gate voltage reduction section before a short circuit is detected, overcurrent during short circuits in the upper and lower arms can be suppressed, reducing damage to semiconductor switching elements such as IGBTs.

[0097] In addition, Figure 1 In this context, IGBTs are used as switching elements for the upper and lower arms, but other semiconductor switching elements such as MOFSETs with gate terminals can also be used.

[0098] In addition, Figure 1 In this context, an optocoupler is used as an insulating transmission component, but it can also be any device capable of insulating transmission, such as an isolator.

[0099] Furthermore, while the first and second reference values ​​can be set to the same value, they can also be set to different values. By adjusting to different values, it is possible to select whether to use both arms or only one arm for the action object when short-circuited, which can be used to select the part of the arm that has been short-circuited.

[0100] The preferred embodiments have been described in detail above, but are not limited to these embodiments. Various modifications and substitutions can be made to the above embodiments without departing from the scope of disclosure.

[0101] Furthermore, when the number, quantity, quantity, range, or other numerical values ​​of each element are mentioned in the embodiments, the apparatus of this disclosure is not limited to those mentioned numbers, unless specifically stated or obviously determined in principle. Moreover, the structures described in these embodiments are not necessarily essential, unless specifically stated or obviously determined in principle.

Claims

1. A semiconductor switching element driving device, characterized in that, The semiconductor switching element driving device includes: The first gate driving section applies a voltage to the gate terminal of the first semiconductor switching element to turn the first semiconductor switching element on and off. The second gate driving section applies a voltage to the gate terminal of the second semiconductor switching element, which is connected in series with the first semiconductor switching element, to turn the second semiconductor switching element on and off. The first insulation transmission section detects the voltage at the gate terminal of the first semiconductor switching element on the primary side, and generates a first turn-on signal on the secondary side when the voltage exceeds a first reference value and the second semiconductor switching element is turned on. The second insulation transmission section detects the voltage at the gate terminal of the second semiconductor switching element on the primary side, and generates a second turn-on signal on the secondary side when the voltage exceeds a second reference value and the first semiconductor switching element is turned on. The first gate voltage reduction section reduces the voltage applied to the gate terminal of the first semiconductor switching element based on the second turn-on signal; as well as The second gate voltage reduction section reduces the voltage applied to the gate terminal of the second semiconductor switching element based on the first turn-on signal.

2. A semiconductor switching element driving device, characterized in that, The semiconductor switching element driving device includes: The first gate driving section applies a voltage to the gate terminal of the first semiconductor switching element forming the upper arm, causing the first semiconductor switching element to turn on and off. The second gate driving section applies a voltage to the gate terminal of the second semiconductor switching element, which forms a lower arm connected in series with the upper arm, to turn the second semiconductor switching element on and off. The first overcurrent determination unit determines the overcurrent flowing through the first semiconductor switching element; The second overcurrent determination unit determines the overcurrent flowing through the second semiconductor switching element; The first gate voltage reduction section reduces the voltage applied to the gate terminal of the first semiconductor switching element based on a first determination signal output when the first overcurrent determination section determines the overcurrent. The second gate voltage reduction section reduces the voltage applied to the gate terminal of the second semiconductor switching element based on a second determination signal output when the second overcurrent determination section determines the overcurrent. A first insulation transmission section detects the voltage at the gate terminal of the first semiconductor switching element on the primary side, and when the voltage exceeds a first reference value and the second semiconductor switching element is turned on, transmits a first turn-on signal to the second gate voltage reduction section on the secondary side; and The second insulation transmission section detects the voltage at the gate terminal of the second semiconductor switching element on the primary side. When the voltage exceeds a second reference value and the first semiconductor switching element is turned on, it transmits a second turn-on signal to the first gate voltage reduction section on the secondary side. The first gate voltage reduction section reduces the voltage applied to the gate terminal of the first semiconductor switching element based on the second turn-on signal, and the second gate voltage reduction section reduces the voltage applied to the gate terminal of the second semiconductor switching element based on the first turn-on signal.

3. The semiconductor switching element driving device according to claim 1 or 2, characterized in that, The first gate driving unit includes a first protection operation detection unit that detects the voltage at the gate terminal of the first semiconductor switching element. When the first protection operation detection unit detects a voltage drop based on the first gate voltage drop unit, it disconnects the first semiconductor switching element.

4. The semiconductor switching element driving device according to claim 3, characterized in that, The second gate drive unit includes a second protection operation detection unit that detects the voltage at the gate terminal of the second semiconductor switching element. When the second protection operation detection unit detects a voltage drop based on the second gate voltage drop unit, it disconnects the second semiconductor switching element.

5. The semiconductor switching element driving device according to claim 1 or 2, characterized in that, The first reference value and the second reference value are different values.

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