Simulation processing method and device of radar signal and electronic equipment
By combining a system architecture of FPGA, GPU and CPU, efficient simulation of radar seeker head is achieved, improving the real-time performance and data processing efficiency of radar seeker head simulation, and solving the problems of insufficient storage space and poor simulation real-time performance in existing technologies.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- BEIJING RUNKE GENERAL TECH
- Filing Date
- 2026-04-16
- Publication Date
- 2026-08-04
AI Technical Summary
Existing radar seeker simulation systems have limited data processing capabilities, resulting in poor real-time simulation performance and insufficient storage space, which cannot meet the real-time simulation requirements in complex electromagnetic environments.
The system architecture combines a field-programmable gate array (FPGA) with a graphics processing unit (GPU) and a central processing unit (CPU). The FPGA is used to simulate the transmission and reception characteristics of radar signals, the GPU is used for pulse compression, moving target display, moving target detection and constant false alarm rate detection, and the CPU is used for track management and tracking filtering, thereby improving data processing efficiency and storage capacity.
The simulation improved the real-time performance and data processing efficiency of radar seeker simulation, solved the storage limitation problem, and enhanced the realism and accuracy of the simulation.
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Figure CN122506501A_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of radar simulation technology, and in particular relates to a radar signal simulation processing method, device and electronic equipment. Background Technology
[0002] The radar seeker is a key component of a radio homing guidance system. In order to balance guidance accuracy and cost, digital simulation is usually used to simulate the radar seeker system in related technologies.
[0003] However, the data processing performance of existing radar seeker simulation systems is limited, resulting in poor real-time performance of radar seeker simulations. Summary of the Invention
[0004] This application provides a radar signal simulation processing method, apparatus, and electronic device, which can improve the real-time performance of radar seeker simulation.
[0005] In a first aspect, embodiments of this application provide a radar signal simulation processing method, applied in a graphics processor of a radar simulation system. The radar simulation system further includes a field-programmable gate array (FPGA) and a central processing unit (CPU). The method includes: acquiring radar echo signals generated by the FPGA simulating the signal transmission and reception characteristics of radar signals; performing signal pulse compression processing on the radar echo signals to obtain pulse modulation signals; performing multi-pulse cancellation and moving target detection processing on the pulse modulation signals to obtain a pulse matrix; performing constant false alarm rate (CFAR) detection on the pulse matrix using thread synchronization to obtain echo detection results; when the echo detection results indicate that a radar target has been detected, acquiring the range, velocity, and angle data of the radar target; and sending the range, velocity, and angle data of the radar target to the CPU so that the CPU can determine the trajectory information of the radar target based on the range, velocity, and angle data.
[0006] Secondly, embodiments of this application provide a radar signal simulation processing device, applied in a graphics processor of a radar simulation system. The radar simulation system further includes a field-programmable gate array (FPGA) and a central processing unit (CPU). The device includes: a signal acquisition module for acquiring radar echo signals generated by the FPGA simulating the signal transmission and reception characteristics of radar signals; a pulse compression module for performing signal pulse compression processing on the radar echo signals to obtain pulse modulation signals; a first detection module for performing multi-pulse cancellation and moving target detection processing on the pulse modulation signals to obtain a pulse matrix; a second detection module for performing constant false alarm rate (CFAR) detection on the pulse matrix using thread synchronization to obtain echo detection results; a target data acquisition module for acquiring the range, velocity, and angle data of the radar-detected target when the echo detection results indicate that a radar-detected target has been detected; and a track detection module for sending the range, velocity, and angle data of the radar-detected target to the CPU, so that the CPU can determine the track information of the radar-detected target based on the range, velocity, and angle data.
[0007] Thirdly, embodiments of this application provide an electronic device, which includes: a processor and a memory storing computer program instructions; the processor executes the computer program instructions to implement the radar signal simulation processing method as described in the first aspect.
[0008] Fourthly, embodiments of this application provide a computer-readable storage medium storing computer program instructions, which, when executed by a processor, implement the radar signal simulation processing method as described in the first aspect.
[0009] Fifthly, embodiments of this application provide a computer program product in which instructions, when executed by a processor of an electronic device, cause the electronic device to perform the radar signal simulation processing method as described in the first aspect.
[0010] As can be seen from the above, in this embodiment, a combination of a field-programmable gate array (FPGA), a graphics processor (GPU), and a central processing unit (CPU) is used to simulate the radar seeker. The FPGA is used to simulate the transmission and reception characteristics of the radar signal, the GPU is used to perform pulse compression, moving target display, moving target detection, constant false alarm rate (CFAR) detection, velocity measurement, range measurement, and angle measurement of the radar echo signal, and the CPU is used to perform track management and tracking filtering. Compared with the related technologies that use a combination of FPGA and digital signal processor (DSP) to simulate the radar seeker, this method improves the efficiency of data processing and thus enhances the real-time performance of the radar seeker simulation.
[0011] In addition, in the embodiments of this application, during the display of moving targets, a multi-pulse cancellation method is used to process the pulse modulation signal, thereby reducing the amount of data to be processed in subsequent steps, improving data processing efficiency and simulation efficiency, and further improving the real-time performance of radar seeker simulation.
[0012] Furthermore, in this embodiment, constant false alarm rate (CFAR) detection based on thread synchronization is adopted, which improves both the accuracy and efficiency of echo detection, thereby enhancing the real-time performance of radar seeker simulation.
[0013] Therefore, it can be seen that the solution provided in the embodiments of this application can improve the real-time performance of radar seeker simulation. Attached Figure Description
[0014] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0015] Figure 1 This is a schematic diagram of the structure of a radar simulation system provided in one embodiment of this application; Figure 2 This is a schematic flowchart of a radar signal simulation processing method provided in one embodiment of this application; Figure 3 This is a schematic diagram of an echo matrix provided in one embodiment of this application; Figure 4 This is a schematic diagram of the structure of a radar signal simulation processing device provided in another embodiment of this application; Figure 5 This is a schematic diagram of the structure of an electronic device provided in another embodiment of this application. Detailed Implementation
[0016] The features and exemplary embodiments of various aspects of this application will be described in detail below. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain this application and not to limit it. For those skilled in the art, this application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this application by illustrating examples.
[0017] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.
[0018] To facilitate understanding, before explaining the solution provided in this application, the background of the solution provided in this application will be explained first.
[0019] With the continuous development of electronic technology, the electromagnetic environment in electronic warfare is becoming increasingly complex. To ensure accurate guidance, radar seekers are becoming increasingly complex, with more sophisticated algorithms and higher costs, leading to higher flight test costs and longer testing cycles for guidance equipment. To better verify the performance indicators of radar seekers in complex electromagnetic environments, simulation methods are used to model the seeker's transmission, reception, and complete signal processing processes. Using simulation instead of flight testing can significantly reduce testing costs and time. Due to the complexity and real-time requirements of the seeker system itself, related technologies typically employ a combination of FPGA (Field Programmable Gate Array) and DSP (Digital Signal Processing) for digital simulation to achieve the simulation of the radar seeker system.
[0020] However, the FPGA+DSP approach to implementing seeker simulation has the following problems: (1) The DSP board has limited processing performance and small storage space. Since the angle discrimination curve required for the angle measurement process occupies a large amount of storage space, the number of accumulated pulses is greatly limited when processing the echo signal, which reduces the real-time performance of the radar seeker simulation.
[0021] (2) When the DSP board processes signal-level simulation, the amount of data is large, which reduces the operating efficiency of the system and cannot guarantee real-time performance.
[0022] To address the problems of existing technologies, embodiments of this application provide a method, apparatus, and electronic device for simulating radar signals. The radar signal simulation processing method provided in this application can be applied to the GPU (Graphics Processing Unit) of a radar simulation system. The radar simulation system also includes a Field-Programmable Gate Array (FPGA) and a Central Processing Unit (CPU). Specifically, this application employs an FPGA + CPU + GPU system architecture to simulate the seeker's workflow, enabling the radar simulation system to operate strictly according to the actual radar timing, thereby improving the realism and real-time performance of the radar simulation system. Furthermore, the solution provided in this application also solves the storage limitations inherent in the FPGA + DSP approach and increases storage capacity.
[0023] In one embodiment, Figure 1 A schematic diagram of the radar simulation system in an embodiment of this application is shown, as follows: Figure 1 As shown, the radar simulation system includes an FPGA, a GPU, and a CPU. The GPU and CPU can be installed on a server.
[0024] like Figure 1 As shown, the FPGA can simulate the transmission and reception characteristics of radar signals. Specifically, after receiving the seeker parameters, the FPGA uses DDS (Data Distribution Service) to receive the seeker parameters, then weights the seeker parameters according to their transmission characteristics, and performs DUC (Digital UpConverter) processing on the weighted data to upconvert the data's transmission frequency band to the radar signal's transmission frequency band. Finally, the DA (Digital to Analog Converter) converts the digitally upconverted radar signal into an analog signal and outputs it to realize the transmission of the radar signal.
[0025] The FPGA also receives echo signals from multiple different subarrays, and then performs parallel analog-to-digital conversion on the echo signals via an AD (Analog to Digital Converter). It then performs digital down-conversion processing on the multiple digital signals via a DDC (Digital Down Converter) to down-convert them to zero intermediate frequency. Next, each signal undergoes receiver characteristic weighting processing. Finally, the weighted signals are synthesized using a DBF (Digital Beam Forming) module to obtain sum, difference, and differential signals, which are then sent to the GPU for further signal processing.
[0026] The GPU performs pulse compression, MTI (Moving Target Indication), MTD (Moving Target Detection), CFAR (Constant False Alarm Detection), velocity measurement, range measurement, and angle measurement on the received echo signal. The GPU then sends the results of these measurements to the CPU, which can then perform trajectory management and tracking filtering based on the target's velocity, distance, and angle data detected by the GPU. The CPU uses the data processing results for guidance, thus fully simulating the entire workflow of the seeker.
[0027] The following is combined Figure 1 The radar signal simulation processing method provided in the embodiments of this application is described. The GPU in the radar simulation system can serve as the execution entity for the radar signal simulation processing method provided in the embodiments of this application.
[0028] Figure 2 A schematic flowchart of a radar signal simulation processing method provided in one embodiment of this application is shown. Figure 2 As shown, the method includes the following steps S201 to S206: Step S201: Obtain the radar echo signal generated by the field-programmable gate array (FPGA) simulating the signal transmission and reception characteristics of the radar signal.
[0029] In step S201, the GPU can acquire the radar echo signal transmitted by the FPGA, for example, in Figure 1 In the process, after the FPGA simulates the transmission and reception characteristics of the radar signal, it sends the three radar echo signals to the GPU. The GPU then performs pulse compression, MTI, MTD, CFAR, velocity measurement, range measurement, and angle measurement on the received radar echo signals.
[0030] Step S202: Perform signal pulse compression processing on the radar echo signal to obtain a pulse modulated signal.
[0031] In step S202, to improve the accuracy of radar seeker detection, the radar typically performs pulse compression processing on the received radar echo signal to give the processed radar echo signal higher range resolution. As an example, the GPU can use functions from the CUDA Cufft library, which contains various Fourier transform functions, to implement pulse compression of the radar pulse signal. Specifically, the `cufftexecz2z` function in the CUDA Cufft library can be used to perform a single-precision complex number to single-precision complex number FFT (Fast Fourier Transform) or IFFT (Inverse Fast Fourier Transform) to achieve pulse compression of the radar pulse signal and obtain a pulse-modulated signal.
[0032] Step S203: Perform multi-pulse cancellation and moving target detection processing on the pulse modulation signal to obtain a pulse matrix.
[0033] In this embodiment, to suppress stationary clutter within the radar illumination area, improve the signal-to-noise ratio, and reduce the false alarm rate, the GPU performs moving target display processing on the pulse modulation signal. In this embodiment, a multi-pulse cancellation method is used to achieve moving target display of the pulse modulation signal.
[0034] It should be noted that multi-pulse cancellation can reduce the number of pulses processed subsequently, thereby improving the data processing efficiency of the radar simulation system and thus improving the real-time performance of the radar seeker simulation.
[0035] In step S203, after displaying the moving target on the pulse modulation signal, the GPU also performs moving target detection on the pulse modulation signal after the moving target is displayed, so as to suppress clutter in the pulse modulation signal, improve the signal-to-noise ratio of the pulse modulation signal, and improve the accuracy of target detection.
[0036] It should be noted that in step S203, in the pulse matrix obtained after moving target display and moving target detection, each row of the pulse matrix corresponds to one pulse, and each column corresponds to one sampling point of each pulse.
[0037] Step S204: The pulse matrix is subjected to constant false alarm rate (CFAR) detection using thread synchronization to obtain the echo detection result.
[0038] In this embodiment, to detect radar targets against noise and interference backgrounds and extract information such as range, velocity, and angle of the radar targets, constant false alarm rate (CFAR) detection of the pulse matrix is required. As an example, a mean-based CFAR detector can be used to implement CFAR detection of the pulse matrix. Mean-based CFAR detectors may include, but are not limited to, cell average detectors (CA-CFAR), maximum selector detectors (GO-CFAR), and minimum selector detectors (SO-CFAR). Researchers can select one or more of these CFAR detectors to implement CFAR detection of the pulse matrix according to actual needs.
[0039] Furthermore, in this embodiment, a thread-synchronized approach is used to implement constant false alarm rate (CFAR) detection, that is, simultaneously performing two operations on the pulse matrix: summing of sampling points and threshold comparison. This approach can improve the efficiency of CFAR detection, thereby improving the data processing efficiency of the radar simulation system and ensuring the real-time performance of the radar seeker simulation.
[0040] Step S205: If the echo detection result indicates that the radar target has been detected, acquire the distance, speed and angle data of the radar target.
[0041] In step S205, the GPU can determine the distance and velocity of the radar-detected target based on the echo detection results, and determine the angle data of the radar-detected target by sum-difference beam angle measurement. The angle data of the radar-detected target includes azimuth and elevation angles.
[0042] Step S206: The distance, speed, and angle data of the radar-detected target are sent to the central processing unit so that the central processing unit can determine the trajectory information of the radar-detected target based on the distance, speed, and angle data.
[0043] like Figure 1 As shown, after determining the distance, speed, and angle data of the radar target, the GPU sends the aforementioned distance, speed, and angle data to the CPU. The CPU then calculates the position of the radar target based on the distance, speed, and angle data to achieve radar target trajectory management. Then, Kalman filtering is used to achieve tracking filtering to improve positioning accuracy. Finally, the relevant information is sent to other radar systems via UDP (User Datagram Protocol).
[0044] Based on the scheme defined in steps S201 to S206 above, it can be understood that in this embodiment of the application, the simulation of the radar seeker is achieved by combining a field-programmable gate array (FPGA) with a graphics processor (GPU) and a central processing unit (CPU). The FPGA is used to simulate the transmission and reception characteristics of the radar signal, the GPU is used to perform pulse compression, moving target display, moving target detection, constant false alarm rate (CFAR) detection, velocity measurement, range measurement, and angle measurement of the radar echo signal, and the CPU is used to perform track management and tracking filtering. Compared with the related technologies that use a combination of FPGA and digital signal processor (DSP) to simulate the radar seeker, this method improves data processing efficiency and thus enhances the real-time performance of the radar seeker simulation.
[0045] In addition, in the embodiments of this application, during the display of moving targets, a multi-pulse cancellation method is used to process the pulse modulation signal, thereby reducing the amount of data to be processed in subsequent steps, improving data processing efficiency and simulation efficiency, and further improving the real-time performance of radar seeker simulation.
[0046] Furthermore, in this embodiment, constant false alarm rate (CFAR) detection based on thread synchronization is adopted, which improves both the accuracy and efficiency of echo detection, thereby enhancing the real-time performance of radar seeker simulation.
[0047] Therefore, it can be seen that the solution provided in the embodiments of this application can improve the real-time performance of radar seeker simulation.
[0048] The implementation process of the method provided in the embodiments of this application is described below.
[0049] In this embodiment of the application, for the GPU, after performing signal pulse compression processing on the radar echo signal generated by the FPGA, the GPU performs multi-pulse cancellation on the pulse modulation signal to suppress clutter, and further suppresses clutter through moving target detection.
[0050] Specifically, the GPU divides the modulation pulses in the pulse modulation signal into at least one pulse group, performs multi-pulse cancellation processing on the sampling points corresponding to multiple modulation pulses in each pulse group to obtain the target modulation pulse corresponding to each pulse group; then, it performs moving target detection processing on the target modulation pulses corresponding to at least one pulse group to obtain a pulse matrix.
[0051] In the above embodiments, each pulse group includes a plurality of consecutive modulation pulses, wherein the number of modulation pulses contained in each pulse group can be set according to the requirements of multi-pulse cancellation. For example, for three-pulse cancellation, three modulation pulses are set in each pulse group.
[0052] Specifically, in the multi-pulse cancellation process, the GPU first obtains the total number of pulses corresponding to the radar echo signal and the number of sampling points corresponding to each modulation pulse; then, based on the total number of pulses and the number of sampling points corresponding to each modulation pulse, it determines the number of sampling points processed by each thread; and then, through the thread, it performs multi-pulse cancellation processing on the number of sampling points in each pulse group to obtain the target modulation pulse.
[0053] In the above embodiments, each modulation pulse contains multiple sampling points. During multi-pulse cancellation, the GPU needs to operate on each sampling point of each modulation pulse.
[0054] In one example, the GPU uses a three-pulse cancellation method to display moving targets. After the moving target is displayed, the three modulation pulses are processed into one modulation pulse. Thus, the number of pulses after multi-pulse cancellation is two fewer modulation pulses than the number of pulses before processing, reducing the number of modulation pulses to be processed, improving data processing efficiency, and thus improving the real-time performance of radar seeker simulation. In this embodiment, the algorithm is redesigned using the parallel processing characteristics of the GPU. Each thread corresponds to multiple sampling points for calculation. Compared to one thread corresponding to one sampling point, this helps to hide the time required to open threads. Therefore, adjusting the GPU's thread block parameters can effectively speed up signal processing. In this embodiment, 1024 threads are set for each block, and 512 blocks are set. Therefore, the number of sampling points to be calculated for each thread can be determined by formula (1): (1) In formula (1), The number of sampling points required to be calculated for each thread; This represents the total number of pulses. This refers to the distance gate data, i.e., the number of sampling points for each pulse; In this embodiment of the application, the number of thread blocks is... It is 512; In this embodiment of the application, the number of threads is... It is 1024.
[0055] The same operation is performed on each thread, thereby achieving three-pulse cancellation, which can be shown in formula (2): (2) In formula (2), This represents the i-th sampling point of the n-th pulse.
[0056] After completing the three-pulse cancellation, the GPU performs moving target detection on the target modulation pulse. In this embodiment, the GPU performs an FFT on the target modulation pulse in the direction of the radar signal. Similar to signal pulse compression, functions from the CUDA Cufft library, such as the `cufftexecz2z` function, are used. By setting different handles, the moving target detection result, i.e., the pulse matrix, can be obtained. In this pulse matrix, each row represents a modulation pulse.
[0057] Furthermore, after completing the display and detection of moving targets, the GPU performs constant false alarm rate (CFAR) processing on the pulse matrix.
[0058] In one embodiment, the GPU traverses each sampling point in the pulse matrix according to a preset traversal order to obtain the target sampling point; then, based on the correlation between the scene data of the radar scene and the number of protection units, the number of target protection units corresponding to each sampling point in the pulse matrix is determined; then, the thread corresponding to the target sampling point among multiple threads corresponding to the number of target protection units is used to determine the constant false alarm threshold corresponding to the target sampling point; finally, the sampling point data corresponding to the target sampling point is compared with the constant false alarm threshold to obtain the echo detection result.
[0059] It should be noted that in this embodiment, the GPU uses a kernel to implement constant false alarm rate (CFAR) detection. The kernel can be divided into two parts: the first part is used to calculate the data sum within the sampling point group corresponding to each target sampling point in the antenna matrix, and the second part is used to compare each target sampling point with the above data sum and the threshold, thereby achieving thread synchronization.
[0060] In one example, such as in Figure 3 In the echo matrix shown, the white dot in the middle is the target sampling point, sampling point groups ①, ②, ③, and ④ are reference cells, and the area between the reference cells and the sampling points is a guard cell. For the reference cells, sampling point group ① and sampling point group ③ contain the same number of sampling points, and sampling point group ② and sampling point group ④ contain the same number of sampling points. For all sampling points that need to be CFAR performed, the sampling points of sampling point group ① and sampling point group ③ overlap and cover all sampling points. Therefore, without considering the position of the middle point (i.e., the position of the target sampling point), all sampling points in the entire echo matrix that could potentially become sampling point group ① and sampling point group ③ are summed separately to reduce the amount of computational redundancy. For sampling point group ② and sampling point group ④, the same method is used to sum all sampling points that could potentially become sampling point group ② and sampling point group ④. Since guard cells and reference cells are set, some sampling points at the edge of the echo matrix do not have guard cells or reference cells. In this embodiment, the above summation operation is not performed on sampling points that do not have guard cells or reference cells. Therefore, in this embodiment, the total number of threads is at least the number of all possible sampling points in the echo matrix that could be in sampling point group ① and sampling point group ③. Since there are 1024 threads in one block in this embodiment, there are a total of... One block.
[0061] Furthermore, after summing the data, the GPU uses a thread corresponding to the target sampling point from among multiple threads corresponding to the number of target protection units to determine the constant false alarm threshold corresponding to the target sampling point. Specifically, the GPU obtains the number of reference units and the reference unit values corresponding to the reference units for the target sampling point; then, it determines the constant false alarm threshold corresponding to the target sampling point based on the number of reference units, the reference unit values, and the preset false alarm probability.
[0062] In this embodiment, each thread corresponds to a sampling point, used to calculate the sum of the sampling point groups surrounding that sampling point, and then calculates the threshold of that sampling point based on the false alarm probability, the number of reference units, and the false alarm probability. As an example, the constant false alarm threshold can be determined by formula (3): (3) In formula (3), The constant false alarm threshold; The number of reference units can be determined based on the application scenario of the radar seeker, such as land attack, air attack, or sea attack scenarios. The reference element value is the value corresponding to the reference element; This is the false alarm probability, which can be determined based on application requirements.
[0063] Furthermore, after determining the constant false alarm threshold, the GPU can compare the numerical values of the sampling point data corresponding to the target sampling point with the constant false alarm threshold to obtain the echo detection result.
[0064] Specifically, if the sampling point data corresponding to the target sampling point is greater than the constant false alarm threshold, the sampling point identifier corresponding to the target sampling point is set as the first identifier; if the sampling point data corresponding to the target sampling point is less than or equal to the constant false alarm threshold, the sampling point identifier corresponding to the target sampling point is set as the second identifier.
[0065] In the macro described above, the first identifier indicates that the target sampling point is located on the radar detection target, and the second identifier indicates that the target sampling point is located outside the radar detection target. As an example, the first identifier can be 1, and the second identifier can be 0, meaning that if the sampling point data is large, it can be determined that the sampling point is located on the radar detection target.
[0066] This completes the constant false alarm rate (CFAR) detection of the radar echo signal. If the echo detection result indicates that a radar target has been detected, the GPU continues to acquire the radar target's distance, velocity, and angle data.
[0067] Specifically, the GPU obtains a first sampling point with a first identifier from the radar echo signal; then, it obtains the Doppler frequency shift, signal wavelength, range gate length, and range gate identifier corresponding to the first sampling point, and determines the velocity corresponding to the first sampling point based on the Doppler frequency shift and signal wavelength; at the same time, it determines the distance corresponding to the first sampling point based on the range gate length and range gate identifier, and extracts the angle data corresponding to the first sampling point from the pulse matrix.
[0068] In one example, for the first sampling point identified as the first identifier, the GPU determines the velocity and distance using formulas (4) and (5) respectively: (4) (5) In formula (4), The radial velocity corresponding to the first sampling point; For Doppler frequency shift; The wavelength is the signal wavelength.
[0069] In formula (5), The slant range of the radar is used to characterize the distance corresponding to the first sampling point; This is the distance to the gate length; This is a distance gate identifier.
[0070] For angle data, the GPU can obtain the first data of the antenna difference channel corresponding to the first sampling point and the second data of the antenna and channel from the pulse matrix; then, calculate the ratio of the first data to the second data to obtain the difference and ratio corresponding to the first sampling point; and then determine the angle data that matches the difference and ratio corresponding to the first sampling point based on the preset correlation between the difference and ratio and the angle.
[0071] In one example, the GPU obtains the difference and ratio of the echo signal by retrieving the data from the antenna difference channel and the antenna and channel data from the pulse matrix, and calculating the ratio between the two. Then, it looks up the obtained difference and ratio results in a table to obtain the corresponding angle data.
[0072] It should be noted that in the above example, the preset data table stores the correlation between the difference and ratio and the angle. After determining the difference and ratio, the angle data can be determined through this data table. In addition, during the table lookup process, the GPU's reduction algorithm can be used to improve the GPU's table lookup speed, thereby improving data processing efficiency and the efficiency of radar seeker simulation.
[0073] This concludes the introduction to the methods provided in the examples of this application.
[0074] This application also provides a radar signal simulation processing device, applied in the graphics processor of a radar simulation system. The radar simulation system further includes a field-programmable gate array (FPGA) and a central processing unit (CPU). Figure 4 As shown, the device 400 includes: a signal acquisition module 401, a pulse compression module 402, a first detection module 403, a second detection module 404, a target data acquisition module 405, and a trajectory detection module 406.
[0075] The signal acquisition module 401 is used to acquire the radar echo signal generated by the field programmable gate array simulating the signal transmission and reception characteristics of the radar signal. The pulse compression module 402 is used to perform signal pulse compression processing on the radar echo signal to obtain a pulse modulated signal. The first detection module 403 is used to perform multi-pulse cancellation and moving target detection processing on the pulse modulation signal to obtain a pulse matrix. The second detection module 404 is used to perform constant false alarm rate (CFAR) detection on the pulse matrix using a thread-synchronous method to obtain the echo detection result. The target data acquisition module 405 is used to acquire the distance, velocity, and angle data of the radar-detected target when the echo detection result indicates that the radar-detected target has been detected; The track detection module 406 is used to send the distance, speed and angle data of the radar-detected target to the central processing unit, so that the central processing unit can determine the track information of the radar-detected target based on the distance, speed and angle data.
[0076] In one embodiment, the first detection module includes: a pulse group division module, a multi-pulse cancellation module, and a moving target detection module. The pulse group division module is used to divide the modulated pulses in the pulse modulation signal into at least one pulse group, wherein each pulse group includes multiple consecutive modulated pulses; the multi-pulse cancellation module is used to perform multi-pulse cancellation processing on the sampling points corresponding to the multiple modulated pulses in each pulse group to obtain the target modulated pulse corresponding to each pulse group; the moving target detection module is used to perform moving target detection processing on the target modulated pulse corresponding to at least one pulse group to obtain a pulse matrix.
[0077] In one embodiment, the multi-pulse cancellation module is specifically used to obtain the total number of pulses corresponding to the radar echo signal and the number of sampling points corresponding to each modulation pulse; determine the number of sampling points processed by each thread based on the total number of pulses and the number of sampling points corresponding to each modulation pulse; and perform multi-pulse cancellation processing on the number of sampling points in each pulse group through the thread to obtain the target modulation pulse.
[0078] In one embodiment, the second detection module includes: a data traversal module, a quantity determination module, a threshold determination module, and a threshold comparison module. The data traversal module is used to traverse each sampling point in the pulse matrix according to a preset traversal order to obtain target sampling points. The quantity determination module is used to determine the number of target protection units corresponding to each sampling point in the pulse matrix based on the correlation between scene data of the radar's location and the number of protection units. The threshold determination module is used to determine the constant false alarm threshold (CFAR) corresponding to the target sampling point using the thread corresponding to the target sampling point from among multiple threads corresponding to the number of target protection units. The threshold comparison module is used to compare the sampling point data corresponding to the target sampling point with the CFAR threshold to obtain the echo detection result.
[0079] In one embodiment, the threshold determination module is specifically used to obtain the number of reference units and the reference unit value corresponding to the reference unit corresponding to the target sampling point; and to determine the constant false alarm threshold corresponding to the target sampling point based on the number of reference units, the reference unit value, and the preset false alarm probability.
[0080] In one embodiment, the echo detection result includes at least the sampling point identifier corresponding to the target sampling point. Specifically, the threshold comparison module is used to set the sampling point identifier corresponding to the target sampling point as a first identifier when the sampling point data corresponding to the target sampling point is greater than the constant false alarm threshold. The first identifier is used to indicate that the target sampling point is located on the radar detection target. When the sampling point data corresponding to the target sampling point is less than or equal to the constant false alarm threshold, the sampling point identifier corresponding to the target sampling point is set as a second identifier. The second identifier is used to indicate that the target sampling point is located outside the radar detection target.
[0081] In one embodiment, the target data acquisition module includes: a sampling point extraction module, a data acquisition module, a velocity determination module, a distance determination module, and an angle determination module. Specifically, the sampling point extraction module is used to acquire a first sampling point identified by a first identifier from the radar echo signal; the data acquisition module is used to acquire the Doppler frequency shift, signal wavelength, range gate length, and range gate identifier corresponding to the first sampling point; the velocity determination module is used to determine the velocity corresponding to the first sampling point based on the Doppler frequency shift and signal wavelength; the distance determination module is used to determine the distance corresponding to the first sampling point based on the range gate length and range gate identifier; and the angle determination module is used to extract the angle data corresponding to the first sampling point from the pulse matrix.
[0082] In one embodiment, the angle determination module is specifically used to obtain the first data of the antenna difference channel corresponding to the first sampling point and the second data corresponding to the antenna and channel from the pulse matrix; calculate the ratio of the first data to the second data to obtain the difference and ratio corresponding to the first sampling point; and determine the angle data that matches the difference and ratio corresponding to the first sampling point based on the preset correlation between the difference and ratio and the angle.
[0083] The radar signal simulation processing device provided in this application embodiment can realize the various processes implemented in the aforementioned method embodiment. To avoid repetition, it will not be described again here.
[0084] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the units and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.
[0085] Figure 5 A schematic diagram of the hardware structure of the electronic device provided in an embodiment of this application is shown.
[0086] The electronic device may include a processor 501 and a memory 502 storing computer program instructions.
[0087] Specifically, the processor 501 may include a central processing unit (CPU), an application-specific integrated circuit (ASIC), or one or more integrated circuits that can be configured to implement the embodiments of this application.
[0088] Memory 502 may include mass storage for data or instructions. For example, and not limitingly, memory 502 may include a hard disk drive (HDD), floppy disk drive, flash memory, optical disk, magneto-optical disk, magnetic tape, or Universal Serial Bus (USB) drive, or a combination of two or more of these. Where appropriate, memory 502 may include removable or non-removable (or fixed) media. Where appropriate, memory 502 may be internal or external to the integrated gateway disaster recovery device. In a particular embodiment, memory 502 is non-volatile solid-state memory.
[0089] Memory may include read-only memory (ROM), random access memory (RAM), disk storage media devices, optical storage media devices, flash memory devices, and electrical, optical, or other physical / tangible memory storage devices. Therefore, typically, memory includes one or more tangible (non-transitory) computer-readable storage media (e.g., memory devices) encoded with software including computer-executable instructions, and when the software is executed (e.g., by one or more processors), it is operable to perform the operations described with reference to the methods according to one aspect of this disclosure.
[0090] The processor 501 reads and executes computer program instructions stored in the memory 502 to implement any of the radar signal simulation processing methods in the above embodiments.
[0091] In one example, the electronic device may also include a communication interface 503 and a bus 510. Wherein, as... Figure 5 As shown, the processor 501, memory 502, and communication interface 503 are connected through bus 510 and complete communication with each other.
[0092] The communication interface 503 is mainly used to realize communication between various modules, devices, units and / or equipment in the embodiments of this application.
[0093] Bus 510 includes hardware, software, or both, that couples components of an electronic device together. For example, and not limitingly, the bus may include an Accelerated Graphics Port (AGP) or other graphics bus, an Enhanced Industry Standard Architecture (EISA) bus, a Front Side Bus (FSB), HyperTransport (HT) interconnect, an Industry Standard Architecture (ISA) bus, an Infinite Bandwidth Interconnect, a Low Pin Count (LPC) bus, a memory bus, a Microchannel Architecture (MCA) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express (PCI-X) bus, a Serial Advanced Technology Attachment (SATA) bus, a Video Electronics Standards Association Local (VLB) bus, or other suitable buses, or combinations of two or more of these. Where appropriate, bus 510 may include one or more buses. Although specific buses are described and illustrated in embodiments of this application, this application contemplates any suitable bus or interconnect.
[0094] Furthermore, in conjunction with the radar signal simulation processing method in the above embodiments, this application embodiment can provide a computer-readable storage medium for implementation. This computer-readable storage medium stores computer program instructions; when these computer program instructions are executed by a processor, they implement any of the radar signal simulation processing methods in the above embodiments.
[0095] Furthermore, in conjunction with the radar signal simulation processing method in the above embodiments, this application embodiment can provide a computer program product for implementation. When the instructions in this computer program product are executed by the processor of an electronic device, the electronic device performs the radar signal simulation processing method as described in any of the above embodiments.
[0096] It should be clarified that this application is not limited to the specific configurations and processes described above and shown in the figures. For the sake of brevity, detailed descriptions of known methods are omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of this application is not limited to the specific steps described and shown. Those skilled in the art can make various changes, modifications, and additions, or change the order of steps, after understanding the spirit of this application.
[0097] The functional modules shown in the above-described block diagram can be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, they can be, for example, electronic circuits, application-specific integrated circuits (ASICs), appropriate firmware, plug-ins, function cards, etc. When implemented in software, the elements of this application are programs or code segments used to perform the required tasks. Programs or code segments can be stored on a machine-readable medium or transmitted over a transmission medium or communication link via data signals carried on a carrier wave. "Machine-readable medium" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, fiber optic media, radio frequency (RF) links, etc. Code segments can be downloaded via computer networks such as the Internet, intranets, etc.
[0098] It should also be noted that the exemplary embodiments mentioned in this application describe methods or systems based on a series of steps or apparatus. However, this application is not limited to the order of the above steps; that is, the steps can be performed in the order mentioned in the embodiments, or in a different order, or several steps can be performed simultaneously.
[0099] The above description, with reference to flowchart illustrations and / or block diagrams of radar signal simulation processing methods, apparatuses, and electronic devices according to embodiments of the present disclosure, illustrates various aspects of this disclosure. It should be understood that each block in the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to create a machine such that these instructions, executable via the processor of the computer or other programmable data processing apparatus, enable the implementation of the functions / actions specified in one or more blocks of the flowchart illustrations and / or block diagrams. Such a processor can be, but is not limited to, a general-purpose processor, a special-purpose processor, a special application processor, or a field-programmable logic circuit. It is also understood that each block in the block diagrams and / or flowchart illustrations, and combinations of blocks in the block diagrams and / or flowchart illustrations, can also be implemented by dedicated hardware performing the specified functions or actions, or can be implemented by a combination of dedicated hardware and computer instructions.
[0100] The above description is merely a specific implementation of this application. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, modules, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here. It should be understood that the protection scope of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the protection scope of this application.
Claims
1. A method of simulation processing of a radar signal, characterized by, The method is applied to a graphics processor used in a radar simulation system, which further includes a field-programmable gate array (FPGA) and a central processing unit (CPU). Acquire the radar echo signal generated by the field-programmable gate array simulating the signal transmission and reception characteristics of the radar signal; The radar echo signal is subjected to signal pulse compression processing to obtain a pulse modulated signal; The pulse modulation signal is subjected to multi-pulse cancellation and moving target detection processing to obtain a pulse matrix; The pulse matrix is subjected to constant false alarm rate (CFAR) detection using thread synchronization to obtain echo detection results. If the echo detection result indicates that a radar-detected target has been detected, the distance, velocity, and angle data of the radar-detected target are acquired. The distance, speed, and angle data of the radar-detected target are sent to the central processing unit, so that the central processing unit can determine the trajectory information of the radar-detected target based on the distance, speed, and angle data.
2. The method of claim 1, wherein, The process of performing multi-pulse cancellation and moving target detection on the pulse modulation signal to obtain a pulse matrix includes: The modulation pulses in the pulse modulation signal are divided into at least one pulse group, wherein each pulse group includes a plurality of consecutive modulation pulses; Multi-pulse cancellation processing is performed on the sampling points corresponding to multiple modulation pulses in each pulse group to obtain the target modulation pulse corresponding to each pulse group; The target modulation pulses corresponding to the at least one pulse group are subjected to moving target detection processing to obtain the pulse matrix.
3. The method of claim 2, wherein, The step of performing multi-pulse cancellation processing on the sampling points corresponding to multiple modulation pulses in each pulse group to obtain the target modulation pulse corresponding to each pulse group includes: Obtain the total number of pulses corresponding to the radar echo signal and the number of sampling points corresponding to each modulation pulse; The number of sampling points processed by each thread is determined based on the total number of pulses and the number of sampling points corresponding to each modulation pulse. The target modulation pulse is obtained by performing multi-pulse cancellation processing on the number of sampling points in each pulse group using a thread.
4. The method of claim 1, wherein, The method of using thread synchronization to perform constant false alarm rate (CFAR) detection on the pulse matrix to obtain echo detection results includes: The target sampling point is obtained by traversing each sampling point in the pulse matrix according to the preset traversal order. Based on the correlation between scene data of the radar scene and the number of protection units, the number of target protection units corresponding to each sampling point in the pulse matrix is determined; The constant false alarm threshold corresponding to the target sampling point is determined by using the thread corresponding to the target sampling point from among multiple threads corresponding to the number of target protection units; The echo detection result is obtained by comparing the sampling point data corresponding to the target sampling point with the constant false alarm threshold.
5. The method of claim 4, wherein, The step of determining the constant false alarm threshold corresponding to the target sampling point by using the thread corresponding to the target sampling point from among multiple threads corresponding to the number of target protection units includes: Obtain the number of reference units corresponding to the target sampling point and the reference unit value corresponding to the reference unit; The constant false alarm threshold corresponding to the target sampling point is determined based on the number of reference units, the value of the reference units, and the preset false alarm probability.
6. The method of claim 4, wherein, The echo detection result includes at least the sampling point identifier corresponding to the target sampling point, wherein the comparison of the sampling point data corresponding to the target sampling point with the constant false alarm threshold to obtain the echo detection result includes: If the sampling point data corresponding to the target sampling point is greater than the constant false alarm threshold, the sampling point identifier corresponding to the target sampling point is set as a first identifier, which is used to indicate that the target sampling point is located on the radar detection target; If the sampling point data corresponding to the target sampling point is less than or equal to the constant false alarm threshold, the sampling point identifier corresponding to the target sampling point is set as a second identifier, which is used to indicate that the target sampling point is located outside the radar detection target.
7. The method of claim 6, wherein, The acquisition of the distance, velocity, and angle data of the radar-detected target includes: Obtain the first sampling point identified by the first identifier from the radar echo signal; Obtain the Doppler frequency shift, signal wavelength, range gate length, and range gate identifier corresponding to the first sampling point; The velocity corresponding to the first sampling point is determined based on the Doppler frequency shift and the signal wavelength. The distance corresponding to the first sampling point is determined based on the distance gate length and the distance gate identifier; The angle data corresponding to the first sampling point is extracted from the pulse matrix.
8. The method of claim 7, wherein, The step of extracting the angle data corresponding to the first sampling point from the pulse matrix includes: Obtain the first data of the antenna differential channel corresponding to the first sampling point and the second data corresponding to the antenna and channel from the pulse matrix; Calculate the ratio of the first data to the second data to obtain the difference and ratio corresponding to the first sampling point; Based on the preset correlation between the difference and ratio and the angle, the angle data that matches the difference and ratio corresponding to the first sampling point is determined.
9. A simulation processing apparatus of a radar signal, characterized by comprising: The graphics processor used in the radar simulation system, which also includes a field-programmable gate array (FPGA) and a central processing unit (CPU), comprises: The signal acquisition module is used to acquire the radar echo signal generated by the field-programmable gate array simulating the signal transmission and reception characteristics of the radar signal. The pulse compression module is used to perform signal pulse compression processing on the radar echo signal to obtain a pulse modulated signal; The first detection module is used to perform multi-pulse cancellation and moving target detection processing on the pulse modulation signal to obtain a pulse matrix; The second detection module is used to perform constant false alarm rate (CFAR) detection on the pulse matrix using a thread-synchronous method to obtain the echo detection result. The target data acquisition module is used to acquire the distance, velocity, and angle data of the radar-detected target when the echo detection result indicates that the radar-detected target has been detected; The track detection module is used to send the distance, speed, and angle data of the radar-detected target to the central processing unit, so that the central processing unit can determine the track information of the radar-detected target based on the distance, speed, and angle data.
10. An electronic device, comprising: The electronic device comprises a processor and a memory storing computer program instructions; the processor executes the computer program instructions to implement the simulation processing method of the radar signal according to any one of claims 1-8.