A method for improving the performance of copper indium gallium selenide and copper zinc tin sulfide selenide solar cells by bias driving ion migration

Abstract

This invention provides a method for improving the performance of copper indium gallium selenide (CIGS) and copper zinc tin sulfide selenide (CZTSSe) solar cells by controlling the internal ion migration of these cells through an applied bias voltage. This method applies a bias voltage of specific magnitude, direction, and duration to the CIGS and CZTSSe solar cells, driving the directional migration of mobile ions within the devices, thereby controlling the elemental distribution and interfacial chemical state. Specifically, Na ions are enriched at the heterojunction interface, while a small amount of Cd and In ions diffuse downwards to the absorber layer. This effectively passivates harmful defects at the interface and grain boundaries, reduces carrier recombination losses, improves carrier separation and transport characteristics, and ultimately enhances the photovoltaic performance and conversion efficiency of the devices. This invention offers a simple and highly controllable process, providing a new technical approach for the fabrication of high-performance CIGS and CZTSSe solar cells.

Description

Technical Field

[0001] This invention belongs to the field of thin-film solar cell technology, specifically relating to a method for improving the photoelectric conversion performance of copper indium gallium selenide (CIGS) and copper zinc tin sulfur selenide (CZSS) thin-film solar cells by applying a bias voltage to drive the migration of mobile ions inside the cell. Background Technology

[0002] Copper indium gallium selenide (Cu(In,Ga)Se2, CIGS) and copper zinc tin sulfide selenide (Cu2ZnSn(S,Se)4, CZTSSe) solar cells are both typical copper-based thin-film solar cells, sharing common characteristics such as high absorption coefficients, tunable band gaps, and suitability for large-area and flexible device fabrication. These two types of cells have identical device structures, except for different light-absorbing layer materials. Therefore, they also exhibit significant similarities in fabrication processes and modification strategies.

[0003] Currently, research on improving the performance of CIGS and CZTSSe devices mainly focuses on ion doping to passivate bulk phase or interface defects in the absorber layer. Current research extensively concentrates on introducing alkali metal ions and Ag... + Cd 2+ In 3+ Metal ions can be introduced to effectively improve the crystallinity of thin films, regulate band structure, reduce deep-level defect density, and optimize carrier transport characteristics, thereby significantly improving device performance. It is worth noting that the introduction of these exogenous ions not only alters the intrinsic defect chemical state of the material but may also form new ion migration channels in the absorption layer, grain boundaries, interfaces, and even the entire device structure.

[0004] However, most existing studies focus on static doping effects, with little research on the dynamic migration behavior of ions inside CIGS and CZTSSe solar cells and their impact on device performance. Summary of the Invention

[0005] The purpose of this invention is to provide a method for driving the directional migration of ions inside CIGS cells and CZTSSe solar cells by applying an external bias voltage, thereby achieving controllable adjustment of specific cation distribution and effective passivation of defects, and thus significantly improving the photoelectric conversion efficiency of the device.

[0006] To achieve the above objectives, the present invention provides the following technical solution: A method for improving the performance of CIGS and CZTSSe solar cells by bias-driven ion migration includes: Step 1) Fabricate a complete CIGS / CZTSSe solar cell. The CIGS / CZTSSe solar cell device includes, in sequence, a substrate, a back electrode, a CIGS / CZTSSe absorber layer, a cadmium sulfide buffer layer, an intrinsic zinc oxide layer, an indium tin oxide transparent conductive layer, and a silver grid electrode. Step 2) Place the prepared CIGS / CZTSSe device on the test stage and connect it to a regulated power supply. Connect the positive terminal of the power supply to the back electrode of the device and the negative terminal of the power supply to the silver gate electrode to form a forward bias application circuit; or connect the positive terminal of the power supply to the silver gate electrode and the negative terminal of the power supply to the back electrode to form a reverse bias application circuit. Step 3) Set the magnitude and duration of the applied bias voltage; Step 4) Apply a bias voltage according to the set parameters, and use the electric field force to drive the mobile cations in the CIGS / CZTSSe device to migrate in a directional manner, thereby changing their distribution state at the device scale.

[0007] Preferably, step 1) involves the following process to prepare a complete CIGS solar cell device: Clean the molybdenum glass substrate, and then perform ozone treatment; The pre-prepared CIGS precursor solution was spin-coated onto the treated molybdenum substrate and then immediately placed on a hot plate for baking. This process was repeated several times to prepare the CIGS preform. The CIGS prefabricated layer is placed in a graphite box and selenized and annealed using a rapid thermal annealing furnace to obtain the CIGS absorber layer. Next, a cadmium sulfide buffer layer was prepared by water bath deposition, an intrinsic zinc oxide layer was prepared by magnetron sputtering, and an indium tin oxide window layer was prepared sequentially. Finally, Ag gate electrodes were prepared by thermal evaporation to obtain a complete CIGS solar cell device.

[0008] Preferably, step 1) of preparing a complete CZTSSe solar cell device specifically includes the following process: Clean the molybdenum glass substrate, and then perform ozone treatment; The pre-prepared CZTS precursor solution was spin-coated onto the treated molybdenum substrate and then immediately placed on a hot plate for baking. This process was repeated several times to prepare the CZTS preform. The CZTS prefabricated layer was placed in a graphite box and selenized and annealed using a rapid thermal annealing furnace to obtain the CZTSSe absorber layer. Next, a cadmium sulfide buffer layer was prepared by water bath deposition, an intrinsic zinc oxide layer was prepared by magnetron sputtering, and an indium tin oxide window layer was prepared sequentially. Finally, Ag gate electrodes were prepared by thermal evaporation to obtain a complete CZTSSe solar cell device.

[0009] Preferably, the test bench conditions in step 2) are dark, with a room temperature of 25±2℃ and a relative humidity of 10±2%.

[0010] Preferably, the bias voltage applied in step 3) is a DC voltage.

[0011] Preferably, for CIGS devices, the forward bias voltage range is 1 ~ 5 V, the reverse bias voltage range is -1.2 ~ -0.3 V, and the application time is 5 minutes to 12 hours.

[0012] Preferably, for CZTSSe devices, the forward bias voltage range is 1 ~ 4 V, the reverse bias voltage range is -0.8 ~ -0.3 V, and the application time is 5 minutes to 12 hours.

[0013] Preferably, for CIGS devices, step 3) specifically involves first applying a forward bias voltage and then applying a reverse bias voltage, wherein the forward bias voltage is 4V and the application time is 6h, and the reverse bias voltage is -0.9V and the application time is 2h.

[0014] Preferably, for CZTSSe devices, step 3) specifically involves first applying a forward bias voltage and then applying a reverse bias voltage, wherein the forward bias voltage is 3V and the application time is 6h, and the reverse bias voltage is -0.6V and the application time is 2h.

[0015] Preferably, the mobile cation within the CIGS / CZTSSe device in step 4) specifically refers to Na. + Cd 2+ and In 3+ .

[0016] Compared with existing technologies, the invention has the following beneficial effects: This invention optimizes the photoelectric performance of CIGS and CZTSSe solar cells by applying a bias voltage. The process is simple to operate, requires no changes to the device structure or additional doping ions, and can be directly applied as an independent post-processing step to CIGS / CZTSSe devices. By precisely controlling the magnitude, direction, and application time of the bias voltage, specific ion migration can be directionally driven, achieving selective passivation of harmful defects in the absorption layer. This method is low-cost, requires simple equipment, and has good prospects for industrial application, providing a new approach for the large-scale production of low-cost, high-efficiency CIGS / CZTSSe thin-film solar cells. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the device for improving the performance of copper indium gallium selenide (CIGS) and copper zinc tin sulfur selenide (CFS) solar cells by bias-driven ion migration according to the present invention.

[0018] Figure 2 The current-voltage curves of the CIGS devices in Example 35 and Comparative Example 35 are shown.

[0019] Figure 3 The current-voltage curves of the CZTSSe device in Example 36 and Comparative Example 36 are shown.

[0020] Figure 4 The SIMS curves show the distribution of Na, Cd, and In elements in the CIGS devices before and after applying bias voltage in Example 35 and Comparative Example 35.

[0021] Figure 5 The SIMS curves show the distribution of Na, Cd, and In elements in the CZTSSe device before and after applying bias voltage in Example 36 and Comparative Example 36. Detailed Implementation

[0022] This invention discloses a method for improving the performance of CIGS and CZTSSe solar cells by bias-driven ion migration. By applying bias voltages of different magnitudes, directions, and durations to both ends of the CIGS or CZTSSe solar cell, the cation migration behavior inside the cell is modulated, causing mobile cations to redistribute at the device scale and passivating harmful defects in the corresponding regions, thereby optimizing the photoelectric performance of CIGS and CZTSSe solar cells.

[0023] To provide a better understanding of the present invention, it will now be further described by way of embodiments.

[0024] The following embodiments all employ a method for improving the performance of copper indium gallium selenide (CIGS) and copper zinc tin sulfur selenide (CFS) solar cells by bias-driven ion migration, including the following steps: 1) Fabrication of complete CIGS or CZTSSe solar cell devices, specifically including: cleaning the molybdenum glass substrate, followed by 15 minutes of ozone treatment. For CIGS solar cells: spin-coating a pre-prepared CIGS precursor solution onto the treated molybdenum substrate, then immediately baking it on a 290°C hot stage for 2 minutes. This process is repeated 9 times to obtain the CIGS preform. The CIGS preform is placed in a graphite box and subjected to selenization annealing using a rapid thermal annealing furnace at 550°C for 15 minutes to obtain the CIGS absorber layer. For CZTSSe solar cells: spin-coating a pre-prepared CZTS precursor solution onto the treated molybdenum substrate, then immediately baking it on a 290°C hot stage for 2 minutes. This process is repeated 9 times to obtain the CZTS preform. The CZTS preform is placed in a graphite box and subjected to selenization annealing using a rapid thermal annealing furnace at 540°C for 15 minutes to obtain the CZTSSe absorber layer. Next, for both types of cells, a cadmium sulfide buffer layer with a thickness of approximately 50 nm was prepared by water bath deposition, an intrinsic zinc oxide layer with a thickness of approximately 50 nm was prepared by magnetron sputtering, and an indium tin oxide window layer with a thickness of approximately 200 nm was prepared. Finally, an Ag gate electrode was prepared by thermal evaporation to obtain a complete CIGS / CZTSSe solar cell device.

[0025] 2) At 25°C, 100mW cm 2 The performance parameters of CIGS or CZTSSe cells were tested under irradiation intensity and AM1.5G spectrum, including photoelectric conversion efficiency (PCE) and open-circuit voltage (V). OC ), fill factor (FF), short-circuit current density (J) SC ).

[0026] 3) Place the prepared CIGS / CZTSSe device on the test stage and connect it to a regulated power supply. Ensure the test environment is dark, at room temperature (25±2 ℃), and dry (10±2% RH). Connect the positive terminal of the power supply to the back electrode (molybdenum electrode side) of the device and the negative terminal of the power supply to the silver gate electrode to form a forward bias circuit; or connect the positive terminal of the power supply to the silver gate electrode and the negative terminal of the power supply to the back electrode to form a reverse bias circuit.

[0027] 4) Set the bias range. For CIGS solar cells: the forward bias range is 1 ~ 5 V, the reverse bias range is -1.2 ~ -0.3 V, and the application time is 0.5h ~ 9h. For CZTSSe solar cells: the reverse bias range is -0.8 ~ -0.3 V, the forward bias range is 1 ~ 4 V, and the application time is 0.5h ~ 9h.

[0028] 5) Apply a bias voltage according to the set parameters, and use the electric field force to drive the mobile cations in the CIGS or CZTSSe device to undergo directional migration behavior.

[0029] 6) At 25°C, 100mW cm 2 The photoelectric conversion efficiency (PCE) of CIGS cells or CZTSSe cells was tested under irradiation intensity and AM1.5G spectrum.

[0030] Example 1 1) Clean the molybdenum glass substrate and then perform ozone treatment for 15 minutes.

[0031] Fabrication of a complete CIGS solar cell device: A pre-prepared CIGS precursor solution (elemental molar ratio of n(Cu):(n(In)+n(Ga)) = 0.93:1, n(Ga):(n(In)+n(Ga)) = 0.34:1) was spin-coated onto a pre-treated molybdenum substrate at 3000 rpm for 25 s. The substrate was then immediately placed on a 350℃ hot plate and baked for 2 min. This process was repeated 8 times to obtain the CIGS prefabricated layer. The CIGS prefabricated layer was placed in a graphite box and subjected to selenization annealing using a rapid thermal annealing furnace. The annealing conditions were: heating to 550℃ at 9 ℃ / s and holding for 15 min to obtain the CIGS absorber layer. Next, a cadmium sulfide buffer layer with a thickness of approximately 50 nm was prepared sequentially using a water bath deposition method, an intrinsic zinc oxide layer with a thickness of approximately 50 nm was prepared using magnetron sputtering, and an indium tin oxide window layer with a thickness of approximately 200 nm. Finally, Ag gate electrodes were prepared by thermal evaporation to obtain a complete CIGS solar cell device.

[0032] Fabrication of a complete CZTSSe solar cell device: A pre-prepared CZTS precursor solution (elemental molar ratio of n(Cu):n(Sn) = 1.6:1, n(Zn):n(Sn) = 1.3:1, n(Cu):n(Zn+Sn) = 0.75:1) was spin-coated onto a treated molybdenum substrate at a spin speed of 3000 rpm for 120 s. The substrate was then immediately placed on a 290℃ hot plate and baked for 2 min. This process was repeated 9 times to obtain the CZTS prefabricated layer. The CZTS prefabricated layer was placed in a graphite box and subjected to selenization annealing using a rapid thermal annealing furnace. The annealing conditions were: heating at 9 ℃ / s to 540℃ and holding for 15 min to obtain the CZTSSe absorber layer. Next, a cadmium sulfide buffer layer with a thickness of approximately 50 nm was prepared sequentially using a water bath deposition method, an intrinsic zinc oxide layer with a thickness of approximately 50 nm was prepared using a magnetron sputtering method, and an indium tin oxide window layer with a thickness of approximately 200 nm. Finally, an Ag gate electrode was prepared using thermal evaporation to obtain a complete CZTSSe solar cell device.

[0033] 2) At 25°C, 100mW cm 2 Performance parameters of CIGS / CZTSSe cells were tested under irradiation intensity and AM1.5G spectrum, including photoelectric conversion efficiency (PCE) and open-circuit voltage (V). OC ), fill factor (FF), short-circuit current density (J) SC Before testing, the light intensity was calibrated using a standard silicon cell.

[0034] 3) Place the prepared CIGS / CZTSSe device on the test stage and connect it to a regulated power supply. Ensure the test environment is dark, at room temperature (25±2 ℃), and dry (10±2% RH). Connect the positive terminal of the power supply to the back electrode (molybdenum electrode side) of the device and the negative terminal of the power supply to the silver gate electrode to form a forward bias circuit. 4) Set the applied bias voltage to 1 V and the application time to 0.5 h.

[0035] 5) Immediately after the bias voltage is applied, maintain a temperature of 25°C and a maximum voltage of 100mW / cm. 2 The photoelectric conversion efficiency (PCE) of CIGS cells or CZTSSe cells was tested under irradiation intensity and AM1.5G spectrum.

[0036] Comparative Examples 1-20 Except for omitting the step of applying bias voltage, everything else is the same as in Example 1. It should be noted that due to different test batches, the test results may vary slightly, which falls within the scope of experimental error.

[0037] Example 2-20 By keeping the bias application time constant, we explored the optimal values ​​for applying forward and reverse bias separately.

[0038] The specific test results of Comparative Examples 1-20 and Examples 1-20 are shown in Table 1. Among them, a bias voltage was applied to the sample of Comparative Example 2 to obtain Example 2. In this way, each example and comparative example is processed in a one-to-one correspondence to ensure that the performance comparison is comparative.

[0039] Table 1. Effect of different bias voltage values ​​on the efficiency of CIGS / CZTSSe cells Table 1 shows that applying appropriate forward or reverse bias voltages can improve the performance of both CIGS and CZTSSe devices. For CIGS devices, the optimal forward bias voltage is determined to be 4 V, and the optimal reverse bias voltage is -0.9 V. For CZTSSe devices, the optimal forward bias voltage is determined to be 3 V, and the optimal reverse bias voltage is -0.6 V.

[0040] Comparative Examples 21-34 Except for not performing the step of applying bias voltage, everything else is the same as in Example 1.

[0041] Examples 21-34 A bias voltage of 4 V or -0.9 V was applied to the CIGS battery, and a bias voltage of 3 V or -0.6 V was applied to the CZTSSe battery. The optimal application time for each fixed bias voltage was explored. The specific test results are shown in Table 2.

[0042] Among them, bias voltage values ​​were applied to the samples of comparative examples 21-34 one by one for different durations, thus obtaining examples 21-34.

[0043] Table 2 Effect of different bias application times on the efficiency of CIGS / CZTSSe cells Table 2 shows the optimal time for applying a unidirectional bias voltage. For CIGS devices, the optimal application time is 6 hours when a 4V bias voltage is applied and 2 hours when a -0.9V bias voltage is applied. For CZTSSe devices, the optimal application time is 6 hours when a 3V bias voltage is applied and 2 hours when a -0.6V bias voltage is applied.

[0044] To precisely control the ion migration direction in the device, the In in the buffer layer and window layer... 3+ and Cd 2+ It diffuses downwards into the absorption layer, simultaneously causing Na in the bulk phase of the absorption layer to diffuse downwards. + It can be enriched on the surface. In Examples 35-36, a forward bias voltage is applied first and then a reverse bias voltage is applied to precisely control the ion migration behavior. The remaining steps are the same as in Example 1.

[0045] Comparative Examples 35-36 are identical to Example 1 except that the step of applying bias voltage is not performed.

[0046] The specific test results are shown in Table 3: Table 3. The effect of applying a forward bias followed by a reverse bias on the efficiency of CIGS / CZTSSe devices. By applying a forward bias followed by a reverse bias to CIGS and CZTSSe cells, the device efficiency was improved by 9.34% and 11.20%, respectively, representing the optimal bias conditions for both types of cells. The cell current-voltage curves are shown below. Figure 2 , 3 As shown, the corresponding SIMS results are as follows: Figure 4 , 5 As shown, after appropriate bias treatment, the Na content on the surface of the absorber layer in CIGS and CZTSSe solar cells significantly increases, indicating that Na ions in the absorber layer migrate upwards and accumulate in the heterojunction region. + Occupy V Cu Furthermore, the acceptor defect Na is introduced. i This reduces the surface p-type doping concentration and improves device performance. Furthermore, after applying a reverse bias, In ions in the ITO window layer and Cd ions in the CdS buffer layer can diffuse downwards into the absorption layer, thereby passivating Sn and Zn-related harmful defects in the absorption layer, increasing the open-circuit voltage, and optimizing the device's optoelectronic performance.

Claims

1. A method for improving the performance of copper indium gallium selenide and copper zinc tin sulfide selenide solar cells by bias driving ion migration, characterized in that, include: Step 1) Fabricate a complete CIGS / CZTSSe solar cell. The CIGS / CZTSSe solar cell device includes, in sequence, a substrate, a back electrode, a CIGS / CZTSSe absorber layer, a cadmium sulfide buffer layer, an intrinsic zinc oxide layer, an indium tin oxide transparent conductive layer, and a silver grid electrode. Step 2) Place the prepared CIGS / CZTSSe device on the test stage and connect it to a regulated power supply. Connect the positive terminal of the power supply to the back electrode of the device and the negative terminal of the power supply to the silver gate electrode to form a forward bias application circuit; or connect the positive terminal of the power supply to the silver gate electrode and the negative terminal of the power supply to the back electrode to form a reverse bias application circuit. Step 3) Set the magnitude and duration of the applied bias voltage; Step 4) Apply a bias voltage according to the set parameters, and use the electric field force to drive the mobile cations in the CIGS / CZTSSe device to migrate in a directional manner, thereby changing their distribution state at the device scale.

2. The method of claim 1, wherein, Step 1) involves the following steps to fabricate a complete CIGS solar cell device: Clean the molybdenum glass substrate, and then perform ozone treatment; The pre-prepared CIGS precursor solution was spin-coated onto the treated molybdenum substrate and then immediately placed on a hot plate for baking. This process was repeated several times to prepare the CIGS preform. The CIGS prefabricated layer is placed in a graphite box and selenized and annealed using a rapid thermal annealing furnace to obtain the CIGS absorber layer. Next, a cadmium sulfide buffer layer was prepared by water bath deposition, an intrinsic zinc oxide layer was prepared by magnetron sputtering, and an indium tin oxide window layer was prepared sequentially. Finally, Ag gate electrodes were prepared by thermal evaporation to obtain a complete CIGS solar cell device.

3. The method of claim 1, wherein, Step 1) of preparing a complete CZTSSe solar cell device specifically includes the following process: Clean the molybdenum glass substrate, and then perform ozone treatment; The pre-prepared CZTS precursor solution was spin-coated onto the treated molybdenum substrate and then immediately placed on a hot plate for baking. This process was repeated several times to prepare the CZTS preform. The CZTS prefabricated layer was placed in a graphite box and selenized and annealed using a rapid thermal annealing furnace to obtain the CZTSSe absorber layer. Next, a cadmium sulfide buffer layer was prepared by water bath deposition, an intrinsic zinc oxide layer was prepared by magnetron sputtering, and an indium tin oxide window layer was prepared sequentially. Finally, Ag gate electrodes were prepared by thermal evaporation to obtain a complete CZTSSe solar cell device.

4. The method according to claim 1, characterized in that: In step 2), the test bench conditions are dark, room temperature is 25±2℃ and relative humidity is 10±2%.

5. The method according to claim 1, characterized in that: The bias voltage applied in step 3) is a DC voltage.

6. The method according to claim 1, characterized in that: For CIGS devices, the forward bias range is 1 ~ 5 V, the reverse bias range is -1.2 ~ -0.3 V, and the application time is 5 minutes to 12 hours.

7. The method according to claim 1, characterized in that: For CZTSSe devices, the forward bias range is 1 ~ 4V, the reverse bias range is -0.8 ~ -0.3V, and the application time is 5 minutes to 12 hours.

8. The method according to claim 1, characterized in that: For CIGS devices, step 3) specifically involves first applying a forward bias voltage and then applying a reverse bias voltage. The forward bias voltage is 4V and the application time is 6h, while the reverse bias voltage is -0.9V and the application time is 2h.

9. The method according to claim 1, characterized in that: For CZTSSe devices, step 3) specifically involves first applying a forward bias voltage and then applying a reverse bias voltage. The forward bias voltage is 3V and the application time is 6h, while the reverse bias voltage is -0.6V and the application time is 2h.

10. The method according to claim 1, characterized in that: The mobile cations in the CIGS / CZTSSe device in step 4) are specified as Na + , Cd 2+ , and In 3+ .

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