A broadband orthogonal generator network based on a highly integrated self-coupled all-pass filter
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-04-07
- Publication Date
- 2026-08-14
AI Technical Summary
常用的电路结构如使用四分之一波长传输线实现的设置式正交耦合器通常占用较大芯片面积,宽带性能较差;基于变压器结构的混合型差分正交耦合器只能在较窄频带内实现正交,而级联结构的混合型差分正交耦合器虽然实现了宽带性能,但往往占用较大芯片面积;传统的正交全通滤波器则受限于负载效应导致的较大的幅度误差和相位误差,同样难以实现高质量的宽带正交信号生成
[0019]本发明所述的基于高集成度自耦合全通滤波器的宽带正交生成网络的有益效果是:本发明创新使用自耦合全通滤波器结构,有效减小了芯片面积,实现了宽带、高质量的差分正交信号的生成,集成度高,成本低,具有良好的应用前景。
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Abstract
Description
Technical Field
[0001] This invention relates to the field of radio frequency integrated circuits, and more specifically to a broadband orthogonal generation network based on a highly integrated self-coupled all-pass filter. Background Technology
[0002] In CMOS on-chip RF transceivers, quadrature signals are widely used, typically involving circuit modules such as mixers, phase shifters, and vector modulators. To further improve the performance of these circuit modules, high-quality broadband quadrature signal generation circuits have attracted considerable attention. Commonly used circuit structures, such as set-type quadrature couplers implemented using quarter-wavelength transmission lines, usually occupy a large chip area and have poor broadband performance. Hybrid differential quadrature couplers based on transformer structures can only achieve quadrature within a narrow frequency band, while cascaded hybrid differential quadrature couplers, although achieving broadband performance, often occupy a large chip area. Traditional quadrature all-pass filters are limited by large amplitude and phase errors caused by load effects, making it difficult to achieve high-quality broadband quadrature signal generation. Summary of the Invention
[0003] This invention provides a broadband orthogonal generation network based on a highly integrated self-coupled all-pass filter. The feature of this broadband orthogonal generation network is the innovative use of a self-coupled all-pass filter structure, which generates differential orthogonal signals with wide bandwidth, low loss, low amplitude error, and low phase error within a relatively small chip area.
[0004] The broadband orthogonal generation network based on the highly integrated self-coupled full-pass filter is composed of a cascaded self-coupled full-pass filter and a resistor-capacitor network. The network includes a differential VIN input terminal located on the (n-1)th metal layer of the chip, a differential I signal output terminal located on the (n-1)th metal layer of the chip, and a differential Q signal output terminal located on the (n-1)th metal layer of the chip. In the broadband orthogonal generation network based on the highly integrated self-coupled full-pass filter, the three-coupling transformer A and three-coupling transformer B are arranged symmetrically; capacitors C1 and C2 are arranged symmetrically; capacitors Cc1 and Cc2 are arranged symmetrically; and resistors R1 and R2 are arranged symmetrically. In the resistor-capacitor network of the broadband orthogonal generation network based on the highly integrated self-coupled full-pass filter, Rp1 and Rp4 are arranged symmetrically; Rp2 and Rp3 are arranged symmetrically; Cp1 and Cp4 are arranged symmetrically; and Cp2 and Cp3 are arranged symmetrically. The Q1P, Q1N, I1P, and I1N terminals of the self-coupled full-pass filter and the Q2P, Q2N, I2P, and I2N terminals of the resistor-capacitor network in the broadband orthogonal generator network based on the highly integrated self-coupled full-pass filter are sequentially connected through the (n-1)th layer of metal wires.
[0005] The self-coupled full-pass filter in the broadband orthogonal generation network based on the highly integrated self-coupled full-pass filter includes a differential VIN input terminal, a differential I1 terminal, and a differential Q1 terminal disposed on the (n-1)th metal layer of the chip; the resistor-capacitor network in the broadband orthogonal generation network based on the highly integrated self-coupled full-pass filter includes a differential I2 terminal, a differential Q2 terminal, a differential I3 terminal, and a differential Q3 terminal on the (n-1)th metal layer of the chip. Specifically, the differential VIN input terminal includes INP and INN terminals; the differential I signal output terminal includes IP and IN terminals; the differential Q signal output terminal includes QP and QN terminals; the differential I1 terminal includes I1P and I1N terminals; the differential Q1 terminal includes Q1P and Q1N terminals; the differential I2 terminal includes I2P and I2N terminals; the differential Q2 terminal includes Q2P and Q2N terminals; the differential I3 terminal includes I3P and I3N terminals; and the differential Q3 terminal includes Q3P and Q3N terminals.
[0006] The self-coupled full-pass filter in the broadband orthogonal generator network based on the highly integrated self-coupled full-pass filter includes three coupling transformers A and B, capacitors C1, C2, Cc1, and Cc2, resistors R1 and R2, and several through holes and connecting lines. The three coupling transformers A and B are arranged symmetrically; capacitors C1 and C2 are arranged symmetrically; capacitors Cc1 and Cc2 are arranged symmetrically; and resistors R1 and R2 are arranged symmetrically.
[0007] The three-coupling transformer includes an LPP terminal on the (n-1)th metal layer of the chip, an LPN terminal on the (n-1)th metal layer of the chip, an LSP terminal on the (n-1)th metal layer of the chip, an LSN terminal on the (n-1)th metal layer of the chip, an LKP terminal on the nth metal layer of the chip, and an LKN terminal on the nth metal layer of the chip. The LPP terminal and the LPN terminal are connected by a spiral metal coil, the LSP terminal and the LSN terminal are connected by a spiral metal coil, and the LKP terminal and the LKN terminal are connected by a spiral metal coil. The LPP terminal of the three-coupling transformer is connected to the LPN terminal through the (n-1)th metal layer M11; the LSP terminal of the three-coupling transformer is connected to the LSN terminal sequentially through the (n-1)th metal layer wire M13, through hole K12, the (n-2)th metal layer wire J11, through hole K11, and the (n-1)th metal layer wire M12; the LKP terminal of the three-coupling transformer is connected to the LKN terminal through the nth metal layer wire T11.
[0008] The INP terminal of the (n-1)th metal layer of the chip is connected to the LPP terminal of the triple-coupled transformer A via the (n-1)th metal line M51 and the via K51. The first terminal of capacitor C1 is connected to the LPP terminal of the triple-coupled transformer A via the via K51. The second terminal of capacitor C1 is connected to the first terminal of resistor R1 via the via K52. The first terminal of capacitor Cc1 is connected to the LPN terminal of the triple-coupled transformer A via the via K54. The second terminal of capacitor Cc1 is connected to the LKP terminal of the triple-coupled transformer A via the via K55.
[0009] The INN terminal of the (n-1)th metal layer of the chip is connected to the LPP terminal of the triple-coupled transformer B through the (n-1)th metal line M61 and the through-hole K61 in sequence; the first terminal of capacitor C2 is connected to the LPP terminal of the triple-coupled transformer B through the through-hole K61; the second terminal of capacitor C2 is connected to the first terminal of resistor R2 through the through-hole K62; the first terminal of capacitor Cc2 is connected to the LPN terminal of the triple-coupled transformer B through the through-hole K64; and the second terminal of capacitor Cc2 is connected to the LKP terminal of the triple-coupled transformer B through the through-hole K65.
[0010] The second end of resistor R1 is connected to the LPN terminal of the three-coupled transformer B through through hole K53 and the (n-2)th layer metal wire J51 in sequence; the second end of resistor R2 is connected to the LPN terminal of the three-coupled transformer A through through hole K63 and the (n-3)th layer metal wire H51 in sequence.
[0011] The LKN terminal of the three-coupled transformer A forms the Q1P terminal of the self-coupled full-pass filter through the through hole K56 and the (n-1)th layer of metal wire M54 in sequence; the LSP terminal of the three-coupled transformer A forms the I1P terminal of the self-coupled full-pass filter through the (n-1)th layer of metal wire M52; the LKN terminal of the three-coupled transformer B forms the Q1N terminal of the self-coupled full-pass filter through the through hole K66 and the (n-1)th layer of metal wire M64; the LSP terminal of the three-coupled transformer B forms the I1N terminal of the self-coupled full-pass filter through the (n-1)th layer of metal wire M62.
[0012] The resistor-capacitor network in the broadband orthogonal generator network based on the highly integrated self-coupled all-pass filter includes capacitors Cp1, Cp2, Cp3, and Cp4, resistors Rp1, Rp2, Rp3, and Rp4, and several vias and connecting lines. Resistors Rp1 and Rp4 are arranged symmetrically; resistors Rp2 and Rp3 are arranged symmetrically; capacitors Cp1 and Cp4 are arranged symmetrically; and capacitors Cp2 and Cp3 are arranged symmetrically.
[0013] The Q2P terminal of the resistor-capacitor network is connected to the first terminal of resistor Rp1 via the first layer metal wire W31; the Q2P terminal of the resistor-capacitor network is connected to the first terminal of capacitor Cp1 via the first layer metal wire W31; the I2P terminal of the resistor-capacitor network is connected to the first terminal of resistor Rp2 via the first layer metal wire W32; the I2P terminal of the resistor-capacitor network is connected to the first terminal of capacitor Cp2 via the first layer metal wire W32; the Q2N terminal of the resistor-capacitor network is connected to the first terminal of resistor Rp4 via the first layer metal wire W41; the Q2N terminal of the resistor-capacitor network is connected to the first terminal of capacitor Cp4 via the first layer metal wire W41; the I2N terminal of the resistor-capacitor network is connected to the first terminal of resistor Rp3 via the first layer metal wire W42; the I2N terminal of the resistor-capacitor network is connected to the first terminal of capacitor Cp3 via the first layer metal wire W42.
[0014] The second terminals of Rp1 and Cp2 are connected through the second layer metal wire E31, through-hole K33, and the first layer metal wire W33, forming the Q3P terminal of the resistor-capacitor network; the second terminals of Rp4 and Cp3 are connected through the second layer metal wire E41, through-hole K43, and the first layer metal wire W43, forming the Q3N terminal of the resistor-capacitor network; the second terminals of Rp2 and Cp4 are connected through the first layer metal wire W35, through-hole K44, and the first layer metal wire W44, forming the I3N terminal of the resistor-capacitor network; the second terminals of Rp3 and Cp1 are connected through the first layer metal wire W34, through-hole K34, the second layer metal wire E42, and through-hole K45, forming the I3P terminal of the resistor-capacitor network.
[0015] The Q1P terminal of the self-coupled full-pass filter in the broadband orthogonal generator network based on the highly integrated self-coupled full-pass filter is connected to the Q2P terminal of the resistor-capacitor network via the (n-1)th metal line M55 and via K56 of the chip; the Q1N terminal of the self-coupled full-pass filter is connected to the Q2N terminal of the resistor-capacitor network via the (n-1)th metal line M65 and via K66 of the chip; the I1P terminal of the self-coupled full-pass filter is connected to the I2P terminal of the resistor-capacitor network via the (n-1)th metal line M53 and via K57 of the chip; and the I1N terminal of the self-coupled full-pass filter is connected to the I2N terminal of the resistor-capacitor network via the (n-1)th metal line M63 and via K67 of the chip.
[0016] The Q3P terminal of the resistor-capacitor network forms the QP terminal of the broadband orthogonal generation network based on the high-integration self-coupled full-pass filter through the (n-1)th metal line M56; the Q3N terminal of the resistor-capacitor network forms the QN terminal of the broadband orthogonal generation network based on the high-integration self-coupled full-pass filter through the (n-1)th metal line M66; the I3P terminal of the resistor-capacitor network forms the IP terminal of the broadband orthogonal generation network based on the high-integration self-coupled full-pass filter through the (n-1)th metal line M57; and the I3N terminal of the resistor-capacitor network forms the IN terminal of the broadband orthogonal generation network based on the high-integration self-coupled full-pass filter through the (n-1)th metal line M67. The QP and QN terminals form the differential Q signal output terminals of the broadband orthogonal generation network based on the high-integration self-coupled full-pass filter; and the IP and IN terminals form the differential I signal output terminals of the broadband orthogonal generation network based on the high-integration self-coupled full-pass filter.
[0017] The aforementioned through holes are used to connect metal wires with different metal layers.
[0018] The spiral coil described in this invention can be circular, elliptical, square, pentagonal, hexagonal, heptagonal, octagonal, or polygonal.
[0019] The beneficial effects of the broadband orthogonal generation network based on a highly integrated self-coupled all-pass filter described in this invention are as follows: This invention innovatively uses a self-coupled all-pass filter structure, which effectively reduces the chip area, realizes the generation of broadband, high-quality differential orthogonal signals, has high integration, low cost, and good application prospects. Attached Figure Description
[0020] Figure 1 This is an intuitive diagram of a broadband orthogonal generator network based on a highly integrated self-coupled all-pass filter.
[0021] Figure 2 This is a schematic diagram of a broadband orthogonal generator network structure based on a highly integrated self-coupled all-pass filter.
[0022] Figure 3 This is a schematic diagram of a self-coupled all-pass filter structure.
[0023] Figure 4 This is a schematic diagram of the three-coupled inductor structure in a self-coupled all-pass filter.
[0024] Figure 5 This is a schematic diagram of a resistor-capacitor network structure.
[0025] Figure 6 The results are simulation results of the amplitude deviation and image rejection ratio of the differential orthogonal signal output based on a broadband orthogonal generator network with a high degree of integration and self-coupled all-pass filter.
[0026] Figure 7 The results are simulation results of the differential orthogonal signal output phase deviation of a broadband orthogonal generator network based on a highly integrated self-coupled all-pass filter. Detailed Implementation
[0027] To clearly illustrate the objectives, technical solutions, and advantages of the embodiments of the present invention, several embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be noted that the embodiments described herein are only some embodiments and do not cover all possible embodiments.
[0028] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.
[0029] Example
[0030] See Figure 1 This embodiment proposes a broadband orthogonal generation network based on a highly integrated self-coupled full-pass filter. The broadband orthogonal generation network based on the highly integrated self-coupled full-pass filter is composed of a cascaded self-coupled full-pass filter and a resistor-capacitor network.
[0031] See Figure 2 The broadband orthogonal generation network based on a highly integrated self-coupled all-pass filter comprises a differential VIN input terminal disposed on the (n-1)th metal layer of the chip, a differential I signal output terminal disposed on the (n-1)th metal layer of the chip, and a differential Q signal output terminal disposed on the (n-1)th metal layer of the chip. Specifically, the differential VIN input terminal includes INP and INN terminals; the differential I signal output terminal includes IP and IN terminals; and the differential Q signal output terminal includes QP and QN terminals.
[0032] See Figure 3 The self-coupled all-pass filter in the broadband orthogonal generation network based on the highly integrated self-coupled all-pass filter includes a differential VIN input terminal, a differential I1 terminal, and a differential Q1 terminal disposed on the (n-1)th metal layer of the chip; the resistor-capacitor network in the broadband orthogonal generation network based on the highly integrated self-coupled all-pass filter includes a differential I2 terminal, a differential Q2 terminal, a differential I3 terminal, and a differential Q3 terminal on the (n-1)th metal layer of the chip. Specifically, the differential I1 terminal includes I1P and I1N terminals; the differential Q1 terminal includes Q1P and Q1N terminals; the differential I2 terminal includes I2P and I2N terminals; the differential Q2 terminal includes Q2P and Q2N terminals; the differential I3 terminal includes I3P and I3N terminals; and the differential Q3 terminal includes Q3P and Q3N terminals.
[0033] The self-coupled full-pass filter in the broadband orthogonal generator network based on the highly integrated self-coupled full-pass filter includes two triple-coupled transformers A and B, capacitors C1, C2, Cc1, and Cc2, resistors R1 and R2, and several vias and connecting wires. Triple-coupled transformers A and B are arranged symmetrically; capacitors C1 and C2 are arranged symmetrically; capacitors Cc1 and Cc2 are arranged symmetrically; and resistors R1 and R2 are arranged symmetrically.
[0034] The triple-coupled transformer A is connected to the INP terminal, capacitor C1, capacitor Cc1, resistor R1, and resistor R2, respectively. In this embodiment, the INP terminal located on the (n-1)th metal layer of the chip is connected to the LPP terminal of the triple-coupled transformer A through the (n-1)th layer metal line M51 and through-hole K51; the first end of capacitor C1 is connected to the LPP terminal of the triple-coupled transformer A through through-hole K51; the second end of capacitor C1 is connected to the first end of resistor R1 through through-hole K52; the first end of capacitor Cc1 is connected to the LPN terminal of the triple-coupled transformer A through through-hole K54; the second end of capacitor Cc1 is connected to the LKP terminal of the triple-coupled transformer A through through-hole K55; and the second end of resistor R2 is connected to the LPN terminal of the triple-coupled transformer A through through-hole K63 and the (n-3)th layer metal line H51.
[0035] The triple-coupled transformer B is connected to the INN terminal, capacitor C2, capacitor Cc2, resistor R1, and resistor R2, respectively. In this embodiment, the INN terminal located on the (n-1)th metal layer of the chip is connected to the LPP terminal of the triple-coupled transformer B through the (n-1)th layer metal line M61 and through-hole K61; the first terminal of capacitor C2 is connected to the LPP terminal of the triple-coupled transformer B through through-hole K61; the second terminal of capacitor C2 is connected to the first terminal of resistor R2 through through-hole K62; the first terminal of capacitor Cc2 is connected to the LPN terminal of the triple-coupled transformer B through through-hole K64; the second terminal of capacitor Cc2 is connected to the LKP terminal of the triple-coupled transformer B through through-hole K65; and the second terminal of resistor R1 is connected to the LPN terminal of the triple-coupled transformer B through through-hole K53 and the (n-2)th layer metal line J51.
[0036] In this embodiment, the LKN terminal of the three-coupled transformer A forms the Q1P terminal of the self-coupled full-pass filter through the through hole K56 and the (n-1)th layer of metal wire M54 in sequence; the LSP terminal of the three-coupled transformer A forms the I1P terminal of the self-coupled full-pass filter through the (n-1)th layer of metal wire M52; the LKN terminal of the three-coupled transformer B forms the Q1N terminal of the self-coupled full-pass filter through the through hole K66 and the (n-1)th layer of metal wire M64; the LSP terminal of the three-coupled transformer B forms the I1N terminal of the self-coupled full-pass filter through the (n-1)th layer of metal wire M62.
[0037] See Figure 4The three coupling transformers in the self-coupled full-pass filter of the broadband orthogonal generator network based on the highly integrated self-coupled full-pass filter include an LPP terminal, an LPN terminal, an LSP terminal, an LSN terminal, an LKP terminal, and an LKN terminal disposed on the (n-1)th metal layer of the chip; the LPP terminal and the LPN terminal are connected by a spiral metal coil, the LSP terminal and the LSN terminal are connected by a spiral metal coil, and the LKP terminal and the LKN terminal are connected by a spiral metal coil.
[0038] The three-coupling transformer is formed by vertically stacking three layers of spiral metal coils. In this embodiment, the LPP terminal of the three-coupling transformer is connected to the LPN terminal through the (n-1)th metal layer M11; the LSP terminal of the three-coupling transformer A is connected to the LSN terminal sequentially through the (n-1)th metal layer M13, through hole K12, the (n-2)th metal layer J11, through hole K11, and the (n-1)th metal layer M12; the LKP terminal of the three-coupling transformer is connected to the LKN terminal through the nth metal layer T11.
[0039] See Figure 5 The resistor-capacitor network in the broadband orthogonal generator network based on the highly integrated self-coupled all-pass filter includes capacitors Cp1, Cp2, Cp3, and Cp4, resistors Rp1, Rp2, Rp3, and Rp4, and several vias and connecting lines. Rp1 and Rp4 are arranged symmetrically; Rp2 and Rp3 are arranged symmetrically; Cp1 and Cp4 are arranged symmetrically; Cp2 and Cp3 are arranged symmetrically.
[0040] The Q2P terminal of the resistor-capacitor network is connected to resistor Rp1 and capacitor Cp1 respectively; the I2P terminal of the resistor-capacitor network is connected to resistor Rp2 and capacitor Cp2 respectively; the Q2N terminal of the resistor-capacitor network is connected to resistor Rp4 and capacitor Cp4 respectively; and the I2N terminal of the resistor-capacitor network is connected to resistor Rp3 and capacitor Cp3 respectively. In this embodiment, the Q2P terminal of the resistor-capacitor network is connected to the first terminal of resistor Rp1 via the first layer metal wire W31; the Q2P terminal of the resistor-capacitor network is connected to the first terminal of capacitor Cp1 via the first layer metal wire W31; the I2P terminal of the resistor-capacitor network is connected to the first terminal of resistor Rp2 via the first layer metal wire W32; the I2P terminal of the resistor-capacitor network is connected to the first terminal of capacitor Cp2 via the first layer metal wire W32; the Q2N terminal of the resistor-capacitor network is connected to the first terminal of resistor Rp4 via the first layer metal wire W41; the Q2N terminal of the resistor-capacitor network is connected to the first terminal of capacitor Cp4 via the first layer metal wire W41; the I2N terminal of the resistor-capacitor network is connected to the first terminal of resistor Rp3 via the first layer metal wire W42; the I2N terminal of the resistor-capacitor network is connected to the first terminal of capacitor Cp3 via the first layer metal wire W42.
[0041] In this embodiment, the second terminals of resistors Rp1 and Cp2 are connected through the second layer metal wire E31, through-hole K33, and the first layer metal wire W33 to form the Q3P terminal of the resistor-capacitor network. The second terminals of resistors Rp4 and Cp3 are connected through the second layer metal wire E41, through-hole K43, and the first layer metal wire W43 to form the Q3N terminal of the resistor-capacitor network; the second terminals of resistors Rp2 and Cp4 are connected through the first layer metal wire W35, through-hole K44, and the first layer metal wire W44 to form the I3N terminal of the resistor-capacitor network; the second terminals of resistors Rp3 and Cp1 are connected through the first layer metal wire W34, through-hole K34, the second layer metal wire E42, and through-hole K45 to form the I3P terminal of the resistor-capacitor network.
[0042] See Figure 2In the broadband orthogonal generation network based on the highly integrated self-coupled full-pass filter, the terminals of the self-coupled full-pass filter and the resistor-capacitor network are connected sequentially. In this embodiment, the Q1P terminal of the self-coupled full-pass filter in the broadband orthogonal generation network based on the highly integrated self-coupled full-pass filter is connected to the Q2P terminal of the resistor-capacitor network sequentially through the (n-1)th layer metal line M55 and the via K56; the Q1N terminal of the self-coupled full-pass filter is connected to the Q2N terminal of the resistor-capacitor network sequentially through the (n-1)th layer metal line M65 and the via K66; the I1P terminal of the self-coupled full-pass filter is connected to the I2P terminal of the resistor-capacitor network sequentially through the (n-1)th layer metal line M53 and the via K57; and the I1N terminal of the self-coupled full-pass filter is connected to the I2N terminal of the resistor-capacitor network sequentially through the (n-1)th layer metal line M63 and the via K67.
[0043] In this embodiment, the output terminal of the resistor-capacitor network in the broadband orthogonal generation network based on the highly integrated self-coupled full-pass filter is formed by symmetrically arranged metal lines. The Q3P terminal of the resistor-capacitor network is formed by the (n-1)th layer metal line M56 to form the QP terminal of the broadband orthogonal generation network based on the highly integrated self-coupled full-pass filter; the Q3N terminal of the resistor-capacitor network is formed by the (n-1)th layer metal line M66 to form the QN output terminal of the broadband orthogonal generation network based on the highly integrated self-coupled full-pass filter; the I3P terminal of the resistor-capacitor network is formed by the (n-1)th layer metal line M57 to form the IP terminal of the broadband orthogonal generation network based on the highly integrated self-coupled full-pass filter; and the I3N terminal of the resistor-capacitor network is formed by the (n-1)th layer metal line M67 to form the IN terminal of the broadband orthogonal generation network based on the highly integrated self-coupled full-pass filter. Specifically, the QP and QN terminals form the differential Q signal output terminals of the broadband orthogonal generation network based on the highly integrated self-coupled all-pass filter; the IP and IN terminals form the differential I signal output terminals of the broadband orthogonal generation network based on the highly integrated self-coupled all-pass filter.
[0044] In the specific embodiment, when the broadband orthogonal generation network based on a highly integrated self-coupled all-pass filter is operating, the differential VIN input, differential I signal output, and differential Q signal output are all connected to matched loads for impedance matching. The simulation results show that the amplitude error of the differential I signal output and the differential Q signal output is less than 0.2 dB in the 13 GHz – 37 GHz frequency band; the phase error of the differential I signal output and the differential Q signal output is less than 2° in the 13 GHz – 37 GHz frequency band; and the image rejection ratio of the broadband orthogonal generation network based on the highly integrated self-coupled all-pass filter is greater than 40 dB in the 13 GHz – 37 GHz frequency band.
[0045] In specific embodiments of the present invention, the metal spiral coil mentioned in the present invention adopts an octagonal layout and a rectangular layout. It can also adopt a polygonal layout such as a rectangular layout, a square layout, a circular layout, an elliptical layout, a pentagonal layout, and a hexagonal layout, which will not be described in detail here.
[0046] The specific embodiments of the present invention have been described above, but these embodiments are not intended to limit the present invention. The present invention can have various modifications and variations. Any modifications, equivalent substitutions, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.
Claims
1. A broadband orthogonal generator network based on a highly integrated self-coupled all-pass filter, characterized in that: The broadband orthogonal generation network based on the highly integrated self-coupled full-pass filter consists of a self-coupled full-pass filter and a resistor-capacitor network. The network includes a differential VIN input, a differential I signal output, and a differential Q signal output. The differential VIN input includes an INP terminal and an INN terminal. The differential I signal output includes an IP terminal and an IN terminal. The differential Q signal output includes a QP terminal and a QN terminal. The self-coupled full-pass filter in the broadband orthogonal generator network based on the highly integrated self-coupled full-pass filter includes three coupling transformers A and B, capacitors C1, C2, Cc1, and Cc2, resistors R1 and R2, and several vias and metal interconnects. The INP terminal is connected to the LPP terminal of the three coupling transformer A; the first terminal of capacitor C1 is connected to the LPP terminal of the three coupling transformer A; the second terminal of capacitor C1 is connected to the first terminal of resistor R1; the first terminal of capacitor Cc1 is connected to the LPN terminal of the three coupling transformer A; the second terminal of capacitor Cc1 is connected to the LKP terminal of the three coupling transformer A; and the second terminal of resistor R2 is connected to the LPN terminal of the three coupling transformer A. The INN terminal is connected to the LPP terminal of the triple-coupled transformer B; the first terminal of capacitor C2 is connected to the LPP terminal of the triple-coupled transformer B; the second terminal of capacitor C2 is connected to the first terminal of resistor R2; the first terminal of capacitor Cc2 is connected to the LPN terminal of the triple-coupled transformer B; the second terminal of capacitor Cc2 is connected to the LKP terminal of the triple-coupled transformer B; the second terminal of resistor R1 is connected to the LPN terminal of the triple-coupled transformer B; the LPP and LPN terminals of the triple-coupled transformer are connected through the (n-1)th layer of metal wire; the LSP and LSN terminals are connected through the (n-1)th layer of metal wire, the (n-2)th layer of metal wire, and a through hole; the LKP and LKN terminals are connected through the nth layer of metal wire. The resistor-capacitor network in the broadband orthogonal generator network based on the highly integrated self-coupled all-pass filter includes Q2P, Q2N, I2P, I2N terminals and Q3P, Q3N, I3P, I3N terminals; the resistor-capacitor network includes capacitors Cp1, Cp2, Cp3, Cp4, resistors Rp1, Rp2, Rp3, Rp4 and several vias and connecting lines; The Q1P, Q1N, I1P, and I1N terminals of the self-coupled all-pass filter and the Q2P, Q2N, I2P, and I2N terminals of the resistor-capacitor network in the broadband orthogonal generator network based on the highly integrated self-coupled all-pass filter are connected through the (n-1)th layer of metal wires, respectively.
2. The broadband orthogonal generation network based on a highly integrated self-coupled all-pass filter according to claim 1, characterized in that: The self-coupled full-pass filter in the broadband orthogonal generation network based on the highly integrated self-coupled full-pass filter includes a differential VIN input terminal, a differential I1 terminal, and a differential Q1 terminal disposed on the (n-1)th metal layer of the chip; the differential input VIN terminal includes an INP terminal and an INN terminal; the differential I1 terminal includes an I1P terminal and an I1N terminal; the differential Q1 terminal includes a Q1P terminal and a Q1N terminal; the self-coupled full-pass filter in the broadband orthogonal generation network based on the highly integrated self-coupled full-pass filter includes two triple-coupled transformers A and B, capacitors C1, C2, Cc1, and Cc2, resistors R1 and R2, and several vias and connecting lines; triple-coupled transformers A and B are arranged axially symmetrically; capacitors C1 and C2 are arranged axially symmetrically; capacitors Cc1 and Cc2 are arranged axially symmetrically; resistors R1 and R2 are arranged axially symmetrically.
3. The broadband orthogonal generation network based on a highly integrated self-coupled all-pass filter according to claim 2, characterized in that: The self-coupled all-pass filter includes a three-terminal coupling transformer located on the (n-1)th metal layer of the chip, an LPP terminal located on the (n-1)th metal layer of the chip, an LPN terminal located on the (n-1)th metal layer of the chip, an LSP terminal located on the (n-1)th metal layer of the chip, an LSN terminal located on the (n-1)th metal layer of the chip, an LKP terminal located on the nth metal layer of the chip, and an LKN terminal located on the nth metal layer of the chip. The LPP terminal and the LPN terminal are connected by a spiral metal coil, the LSP terminal and the LSN terminal are connected by a spiral metal coil, and the LKP terminal and the LKN terminal are connected by a spiral metal coil. The LPP terminal of the three-terminal coupling transformer is connected to the LPN terminal through the (n-1)th metal layer wire M11. The LSP terminal of the three-terminal coupling transformer is connected to the LSN terminal sequentially through the (n-1)th metal layer wire M13, a through-hole K12, the (n-2)th metal layer wire J11, a through-hole K11, and the (n-1)th metal layer wire M12. The LKP terminal of the three-terminal coupling transformer is connected to the LKN terminal through the nth metal layer wire T11. The INP terminal of the (n-1)th metal layer of the chip is connected to the LPP terminal of the triple-coupled transformer A via the (n-1)th layer metal line M51 and via K51. The first terminal of capacitor C1 is connected to the LPP terminal of the triple-coupled transformer A via via K51. The second terminal of capacitor C1 is connected to the first terminal of resistor R1 via via K52. The first terminal of capacitor Cc1 is connected to the LPN terminal of the triple-coupled transformer A via via K54. The second terminal of capacitor Cc1 is connected to the LKP terminal of the triple-coupled transformer A via via K55. The INN terminal of the (n-1)th metal layer of the chip is connected to the LPP terminal of the triple-coupled transformer B via the (n-1)th layer metal line M61 and via K61. The first terminal of capacitor C2 is connected to the LPP terminal of the triple-coupled transformer B via via K61. The second terminal of capacitor C2 is connected to the first terminal of resistor R2 via via K62. The first terminal of capacitor Cc2 is connected to the triple-coupled transformer B via via K64. The LPN terminal of transformer B; the second terminal of capacitor Cc2 is connected to the LKP terminal of triple-coupled transformer B through through hole K65; the second terminal of resistor R1 is connected to the LPN terminal of triple-coupled transformer B through through hole K53 and the (n-2)th layer metal wire J51 in sequence; the second terminal of resistor R2 is connected to the LPN terminal of triple-coupled transformer A through through hole K63 and the (n-3)th layer metal wire H51 in sequence; the LKN terminal of triple-coupled transformer A forms the Q1P terminal of self-coupled full-pass filter through through hole K56 and the (n-1)th layer metal wire M54 in sequence; the LSP terminal of triple-coupled transformer A forms the I1P terminal of self-coupled full-pass filter through the (n-1)th layer metal wire M52; the LKN terminal of triple-coupled transformer B forms the Q1N terminal of self-coupled full-pass filter through through hole K66 and the (n-1)th layer metal wire M64; the LSP terminal of triple-coupled transformer B forms the I1N terminal of self-coupled full-pass filter through the (n-1)th layer metal wire M62.
4. The broadband orthogonal generation network based on a highly integrated self-coupled all-pass filter according to claim 3, characterized in that: The resistor-capacitor network in the broadband orthogonal generation network based on the highly integrated self-coupled all-pass filter includes differential I2, differential Q2, differential I3, and differential Q3 terminals disposed on the (n-1)th metal layer of the chip; wherein, the differential I2 terminal includes I2P and I2N terminals; the differential Q2 terminal includes Q2P and Q2N terminals; the differential I3 terminal includes I3P and I3N terminals; and the differential Q3 terminal includes Q3P and Q3N terminals; wherein the resistor-capacitor network in the broadband orthogonal generation network based on the highly integrated self-coupled all-pass filter includes capacitors Cp1, Cp2, Cp3, and Cp4, resistors Rp1, Rp2, Rp3, and Rp4, and several vias and connecting lines; Rp1 and Rp4 are arranged axially symmetrically; Rp2 and Rp3 are arranged axially symmetrically; Cp1 and Cp4 are arranged axially symmetrically; and Cp2 and Cp3 are arranged axially symmetrically.
5. The Q2P terminal of the resistor-capacitor network according to claim 4 is connected to the first terminal of Rp1 via the first layer metal wire W31; the Q2P terminal of the resistor-capacitor network is connected to the first terminal of Cp1 via the first layer metal wire W31; the I2P terminal of the resistor-capacitor network is connected to the first terminal of Rp2 via the first layer metal wire W32; the I2P terminal of the resistor-capacitor network is connected to the first terminal of Cp2 via the first layer metal wire W32; the Q2N terminal of the resistor-capacitor network is connected to the first terminal of Rp4 via the first layer metal wire W41; the Q2N terminal of the resistor-capacitor network is connected to the first terminal of Cp4 via the first layer metal wire W41; the I2N terminal of the resistor-capacitor network is connected to the first terminal of Rp3 via the first layer metal wire W42. The I2N terminal of the resistor-capacitor network is connected to the first terminal of Cp3 through the first layer metal wire W42; the second terminals of Rp1 and Cp2 are connected through the second layer metal wire E31, the first layer metal wire W33, and the through-hole K33 to form the Q3P terminal of the resistor-capacitor network; the second terminals of Rp4 and Cp3 are connected through the second layer metal wire E41, the first layer metal wire W43, and the through-hole K43 to form the Q3N terminal of the resistor-capacitor network; the second terminals of Rp2 and Cp4 are connected through the first layer metal wire W35, the first layer metal wire W44, and the through-hole K44 to form the I3N terminal of the resistor-capacitor network; the second terminals of Rp3 and Cp1 are connected through the first layer metal wire W34, the through-hole K34, the second layer metal wire E42, and the through-hole K45 to form the I3P terminal of the resistor-capacitor network.
6. The broadband orthogonal generation network based on a highly integrated self-coupled all-pass filter according to claim 5, characterized in that: The Q1P terminal of the self-coupled full-pass filter in the broadband orthogonal generation network based on the highly integrated self-coupled full-pass filter is connected to the Q2P terminal of the resistor-capacitor network via the (n-1)th metal line M55 and via K56 of the chip; the Q1N terminal of the self-coupled full-pass filter is connected to the Q2N terminal of the resistor-capacitor network via the (n-1)th metal line M65 and via K66 of the chip; the I1P terminal of the self-coupled full-pass filter is connected to the I2P terminal of the resistor-capacitor network via the (n-1)th metal line M53 and via K57 of the chip; and the I1N terminal of the self-coupled full-pass filter is connected to the I2N terminal of the resistor-capacitor network via the (n-1)th metal line M63 and via K67 of the chip. The Q3P terminal of the resistor-capacitor network forms the QP terminal of the broadband orthogonal generation network based on the high-integration self-coupled full-pass filter through the (n-1)th metal line M56; the Q3N terminal of the resistor-capacitor network forms the QN terminal of the broadband orthogonal generation network based on the high-integration self-coupled full-pass filter through the (n-1)th metal line M66; the I3P terminal of the resistor-capacitor network forms the IP terminal of the broadband orthogonal generation network based on the high-integration self-coupled full-pass filter through the (n-1)th metal line M57; the I3N terminal of the resistor-capacitor network forms the IN terminal of the broadband orthogonal generation network based on the high-integration self-coupled full-pass filter through the (n-1)th metal line M67; wherein, the QP terminal and the QN terminal form the differential Q signal output terminal of the broadband orthogonal generation network based on the high-integration self-coupled full-pass filter; the IP terminal and the IN terminal form the differential I signal output terminal of the broadband orthogonal generation network based on the high-integration self-coupled full-pass filter.