electronic device

Abstract

The electronic device includes: a first signal port; a second signal port; an LC circuit disposed between the first signal port and the second signal port, comprising at least one capacitor and at least one inductor, and configured to selectively allow signals of frequencies above a specific frequency to pass through; a first path from the first signal port to the LC circuit; a second path from the second signal port to the LC circuit; a first inductor disposed between the first path and a ground; and a second inductor disposed between the second path and the ground. The first inductor and the second inductor are physically configured in a mutually coupled manner.

Description

Technical Field

[0001] This disclosure relates to an electronic device comprising an LC circuit configured to selectively allow signals of frequencies above a specific frequency to pass through. Background Technology

[0002] As one of the electronic devices used in communication devices with wireless communication capabilities, a filter is one that selectively allows signals of a specific frequency to pass through. Examples of filters include high-pass filters that selectively allow signals above a specific frequency to pass through, low-pass filters that selectively allow signals below a specific frequency to pass through, and band-pass filters that selectively allow signals within a specific frequency range to pass through.

[0003] Japanese Patent Application Publication No. Hei 8-107326 discloses a mixer (demultiplexer) configured to mix and demultiplex signals with similar frequency bands. The mixer (demultiplexer) includes a low-pass filter connected to a first terminal and a high-pass filter and a band-pass filter connected in series to a second terminal. The low-pass filter, high-pass filter, and band-pass filter are each composed of multiple capacitors and multiple coils.

[0004] Communication equipment demands high-speed and high-functionality wireless communication, which in turn requires high-performance electronic components. Furthermore, the miniaturization of communication equipment in recent years has also necessitated miniaturization of electronic components.

[0005] In electronic devices, as described in Japanese Patent Application Publication No. Hei 8-107326, multiple components such as inductors and capacitors are used. Generally, the number of components increases with the pursuit of higher performance. Furthermore, in LC circuits configured to selectively allow signals at frequencies above a specific frequency to pass through, there are cases where the inductance of the inductor and the capacitance of the capacitor increase in order to form attenuation electrodes at frequencies lower than the specific frequency. As a result, LC circuits tend to become larger. Summary of the Invention

[0006] (a) Technical problems to be solved One of the purposes of this disclosure is to provide an electronic device that can achieve the desired characteristics and achieve miniaturization.

[0007] (II) Technical Solution An electronic device according to one embodiment of this disclosure includes: a first signal port; a second signal port; an LC circuit disposed between the first signal port and the second signal port, comprising at least one capacitor and at least one inductor, and configured to selectively allow signals of frequencies above a specific frequency to pass through; a first path from the first signal port to the LC circuit; a second path from the second signal port to the LC circuit; a first inductor disposed between the first path and a ground; and a second inductor disposed between the second path and the ground. The first inductor and the second inductor are physically configured in a mutually coupled manner.

[0008] (III) Beneficial Effects In the electronic device of this disclosure, the first inductor and the second inductor are physically configured in a mutually coupled manner. Therefore, according to this disclosure, an electronic device can be realized that achieves the desired characteristics and is miniaturized.

[0009] Other objects, features, and advantages of this disclosure will become fully apparent from the following description. Attached Figure Description

[0010] Figure 1 This is a circuit diagram illustrating the circuit structure of an electronic device according to a first exemplary embodiment of the present disclosure.

[0011] Figure 2 This is a perspective view of an electronic device representing a first exemplary embodiment of the present disclosure.

[0012] Figure 3 This is a cross-sectional view of an electronic device representing a first exemplary embodiment of the present disclosure.

[0013] Figure 4 This is a perspective view showing the first body in a first exemplary embodiment of the present disclosure.

[0014] Figure 5 This is a perspective view showing the first body in a first exemplary embodiment of the present disclosure.

[0015] Figure 6 This is an explanatory diagram showing the pattern formation surface of the first dielectric layer of the first body in a first exemplary embodiment of the present disclosure.

[0016] Figure 7 This is an explanatory diagram showing the pattern formation surface of the second dielectric layer of the first body in a first exemplary embodiment of the present disclosure.

[0017] Figure 8 This is an explanatory diagram showing the pattern formation surface of the third dielectric layer of the first body in a first exemplary embodiment of the present disclosure.

[0018] Figure 9 This is an explanatory diagram showing the pattern formation surface of the fourth dielectric layer of the first body in a first exemplary embodiment of the present disclosure.

[0019] Figure 10 This is an explanatory diagram showing the pattern formation surface of the fifth dielectric layer of the first body in a first exemplary embodiment of the present disclosure.

[0020] Figure 11 This is an explanatory diagram showing the pattern formation surface of the sixth dielectric layer of the first body in a first exemplary embodiment of the present disclosure.

[0021] Figure 12 This is an explanatory diagram showing the pattern formation surface of the seventh dielectric layer of the first body in a first exemplary embodiment of the present disclosure.

[0022] Figure 13 This is an explanatory diagram showing the pattern formation surface of the eighth dielectric layer of the first body in a first exemplary embodiment of the present disclosure.

[0023] Figure 14 This is an explanatory diagram showing the pattern formation surface of the ninth dielectric layer of the first body in a first exemplary embodiment of the present disclosure.

[0024] Figure 15 This is an explanatory diagram showing the pattern formation surface of the tenth dielectric layer of the first body in a first exemplary embodiment of the present disclosure.

[0025] Figure 16 This is an explanatory diagram showing the pattern formation surface of the eleventh dielectric layer of the first body in a first exemplary embodiment of the present disclosure.

[0026] Figure 17 This is an explanatory diagram showing the pattern formation surface of the twelfth dielectric layer of the first body in a first exemplary embodiment of the present disclosure.

[0027] Figure 18 This is an explanatory diagram showing the pattern formation surface of the thirteenth dielectric layer of the first body in a first exemplary embodiment of the present disclosure.

[0028] Figure 19 This is an explanatory diagram showing the pattern formation surface of the fourteenth dielectric layer of the first body in a first exemplary embodiment of the present disclosure.

[0029] Figure 20 This is an explanatory diagram showing the pattern formation surface of the fifteenth dielectric layer of the first body in a first exemplary embodiment of the present disclosure.

[0030] Figure 21This is an explanatory diagram showing the sixteenth layer pattern forming surface of the first body in a first exemplary embodiment of the present disclosure.

[0031] Figure 22 This is an explanatory diagram showing the seventeenth layer pattern forming surface of the first body in a first exemplary embodiment of the present disclosure.

[0032] Figure 23 This is an explanatory diagram showing the seventeenth layer of the first body in a first exemplary embodiment of the present disclosure, on the side opposite to the pattern forming surface.

[0033] Figure 24 This is a perspective view showing the interior of a first body in a first exemplary embodiment of the present disclosure.

[0034] Figure 25 This is a characteristic diagram illustrating an example of the attenuation characteristics of an electronic device according to a first exemplary embodiment of the present disclosure.

[0035] Figure 26 This is a circuit diagram illustrating the circuit structure of an electronic device according to a second exemplary embodiment of the present disclosure.

[0036] Figure 27 This is a circuit diagram showing the circuit structure of the electronic device in the comparative example.

[0037] Figure 28 This is a characteristic plot representing an example of the attenuation characteristics of the comparative model.

[0038] Figure 29 This is a characteristic diagram illustrating an example of the attenuation characteristics of the model in the embodiment. Detailed Implementation

[0039] [First Exemplary Implementation] Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. First, referring to... Figure 1 The structure of the electronic device according to a first exemplary embodiment of the present disclosure will be described. Figure 1 This is a circuit diagram illustrating an exemplary embodiment of electronic device 1. Furthermore, in the following description, the term "in circuit structure" refers to the configuration on the circuit diagram, not the configuration in the physical structure.

[0040] Electronic device 1 includes a first signal port 2, a second signal port 3, an LC circuit 10, a first path 4, and a second path 5. The first signal port 2 and the second signal port 3 are ports used for signal input or output, respectively. That is, when a signal is input to the first signal port 2, a signal is output from the second signal port 3. Conversely, when a signal is input to the second signal port 3, a signal is output from the first signal port 2.

[0041] The LC circuit 10 is disposed between the first signal port 2 and the second signal port 3 in the circuit structure. In addition, the LC circuit 10 includes at least one capacitor and at least one inductor, and is configured to selectively allow signals of frequencies above a certain frequency to pass through.

[0042] The first path 4 is the path from the first signal port 2 to the LC circuit 10, and the first signal port 2 is connected to the LC circuit 10 in terms of circuit structure. The second path 5 is the path from the second signal port 3 to the LC circuit 10, and the second signal port 3 is connected to the LC circuit 10 in terms of circuit structure.

[0043] The electronic device 1 also includes an inductor L1 disposed in the circuit structure between the first path 4 and the grounding element. The inductor L1 corresponds to the "first inductor" in this disclosure. The inductor L1 is connected to at least one capacitor of the LC circuit 10. The electronic device 1 also includes a capacitor C1 connected in parallel with respect to the inductor L1. Furthermore, in an exemplary embodiment, no capacitor is disposed between the first path 4 and the grounding element that is directly or indirectly connected in series with respect to the inductor L1.

[0044] Electronic device 1 also includes an inductor L2 disposed in the circuit structure between the second path 5 and the grounding element. Inductor L2 corresponds to the "second inductor" in this disclosure. Inductors L1 and L2 are physically configured in a mutually coupled manner. The coupling between inductors L1 and L2 can be magnetic coupling. Figure 1 In the attached diagram, reference numeral L3 indicates the magnetic coupling between inductors L1 and L2. The physical configuration of inductors L1 and L2 will be explained later.

[0045] In an exemplary embodiment, a capacitor that is directly or indirectly connected in series with respect to the inductor L2 may not be provided between the second path 5 and the grounding element.

[0046] The electronic device 1 also includes three circuits 20, 30, and 40 arranged in the circuit structure between the first signal port 2 and the second signal port 3. Circuit 20 is arranged in the circuit structure between the LC circuit 10 and the second signal port 3. Circuit 30 is arranged in the circuit structure between the LC circuit 10 and the first signal port 2. Circuit 40 is arranged in the circuit structure between circuit 20 and the second signal port 3.

[0047] Circuit 20 includes an inductor L2 and at least one element disposed between the LC circuit 10 and the inductor L2. The at least one element may be, for example, an inductor element, a capacitor element, or an elastic wave element. The elastic wave element may be a bulk elastic wave element or a surface elastic wave element.

[0048] In an exemplary embodiment, the LC circuit 10 and inductors L1, L2, together with at least one of the three circuits 20, 30, 40, constitute a bandpass filter that selectively allows signals of frequencies within a specific passband to pass through. Referring below... Figure 1 An example of the circuit structure of a bandpass filter, i.e., electronic device 1, will be explained.

[0049] Circuit 30 includes capacitors C31, C32, C33, and C34, and inductors L31 and L32. Inductor L31 is located in the first path 4. One end of inductor L31 is connected to the first signal port 2. Capacitor C31 is connected in parallel with respect to inductor L31.

[0050] One end of capacitor C32 and one end of capacitor C33 are connected to one end of inductor L31. One end of inductor L32 is connected to the other end of capacitor C33. Capacitor C34 is connected in parallel with inductor L32. The other ends of capacitor C32 and inductor L32 are connected to ground.

[0051] The LC circuit 10 includes a third path 6 connecting the first path 4 and the second path 5. Additionally, the LC circuit 10 includes capacitors C11, C12, C13, C14, C15 and inductors L11, L12 as at least one capacitor and at least one inductor.

[0052] Capacitors C11 and C12 are located in the third path 6. One end of capacitor C11 is connected to the other end of inductor L31 in circuit 30. One end of capacitor C12 is connected to the other end of capacitor C11.

[0053] Capacitor C13 is connected to capacitors C11 and C12. One end of capacitor C13 is connected to one end of capacitor C11. The other end of capacitor C13 is connected to the other end of capacitor C12.

[0054] Inductor L11 is positioned between the third path 6 and the grounding element. One end of inductor L11 is connected to the third path 6 between capacitors C11 and C12. Capacitor C14 is connected in parallel with respect to inductor L11. The other end of inductor L11 is connected to the grounding element.

[0055] One end of inductor L12 is connected to the other end of capacitor C12. One end of capacitor C15 is connected to the other end of inductor L12. The other end of capacitor C15 is connected to ground.

[0056] Inductor L1 is connected to the first path 4 between LC circuit 10 and circuit 30. One end of inductor L1 is connected to one end of capacitor C11. Capacitor C1 is connected in parallel with respect to inductor L1. The other end of inductor L1 is connected to ground.

[0057] Circuit 20 includes two elastic wave elements 21 and 22 as at least one element. Circuit 20 also includes a capacitor C21 and an inductor L2.

[0058] The elastic wave element 21 is disposed in the second path 5. One end of the elastic wave element 21 is connected to the other end of the capacitor C12 of the LC circuit 10. The capacitor C21 is connected in parallel with respect to the elastic wave element 21.

[0059] The elastic wave element 22 is disposed between the second path 5 and the grounding element. One end of the elastic wave element 22 is connected to the other end of the elastic wave element 21. One end of the inductor L2 is connected to the other end of the elastic wave element 22. The other end of the inductor L2 is connected to the grounding element.

[0060] Circuit 40 includes capacitor C41 and inductors L41 and L42. Inductor L41 is located in the second path 5. One end of inductor L42 is connected to the other end of elastic wave element 21 in circuit 20. The other end of inductor L41 is connected to the second signal port 3.

[0061] One end of inductor L42 is connected to one end of inductor L41. One end of capacitor C41 is connected to the other end of inductor L41. The other ends of inductor L42 and capacitor C41 are connected to ground.

[0062] Next, refer to Figures 2 to 5 The other structures of electronic device 1 will be described. Figure 2 This is a three-dimensional diagram representing electronic device 1. Figure 3 This is a cross-sectional view showing electronic device 1. Figure 4 as well as Figure 5 This is a three-dimensional view representing the first main body of electronic device 1.

[0063] An exemplary embodiment of the electronic device 1 includes a first body 50 and a second body 80 mounted on the first body 50. The first body 50 is composed of a laminate containing multiple stacked dielectric layers and multiple conductors (multiple conductor layers and multiple vias). For example, low-temperature co-fired ceramic (LTCC) is used as the dielectric material.

[0064] The first subject 50 includes Figure 1 The components of the electronic device 1 shown are those other than the elastic wave elements 21 and 22. The second body 80 includes the elastic wave elements 21 and 22.

[0065] The first body 50 has: a bottom surface 50A located at one end of the stacking direction T of the plurality of dielectric layers; a top surface 50B located at the other end of the stacking direction T; and four side surfaces 50C to 50F connecting the bottom surface 50A and the top surface 50B. Side surfaces 50C and 50D face opposite sides to each other, and side surfaces 50E and 50F also face opposite sides to each other. Side surfaces 50C to 50F are perpendicular to the bottom surface 50A and the top surface 50B.

[0066] Here, as Figures 2 to 5 As shown, the X, Y, and Z directions are defined. The X, Y, and Z directions are orthogonal to each other. In an exemplary embodiment, a direction parallel to the stacking direction T is designated as the Z direction. The Z direction is also parallel to the direction in which the first body 50 and the second body 80 are arranged. Furthermore, a direction opposite to the X direction is designated as the -X direction, a direction opposite to the Y direction as the -Y direction, and a direction opposite to the Z direction as the -Z direction. Additionally, the phrase "when viewed from a specific direction (e.g., the stacking direction T)" means viewing the object from a separated position along a specific direction or a direction parallel to the specific direction.

[0067] like Figure 4 as well as Figure 5 As shown, the bottom surface 50A is located at the end of the first body 50 in the -Z direction. The upper surface 50B is located at the end of the first body 50 in the Z direction. The upper surface 50B is also a mounting surface for mounting the second body 80. Figure 4 This indicates the first body 50 as seen from the upper surface 50B side. Figure 5 This indicates the first main body 50 as seen from the bottom surface 50A.

[0068] Side 50C is located at the end of the first body 50 in the -X direction. Side 50D is located at the end of the first body 50 in the X direction. Side 50E is located at the end of the first body 50 in the -Y direction. Side 50F is located at the end of the first body 50 in the Y direction.

[0069] The first body 50 further includes a plurality of electrodes 111, 112, 113, 114, 115, 116, 117, 118, and 119 disposed on the bottom surface 50A of the first body 50. Compared to the side surface 50E, electrodes 111, 112, and 113 are arranged in this order along the X direction at a position closer to the side surface 50F. Compared to the side surface 50F, electrodes 115, 116, and 117 are arranged in this order along the -X direction at a position closer to the side surface 50E.

[0070] Electrode 114 is disposed between electrode 113 and electrode 115. Electrode 118 is disposed between electrode 111 and electrode 117. Electrode 119 is disposed between electrode 112 and electrode 116. In addition, electrode 119 is disposed approximately at the center of the bottom surface 50A.

[0071] Electrode 114 corresponds to the first signal port 2. Electrode 118 corresponds to the second signal port 3. Therefore, the first signal port 2 and the second signal port 3 are disposed on the bottom surface 50A of the first main body 50. Electrodes 111~113, 115~117, and 119 are each connected to a grounding component.

[0072] The first body 50 further includes electrodes 121, 122, 123, and 124 disposed on its upper surface 50B. The electrodes 121-124 are used for electrical connection between the first body 50 and the second body 80. Electrodes 121 and 122 are arranged in this order along the X direction. Electrodes 123 and 124 are positioned in front of electrodes 121 and 122 in the Y direction and are arranged in this order along the X direction.

[0073] The second body 80 also includes four electrodes 81, 82, 83, and 84. When the second body 80 is mounted on the first body 50, electrodes 81-84 are respectively positioned opposite electrodes 121-124 of the first body 50. Electrodes 81-84 are physically connected to electrodes 121-124, for example, via solder bumps 8.

[0074] The electronic device 1 also includes a protective layer 90. The protective layer 90 covers the upper surface 50B of the second body 80 and the first body 50. As the material of the protective layer 90, an insulating material containing a resin material can be used. The resin material can be a thermosetting resin or a thermoplastic resin.

[0075] The electronic device 1 also includes a shielding layer 100 made of a conductive material. The shielding layer 100 covers the first body 50, the second body 80, and the protective layer 90. Furthermore, the shielding layer 100 is in contact with the sides 50C to 50F of the first body 50. The conductive material can be a pure metal composed of a single metallic element, or an alloy composed of multiple metallic elements. Additionally, the shielding layer 100 may also comprise multiple layers, each made of a conductive material.

[0076] The shielding layer 100 is electrically connected to electrodes 111-113, 115-117, and 119. The first body 50 includes a plurality of conductors that electrically connect the shielding layer 100 to electrodes 111-113, 115-117, and 119.

[0077] Next, refer to Figures 6 to 23An example of the plurality of dielectric layers, plurality of conductor layers, and plurality of vias constituting the first body 50 will be described. In this example, the first body 50 comprises seventeen stacked dielectric layers. Hereinafter, these seventeen dielectric layers will be referred to as the first layer to the seventeenth layer from bottom to top. Furthermore, the first layer to the seventeenth layer will be indicated by reference numerals 51 to 67 in the accompanying drawings.

[0078] exist Figures 6 to 23 In the diagram, multiple circles (a single circle and the inner circle of two double-drawn circles) represent multiple vias. Multiple vias are formed on each of the dielectric layers 51-67. Each via is formed by filling the hole with conductive paste. Figures 6 to 23 In this diagram, besides the multiple circles representing multiple vias, multiple shapes represent multiple dielectric layers, multiple conductor layers, and multiple electrodes. The multiple vias are connected to the electrodes, conductor layers, or other vias, respectively.

[0079] exist Figures 6 to 23 In this diagram, reference numerals are used to label the various specific vias that constitute the various specific parts described later. The reference numerals for the vias indicate that the via is a constituent element of any one of the various specific parts. The connection relationships between each of the various specific vias and the conductor layer or other vias are explained for the state in which the first to seventeenth dielectric layers 51-67 are stacked. Two vias that are vertically adjacent in the stacking direction T among the various vias labeled with the same reference numerals are interconnected.

[0080] Figure 6 This indicates the patterning surface of the first dielectric layer 51. Electrodes 111 to 119 are formed on the patterning surface of the dielectric layer 51. Figure 7 This indicates the patterning surface of the second dielectric layer 52. Conductor layers 521, 522, and 523 are formed on the patterning surface of the dielectric layer 52.

[0081] Figure 8 This indicates the patterned surface of the third dielectric layer 53. Conductor layers 531 and 532 are formed on the patterned surface of the dielectric layer 53. Additionally, vias labeled L1b and L2b are formed in the dielectric layer 53. These vias are connected to the conductor layer 531.

[0082] Figure 9This indicates the patterned surface of the fourth dielectric layer 54. Conductor layers 541, 542, and 543 are formed on the patterned surface of the dielectric layer 54. Additionally, vias labeled L1a1, L1b, and L2b are formed on the dielectric layer 54. The via labeled L1a1 is connected to the conductor layer 542.

[0083] Figure 10 This indicates the patterning surface of the fifth dielectric layer 55. Conductor layers 551, 552, 553 and conductor layers 554, 555 for inductors are formed on the patterning surface of the dielectric layer 55. Additionally, through-holes labeled L1a1, L1a2, L1a3, L1b, and L2b are formed on the dielectric layer 55. The through-holes labeled L1a2 and L1a3 are connected to the conductor layer 553.

[0084] Figure 11 This indicates the patterned surface of the sixth dielectric layer 56. Conductor layers 561 and 562 are formed on the patterned surface of the dielectric layer 56. Additionally, vias labeled L1a1, L1a2, L1a3, L1b, and L2b are formed on the dielectric layer 56.

[0085] Figure 12 This indicates the patterned surface of the seventh dielectric layer 57. Conductor layers 571, 572, 573, 574, 575, 576, and 577 are formed on the patterned surface of the dielectric layer 57. Conductor layers 573 to 576 are each connected to the shielding layer 100. Additionally, through-holes marked with reference numeral L1a1, L1a2, L1a3, L1b, and L2b are formed on the dielectric layer 57. The through-hole marked with reference numeral L1a1 is connected to the conductor layer 571.

[0086] Figure 13 This indicates the patterned surface of the eighth dielectric layer 58. Conductor layers 581, 582, and 583 are formed on the patterned surface of the dielectric layer 58. Additionally, vias labeled L1a1, L1a2, L1a3, L1b, and L2b are formed on the dielectric layer 58.

[0087] Figure 14This indicates the patterning surface of the ninth dielectric layer 59. Conductor layers 591 and 592 for inductors are formed on the patterning surface of the dielectric layer 59. Additionally, vias labeled L1a1, L1a2, L1a3, L1b, and L2b are formed on the dielectric layer 59.

[0088] Figure 15 This indicates the patterned surface of the tenth dielectric layer 60. Conductor layers 601, 602, 603, 604, and 605 for inductors are formed on the patterned surface of the dielectric layer 60. Additionally, vias labeled L1a1, L1a2, L1a3, L1b, and L2a are formed on the dielectric layer 60. The vias labeled L2b and L2a formed on the dielectric layer 59 are connected to the conductor layer 604.

[0089] Figure 16 This indicates the patterned surface of the eleventh dielectric layer 61. Conductor layers 611, 612, 613, 614, and conductor layer 615 for inductors are formed on the patterned surface of dielectric layer 61. Two vias, labeled L1a3 and L1b, formed in dielectric layer 60, are connected to conductor layer 613. Two vias, labeled L1a1 and L1a2, formed in dielectric layer 60, are connected to conductor layer 614. Additionally, a via labeled L2a is formed in dielectric layer 61.

[0090] Figure 17 This indicates the patterning surface of the twelfth dielectric layer 62. Conductor layers 621, 622, and 623 for inductors are formed on the patterning surface of dielectric layer 62. Conductor layer 622 is connected to conductor layer 623. Figure 17 In the figure, the boundary between conductor layer 622 and conductor layer 623 is indicated by a dashed line. Additionally, a through-hole marked with reference numeral L2a is formed in dielectric layer 62.

[0091] Figure 18 This indicates the patterning surface of the thirteenth dielectric layer 63. Conductor layers 631, 632, and 633 for inductors are formed on the patterning surface of dielectric layer 63. Additionally, a through-hole marked with reference numeral L2a is formed in dielectric layer 63.

[0092] Figure 19This indicates the patterned surface of the fourteenth dielectric layer 64. An inductor conductor layer 641 is formed on the patterned surface of the dielectric layer 64. Additionally, a through-hole marked with reference numeral L2a is formed in the dielectric layer 64.

[0093] Figure 20 This indicates the patterning surface of the fifteenth dielectric layer 65. Conductor layers 651, 652, 653, and conductor layers 654 and 655 for inductors are formed on the patterning surface of dielectric layer 65. Conductor layer 651 is connected to conductor layer 655. Figure 20 In the diagram, the boundary between conductor layer 651 and conductor layer 655 is indicated by a dashed line. A via, marked with reference numeral L2a, formed in dielectric layer 64, connects to conductor layer 654.

[0094] Figure 21 This indicates the patterning surface of the sixteenth dielectric layer 66. Conductor layers 661, 662, 663 and 664, 665 for inductors are formed on the patterning surface of the dielectric layer 66.

[0095] Figure 22 This indicates the pattern formation surface of the seventeenth dielectric layer 67. Figure 23 This refers to the terminal forming surface of the seventeenth dielectric layer 67, which is opposite to the pattern forming surface. Electrodes 121 to 124 are formed on the terminal forming surface of the dielectric layer 67.

[0096] Figure 2 The first body 50 shown is constructed by stacking the first to seventeenth dielectric layers 51-67, with the patterned surface of the first dielectric layer 51 forming the bottom surface 50A of the first body 50 and the terminal forming surface of the seventeenth dielectric layer 67 forming the upper surface 50B of the first body 50. Furthermore, in Figures 6 to 23 The diagram shows the shape and configuration of multiple conductor layers, multiple electrodes, and multiple through holes as viewed from the upper surface 50B side of the first body 50.

[0097] When stacking the first to seventeenth dielectric layers 51-67, Figures 6 to 23 The multiple vias shown are respectively connected to conductor layers overlapping in the stacking direction T or other vias overlapping in the stacking direction T. Additionally, Figures 6 to 23 The through-hole shown is located inside the electrode or the conductor layer and is connected to the electrode or the conductor layer.

[0098] Figure 24 This refers to the interior of the first main body 50, which is composed of the first to seventeenth dielectric layers 51-67 stacked together. For example... Figure 24 As shown, there are stacked inside the first main body 50. Figures 6 to 22 Multiple conductor layers and multiple through-holes are shown. Furthermore, in... Figure 24In this drawing, for convenience, the dimensions of the first main body 50 in the stacking direction T are enlarged for drawing.

[0099] Below, on Figure 1 The circuit components of the electronic device 1 shown are similar to Figures 6 to 23 The correspondence between the constituent elements inside the first main body 50 shown is explained.

[0100] The inductor L31 of circuit 30 includes: conductor layers 551, 552, 602, and 612 for inductors; a plurality of through holes connecting conductor layer 551 and conductor layer 602; a plurality of through holes connecting conductor layer 552 and conductor layer 602; a plurality of through holes connecting conductor layer 552 and conductor layer 612; and a plurality of through holes connecting conductor layer 532 and conductor layer 612.

[0101] The capacitor C31 of circuit 30 includes conductor layers 532, 542 and a dielectric layer 53 between them. The capacitor C32 of circuit 30 includes conductor layers 522, 531 and a dielectric layer 52 between them. The capacitor C33 of circuit 30 includes conductor layers 572, 583 and a dielectric layer 57 between them.

[0102] The inductor L32 of circuit 30 includes conductor layers 653 and 663 for inductance and a plurality of through-holes connecting the conductor layers 653 and 663. The capacitor C34 of circuit 30 includes conductor layers 531 and 543 and a dielectric layer 53 between them.

[0103] Inductor L1 includes conductor layers 553, 613, and 614 for inductance and multiple through-holes labeled L1a1, L1a2, L1a3, and L1b. Capacitor C1 includes conductor layers 531 and 542 and a dielectric layer 53 between them.

[0104] The capacitor C11 of the LC circuit 10 includes conductor layers 542 and 554 and a dielectric layer 54 between them. The capacitor C12 of the LC circuit 10 includes conductor layers 554 and 561 and a dielectric layer 55 between them. The capacitor C13 of the LC circuit 10 includes conductor layers 571 and 582 and a dielectric layer 57 between them.

[0105] The inductor L11 of the LC circuit 10 includes conductor layers 632, 641, 652, and 662 for inductance and a plurality of through-holes connecting the conductor layers 632, 641, 652, and 662. The capacitor C14 of the LC circuit 10 includes conductor layers 573 and 581 and a dielectric layer 57 between them.

[0106] The inductor L12 of the LC circuit 10 includes conductor layers 621, 631, 651, and 661 for inductance and a plurality of through-holes connecting the conductor layers 621, 631, 651, and 661. The capacitor C15 of the LC circuit 10 includes conductor layers 531 and 541 and a dielectric layer 53 between them.

[0107] One end of the elastic wave element 21 in circuit 20 is connected to electrode 122. One of the other ends of the elastic wave element 21 and one end of the elastic wave element 22 in circuit 20 is connected to electrode 121. The other end of the other end of the elastic wave element 21 and one end of the elastic wave element 22 in circuit 20 is connected to electrode 123. The other end of the elastic wave element 22 in circuit 20 is connected to electrode 124.

[0108] The capacitor C21 of circuit 20 includes conductor layers 655 and 665 and a dielectric layer 65 between them. The inductor L2 of circuit 20 includes a conductor layer 604 for inductance and a plurality of through holes labeled L2a and L2b in the figure.

[0109] The inductor L41 of circuit 40 includes conductor layers 603 and 623 for inductance and a plurality of through-holes connecting the conductor layers 603 and 623. The inductor L42 of circuit 40 includes conductor layers 591, 601, 611, and 622 for inductance and a plurality of through-holes connecting the conductor layers 591, 601, 611, and 622. The capacitor C41 of circuit 40 includes conductor layers 521 and 531 and a dielectric layer 52 between them.

[0110] Next, refer to Figures 2 to 24 The structural features of the electronic device 1 according to an exemplary embodiment will be described. Inductor L1 includes three first portions L1a1, L1a2, L1a3, and a second portion L1b. Inductor L2 includes a third portion L2a and a fourth portion L2b. The first portion L1a1 includes a plurality of through holes, each labeled with reference numeral L1a1. The first portion L1a2 includes a plurality of through holes, each labeled with reference numeral L1a2. The first portion L1a3 includes a plurality of through holes, each labeled with reference numeral L1a3. The second portion L1b includes a plurality of through holes, each labeled with reference numeral L1b. The third portion L2a includes a plurality of through holes, each labeled with reference numeral L2a. The fourth portion L2b includes a plurality of through holes, each labeled with reference numeral L2b.

[0111] like Figure 24As shown, the three first parts L1a1~L1a3 and the second to fourth parts L1b, L2a, L2b are columnar structures, i.e., columnar conductors, formed by being connected in series through multiple through holes. In addition, the three first parts L1a1~L1a3 and the second to fourth parts L1b, L2a, L2b extend in a direction parallel to the stacking direction T.

[0112] The inductor L1 also includes conductor layers 553, 613, and 614. Conductor layer 614 connects one end of the first portion L1a1 to one end of the first portion L1a2. Conductor layer 613 connects one end of the first portion L1a3 to one end of the second portion L1b. Conductor layer 553 connects the other end of the first portion L1a2 to the other end of the first portion L1a3. The inductor L1 is wound around an axis extending in a direction orthogonal to the stacking direction T, and this axis passes between the first portion L1a1 and the first portion L1a2, and between the first portion L1a3 and the second portion L1b.

[0113] Inductor L2 also includes a conductor layer 604. Conductor layer 604 connects one end of the third part L2a to one end of the fourth part L2b.

[0114] The other end of the second portion L1b of inductor L1 and the other end of the fourth portion L2b of inductor L2 are connected to the conductor layer 531. The conductor layer 531 is connected to electrodes 111-113, 115-117, and 119 connected to the grounding element via multiple through-holes. Therefore, in inductor L1, the second portion L1b is disposed between the three first portions L1a1-L1a3 and the grounding element in the circuit structure. Similarly, in inductor L2, the fourth portion L2b is disposed between the third portion L2a and the grounding element in the circuit structure.

[0115] Next, the physical configuration of inductors L1 and L2 will be described. Inductors L1 and L2 are physically configured in a mutually coupled manner. For example... Figure 24 As shown, in an exemplary embodiment, no other elements or conductors are disposed between at least a portion of inductor L1 and at least a portion of inductor L2.

[0116] Additionally, in exemplary embodiments, such as Figure 24As shown, the fourth portion L2b of inductor L2 is positioned closer to inductor L1 than the third portion L2a of inductor L2 when viewed from the stacking direction T. Specifically, the spacing between the second portion L1b and the fourth portion L2b when viewed from the stacking direction T is smaller than the spacing between the first portions L1a1 to L1a3 and the third portion L2a when viewed from the stacking direction T. In an exemplary embodiment, the spacing between the second portion L1b and the fourth portion L2b when viewed from the stacking direction T is smaller than the spacing between the first portions L1a1 to L1a3 and the third portion L2a when viewed from the stacking direction T.

[0117] Next, other structural features of the electronic device 1 in the exemplary embodiment will be described. First, inductors L11, L12, L31, L32, L41, and L42 will be described. Inductors L11, L12, L32, L41, and L42 are each wound around an axis extending in a direction parallel to the lamination direction T. Inductor L31 is wound around an axis extending in a direction orthogonal to the lamination direction T.

[0118] Next, features related to the shielding layer 100 and the grounding element will be described. Conductor layers 573, 574, 575, and 576 are connected to the shielding layer 100. Conductor layers 573, 574, 575, and 576 are connected to conductor layer 531 via multiple through-holes. As described above, conductor layer 531 is connected to electrodes 111-113, 115-117, and 119 connected to the grounding element via multiple through-holes. Therefore, the shielding layer 100 is connected to the grounding element via multiple conductors disposed within the first body 50.

[0119] Next, an example of the characteristics of the electronic device 1 according to an exemplary embodiment will be shown. Here, the characteristics of the electronic device 1 when it is designed as a bandpass filter with a passband of 5.15 GHz to 7.125 GHz will be described. Figure 25 This is a characteristic diagram representing the attenuation characteristics of electronic device 1. Figure 25 In the graph, the horizontal axis represents frequency, and the vertical axis represents attenuation. Additionally, in... Figure 25 In the figure, the curve marked with reference numeral 91 represents the attenuation characteristics between the first signal port 2 and the second signal port 3. Furthermore, in Figure 25 In order to distinguish between the multiple attenuation poles formed by elastic wave elements 21 and 22 and the multiple attenuation poles formed by parts other than elastic wave elements 21 and 22, the attenuation characteristics when elastic wave elements 21 and 22 are not functioning are shown.

[0120] like Figure 25As shown, three attenuation electrodes are formed in the stopband, which is lower than the passband frequency. The arrow labeled 91a indicates the attenuation electrode with the highest frequency among the three. Hereinafter, this attenuation electrode will be referred to as the first attenuation electrode 91a. The arrow labeled 91c indicates the attenuation electrode with the lowest frequency among the three. Hereinafter, this attenuation electrode will be referred to as the third attenuation electrode 91c. The attenuation electrode indicated by the arrow labeled 91b will be referred to as the second attenuation electrode 91b.

[0121] The first attenuation electrode 91a can be formed by capacitors C11-C14 and inductor L11 in LC circuit 10. The second attenuation electrode 91b can be formed by capacitor C15 and inductor L12 in LC circuit 10. The third attenuation electrode 91c can be formed by the coupling of inductors L1 and L2. The inductance of inductor L2 can also be smaller than the inductance of each of inductors L1, L11, and L12.

[0122] Next, the operation and effects of the electronic device 1 in the exemplary embodiment will be explained. As described above, when the electronic device 1 is a bandpass filter, multiple attenuation electrodes are formed in the stopband at a frequency lower than the passband. In the exemplary embodiment, the LC circuit 10 is configured to selectively allow signals at frequencies higher than a specific frequency to pass through. That is, the LC circuit 10 has the function of blocking frequencies lower than the specific frequency from passing through. The LC circuit 10 and the inductors L1 and L2 form multiple attenuation electrodes in the stopband at a frequency lower than the passband. In order to form attenuation electrodes at relatively low frequencies, it is necessary to increase the inductance of the inductor and the capacitance of the capacitor by a certain degree. For this purpose, it is necessary to increase the size of the inductor and the size of the capacitor by a certain degree.

[0123] In contrast, in an exemplary embodiment, inductors L1 and L2 are physically configured in a mutually coupled manner. The third attenuation electrode 91c is formed by inductors L1 and L2. Therefore, according to the exemplary embodiment, a relatively large capacitor can be omitted, miniaturizing the electronic device 1. In particular, in the exemplary embodiment, the third attenuation electrode 91c is the lowest frequency attenuation electrode in the stopband, which is lower than the passband frequency. Therefore, according to the exemplary embodiment, compared to the case where inductor L2 is coupled to inductors L11 and L12 of the LC circuit 10, a larger capacitor can be omitted, and the increase in insertion loss in the passband can be suppressed. Furthermore, in the second exemplary embodiment, it will be explained that by coupling inductors L1 and L2, characteristics equivalent to those achieved when using inductors and capacitors to form the attenuation electrode can be realized.

[0124] Thus, according to the exemplary implementation, the desired characteristics can be achieved, and the electronic device 1 can be miniaturized.

[0125] Furthermore, in the exemplary embodiment, inductor L2 is not a component of LC circuit 10, but rather a component of other circuits 20. Elastic wave elements 21 and 22 of circuit 20 are disposed between LC circuit 10 and inductor L2, and inductor L2 is not directly connected to LC circuit 10. In the exemplary embodiment, inductor L2 is disposed between elastic wave element 22 and grounding element. That is, inductor L2 is a component used to connect elastic wave element 22 to grounding element. According to the exemplary embodiment, compared to the case where other inductors coupled to inductor L1 are disposed in LC circuit 10, the number of inductors can be reduced. Therefore, according to the exemplary embodiment, the electronic device 1 can also be miniaturized.

[0126] [Second Exemplary Implementation] Next, refer to Figure 26 A second exemplary embodiment of this disclosure will be described. Figure 26 This is a circuit diagram illustrating the circuit structure of an electronic device according to an exemplary embodiment.

[0127] Similar to the electronic device 1 of the first exemplary embodiment, the electronic device 101 of the exemplary embodiment includes a first signal port 2, a second signal port 3, a first path 4, a second path 5, and inductors L1 and L2. Additionally, the electronic device 101 includes an LC circuit 110 instead of the LC circuit 10 in the first exemplary embodiment. In the exemplary embodiment, the first path 4 is the path from the first signal port 2 to the LC circuit 110. The second path 5 is the path from the second signal port 3 to the LC circuit 110. In the exemplary embodiment, one end of the inductor L2 is connected to the second path 5.

[0128] Except for the absence of capacitors C14 and C15 and inductor L12, the structure of LC circuit 110 is the same as that of LC circuit 10 in the first exemplary embodiment. That is, LC circuit 110 includes capacitors C11, C12, and C13 and inductor L11. In the exemplary embodiment, capacitor C11 is connected to the first signal port 2. Capacitor C12 is connected to the second signal port 3.

[0129] In an exemplary embodiment, similar to the first exemplary embodiment, inductors L1 and L2 are physically configured in a mutually coupled manner. Figure 26 In the figure, reference numeral L3 indicates the magnetic coupling between inductor L1 and inductor L2.

[0130] In an exemplary embodiment, the LC circuit 110 and the inductors L1 and L2 constitute a high-pass filter that selectively allows signals at frequencies above a specific frequency to pass through.

[0131] Next, the effects of the electronic device 101 of the exemplary embodiment will be explained with reference to the simulation results. In the simulation, a model of the comparative example and a model of the embodiment are used. The model of the comparative example is a model of the electronic device 201 of the comparative example. The model of the embodiment is a model of the electronic device 101 of the exemplary embodiment.

[0132] First, refer to Figure 27 The structure of the electronic device 201 in the comparative example will be described. Figure 27 This is a circuit diagram showing the circuit structure of the electronic device 201 in the comparative example. The structure of the electronic device 201 in the comparative example differs from that of the electronic device 101 in the exemplary embodiment in the following aspects: The electronic device 201 in the comparative example includes a capacitor C2 disposed between the first path 4 and the inductor L1. In addition, in the electronic device 201 in the comparative example, the inductor L1 and the inductor L2 are not coupled.

[0133] Next, the simulation results will be explained. In the simulation, the models of the comparative example and the embodiment were designed as high-pass filters with a cutoff frequency of 4.5 GHz to 4.7 GHz. Figure 28 This is a characteristic plot of the comparative model through attenuation characteristics. Figure 29 This is a characteristic plot illustrating the attenuation characteristics of the model in the embodiment. Figure 28 as well as Figure 29 In the diagram, the horizontal axis represents frequency, and the vertical axis represents attenuation. Figure 28 In the figure, the curve labeled 92 represents the attenuation characteristics between the first signal port 2 and the second signal port 3 in the comparative example model. Figure 29 In the figure, the curve marked with reference numeral 93 represents the attenuation characteristics between the first signal port 2 and the second signal port 3 in the model of the embodiment.

[0134] like Figure 28 As shown, in the comparative example model, two attenuation poles are formed in the stopband at a frequency lower than the cutoff frequency. The arrow labeled 92a indicates the higher-frequency attenuation pole of the two. Hereinafter, this attenuation pole will be referred to as the first attenuation pole 92a. The arrow labeled 92b indicates the lower-frequency attenuation pole of the two. Hereinafter, this attenuation pole will be referred to as the second attenuation pole 92b. The first attenuation pole 92a is formed by capacitors C11-C13 and inductor L11 of the LC circuit 110. The second attenuation pole 92b is formed by the series resonance of inductor L1 and capacitor C2.

[0135] like Figure 29As shown, in the model of this embodiment, two attenuation electrodes are formed in the stopband at a frequency lower than the cutoff frequency. The arrow labeled 93a indicates the higher-frequency attenuation electrode of the two. Hereinafter, this attenuation electrode will be referred to as the first attenuation electrode 93a. The arrow labeled 93b indicates the lower-frequency attenuation electrode of the two. Hereinafter, this attenuation electrode will be referred to as the second attenuation electrode 93b. The first attenuation electrode 93a is formed by capacitors C11-C13 and inductor L11 of the LC circuit 110. The second attenuation electrode 93b is formed by the coupling of inductors L1 and L2.

[0136] Depend on Figure 28 as well as Figure 29 It is understood that the model of the embodiment has the same attenuation characteristics as the model of the comparative example. Therefore, according to the exemplary embodiment, by coupling inductor L1 to inductor L2, capacitor C2 can be omitted, and the same characteristics as in the case where inductor L1 and capacitor C2 form the attenuation electrode can be achieved. Thus, according to the exemplary embodiment, the desired characteristics can be achieved, and the electronic device 101 can be miniaturized.

[0137] Furthermore, the effects of inductors L1 and L2 described with reference to the simulation results also apply to inductors L1 and L2 in the first exemplary embodiment. Other structures, functions, and effects in the exemplary embodiment are the same as in the first exemplary embodiment.

[0138] Furthermore, this disclosure is not limited to the exemplary embodiments described above, and various modifications are possible. For example, inductor L1 may also be coupled to an inductor other than inductor L2, and to an inductor disposed in either circuit 30 or 40. Similarly, inductor L2 may also be coupled to an inductor other than inductor L1, and to an inductor disposed in LC circuit 10.

[0139] As described above, an electronic device according to one embodiment of the present disclosure includes: a first signal port; a second signal port; an LC circuit disposed between the first signal port and the second signal port, comprising at least one capacitor and at least one inductor, and configured to selectively allow signals of frequencies above a specific frequency to pass through; a first path from the first signal port to the LC circuit; a second path from the second signal port to the LC circuit; a first inductor disposed between the first path and a ground member; and a second inductor disposed between the second path and the ground member, wherein the first inductor and the second inductor are physically configured in a mutually coupled manner.

[0140] In one embodiment of the electronic device disclosed herein, the LC circuit, the first inductor, and the second inductor can form multiple attenuation electrodes through a stopband in the attenuation characteristic between the first signal port and the second signal port, wherein the stopband is lower than a specific frequency. The lowest frequency attenuation electrode among the multiple attenuation electrodes can be formed by the coupling of the first inductor and the second inductor.

[0141] In addition, in one embodiment of the electronic device disclosed herein, the first inductor may be connected to at least one capacitor.

[0142] In addition, in one embodiment of the electronic device of this disclosure, a capacitor connected in series with respect to the first inductor may not be provided between the first path and the grounding element.

[0143] Furthermore, the electronic device according to one embodiment of this disclosure may also include a circuit comprising a second inductor. Additionally, the circuit may include elements disposed between the LC circuit and the second inductor.

[0144] Additionally, in one embodiment of the electronic device disclosed herein, the LC circuit may include a third path connecting the first path and the second path. Furthermore, at least one capacitor may be a first capacitor and a second capacitor disposed in the third path, and a third capacitor connected to the first capacitor and the second capacitor. Additionally, at least one inductor may be a third inductor disposed between the third path and a grounding element.

[0145] In addition, in one embodiment of the electronic device disclosed herein, the first inductor may include a first portion and a second portion disposed between the first portion and a grounding element. The second inductor may include a third portion and a fourth portion disposed between the third portion and the grounding element. The spacing between the second portion and the fourth portion may be smaller than the spacing between the first portion and the third portion.

[0146] Based on the foregoing description, it is evident that various methods and variations of this disclosure can be implemented. Therefore, within the scope equivalent to the claims, this disclosure may also be implemented in ways other than the exemplary embodiments described above.

Claims

1. An electronic device, characterized in that, have: First signal port; Second signal port; An LC circuit, disposed between the first signal port and the second signal port, includes at least one capacitor and at least one inductor, and is configured to selectively allow signals of frequencies above a specific frequency to pass through; A first path, which runs from the first signal port to the LC circuit; A second path, which runs from the second signal port to the LC circuit; A first inductor is disposed between the first path and the grounding element; as well as A second inductor is disposed between the second path and the grounding element. The first inductor and the second inductor are physically configured in a mutually coupled manner.

2. The electronic device according to claim 1, characterized in that, The LC circuit, the first inductor, and the second inductor form multiple attenuation electrodes through the stopband in the attenuation characteristic between the first signal port and the second signal port, wherein the stopband is lower than the specific frequency. The lowest frequency attenuation electrode among the plurality of attenuation electrodes is formed by the coupling of the first inductor and the second inductor.

3. The electronic device according to claim 1, characterized in that, The first inductor is connected to the at least one capacitor.

4. The electronic device according to claim 1, characterized in that, No capacitor connected in series with respect to the first inductor is provided between the first path and the grounding element.

5. The electronic device according to claim 1, characterized in that, It also includes other circuitry that incorporates the second inductor. The other circuitry includes elements disposed between the LC circuit and the second inductor.

6. The electronic device according to claim 1, characterized in that, The LC circuit includes a third path that connects the first path and the second path. The at least one capacitor is a first capacitor and a second capacitor disposed in the third path, and a third capacitor connected to the first capacitor and the second capacitor. The at least one inductor is a third inductor disposed between the third path and the grounding element.

7. The electronic device according to claim 1, characterized in that, The first inductor includes a first portion and a second portion disposed between the first portion and the grounding member. The second inductor includes a third portion and a fourth portion disposed between the third portion and the grounding member. The interval between the second part and the fourth part is smaller than the interval between the first part and the third part.

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