Flash memory error correction threshold optimization method and device, storage control chip and medium

Abstract

The application discloses a flash memory error correction threshold optimization method and device, a storage control chip and a medium. The application realizes adaptive dynamic adjustment of the flash memory error correction threshold through a closed-loop optimization mechanism combining multi-gradient determination and bottom-up calibration, effectively solves the poor adaptability of the traditional fixed threshold, and cannot make real-time error distribution change dynamic adjustment according to the differences of flash memory aging, regions, types and the like. The technical scheme preliminarily screens through a reference threshold, when the preset condition is not met, the multi-gradient error correction threshold is traversed and determined by steps, the planar differentiated error characteristics are accurately matched, and the logic reliability is guaranteed by the bottom-up threshold in an extreme scene. Therefore, the bad page misjudgment rate is significantly reduced, the effective page waste is reduced, the flash memory capacity utilization rate, the high-temperature data storage stability and the service life are improved.

Description

Technical Field

[0001] This invention relates to the field of flash memory technology, specifically to a flash memory error correction threshold optimization method, apparatus, storage control chip, and medium. Background Technology

[0002] NAND flash memory consists of multiple independent planes, each plane contains several blocks, and each block is composed of multiple physical pages.

[0003] Flash memory data read / write, error detection, and bad page management are all based on Plane, Block, and Page as the basic management units.

[0004] Currently, flash memory bad page management generally adopts a fixed error correction bit threshold (ECC) judgment mechanism: when the number of error bits of a physical page exceeds a preset threshold, it is judged as an abnormal page; otherwise, it is considered a normal page.

[0005] This approach is a "one-size-fits-all" strategy with poor adaptability, and it cannot dynamically adjust to changes in error distribution in real time as flash memory ages, regions, types, and other factors change.

[0006] Because page errors vary significantly between different Planes and Blocks, a single fixed ECC threshold is insufficient to meet the needs of differentiated error correction. This can easily lead to misjudgments of page health status, resulting in the false blocking of valid pages, a decrease in available capacity, and consequently, a shortened flash memory lifespan and reduced long-term data storage stability. Summary of the Invention

[0007] The purpose of this invention is to provide a flash memory error correction threshold optimization method, device, storage control chip and medium, which can achieve adaptive optimization of the error correction threshold, thereby improving the accuracy of bad page management, the stability of high temperature data storage and the lifespan of flash memory.

[0008] The first aspect of this application provides a flash memory error correction threshold optimization method, comprising: Based on a pre-configured baseline bit threshold, the health status of each physical page in the plane is determined, and a ratio result is calculated based on the determination result. The ratio result includes the ratio of abnormal pages to the total number of pages in the plane and the ratio of abnormal pages to the reread pages in the plane. The ratio result is judged. If the ratio result meets the preset conditions, the baseline number threshold is output. If the ratio result does not meet the preset conditions, a multi-level error correction threshold gradient is executed, and the judgment is traversed level by level. The ratio result of each level is calculated based on the judgment result. The ratio result is evaluated again. If the ratio result meets the preset conditions, the error correction threshold for the current gear is output. If the ratio result does not meet the preset conditions, the error correction fallback threshold is calculated according to the preset algorithm and output.

[0009] Further, in one preferred embodiment, the step of determining the health status of each physical page in the plane based on a pre-configured baseline bit threshold, and calculating a proportion result based on the determination result, includes: Read a pre-configured reference bit threshold, wherein the reference bit threshold is equal to the maximum number of error bits in the plane multiplied by a proportional threshold; Obtain the parameter specifications of the plane, wherein the parameter specifications include the total number of pages in the plane, the number of reread pages in the plane, and the number of error bits per physical page in the plane; The health status of each physical page in the plane is determined. If the number of error bits of the physical page is greater than the baseline threshold, the physical page is an abnormal page; if the number of error bits of the physical page is less than or equal to the baseline threshold, the physical page is a normal page. Based on the number of abnormal pages, the total number of pages in the plane, and the number of reread pages in the plane, a ratio result is calculated, wherein the ratio result includes the ratio of abnormal pages to the total number of pages in the plane and the ratio of abnormal pages to the reread pages in the plane.

[0010] Further, in one preferred embodiment, the step of executing multi-level error correction threshold gradients, iterating through each level for judgment, and cumulatively calculating the proportion result for each level based on the judgment results includes: According to the preset gradient level order, the multi-level error correction threshold gradient is traversed, wherein the multi-level error correction threshold gradient includes multiple level error correction thresholds, and the spacing between the level error correction thresholds is the same. Using the current gear error correction threshold, physical pages in the plane whose number of error bits exceeds the current gear error correction threshold are selected as abnormal pages under the gear error correction threshold. The ratio result is calculated based on the abnormal page under the gear correction threshold and the parameter specifications of the plane.

[0011] Furthermore, in one preferred embodiment, the preset conditions include: The percentage of abnormal pages relative to the total number of pages in the plane falls within a preset percentage range, where the preset percentage range is [1%, 3%]; or The proportion of abnormal pages to the reread pages of the plane is greater than a preset abnormal proportion, where the preset abnormal proportion is 50%.

[0012] A second aspect of this application provides a flash memory error correction threshold optimization apparatus, comprising: The health status module is used to determine the health status of each physical page in the plane based on a pre-configured baseline bit threshold, and calculate the proportion result based on the determination result, wherein the proportion result includes the proportion of abnormal pages to the total number of pages in the plane and the proportion of abnormal pages to the reread pages in the plane. The first determination module is used to determine the ratio result. If the ratio result meets the preset conditions, the baseline number threshold is output. If the ratio result does not meet the preset conditions, a multi-level error correction threshold gradient is executed, and the determination is performed level by level. The ratio result of each level is calculated based on the determination result. The second determination module is used to determine the ratio result again. If the ratio result meets the preset conditions, the error correction threshold for the current gear is output. If the ratio result does not meet the preset conditions, the error correction fallback threshold is calculated according to the preset algorithm and output.

[0013] Further, in one preferred embodiment, the health status module determines the health status of each physical page in the plane based on a pre-configured baseline bit threshold, and calculates a proportion result based on the determination result, including: Read a pre-configured reference bit threshold, wherein the reference bit threshold is equal to the maximum number of error bits in the plane multiplied by a proportional threshold; Obtain the parameter specifications of the plane, wherein the parameter specifications include the total number of pages in the plane, the number of reread pages in the plane, and the number of error bits per physical page in the plane; The health status of each physical page in the plane is determined. If the number of error bits of the physical page is greater than the baseline threshold, the physical page is an abnormal page; if the number of error bits of the physical page is less than or equal to the baseline threshold, the physical page is a normal page. Based on the number of abnormal pages, the total number of pages in the plane, and the number of reread pages in the plane, a ratio result is calculated, wherein the ratio result includes the ratio of abnormal pages to the total number of pages in the plane and the ratio of abnormal pages to the reread pages in the plane.

[0014] Further, in one preferred embodiment, the second determination module performs multi-level error correction threshold gradients, iterates through each level for determination, and accumulates the proportional result for each level based on the determination results, including: According to the preset gradient level order, the multi-level error correction threshold gradient is traversed, wherein the multi-level error correction threshold gradient includes multiple level error correction thresholds, and the spacing between the level error correction thresholds is the same. Using the current gear error correction threshold, physical pages in the plane whose number of error bits exceeds the current gear error correction threshold are selected as abnormal pages under the gear error correction threshold. The ratio result is calculated based on the abnormal page under the gear correction threshold and the parameter specifications of the plane.

[0015] Furthermore, in one preferred embodiment, the preset conditions include: The percentage of abnormal pages relative to the total number of pages in the plane falls within a preset percentage range, where the preset percentage range is [1%, 3%]; or The proportion of abnormal pages to the reread pages of the plane is greater than a preset abnormal proportion, where the preset abnormal proportion is 50%.

[0016] A third aspect of this application provides a storage control chip, including the flash memory error correction threshold optimization device described above: A fourth aspect of this application provides a computer-readable storage medium storing executable code that, when executed by a processor of an electronic device, causes the processor to perform the flash memory error correction threshold optimization method as described above.

[0017] Compared with the prior art, the beneficial effects of the present invention are: This application achieves adaptive dynamic adjustment of flash memory error correction threshold through a closed-loop optimization mechanism that combines multi-gradient judgment and fallback calibration. This effectively solves the problems of poor adaptability of traditional fixed thresholds and the inability to dynamically adjust the error distribution in real time according to differences such as flash memory aging, region, and type.

[0018] This technical solution first performs preliminary screening using a benchmark threshold. If the preset conditions are not met, it traverses and judges each level according to a multi-gradient error correction threshold to accurately match the plane-differentiated error characteristics. In extreme scenarios, a fallback threshold is used to ensure logical reliability.

[0019] This significantly reduces the false positive rate of bad pages, minimizes the waste of valid pages, and improves flash memory capacity utilization, high-temperature data storage stability, and lifespan. Attached Figure Description

[0020] Figure 1 This is a flowchart illustrating the steps of a flash memory error correction threshold optimization method in one embodiment of this application; Figure 2 This is a schematic diagram of the structure of a flash memory error correction threshold optimization device in one embodiment of this application; Figure 3 This is a schematic diagram of the structure of a storage control chip in one embodiment of this application. Detailed Implementation

[0021] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.

[0022] Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0023] In related technologies, flash memory bad page management generally adopts a fixed error correction bit threshold (ECC) judgment mechanism: when the number of error bits of a physical page exceeds a preset threshold, it is judged as an abnormal page; otherwise, it is considered a normal page.

[0024] This approach is a "one-size-fits-all" strategy with poor adaptability, and it cannot dynamically adjust to changes in error distribution in real time as flash memory ages, regions, types, and other factors change.

[0025] Because page errors vary significantly between different Planes and Blocks, a single fixed ECC threshold is insufficient to meet the needs of differentiated error correction. This can easily lead to misjudgments of page health status, resulting in the false blocking of valid pages, a decrease in available capacity, and consequently, a shortened flash memory lifespan and reduced long-term data storage stability.

[0026] Therefore, in order to solve the above-mentioned technical problems, this application provides a flash memory error correction threshold optimization method and corresponding embodiments.

[0027] The technical solution of this application will be described in detail below with reference to the accompanying drawings.

[0028] Figure 1 The diagram shown is a flowchart illustrating the steps of a flash memory error correction threshold optimization method according to an embodiment of this application.

[0029] Before formally describing the technical solution of this application, several industry concepts involved in the technical solution of this application will be explained.

[0030] Abnormal pages: also known as bad pages, are pages that cannot store data properly and cannot be included in the calculation of flash memory capacity.

[0031] Reread page: This is the page that undergoes a reread operation. Before the reread mechanism is implemented, this page is an abnormal page; after the reread mechanism is implemented, it becomes a normal page and can store data normally. Reread pages are distinguished from non-reread pages in their page attributes, usually represented by "0x80". To read a reread page, a specific command can be sent (refer to the flash memory's DataSheet; the command may vary depending on the type of flash memory). This specific command can read the page attributes of the physical page. If the page attributes contain the identifier "0x80", it means that the physical page is a reread page.

[0032] Error correction bit threshold: A parameter used to determine whether the current page is a normal page or an abnormal page. When the number of error bits in a physical page exceeds the error correction threshold, it is determined to be an abnormal page; otherwise, it is determined to be a normal page.

[0033] Please see Figure 1 A flash memory error correction threshold optimization method includes the following steps: Step S110: Based on the pre-configured baseline bit threshold, determine the health status of each physical page in the plane, and calculate the ratio result based on the determination result. The ratio result includes the ratio of abnormal pages to the total number of pages in the plane and the ratio of abnormal pages to the reread pages in the plane.

[0034] It should be noted that in this embodiment, the baseline bit threshold is not a fixed value, but is dynamically calculated based on the real-time error distribution of the flash memory plane. The calculation method is as follows: the baseline bit threshold is equal to the maximum number of error bits of all physical pages in the current plane multiplied by a preset proportional threshold and then rounded down.

[0035] This percentage threshold can be flexibly configured according to the flash memory type, aging level, and usage. For example, it can be set to 80% to balance the rigor and efficiency of the initial screening.

[0036] Before performing physical page health status determination, the pre-configured baseline bit threshold is read, and the parameter specifications of the current plane are obtained, including the total number of pages in the plane, the number of reread pages, and the number of error bits corresponding to each physical page.

[0037] Subsequently, the health status of each physical page in the plane is determined one by one: if the number of error bits of a physical page is greater than the baseline threshold, it is marked as an abnormal page; if the number of error bits is less than or equal to the baseline threshold, it is determined as a normal page.

[0038] After completing the full page determination, the total number of abnormal pages is counted, and combined with the total number of pages in the layout and the number of pages that are reread, two sets of key ratio results are calculated: one is the ratio of the number of abnormal pages to the total number of pages in the layout, and the other is the ratio of the number of abnormal pages to the total number of pages that are reread.

[0039] The above process strictly generates a baseline threshold and quantifies its distribution based on planar error characteristics to ensure that the initial screening process is objective, consistent, and reproducible.

[0040] Case Study Flash memory contains two independent planes, namely Plane0 and Plane1. Each plane contains two blocks, denoted as B0 and B1. Each block contains 11 physical pages, numbered P0 to P10.

[0041] Therefore, the total number of physical pages in a single plane is 20 pages.

[0042] The error correction threshold gradient configuration has 7 levels L0~L6, corresponding to 50, 45, 40, 35, 30, 25, and 20 (the gradient spacing is fixed at 5).

[0043] Plane0: Physical block B0: The number of error bits in physical pages P0 to P10 are 20, 25, 23, 55, 40, 41, 43, 40, 10, 65, and 20 respectively; among them, the physical pages with error bits of 55, 40, 41, 43, and 60 are marked as reread pages.

[0044] Physical block B1: The number of error bits in physical pages P0 to P10 are 32, 20, 25, 26, 40, 55, 53, 71, 42, 12, and 20 respectively; among them, the physical pages with error bits of 55, 60, 71, 42, and 12 are marked as reread pages.

[0045] Plane1: Physical block B0: The number of error bits for physical pages P0 to P10 are 30, 26, 23, 50, 42, 41, 43, 55, 40, 72, and 20, respectively; among them, the physical pages with error bits of 20, 41, 43, 55, 40, and 72 are marked as reread pages.

[0046] Physical block B1: The number of error bits for physical pages P0 to P10 are 20, 20, 25, 26, 22, 36, 19, 71, 12, 13, and 20, respectively; among them, the physical pages with error bits of 22, 36, 19, 71, 12, and 13 are marked as reread pages.

[0047] The formula for calculating the reference bit threshold in this embodiment is: Reference bit threshold for a single plane = Maximum number of ECC error bits in the physical page of the plane × Preset ratio (80% in this embodiment; this ratio threshold can be flexibly configured according to the flash memory type, aging degree and usage), and the result is rounded (without rounding).

[0048] Therefore, we can conclude that: The maximum number of ECC error bits in Plane0 is 71, and the calculated baseline bit threshold is 57. The maximum number of ECC error bits in Plane1 is 72, and the calculated baseline bit threshold is 58.

[0049] Using the baseline bit threshold calculated above to determine the health status of physical pages, the following results were obtained: Plane0: An abnormal page in physical block B0: Physical page P9; An abnormal page in physical block B1: physical page P7.

[0050] Plane1: An abnormal page in physical block B0: Physical page P9; An abnormal page in physical block B1: physical page P7.

[0051] After completing the full-page judgment, the total number of abnormal pages is counted. Combined with the total number of pages in the layout and the number of pages requiring rereading, two key ratios are calculated: one is the ratio of abnormal pages to the total number of pages in the layout, and the other is the ratio of abnormal pages to the total number of pages requiring rereading. The results are as follows: The proportions of Plane0: The percentage of abnormal pages out of the total number of pages in the layout is approximately 0.09% (2 / 22). The percentage of abnormal pages out of the total number of reread pages in the plane is 2 / 10 = 0.2 = 20%.

[0052] The proportions of Plane1: The percentage of abnormal pages out of the total number of pages in the layout is approximately 0.09% (2 / 22). The proportion of abnormal pages to the total number of reread pages in the plane is approximately 0.17% (2 / 12).

[0053] Step S120: Determine the ratio result. If the ratio result meets the preset conditions, output the baseline number threshold. If the ratio result does not meet the preset conditions, execute the multi-level error correction threshold gradient, traverse and determine each level, and calculate the ratio result of each level based on the determination result.

[0054] It should be noted that in this embodiment, the preset conditions include: the proportion of abnormal pages to the total number of pages in the plane is within a preset proportion range, where the preset proportion range is [1%, 3%]; or the proportion of abnormal pages to the reread pages in the plane is greater than a preset abnormal proportion, where the preset abnormal proportion is 50%.

[0055] If any of the above conditions are met, it indicates that the current distribution of high-risk abnormal pages in the plane is concentrated and controllable, and the baseline threshold can be directly used for bad page management; otherwise, it indicates that the plane error distribution is discrete, the proportion of reread pages is low, the baseline threshold is not suitable enough, and multi-gradient refined judgment needs to be initiated.

[0056] In this embodiment, a multi-level error correction threshold gradient is executed, and the judgment is performed level by level. The proportion of each level is calculated cumulatively based on the judgment results. This includes: traversing the multi-level error correction threshold gradient according to the preset gradient level order, wherein the multi-level error correction threshold gradient includes multiple level error correction thresholds, and the spacing between the level error correction thresholds is the same; using the current level error correction threshold, physical pages in the plane with the number of error bits exceeding the current level error correction threshold are selected as abnormal pages under the level error correction threshold; and the proportion is calculated based on the abnormal pages under the level error correction threshold and the plane's parameter specifications.

[0057] The core principle of this solution lies in adapting to the inherent characteristics of flash memory: the number of error bits changes dynamically with the operating conditions, and the error distribution of different planes is significantly different. The dynamic grading mechanism can be adapted independently for each plane, avoiding the drawbacks of the traditional fixed threshold "one-size-fits-all" approach, and preventing the effective pages from being mistakenly blocked and the usable capacity from being greatly reduced due to unreasonable or overly strict threshold settings.

[0058] Meanwhile, this technical solution was developed specifically for the data retention characteristics of flash memory under high-temperature environments. The reliability of reread pages is already weaker than that of normal pages, and high temperatures will further exacerbate the degradation of their data retention. Through multi-gradient screening, degraded pages with still high ECC after rereading are accurately removed, significantly improving the data retention capability and long-term storage stability under high-temperature conditions.

[0059] It should be noted that, since the total number of physical pages in the two planes of the above case is 22, in actual scenarios, the number of physical pages in a plane is unlikely to be that low, and is mostly thousands or hundreds of pages (the above case only lists 22 physical pages due to the limitation of case length). Therefore, before proceeding with the above case description, in order to conform to the case of this embodiment, the preset ratio range is adjusted to [10%, 30%]. However, this adjustment is only for the convenience of case description. In actual application, the preset ratio range of [1%, 3%] should be used to determine the ratio result.

[0060] Upon comparison, the abnormal pages of Plane0 and Plane0 account for approximately 9% of the total number of pages in Plane0, which is not in the 10% to 30% range; the abnormal pages account for 20% and 17% of the reread pages, respectively, which are both below 50%.

[0061] Since neither plane meets the preset conditions, the baseline bit threshold cannot be used directly, so the process of traversing the gradient of the multi-level error correction threshold is initiated.

[0062] This embodiment has 7 preset gears, from high to low: 50, 45, 40, 35, 30, 25, 20, with a fixed gear interval of 5, corresponding to gears L0 to L6.

[0063] The traversal starts from the lowest level, gradually lowering the error correction threshold and relaxing the criteria for judging abnormal pages. For each level, physical pages with more than the threshold of error bits are filtered out, and abnormal pages of all traversed levels are accumulated. Two sets of proportions are calculated in real time: the proportion of abnormal pages to the total number of pages in the plane and the proportion of abnormal pages to the total number of reread pages, until the preset conditions are met (abnormal pages account for 10% to 30% of the total number of pages or abnormal pages account for more than 50% of the reread pages).

[0064] Plane0 traversal execution process: Level L0-50: Filter physical pages with more than 50 error bits; there are a total of 5 abnormal pages; abnormal pages account for 22% of the total pages; abnormal pages account for 50% of the reread pages.

[0065] Level L1-45: Filter physical pages with more than 45 error bits; there are a total of 5 abnormal pages; abnormal pages account for 22% of the total pages; abnormal pages account for 50% of the reread pages.

[0066] Level L2-40: Filter physical pages with more than 45 error bits; there are 7 abnormal pages in total; abnormal pages account for 32% of the total pages; abnormal pages account for 70% of the reread pages. Level L3-35: Filters physical pages with more than 35 error bits; there are a total of 11 abnormal pages; abnormal pages account for 50% of the total pages; abnormal pages account for 110% of the reread pages. Level L4-30: Filters physical pages with more than 30 error bits; a total of 12 pages are abnormal; abnormal pages account for 54% of the total pages; abnormal pages account for 120% of the reread pages. Level L5-25: Filters physical pages with more than 25 error bits; a total of 14 abnormal pages; abnormal pages account for 63% of the total pages; abnormal pages account for 140% of the reread pages. Level L5-20: Filter physical pages with more than 20 error bits; there are 16 abnormal pages in total; abnormal pages account for 72% of the total pages; abnormal pages account for 160% of the reread pages.

[0067] Plane1 traversal execution process: Level L0-50: Filters physical pages with more than 50 error bits; there are a total of 3 abnormal pages; abnormal pages account for 13% of the total pages; abnormal pages account for 25% of the reread pages. Level L1-45: Filter physical pages with more than 45 error bits; there are a total of 4 abnormal pages; abnormal pages account for 18% of the total pages; abnormal pages account for 33% of the reread pages. Level L2-40: Filters physical pages with more than 40 error bits; there are 7 abnormal pages in total; abnormal pages account for 31% of the total pages; abnormal pages account for 58% of the reread pages. Level L3-35: Filters physical pages with more than 35 error bits; there are a total of 9 abnormal pages; abnormal pages account for 40% of the total pages; abnormal pages account for 75% of the reread pages. Level L4-30: Filters physical pages with more than 30 error bits; there are a total of 9 abnormal pages; abnormal pages account for 40% of the total pages; abnormal pages account for 75% of the reread pages. Level L5-25: Filters physical pages with more than 25 error bits; there are a total of 12 abnormal pages; abnormal pages account for 54% of the total pages; abnormal pages account for 100% of the reread pages. Level L6-20: Filter physical pages with more than 20 error bits, totaling 15 abnormal pages; abnormal pages account for 68% of the total pages; abnormal pages account for 150% of the reread pages.

[0068] Step S130: Determine the ratio result again. If the ratio result meets the preset conditions, output the error correction threshold for the current gear. If the ratio result does not meet the preset conditions, calculate the error correction fallback threshold according to the preset algorithm and output it.

[0069] Following the above cases Determination of Plane0: Gear L0-50: Meets preset conditions.

[0070] Gear L1-45: Meets preset conditions.

[0071] Gear L2-40: Preset conditions are met; Gear L3-35: Preset conditions are met; Gear L4-30: Preset conditions are met; Gear L5-25: Preset conditions are met; Gear L5-20: Preset conditions are met.

[0072] Judgment of Plane1: Gear L0-50: Meets preset conditions.

[0073] Gear L1-45: Meets preset conditions.

[0074] Gear L2-40: Preset conditions are met; Gear L3-35: Preset conditions are met; Gear L4-30: Preset conditions are met; Gear L5-25: Preset conditions are met; Gear L5-20: Preset conditions are met.

[0075] At this point, the traversal stops. Plane0 has 7 error correction thresholds, ranging from 50 to 20. In this embodiment, if there is at least one error correction threshold output, the smallest error correction threshold is selected for output, which is the final output error correction threshold of 20.

[0076] The reason is that for flash memory, the smaller the error correction threshold, the better. The most important function of flash memory is data storage. As an important indicator for filtering abnormal pages, the error correction threshold can distinguish between abnormal pages and normal pages. The smaller the error correction threshold, the stricter the screening, and the more likely it is to identify some unstable reread pages as abnormal pages. In this way, the data storage stability of flash memory can be improved. This also makes it easier for flash memory to pass high-temperature comparison tests because the abnormal pages of flash memory have been eliminated in advance using a smaller error correction threshold.

[0077] Similarly, the same applies to Plane1, and the final output error correction threshold is 20.

[0078] It should be noted that if the ratio calculated according to this step still does not meet the preset conditions, the error correction fallback threshold is calculated and output using a preset algorithm. In this embodiment, the preset algorithm is based on the number of error bits in the reread page in the plane as the data basis, calculates the standard deviation, and uses the standard deviation of the number of error bits in the reread page as the error correction fallback threshold and outputs it.

[0079] For example, in the current case: Plane0: Physical block B0: Physical pages with error bits of 55, 40, 41, 43, and 60 are marked as reread pages.

[0080] Physical block B1: Physical pages with error bit counts of 55, 60, 71, 42, and 12 are marked as reread pages.

[0081] Plane1: Physical block B0: Physical pages with error bit counts of 20, 41, 43, 55, 40, and 72 are marked as reread pages.

[0082] Physical block B1: Physical pages with error bit counts of 22, 36, 19, 71, 12, and 13 are marked as reread pages.

[0083] Calculation results of the catch-all threshold Plane0 fallback threshold: The standard deviation of the reread page sample is approximately 16.28, which is rounded down to 16. Plane1 fallback threshold: The standard deviation of the reread page sample is approximately 20.90, which is rounded down to 21.

[0084] The flash memory architecture, physical page number arrangement, ECC measured values, and reread page division methods used in the above cases are all exemplary models set up to clearly explain the core principles of the technical solution of this application, and are significantly different from the hardware architecture, page arrangement rules, and error bit distribution patterns of actual flash memory products.

[0085] This case study is only intended to intuitively demonstrate the baseline threshold calculation logic, multi-gradient threshold traversal and judgment process, and fallback threshold generation mechanism. It is not intended to limit the parameters, structure, and application scenarios of actual mass-produced flash memory. Its core purpose is to present the overall algorithm execution logic and adaptation ideas in a simple and complete way.

[0086] This technical solution selects the standard deviation of the number of error bits in the reread page as the fallback threshold because: reread pages are physical pages that can only store data normally after being repaired by retry, and their stability is weaker than that of normal pages. They are more prone to error deterioration in scenarios such as high temperature aging and long-term data retention.

[0087] Therefore, using the number of error bits in a reread page as the calculation data source can accurately reflect the error distribution characteristics of the pages with the worst stability and highest risk in flash memory. The standard deviation calculated based on this data can be used as a fallback threshold to effectively filter and eliminate reread pages that still have a large number of error bits after rereading and whose reliability is severely degraded, thus preventing them from continuing to occupy storage space and introducing potential data risks.

[0088] This mechanism is particularly well-suited for data retention requirements under high-temperature conditions. It can significantly improve storage reliability after flash memory aging at high temperatures, reduce the risk of data loss, and prevent threshold judgment failure in extreme scenarios, ensuring stable and reliable bad page management and further enhancing the long-term lifespan of flash memory.

[0089] The technical solution of this application has the following technical effects: 1) Because the error correction threshold changes dynamically and is different for each plane, it is more in line with the characteristics of flash memory. Moreover, compared with the fixed page kick mode, it is more flexible and can avoid the "one-size-fits-all" approach that leads to a significant reduction in capacity or an unreasonable value setting. 2) Abandoning the traditional fixed error correction threshold mode, the system relies on a three-level optimization mechanism to improve the management of bad pages in flash memory.

[0090] On the one hand, a baseline threshold is dynamically generated based on the maximum number of error bits in each plane, which fits the differences and aging characteristics of flash memory regions and avoids capacity loss or lax control caused by a one-size-fits-all approach; on the other hand, multiple thresholds are set to judge step by step, accurately filtering pages with insufficient stability after rereading and optimizing data retention performance under high temperature conditions.

[0091] Meanwhile, by using the number of reread page error bits as a sample to calculate the standard deviation as a fallback threshold, it can cope with various extreme operating conditions, effectively eliminate high-risk degraded pages, and comprehensively improve storage reliability and equipment lifespan.

[0092] Corresponding to the aforementioned method embodiments, this application provides a flash memory error correction threshold optimization device and corresponding embodiments.

[0093] Figure 2 The diagram shown is a schematic diagram of the structure of a flash memory error correction threshold optimization device in one embodiment of this application.

[0094] Please see Figure 2 A flash memory error correction threshold optimization device 200 includes a health status module 210, a first determination module 220 and a second determination module 230.

[0095] in: The health status module 210 is used to determine the health status of each physical page in the plane based on a pre-configured baseline bit threshold, and calculate the proportion result based on the determination result. The proportion result includes the proportion of abnormal pages to the total number of pages in the plane and the proportion of abnormal pages to the reread pages in the plane.

[0096] The first judgment module 220 is used to judge the ratio result. If the ratio result meets the preset conditions, the baseline number threshold is output. If the ratio result does not meet the preset conditions, the multi-level error correction threshold gradient is executed, and the judgment is traversed level by level. The ratio result of each level is calculated based on the judgment result.

[0097] The second judgment module 230 is used to judge the ratio result again. If the ratio result meets the preset conditions, the error correction threshold under the current gear is output; if the ratio result does not meet the preset conditions, the error correction fallback threshold is calculated according to the preset algorithm and output.

[0098] Please see Figure 2 Furthermore, in this embodiment, the health status module 210 determines the health status of each physical page in the plane based on a pre-configured baseline bit threshold, and calculates a proportional result based on the determination result, including: reading the pre-configured baseline bit threshold, wherein the baseline bit threshold is equal to the maximum number of error bits in the plane multiplied by the proportional threshold; obtaining the parameter specifications of the plane, wherein the parameter specifications include the total number of pages in the plane, the number of reread pages in the plane, and the number of error bits for each physical page in the plane; determining the health status of each physical page in the plane, wherein if the number of error bits of a physical page is greater than the baseline bit threshold, the physical page is an abnormal page; if the number of error bits of a physical page is less than or equal to the baseline bit threshold, the physical page is a normal page; and calculating a proportional result based on the number of abnormal pages, the total number of pages in the plane, and the number of reread pages in the plane, wherein the proportional result includes the proportion of abnormal pages to the total number of pages in the plane and the proportion of abnormal pages to the reread pages in the plane.

[0099] Please see Figure 2 Furthermore, in this embodiment, the second determination module 230 executes a multi-level error correction threshold gradient, traversing and determining each level sequentially, and cumulatively calculating the proportion result for each level based on the determination results. This includes: traversing the multi-level error correction threshold gradient according to a preset gradient level order, wherein the multi-level error correction threshold gradient includes multiple level error correction thresholds, and the spacing between the level error correction thresholds is the same; using the current level error correction threshold, filtering out physical pages in the plane whose number of error bits exceeds the current level error correction threshold, as abnormal pages under the level error correction threshold; and calculating the proportion result based on the abnormal pages under the level error correction threshold and the plane's parameter specifications.

[0100] Please see Figure 2Furthermore, in this embodiment, the preset conditions include: the proportion of abnormal pages to the total number of pages in the plane is within a preset proportion range, wherein the preset proportion range is [1%, 3%]; or the proportion of abnormal pages to the reread pages in the plane is greater than a preset abnormal proportion, wherein the preset abnormal proportion is 50%.

[0101] It should be noted that the flash memory error correction threshold optimization method implemented by the flash memory error correction threshold optimization device disclosed in this embodiment is the same as that in the above embodiment, so it will not be described in detail here.

[0102] Optionally, each module and the other operations or functions described above in this embodiment are for implementing the methods in the foregoing embodiments.

[0103] Please refer to 3, a storage control chip 300, including the flash memory error correction threshold optimization device 200 described above.

[0104] This application achieves adaptive dynamic adjustment of flash memory error correction threshold through a closed-loop optimization mechanism that combines multi-gradient judgment and fallback calibration. This effectively solves the problems of poor adaptability of traditional fixed thresholds and the inability to dynamically adjust the error distribution in real time according to differences such as flash memory aging, region, and type.

[0105] This technical solution first performs preliminary screening using a benchmark threshold. If the preset conditions are not met, it traverses and judges each level according to a multi-gradient error correction threshold to accurately match the plane-differentiated error characteristics. In extreme scenarios, a fallback threshold is used to ensure logical reliability.

[0106] This significantly reduces the false positive rate of bad pages, minimizes the waste of valid pages, and improves flash memory capacity utilization, high-temperature data storage stability, and lifespan.

[0107] It should be noted that the storage controller chip 300 is a logic chip. The storage controller chip 300 consists of analog circuits, digital circuits, and a firmware layer. Other functions that perform complex digital logic functions, such as protocol processing, error correction, address mapping, and storage management algorithms, fall under the category of logic chips.

[0108] Furthermore, the method according to this application can also be implemented as a computer program or computer program product, which includes computer program code instructions for performing some or all of the steps in the method described above.

[0109] Alternatively, this application may be implemented as a computer-readable storage medium (or a non-transitory machine-readable storage medium or a machine-readable storage medium) storing executable code (or computer program or computer instruction code) thereon, which, when executed by a processor of an electronic device (or server, etc.), causes the processor to perform part or all of the steps of the methods described above according to this application.

[0110] The various embodiments of this application have been described above. The above description is exemplary and not exhaustive, and is not limited to the disclosed embodiments.

[0111] Many modifications and alterations will be apparent to those skilled in the art without departing from the scope and spirit of the various embodiments described.

[0112] The terminology used herein is chosen to best explain the principles, practical applications, or improvements to the technology in the market of the various embodiments, or to enable other persons of ordinary skill in the art to understand the various embodiments disclosed herein.

Claims

1. A method for optimizing flash memory error correction threshold, characterized in that, include: Based on a pre-configured baseline bit threshold, the health status of each physical page in the plane is determined, and a ratio result is calculated based on the determination result. The ratio result includes the ratio of abnormal pages to the total number of pages in the plane and the ratio of abnormal pages to the reread pages in the plane. The ratio result is judged, and if the ratio result meets the preset conditions, the baseline bit threshold is output. If the ratio result does not meet the preset condition, then execute the multi-level error correction threshold gradient, traverse and judge each level, and calculate the ratio result of each level based on the judgment result. The ratio result is judged again. If the ratio result meets the preset condition, the error correction threshold for the current gear is output. If the ratio result does not meet the preset conditions, the error correction catch-up threshold is calculated according to the preset algorithm and output.

2. The flash memory error correction threshold optimization method according to claim 1, characterized in that, The process of determining the health status of each physical page in the plane based on a pre-configured baseline bit threshold, and calculating a proportional result based on the determination result, includes: Read a pre-configured reference bit threshold, wherein the reference bit threshold is equal to the maximum number of error bits in the plane multiplied by a proportional threshold; Obtain the parameter specifications of the plane, wherein the parameter specifications include the total number of pages in the plane, the number of reread pages in the plane, and the number of error bits per physical page in the plane; The health status of each physical page in the plane is determined. If the number of error bits of the physical page is greater than the baseline threshold, the physical page is an abnormal page; if the number of error bits of the physical page is less than or equal to the baseline threshold, the physical page is a normal page. Based on the number of abnormal pages, the total number of pages in the plane, and the number of reread pages in the plane, a ratio result is calculated, wherein the ratio result includes the ratio of abnormal pages to the total number of pages in the plane and the ratio of abnormal pages to the reread pages in the plane.

3. The flash memory error correction threshold optimization method according to claim 2, characterized in that, The process of executing multi-level error correction threshold gradients, iterating through each level for judgment, and cumulatively calculating the proportion result for each level based on the judgment results includes: According to the preset gradient level order, the multi-level error correction threshold gradient is traversed, wherein the multi-level error correction threshold gradient includes multiple level error correction thresholds, and the spacing between the level error correction thresholds is the same. Using the current gear error correction threshold, physical pages in the plane whose number of error bits exceeds the current gear error correction threshold are selected as abnormal pages under the gear error correction threshold. The ratio result is calculated based on the abnormal page under the gear correction threshold and the parameter specifications of the plane.

4. The flash memory error correction threshold optimization method according to any one of claims 1 to 3, characterized in that, The preset conditions include: The percentage of abnormal pages relative to the total number of pages in the plane falls within a preset percentage range, where the preset percentage range is [1%, 3%]; or The proportion of abnormal pages to the reread pages of the plane is greater than a preset abnormal proportion, where the preset abnormal proportion is 50%.

5. A flash memory error correction threshold optimization device, characterized in that, include: The health status module is used to determine the health status of each physical page in the plane based on a pre-configured baseline bit threshold, and calculate the proportion result based on the determination result, wherein the proportion result includes the proportion of abnormal pages to the total number of pages in the plane and the proportion of abnormal pages to the reread pages in the plane. The first determination module is used to determine the ratio result. If the ratio result meets the preset conditions, the benchmark number threshold is output. If the ratio result does not meet the preset condition, then execute the multi-level error correction threshold gradient, traverse and judge each level, and calculate the ratio result of each level based on the judgment result. The second determination module is used to determine the ratio result again. If the ratio result meets the preset conditions, the error correction threshold for the current gear is output. If the ratio result does not meet the preset conditions, the error correction catch-up threshold is calculated according to the preset algorithm and output.

6. The flash memory error correction threshold optimization device according to claim 5, characterized in that, The health status module determines the health status of each physical page in the plane based on a pre-configured baseline threshold, and calculates a proportional result based on the determination result, including: Read a pre-configured reference bit threshold, wherein the reference bit threshold is equal to the maximum number of error bits in the plane multiplied by a proportional threshold; Obtain the parameter specifications of the plane, wherein the parameter specifications include the total number of pages in the plane, the number of reread pages in the plane, and the number of error bits per physical page in the plane; The health status of each physical page in the plane is determined. If the number of error bits of the physical page is greater than the baseline threshold, the physical page is an abnormal page; if the number of error bits of the physical page is less than or equal to the baseline threshold, the physical page is a normal page. Based on the number of abnormal pages, the total number of pages in the plane, and the number of reread pages in the plane, a ratio result is calculated, wherein the ratio result includes the ratio of abnormal pages to the total number of pages in the plane and the ratio of abnormal pages to the reread pages in the plane.

7. The flash memory error correction threshold optimization device according to claim 5, characterized in that, The second determination module executes a multi-level error correction threshold gradient, iterates through each level for determination, and calculates the proportion result for each level based on the determination results, including: According to the preset gradient level order, the multi-level error correction threshold gradient is traversed, wherein the multi-level error correction threshold gradient includes multiple level error correction thresholds, and the spacing between the level error correction thresholds is the same. Using the current gear error correction threshold, physical pages in the plane whose number of error bits exceeds the current gear error correction threshold are selected as abnormal pages under the gear error correction threshold. The ratio result is calculated based on the abnormal page under the gear correction threshold and the parameter specifications of the plane.

8. The flash memory error correction threshold optimization apparatus according to any one of claims 5 to 7, characterized in that, The preset conditions include: The percentage of abnormal pages relative to the total number of pages in the plane falls within a preset percentage range, where the preset percentage range is [1%, 3%]; or The proportion of abnormal pages to the reread pages of the plane is greater than a preset abnormal proportion, where the preset abnormal proportion is 50%.

9. A storage control chip, comprising the flash memory error correction threshold optimization device as described in any one of claims 5 to 8.

10. A computer-readable storage medium, characterized in that, The device stores executable code that, when executed by a processor of an electronic device, causes the processor to perform the flash memory error correction threshold optimization method as described in any one of claims 1 to 4.

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