A high-frequency inverter parallel current sharing method and system

Abstract

The application relates to the technical field of high-frequency inverter output current sharing, and discloses a high-frequency inverter parallel current sharing method and system. According to the application, for multiple parallel high-frequency inverters, the output currents of the high-frequency inverters flow into a parallel confluence node and subsequent circuits after being balanced by a preset impedance balancing network. The impedance balancing network is modular, and comprises multiple modular current sharing branches. One end of each current sharing branch is connected to the output end of each high-frequency inverter in one-to-one correspondence, and the other end of each current sharing branch is connected to be suspended. The parameter design of the impedance balancing network is determined based on the connection between the output end of each high-frequency inverter and the parallel confluence node and the subsequent circuits. The balancing method has the characteristics of few devices, wide frequency range and strong extensibility of multi-inverter current balancing.

Description

Technical Field

[0001] This application relates to the field of current sharing technology for high-frequency inverter output, and in particular to a method and system for parallel current sharing of high-frequency inverters. Background Technology

[0002] High-frequency induction heating is a core component of heat treatment processes such as surface hardening of metal materials. It involves high switching frequencies and high inverter-side current levels, making it difficult for a single switching device to meet the ever-increasing power demands of industrial applications. Existing technologies can significantly reduce current stress and heat loss in semiconductor switching devices and improve system output power by connecting multiple inverters in parallel. However, differences in parameters such as parasitic inductance, drive timing, and switching device turn-on speed among the parallel branches lead to severe current imbalances, significantly impacting the reliability and lifespan of the high-frequency inverter.

[0003] In response to the aforementioned technological realities, there is an urgent need for a new technical solution to achieve parallel current sharing in high-frequency inverters. Summary of the Invention

[0004] This application addresses the shortcomings of existing technologies by providing a method and system for parallel current sharing of high-frequency inverters, enabling parallel current sharing output from multiple high-frequency inverters with a small number of devices, a wide frequency range, and strong scalability.

[0005] To achieve the above objectives, this application discloses a method for current sharing in parallel high-frequency inverters, comprising: multiple high-frequency inverters connected in parallel, wherein the output current of each high-frequency inverter is current-shared through a preset impedance balancing network and then flows into a parallel bus node and subsequent circuits; wherein: the impedance balancing network has multiple modular current-sharing branches, one end of each current-sharing branch is connected to the output terminal of each high-frequency inverter, and the other end of each current-sharing branch is left floating after connection; the parameter design of the impedance balancing network is determined based on the connection between the output terminal of each high-frequency inverter and the parallel bus node and subsequent circuits.

[0006] Preferably, the current sharing branches are connected in a star configuration to form a star impedance balancing network. When matching the current sharing branches, any one of the following can be used: inductor, capacitor, inductor in series with capacitor, or inductor in parallel with capacitor.

[0007] As a preferred method, by configuring the impedance of each current-sharing branch of the star impedance balancing network, the output impedance difference of each high-frequency inverter can be reduced during wide-frequency range inversion, thereby achieving output current balancing of each high-frequency inverter.

[0008] Preferably, when the star-shaped impedance balancing network is connected to the positive output terminal of the high-frequency inverter, the impedance Z of each current-sharing branch of the star-shaped impedance balancing network is... c1n The mathematical expression is: in: s = i ω r ω r The dominant resonant angular frequency under step excitation. i The imaginary unit; L eq It is the total equivalent inductance from the midpoint of all positive output terminals to the star impedance matching network; L kn The index symbol is n Inductance parameters of a high-frequency inverter, inductance L k It is connected between a positive output terminal and the access point of a current sharing circuit; L sn The index symbol is n Inductance parameters of high-frequency inverters L s It connects the access point of a current sharing circuit and the parallel bus node; K eq It is the virtual inductance of the current sharing branch.

[0009] As a preferred option, when Z c1n / s When the impedance is negative, a capacitor is used for matching, and the impedance Z c1n The specific mathematical expression is as follows: in: C c1n The index symbol is n The capacitor on the current sharing branch.

[0010] As a preferred option, capacitor C c1n The mathematical expression is .

[0011] As a preferred option, when Z c1n / s When positive, an inductor is used for matching, and the impedance Z c1n The specific mathematical expression is as follows: in: L c1n The index symbol is n The inductance on the current-sharing branch.

[0012] As a preferred option, inductor L c1n The mathematical expression is .

[0013] As a preferred option, when the value of a single inductor or a single capacitor cannot meet the requirements, an inductor and capacitor are connected in series or in parallel for matching.

[0014] To achieve the above objectives, this application also discloses a high-frequency inverter parallel current sharing system, which applies the high-frequency inverter parallel current sharing method described above. The system includes a high-frequency inverter module, an impedance balancing network, a parallel bus node, and subsequent circuitry. Specifically, the high-frequency inverter module comprises multiple parallel high-frequency inverters. The output current of each high-frequency inverter is shared through a preset impedance balancing network before flowing into the parallel bus node and subsequent circuitry. The impedance balancing network comprises multiple modular current sharing branches. One end of each current sharing branch is connected to the output terminal of each high-frequency inverter, and the other end of each current sharing branch is left floating after connection. The parameter design of the impedance balancing network is determined based on the connection between the output terminal of each high-frequency inverter and the parallel bus node and subsequent circuitry.

[0015] To achieve the above objectives, this application also discloses a high-frequency inverter parallel current sharing system, which applies the high-frequency inverter parallel current sharing method described above. The system includes a high-frequency inverter module, an impedance balancing network, a parallel bus node, and subsequent circuitry. Specifically, the high-frequency inverter module comprises multiple parallel high-frequency inverters. The output current of each high-frequency inverter is shared through a preset impedance balancing network before flowing into the parallel bus node and subsequent circuitry. The impedance balancing network is modular, comprising multiple modular current sharing branches. One end of each current sharing branch is connected to the output terminal of each high-frequency inverter, and the other end of each current sharing branch is left floating. The parameters of the impedance balancing network are designed based on the connection between the output terminals of each high-frequency inverter and the parallel bus node and subsequent circuitry.

[0016] Compared with the prior art, the beneficial effects of this application are: a high-frequency inverter with fewer devices, a wide frequency range, and strong scalability, with parallel current sharing output; strong scalability and wide applicability. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of the parallel current sharing method for high-frequency inverters provided in this embodiment; Figure 2 The schematic diagram of parallel current sharing of high-frequency inverters provided in this embodiment; Figure 3This is a schematic diagram of the star impedance balancing network provided in this embodiment; Figure 4 The figure shows typical operating waveforms with and without a star impedance equalization network provided in this embodiment; in the figure: (a) L p =0.5μH, switching frequency ≈120kHz; (b) L p =1μH, switching frequency ≈105kHz; (c) L p =2μH, switching frequency≈88kHz.

[0019] The implementation, functional features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0020] The technical solutions in the embodiments of this application will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0021] In this document, the term "comprising" is intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0022] Traditional high-frequency induction heating systems often improve the output current balance of each inverter by designing the impedance of each inverter's output bus branch, appropriately increasing the parasitic inductance of the output bus, and reducing the parasitic inductance of each module's output circuit. While this approach can indeed achieve good current balancing, in practical applications, it has been found that this approach requires long high-frequency lines, and the high-frequency routing needs to be iteratively designed repeatedly, resulting in extremely poor module scalability.

[0023] In response to the above findings, those skilled in the art have proposed current sharing methods such as active drive voltage regulation and passive coupling inductors and series-parallel resonant networks. Among them, active drive voltage regulation adjusts the amplitude of the drive voltage of the switching devices at different times by sampling the current of each branch, which can achieve good current sharing, but its high-precision current sampling and closed-loop system design are complex; introducing coupling inductors can reduce the output impedance difference of each module by utilizing strong magnetic coupling, but a large current coupling inductor needs to be inserted in series in the main power circuit, and it affects further frequency boosting; increasing the differential mode impedance of the modules by using split resonant elements or series / parallel resonant cavities can reduce the number of high-current power devices, but usually a large current capacitor needs to be inserted in series in the high-frequency AC connection line, resulting in a large volume, high loss, and only good module current sharing effect near the resonant frequency.

[0024] Based on the above analysis, we can conclude that current high-frequency inverter current sharing schemes suffer from numerous bottlenecks, such as the need for additional high-current power devices, complex control, and limited frequency range. These limitations make it difficult to achieve low-loss, high-efficiency, and wide-frequency-range multi-module current sharing, failing to meet the demands of high-power industrial applications with increasingly higher power levels and performance requirements for power density and efficiency. Therefore, it is clear that achieving wide-frequency-range module current sharing with fewer additional devices and strong scalability is a key technical challenge in high-current power conversion fields such as high-frequency induction heating.

[0025] In response to the aforementioned technical difficulties in high-frequency induction heating, this embodiment discloses a parallel current sharing method for high-frequency inverters, comprising: multiple high-frequency inverters connected in parallel, wherein the output current of each high-frequency inverter is current-shared through a preset impedance balancing network and then flows into a parallel bus node and subsequent circuits; wherein: the impedance balancing network has multiple modular current sharing branches, one end of each current sharing branch is connected to the output terminal of each high-frequency inverter, and the other end of each current sharing branch is left floating after connection; the parameter design of the impedance balancing network is determined based on the connection between the output terminal of each high-frequency inverter and the parallel bus node and subsequent circuits.

[0026] Specifically, the current sharing branches are connected in a star configuration to form a star impedance balancing network. When matching the current sharing branches, any one of the following can be used: inductor, capacitor, inductor in series with capacitor, or inductor in parallel with capacitor.

[0027] Specifically, by configuring the impedance of each current-sharing branch of the star impedance balancing network, the output impedance difference of each high-frequency inverter is reduced during wide-frequency range inversion, thereby achieving output current balancing of each high-frequency inverter.

[0028] In practical applications, this embodiment can be used when multiple high-frequency inverters are connected in parallel via connecting lines. A star-shaped impedance balancing network is inserted between each inverter output and the parallel bus point. Each branch of the star-shaped impedance balancing network can be an inductor, a capacitor, or a combination of both. In this case, there is an inductance between the parallel connection point of the star-shaped impedance matching network on the connecting lines between each high-frequency inverter and the parallel bus point, and between the output of each high-frequency inverter and the parallel bus point. By configuring the impedance of each branch of the star-shaped impedance balancing network, impedance balancing of each inverter output can be achieved during wide-frequency-range inversion, thereby achieving balanced current output from each inverter.

[0029] Reference Figure 1 , Figure 1 This is a schematic diagram of the parallel current sharing method for high-frequency inverters provided in this embodiment.

[0030] like Figure 1 As shown, the high-frequency inverter parallel current sharing method in this embodiment includes n high-frequency inverters, connection lines between each high-frequency inverter and the parallel bus node, a star impedance balancing network, parallel bus nodes, and subsequent circuitry. For ease of explanation, Figure 1 Taking the impedance balancing network with both positive and negative paths as an example.

[0031] Reference Figure 2 , Figure 2 This is a schematic diagram of the parallel current sharing of a high-frequency inverter provided in this embodiment.

[0032] To facilitate the explanation of the parallel current sharing method for high-frequency inverters in this embodiment, as follows: Figure 2 As shown, a typical high-frequency induction heating application scenario with MOSFETs as switches and n full-bridge inverter circuits is used as an example.

[0033] In a specific application, the main circuit schematic of this embodiment is as follows: Figure 2 As shown, where: DC is the input DC source, and its voltage is V i Capacitors of each input bus C 1 to C n and MOSFETs S 11 to S n4 This constitutes a full-bridge inverter circuit, namely the aforementioned n high-frequency inverters. Impedance Z c11 to Z c1n , Z c21 to Z c2nThis forms the impedance balancing network for the positive and negative connecting wires at the output of the high-frequency inverter. The parallel bus node is also known as the node. F and G Connected to the transformer T The primary winding of the transformer T The parameters are 1:N, at which point the transformer T And the leakage inductance of the transformer itself L p Secondary side resonant capacitor C c and resonant inductor L c and load R That is, the parallel busbar and subsequent circuits.

[0034] Midpoint of full-bridge inverter A 1 to A n , B 1 to B n Connecting wires respectively A 1 F to A n F , B 1 G to B n G Connected to transformer T primary winding end F , G . D 1 to D n , E 1 to E n For connecting wires A 1 F to A n F , B 1 G to B n G The impedance balancing network on the top is connected in parallel to the connection point, and this connection point is with A 1 to A n , B 1 to B n as well as F , G The connecting line between points has inductance. L k11 to L kn2 , Ls11 to L sn2 .

[0035] Reference Figure 3 , Figure 3 This is a schematic diagram of the star impedance balancing network provided in this embodiment.

[0036] like Figure 3 As shown, in a specific application of this embodiment, the impedance of each branch of the star impedance balancing network can be composed of inductors, capacitors, inductors in series with capacitors, and inductors in parallel with capacitors.

[0037] Reference Figure 4 , Figure 4 The figure shows typical operating waveforms with and without a star impedance equalization network provided in this embodiment; in the figure: (a) L p =0.5μH, switching frequency ≈120kHz; (b) L p =1μH, switching frequency ≈105kHz; (c) L p =2μH, switching frequency≈88kHz.

[0038] In a network without impedance balancing, the connecting wires A 1 F to A n F , B 1 G to B n G The total inductance between ( L k11 + L s11 )to( L kn2 + L sn2 The differences in these factors will lead to significant differences in the output current of each high-frequency inverter. Figure 2 As shown, the three full-bridge inverter circuits L s The parameters are L s11 = L s21 = L s3 =2.5μH, C c =4μF, N=2, R=1Ω, three full-bridge inverter circuits L k The parameters differ, specifically: Lk11 =0.6μH, L k21 =0.75μH, L k31 =0.9μH, in L p The typical operating waveforms with and without a star-type impedance equalization network at 0.5μH, 1μH, and 2μH are as follows: Figure 4 As shown in (a), (b), and (c), overall: the resonant frequency of the entire unit varies within the range of 88kHz to 120kHz; without the star impedance balancing network (i.e., before compensation), the current deviation of each inverter module's output branch is approximately 8% to 9%; after adding the star impedance balancing network (i.e., after compensation), the current deviation of each inverter module's output branch is reduced to 0.2% to 3%; where, the current imbalance is calculated as [max( I 1, I 2, I 3)-min( I 1, I 2, I 3)] / ave( I 1, I 2, I 3). At the same time, from L s11 to L s31 and Z c11 to Z c13 The current waveform can be seen in Z c11 to Z c13 Under the compensatory effect, L s11 to L s31 The currents differ, but L k11 to L k31 The current difference is small, enabling balanced current output from each high-frequency inverter. Specifically: Figure 4 In (a), the inverter current imbalance was 9% before compensation and 0.2% after compensation. Figure 4 In (b) of the above, the inverter current imbalance was 8% before compensation and 2% after compensation. Figure 4 In (c), the inverter current imbalance was 8% before compensation and 3% after compensation.

[0039] Therefore, it is clear that this embodiment has achieved at least the following technical effects: Firstly, this high-frequency inverter features parallel current sharing output with fewer components, a wider frequency range, and greater scalability: In this embodiment, only a parallel access point needs to be added to the connection line between the output end of each module and the parallel bus node, so that the parasitic inductance from this point to the bus node is basically equal. Then, the parasitic inductance from this point to the module output end is measured, and an impedance matching network is connected from this point to match the output impedance of each output circuit to achieve balanced current output of the modules. This method does not require the addition of additional high-current power devices in the main power circuit and can have a good current sharing effect over a wider frequency range. Secondly, it has strong scalability and wide applicability: Since this embodiment does not require the addition of additional high-current power devices in the main power circuit, adding modules only requires adding matching impedances, which has strong scalability and wide applicability.

[0040] Taking the star-connected impedance balancing network connected to the positive output terminal of the high-frequency inverter as an example, its impedance analysis and calculation are as follows. The impedance analysis and calculation of the star-connected impedance balancing network connected to the negative output terminal of the high-frequency inverter are similar: With switching transistor S 11 , S 21 ,..., S n1 as well as S 14 , S 24 ,..., S n4 The switch transistor has just switched from off to on. S 13 , S 23 ,..., S n3 as well as S 12 , S 22 ,..., S n2 When it is off, that is, compared to the input power supply... J From the perspective of the terminal, ignoring the on-state voltage drop of the MOSFET, that is, at this time... V A1 = V A2 = V An = V i , V B1 = V B2 = V Bn =0, total input current isI in The output current of each high-frequency inverter is I 1, I 2,..., I n Parallel access point D 1, D 2,..., D n right J Point voltage is V 1, V 2,..., V n The current flowing into each branch of the star-shaped current sharing network is I Zc11 , I Zc12 ,..., I Zc1n Flowing through L s11 , L s12 ,..., L s1n The current is I s1 , I s2 ,..., I sn .

[0041] In applications, after adding a star-type impedance matching network, the output impedance of each high-frequency inverter is balanced, and the current in each branch is equal. I 1= I 2=...= I n = I in / n, with virtual inductance K eq Define the impedance from all nodes A to node F, let s = i ω r , where ω r Let be the dominant resonant angular frequency of the system under step excitation. s 2 = - ω 2 r Then we have: At the same time, the total equivalent inductance from all points A to the midpoint H of the star impedance matching network is defined as follows: L eq This is used to characterize the AC voltage drop at the midpoint H relative to the input point A, i.e.: When the current of each inverter is balanced, the node D n voltage V n According to inductance L kn1 The voltage expression can be written as: And from the node D n arrive F Current at point I sn It can be written as: Substituting (3) into (4), we get: For nodes D n The KCL expressions can be written as follows: Then, due to the node H If point 1 is suspended in the air, the sum of all incoming currents is zero. Substituting (6) into (7), we get: because I in Since n ≠ 0, we can cancel it directly. Expanding the summation formula, we get: Bundle K eq Extracting it as a common factor and rearranging the terms, we obtain the impedance. K eq The expression: The current flowing through the star impedance balancing network can be written as: Substitution V n From expression (3), we can obtain: Since expressions (6) and (12) describe the same physical quantity, then: extract Z c1n We can obtain: When the main circuit resonates, the total equivalent inductance from node A to node F after equalization is... K eq / n The total capacitance is C c N 2 In application, the other connecting line and its parallel star impedance balancing network are consistent, that is, the total equivalent inductance from node B to node G is also [value missing]. K eq / n, which leads to: Furthermore, when Z c1n / s When the value is negative, a capacitor can be used. C c1n To match: Furthermore, when Z c1n / s When it is positive, an inductor can be used. L c1n To match: When the value of a single inductor or capacitor cannot meet the requirements, inductors and capacitors can be connected in series or in parallel to facilitate component selection.

[0042] This embodiment also discloses a high-frequency inverter parallel current sharing system, which applies the high-frequency inverter parallel current sharing method described above. It includes a high-frequency inverter module, an impedance balancing network, a parallel bus node, and subsequent circuitry. The high-frequency inverter module comprises multiple parallel high-frequency inverters. The output current of each high-frequency inverter is shared through a preset impedance balancing network before flowing into the parallel bus node and subsequent circuitry. The impedance balancing network is modular, comprising multiple modular current sharing branches. One end of each current sharing branch is connected to the output terminal of each high-frequency inverter, and the other end of each current sharing branch is left floating. The parameters of the impedance balancing network are designed based on the connection between the output terminals of each high-frequency inverter and the parallel bus node and subsequent circuitry.

[0043] It should be noted that the high-frequency inverter parallel current sharing system in this embodiment corresponds to the aforementioned high-frequency inverter parallel current sharing method. Therefore, any content not specifically described in the high-frequency inverter parallel current sharing system of this embodiment, including but not limited to functional definitions, working principles, and technical effects, can be referred to the description in the aforementioned high-frequency inverter parallel current sharing method, and will not be repeated here.

[0044] In summary, the high-frequency inverter parallel current sharing method and system of this embodiment, when multiple high-frequency inverters are connected in parallel via connecting lines, incorporates a star-shaped impedance balancing network between each inverter output and the parallel bus point, with the other ends of multiple branches of this star-shaped impedance balancing network left floating. Each branch of this star-shaped impedance balancing network can be an inductor, a capacitor, or a combination of inductors and capacitors.

[0045] An inductance exists between the parallel connection point of the star impedance matching network on the connection line between each high-frequency inverter and the parallel bus point, and between the output terminal of each high-frequency inverter and the parallel bus point. This inductance can be composed of parasitic inductance of the line, external inductance, etc. By configuring the impedance of each branch of the star impedance balancing network, the output impedance of each inverter can be balanced during wide frequency range inversion, thereby achieving balanced current output of each inverter.

[0046] Compared to traditional branch impedance matching, this embodiment eliminates the need for iterative design of high-current power connection lines. When adding a new inverter, only corresponding parallel impedance matching branches need to be added, resulting in strong scalability. Compared to existing methods such as series coupling inductors and series capacitors in inverter branches, it eliminates the need for high-current devices in the high-frequency inverter circuit, achieving high power density, efficiency, and reliability. Compared to existing methods that rely on parallel resonant networks to construct large differential-mode impedances, this embodiment achieves inverter current balance over a wide frequency range through impedance balancing, avoiding high-current stress on parallel resonant devices near specific frequency points.

[0047] Finally, it should be noted that the above description is only a preferred embodiment of this application and is not intended to limit this application. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A method for current sharing in parallel operation of high-frequency inverters, characterized in that, include: Multiple high-frequency inverters are connected in parallel. The output current of each high-frequency inverter is shared by a preset impedance balancing network before flowing into the parallel bus node and subsequent circuits. The impedance balancing network consists of multiple modular current-sharing branches. One end of each current-sharing branch is connected to the output terminal of each high-frequency inverter, and the other end of each current-sharing branch is left floating after connection. The parameters of the impedance balancing network are designed based on the connection between the output terminal of each high-frequency inverter and the parallel bus node and subsequent circuits.

2. The method for parallel current sharing of high-frequency inverters according to claim 1, characterized in that, The current sharing branches are connected in a star configuration to form a star impedance balancing network. When matching the current sharing branches, any one of the following can be used: inductor, capacitor, inductor in series with capacitor, or inductor in parallel with capacitor.

3. The parallel current sharing method for high-frequency inverters according to claim 2, characterized in that, By configuring the impedance of each current-sharing branch of the star impedance balancing network, the output impedance difference of each high-frequency inverter is reduced during wide-frequency range inversion, thereby achieving output current balancing of each high-frequency inverter.

4. The parallel current sharing method for high-frequency inverters according to claim 3, characterized in that, When the star-shaped impedance balancing network is connected to the positive output terminal of the high-frequency inverter, the impedance Z of each current-sharing branch of the star-shaped impedance balancing network is... c1n The mathematical expression is: in: s = i ω r ω r The dominant resonant angular frequency under step excitation. i The imaginary unit; L eq It is the total equivalent inductance from the midpoint of all positive output terminals to the star impedance matching network; L kn The index symbol is n Inductance parameters of a high-frequency inverter, inductance L k It is connected between a positive output terminal and the access point of a current sharing circuit; L sn The index symbol is n Inductance parameters of high-frequency inverters L s It connects the access point of a current sharing circuit and the parallel bus node; K eq It is the virtual inductance of the current sharing branch.

5. The parallel current sharing method for high-frequency inverters according to claim 4, characterized in that, When Z c1n / s When the impedance is negative, a capacitor is used for matching, and the impedance Z c1n The specific mathematical expression is as follows: in: C c1n The index symbol is n The capacitor on the current sharing branch.

6. The parallel current sharing method for high-frequency inverters according to claim 5, characterized in that, capacitance C c1n The mathematical expression is .

7. The parallel current sharing method for high-frequency inverters according to claim 4, characterized in that, When Z c1n / s When positive, an inductor is used for matching, and the impedance Z c1n The specific mathematical expression is as follows: in: L c1n The index symbol is n The inductance on the current-sharing branch.

8. The parallel current sharing method for high-frequency inverters according to claim 7, characterized in that, inductance L c1n The mathematical expression is .

9. The method for parallel current sharing of high-frequency inverters according to claim 6 or 8, characterized in that... When the value of a single inductor or capacitor cannot meet the requirements, inductors and capacitors are connected in series or in parallel for matching.

10. A high-frequency inverter parallel current sharing system, employing the high-frequency inverter parallel current sharing method as described in any one of claims 1 to 9, characterized in that, It includes a high-frequency inverter module, an impedance balancing network, a parallel bus node, and subsequent circuitry. The high-frequency inverter module comprises multiple parallel high-frequency inverters. The output current of each inverter is shared by a pre-defined impedance balancing network before flowing into the parallel bus node and subsequent circuitry. The impedance balancing network includes multiple modular current-sharing branches. One end of each current-sharing branch is connected to the output terminal of each high-frequency inverter, while the other end remains unconnected. The parameters of the impedance balancing network are designed based on the connection between the output terminals of each high-frequency inverter and the parallel bus node and subsequent circuitry.

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