Method for manufacturing an insulating layer of a semiconductor device

Abstract

The method for preparing the insulating layer of the semiconductor device comprises the following steps: depositing a buffer layer on the surface of a substrate; depositing an insulating layer on the buffer layer, the dielectric constant of the insulating layer being higher than that of the buffer layer; and annealing the deposited buffer layer and insulating layer in an inert gas atmosphere. Thus, the insulating layer with high dielectric constant and low leakage current is prepared, and the reliability, high-temperature resistance and voltage stress resistance of the insulating layer are improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing, and more particularly to a method for preparing an insulating layer for a semiconductor device. Background Technology

[0002] As semiconductor devices continue to shrink in size, traditional silicon dioxide insulating layers can no longer meet the demands of modern integrated circuits for high dielectric constants and low leakage currents. High dielectric constant materials have become alternatives due to their superior electrical properties. However, optimizing deposition and annealing processes to obtain high-quality high dielectric constant insulating layers remains a technical challenge. Summary of the Invention

[0003] The purpose of this invention is to provide an improved method for preparing an insulating layer for semiconductor devices, so as to prepare an insulating layer with high dielectric constant and low leakage current, and improve the reliability and resistance to high temperature and voltage stress of the insulating layer.

[0004] To achieve the above objectives, the method for preparing the insulating layer of the semiconductor device of the present invention includes the following steps:

[0005] Deposit a buffer layer on the substrate surface;

[0006] An insulating layer is deposited on the buffer layer, the dielectric constant of the insulating layer being higher than that of the buffer layer; and

[0007] The deposited buffer layer and the insulating layer are annealed under an inert gas atmosphere.

[0008] Compared with existing technologies, this invention first deposits a buffer layer on the substrate surface, then deposits a high-dielectric-constant insulating layer on the buffer layer, and finally performs an annealing process. By optimizing deposition and annealing parameters, this invention prepares an insulating layer with high dielectric constant and low leakage current. This method is applicable to the manufacture of various semiconductor devices and exhibits high reliability and resistance to high temperatures and voltage stress.

[0009] Preferably, the deposition of the buffer layer includes: controlling the deposition temperature to be 400-600℃, the deposition pressure to be 1-5 mTorr, the deposition rate to be 0.5-2 nm / min, and the deposition time to be 5-15 minutes.

[0010] Preferably, the deposition of the insulating layer includes: controlling the deposition temperature to be 250-350°C, the deposition pressure to be 0.1-1 mTorr, the deposition rate to be 0.2-1 nm / min, and the deposition time to be 10-20 minutes.

[0011] Preferably, the annealing process includes: controlling the annealing temperature to 500-800℃ and the annealing time to 30-60 minutes.

[0012] Preferably, the buffer layer is silicon dioxide or silicon nitride.

[0013] Preferably, the insulating layer is hafnium dioxide or zirconium dioxide.

[0014] Preferably, the inert gas is nitrogen or argon.

[0015] Preferably, the semiconductor device includes transistors, capacitors, and integrated circuits. Detailed Implementation

[0016] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific implementation methods of this application are described in detail below with reference to some embodiments. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0017] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0018] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0019] It should be noted that when an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or there may be an intervening element. When an element is considered to be "connected to" another element, it can be directly connected to the other element or there may be an intervening element. The terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used herein are for illustrative purposes only and do not represent the only possible implementation.

[0020] The method for preparing the insulating layer of the semiconductor device of the present invention will be further described below with reference to embodiments, but this does not limit the present invention. The method of the present invention aims to provide an improved method for preparing the insulating layer of a semiconductor device, so as to prepare an insulating layer with high dielectric constant and low leakage current, and improve the reliability and resistance to high temperature and voltage stress of the insulating layer.

[0021] In one embodiment of the method for preparing the insulating layer of the semiconductor device of the present invention, the following steps are included:

[0022] Deposit a buffer layer on the substrate surface;

[0023] An insulating layer is deposited on the buffer layer, the dielectric constant of the insulating layer being higher than that of the buffer layer; and

[0024] The deposited buffer layer and the insulating layer are annealed under an inert gas atmosphere.

[0025] This invention first deposits a buffer layer on the substrate surface, then deposits a high-dielectric-constant insulating layer on the buffer layer, and finally performs an annealing process. By optimizing the deposition and annealing parameters, this invention prepares an insulating layer with high dielectric constant and low leakage current. This method is applicable to the manufacture of various semiconductor devices and exhibits high reliability and resistance to high temperatures and voltage stress.

[0026] Specifically, in a preferred embodiment, a substrate is first prepared. The substrate varies depending on the semiconductor device and is not limited herein; it can be a glass substrate, a metal substrate, a silicon substrate, etc. The substrate surface is first cleaned to remove impurities and oxide layers to facilitate subsequent deposition steps.

[0027] Subsequently, a buffer layer is deposited. Optionally, the buffer layer is a dielectric material with a low dielectric constant, such as silicon dioxide or silicon nitride. This deposition step includes: controlling the deposition temperature to 400-600°C, the deposition pressure to 1-5 mTorr, the deposition rate to 0.5-2 nm / min, and the deposition time to 5-15 minutes. Generally, the dielectric constant of silicon dioxide (SiO2) is approximately 3.9, and the dielectric constant of silicon nitride (Si3N4) is approximately 7-8. Preferably, the dielectric constant of the buffer layer of the present invention is 3.7-9.

[0028] Subsequently, an insulating layer is deposited. Specifically, this insulating layer is a high dielectric constant material, such as hafnium dioxide or zirconium dioxide. The dielectric constant of hafnium dioxide (HfO2) is approximately 20-25, and the dielectric constant of zirconium dioxide (ZrO2) is approximately 25-30. Preferably, the dielectric constant of the insulating layer of the present invention is 20-50. The deposition step of the insulating layer includes: controlling the deposition temperature at 250-350°C, the deposition pressure at 0.1-1 mTorr, the deposition rate at 0.2-1 nm / min, and the deposition time at 10-20 minutes.

[0029] Finally, the buffer layer and the insulating layer are annealed. Specifically, the annealing process includes annealing at a temperature of 500-800°C for 30-60 minutes using nitrogen or argon as an inert gas to promote the crystallization and stabilization of the insulating layer.

[0030] Therefore, this invention, by optimizing the deposition and annealing parameters of the insulating layer, prepares an insulating layer with high dielectric constant and low leakage current. This method is applicable to the manufacture of various semiconductor devices, including transistors, capacitors, and integrated circuits, and exhibits high reliability and resistance to high temperatures and voltage stress.

[0031] The above-disclosed embodiments are merely preferred embodiments of the present invention and should not be construed as limiting the scope of the present invention. Therefore, any equivalent variations made in accordance with the claims of the present invention are still within the scope of the present invention.

Claims

1. A method for preparing an insulating layer for a semiconductor device, characterized in that, Includes the following steps: Deposit a buffer layer on the substrate surface; An insulating layer is deposited on the buffer layer, the dielectric constant of the insulating layer being higher than that of the buffer layer; and The deposited buffer layer and the insulating layer are annealed under an inert gas atmosphere.

2. The method for preparing the insulating layer of a semiconductor device as described in claim 1, characterized in that, The deposition of the buffer layer includes: controlling the deposition temperature to be 400-600℃, the deposition pressure to be 1-5 mTorr, the deposition rate to be 0.5-2 nm / min, and the deposition time to be 5-15 minutes.

3. The method for preparing the insulating layer of a semiconductor device as described in claim 1, characterized in that, The deposition of the insulating layer includes: controlling the deposition temperature to be 250-350℃, the deposition pressure to be 0.1-1 mTorr, the deposition rate to be 0.2-1 nm / min, and the deposition time to be 10-20 minutes.

4. The method for preparing the insulating layer of a semiconductor device as described in claim 1, characterized in that, The annealing process includes controlling the annealing temperature at 500-800℃ and the annealing time at 30-60 minutes.

5. The method for preparing the insulating layer of a semiconductor device as described in claim 1, characterized in that: The buffer layer is made of silicon dioxide or silicon nitride.

6. The method for preparing the insulating layer of a semiconductor device as described in claim 1, characterized in that: The insulating layer is hafnium dioxide or zirconium dioxide.

7. The method for preparing the insulating layer of a semiconductor device as described in claim 1, characterized in that: The inert gas is nitrogen or argon.

8. The method for preparing the insulating layer of a semiconductor device as described in claim 1, characterized in that: The semiconductor devices include transistors, capacitors, and integrated circuits.