An electric energy meter error automatic compensation calibration method and system based on platform testing

Abstract

The application discloses a kind of based on platform test's electric energy meter error automatic compensation calibration method and system, belong to electric energy meter calibration technical field.The method includes: obtaining the high-frequency pulse sequence and low-frequency pulse sequence generated by the electric energy meter under the stable output of platform;Extract the time interval of adjacent pulse to form high-frequency interval sequence and low-frequency interval sequence;Difference is calculated point by point after two sequences are aligned according to time axis, and pulse deviation matrix is constructed;Error type is determined according to the sign distribution mode of each row vector of pulse deviation matrix;According to error type, compensation coefficient vector is extracted from compensation mapping table, and is decomposed into multistage fine adjustment code, and the integration capacitor switching state of electric energy meter internal digital integrator is adjusted step by step;After each level adjustment is completed, pulse deviation matrix is recalculated, and the polarity of next level adjustment is determined according to the convergence direction of main diagonal elements.The method can accurately identify phase error type, and accurate compensation is realized by adaptive multistage fine adjustment.

Description

Technical Field

[0001] This invention relates to the field of electricity meter calibration technology, specifically to an automatic error compensation calibration method and system for electricity meters based on bench testing. Background Technology

[0002] Before leaving the factory, electricity meters need to undergo error verification and calibration using a test bench. The test bench provides a standard power source and collects the pulse signal output by the electricity meter. The error value is obtained by comparing the deviation between the standard pulse and the pulse under test. Existing automatic compensation methods typically generate a compensation coefficient directly based on the calculated overall phase error or gain error and write it into the electricity meter's memory, or adjust the metering accuracy by manually and repeatedly modifying the time constant of the integrating circuit.

[0003] This approach has significant shortcomings. The overall error value is an average of the pulse deviation over a period of time, failing to reflect the distribution characteristics of the deviation within the pulse sequence. Therefore, it is difficult to distinguish between phase lag and phase lead, two error types with opposite properties and drastically different compensation directions. When the two error components are mixed or accompanied by gain fluctuations in actual operating conditions, relying on a single error value can easily lead to misjudgment, introducing an incorrect compensation direction, resulting in decreased accuracy or even calibration failure. Furthermore, the one-time open-loop compensation method lacks real-time feedback on the compensation effect; once the compensation coefficient is written, it is no longer adjusted, making it unable to cope with the nonlinear and discretization effects caused by the switching of the integrating capacitor. Repeated manual adjustments rely on the operator's experience, resulting in low efficiency and poor consistency.

[0004] How to directly capture the sign distribution pattern of deviations using high-throughput pulse interval data in a platform testing environment, thereby automatically and reliably distinguishing between phase lag and phase lead errors, is a problem that urgently needs to be solved. On the other hand, after determining the error type and obtaining the compensation coefficients, how to transform the compensation process into a controllable, step-by-step adjustment behavior, and autonomously determine the polarity of the next adjustment based on the actual deviation change direction after each adjustment, avoiding reverse compensation or repeated oscillations, and achieving rapid deviation convergence, is also a problem that existing technologies have not effectively solved. Summary of the Invention

[0005] This invention provides an automatic error compensation calibration method and system for energy meters based on bench testing. It aims to solve the technical problems that existing calibration methods cannot accurately determine the type of phase error based on the sign distribution of pulse interval deviation, and that the compensation process lacks an adaptive adjustment mechanism. The invention achieves rapid and accurate identification of error types and closed-loop convergence control of the compensation step.

[0006] To achieve the above objectives, the present invention provides the following technical solution: an automatic error compensation and calibration method for electricity meters based on platform testing, comprising:

[0007] Acquire the high-frequency pulse sequence and low-frequency pulse sequence generated by the tested energy meter under stable output of the test platform;

[0008] Extract the time interval between adjacent pulses in a high-frequency pulse sequence to generate a high-frequency interval sequence; extract the time interval between adjacent pulses in a low-frequency pulse sequence to generate a low-frequency interval sequence.

[0009] Align the high-frequency interval sequence and the low-frequency interval sequence along the time axis, calculate the difference at each corresponding point, and construct the pulse deviation matrix.

[0010] The error type is determined based on the sign distribution pattern of each row vector in the pulse deviation matrix, and the error type includes phase lag error and phase lead error;

[0011] Extract the corresponding compensation coefficient vector from the preset compensation mapping table according to the error type;

[0012] The compensation coefficient vector is decomposed into multi-level fine-tuning codes, and the switching state of the integrating capacitor of the digital integrator inside the tested energy meter is adjusted step by step.

[0013] After each adjustment is completed, the pulse deviation matrix is ​​recalculated, and the polarity of the next adjustment is determined based on the convergence direction of the main diagonal elements in the deviation matrix.

[0014] By extracting the time interval and aligning the high-frequency and low-frequency pulses from the tested energy meter under stable output on the test bench, a pulse deviation matrix is ​​constructed. This matrix accurately identifies error types such as phase lag and phase lead from the sign distribution of the row vectors. Based on the identified error types, the phase compensation coefficient and gain compensation coefficient are automatically retrieved from the compensation mapping table. These coefficients are then decomposed into multi-level fine-tuning codes containing coarse and fine adjustments. The on / off combinations of the capacitor switching switches inside the digital integrator are changed level by level, thereby finely correcting the integration characteristics at the hardware level. After each adjustment, pulses are re-acquired and the pulse deviation matrix is ​​calculated. The polarity is adjusted using the convergence direction of the mean of the main diagonal elements, gradually approaching the zero-error state. The entire process requires no manual intervention and can be automatically calibrated during the test bench operation. It boasts high calibration accuracy, fast response speed, and good adaptability to power frequency fluctuations and temperature changes.

[0015] As a technical solution of this invention, when acquiring the high-frequency pulse sequence and the low-frequency pulse sequence, the power frequency periodic synchronization signal output by the test platform is used as a reference. The rising edge of the synchronization signal is used as the starting trigger point to start a high-frequency counter to count the high-frequency pulses, and the counting stops at the next rising edge. The counting result is converted into a time length value as the interval data of the high-frequency pulses. At the same time, the synchronization signal itself is regarded as a low-frequency pulse, and its period value is directly extracted to form a low-frequency interval sequence. In this way, the low-frequency pulse sequence and the high-frequency pulse sequence are strictly synchronized, avoiding measurement errors introduced by time reference deviation.

[0016] Preferably, when extracting the time interval between adjacent pulses in a high-frequency pulse sequence, the rising edges of high-frequency pulses are continuously acquired and their absolute timestamps are recorded. The pulse interval values ​​are obtained by subtracting these timestamps and arranged in chronological order to form a high-frequency interval sequence. The sequence is then subjected to median filtering to remove abnormal interval values ​​exceeding three standard deviations of the mean of adjacent intervals, and these abnormal interval values ​​are replaced with the arithmetic mean of the preceding and following intervals. This processing effectively suppresses glitch data caused by electromagnetic interference or counting jumps during platform testing, improving the stability of the pulse interval sequence and the reliability of subsequent error identification.

[0017] When aligning the high-frequency interval sequence with the low-frequency interval sequence along the time axis, a time window is constructed using the start and end times of the low-frequency intervals within one power frequency cycle. All high-frequency interval values ​​falling within this window are extracted from the high-frequency interval sequence. If the number of high-frequency interval values ​​is not equal to the preset standard number of pulses within the cycle, zeros are padded at the beginning or redundant interval values ​​at the end are deleted to achieve length standardization. Then, a one-to-many mapping is established between the standardized high-frequency interval sequence and the low-frequency interval values ​​of the same cycle. This alignment method ensures the consistency of sample dimensions across different cycles, making the row vectors of the pulse deviation matrix comparable.

[0018] As a further aspect of this invention, when constructing the pulse deviation matrix, the normalized ratio is obtained by dividing the high-frequency interval sequence within each low-frequency period by the corresponding low-frequency interval value. The absolute value of the normalized ratio minus 1 is then taken to obtain the individual deviation. The deviations within the same low-frequency period are arranged into row vectors according to the phase order of the high-frequency pulses. Then, the row vectors of multiple consecutive low-frequency periods are stacked in chronological order to form a two-dimensional pulse deviation matrix. The row numbers of the matrix correspond to the low-frequency period numbers, and the column numbers correspond to the phase positions, allowing both the temporal and phase distributions of the error to be explicitly expressed simultaneously, facilitating subsequent automatic identification of the error type.

[0019] In the error type determination process, the positive and negative signs of the deviations in each row vector of the pulse deviation matrix are extracted, and deviations with the same sign are grouped into the same sign group. If the positive deviations in the row vectors are concentrated at the beginning of the row and their number is greater than the number of positive deviations at the end of the row, it is determined to be a phase lag error; if the negative deviations are concentrated at the beginning of the row and their number is greater than the number of negative deviations at the end of the row, it is determined to be a phase lead error; if the positive and negative deviations alternate and the alternation frequency is higher than a preset threshold, it is determined to be a gain fluctuation error. A majority vote is performed on the determination results of three or more consecutive low-frequency cycles to output the final error type. This determination method reveals the sign distribution pattern of the error from the phase dimension, uses clustering and alternation characteristics to distinguish different error modes, avoids single-cycle misjudgment, and improves the robustness of error identification.

[0020] When extracting the compensation coefficient vector based on the error type, the compensation mapping table pre-stores the correspondence between error type identifiers and compensation coefficient vectors. The compensation coefficient vector includes phase compensation coefficients and gain compensation coefficients. The initial value of the compensation coefficient vector is obtained by looking up the error type as an index. Then, the current temperature value of the tested energy meter is read, and the corresponding temperature correction factor is looked up from the compensation mapping table. The temperature correction factor is multiplied by each compensation coefficient in the initial value of the compensation coefficient vector to obtain the corrected compensation coefficient vector. By dynamically weighting the compensation coefficients using the temperature correction factor, the calibration parameters can automatically adapt to changes in the energy meter's operating temperature, improving compensation accuracy over a wide temperature range.

[0021] When decomposing the compensation coefficient vector into multi-level fine-tuning codes, the phase compensation coefficient is split into high-order and low-order parts. The high-order part corresponds to the coarse adjustment step value, and the low-order part corresponds to the fine adjustment step value. These are encoded into binary digital codes, with the coarse adjustment code having a smaller bit width than the fine adjustment code. The gain compensation coefficient is decomposed and encoded in the same way and concatenated with the phase compensation binary digital code to form multi-level fine-tuning codes. Each level of fine-tuning code corresponds to the on / off state combination of an integrating capacitor switching switch in the digital integrator. During step-by-step adjustment, the coarse adjustment code is first sent to the coarse adjustment switch group of the integrator to switch the coarse adjustment capacitor connection state. After two power frequency cycles, the pulse is re-acquired, and the mean value of the main diagonal elements of the current pulse deviation matrix is ​​calculated. If the mean value is greater than the value before adjustment, the coarse adjustment code is inverted bit by bit and resent for reverse adjustment. After coarse adjustment, the fine adjustment code is sent to the fine adjustment switch group, and the fine adjustment capacitor is switched step by step according to the fine adjustment step value. The combination of coarse and fine adjustment ensures both calibration speed and high-precision approximation. At the same time, the average value of the main diagonal elements is used as feedback to determine the direction of coarse adjustment, preventing over-adjustment or oscillation.

[0022] When determining the polarity of the next adjustment stage, the difference between the mean of the main diagonal elements of the current pulse deviation matrix and the mean before the previous adjustment stage is calculated. If the difference is positive, the polarity of the next adjustment stage is reversed, and the binary value of the next fine-tuning code is decremented by 1 before being output. If the difference is negative, the polarity of the next adjustment stage is positive, and the binary value of the next fine-tuning code is incremented by 1 before being output. If the difference is zero, the current fine-tuning code remains unchanged, and the subsequent adjustment process is terminated. Through closed-loop stepwise approximation, the principal component of the error converges rapidly along the main diagonal direction to within the tolerance range. The calibration process converges automatically without the need to set a fixed number of iterations.

[0023] An automatic error compensation calibration system for electricity meters based on benchtop testing includes a memory, a processor, and a computer program stored in the memory and running on the processor. The processor executes the computer program to implement the steps of the aforementioned method. This system can acquire pulse sequences in real time under benchtop testing conditions and automatically perform the entire process of error identification, compensation coefficient extraction, step-by-step adjustment of the integrating capacitor, and feedback verification. It features a compact structure, high online calibration efficiency, and strong environmental adaptability.

[0024] The technical effects and advantages provided by the present invention in the above technical solution are as follows:

[0025] By synchronously acquiring high-frequency and low-frequency pulse sequences from the energy meter under stable output conditions, the time intervals between adjacent pulses are extracted to generate high-frequency and low-frequency interval sequences. These sequences are then aligned along the time axis, and the differences are calculated point-by-point to construct a pulse deviation matrix. The sign distribution pattern of each row vector in this matrix is ​​analyzed. When positive deviations are concentrated at the beginning of a row and their number exceeds the number of positive deviations at the end, it is determined to be a phase lag error; when negative deviations are concentrated at the beginning of a row and their number exceeds the number of negative deviations at the end, it is determined to be a phase lead error. This method, using the spatial distribution characteristics of the deviation sign within the pulse period as a criterion, directly corresponds to the directionality of phase deviation accumulation over time. Compared to traditional methods that rely solely on average error amplitude or single threshold comparisons, this approach can accurately separate the type of phase error from noise and gain fluctuations, avoiding misjudging amplitude shifts caused by gain changes as phase errors, thus significantly improving the reliability of error type determination.

[0026] After identifying the specific error type, the corresponding compensation coefficient vector is extracted from the preset compensation mapping table. This vector is then decomposed into multi-level fine-tuning codes. The phase compensation coefficient is further divided into a high-level coarse-tuning component and a low-level fine-tuning component, coded as coarse-tuning and fine-tuning codes respectively. The gain compensation coefficient is processed in the same way, ultimately forming a multi-level fine-tuning code sequence. These fine-tuning codes are sent step-by-step to the integrating capacitor switching switch group of the digital integrator, sequentially changing the connection status of the coarse-tuning and fine-tuning capacitors to achieve a step-by-step fine adjustment of the compensation amount. After each level of capacitor switching adjustment is completed, the pulse sequence is re-acquired at the power frequency cycle, and a new pulse deviation matrix is ​​calculated. The mean of the main diagonal elements is extracted. The current mean of the main diagonal elements is compared with the mean before the previous level of adjustment. If the mean increases, it indicates that the deviation has expanded, and the next level of fine-tuning code is reversed; if the mean decreases, the current adjustment polarity is maintained and forward fine-tuning continues; if the mean is zero, the adjustment is terminated. This closed-loop control method, which dynamically determines the polarity of each adjustment stage by utilizing the convergence direction of the main diagonal elements of the pulse deviation matrix, eliminates the reliance on the preset values ​​of the open loop during the entire compensation process. Instead, it uses the actual response of the deviation matrix as feedback to autonomously approach the minimum deviation state, effectively preventing overcompensation and repeated oscillations caused by capacitor switching discreteness, accelerating error convergence, and improving the success rate and compensation accuracy of a single calibration. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this invention. For those skilled in the art, other drawings can be obtained based on these drawings.

[0028] Figure 1 This is a flowchart of the automatic error compensation calibration method for electricity meters;

[0029] Figure 2 This is a flowchart of high-frequency pulse interval sequence generation, filtering, and power frequency cycle alignment standardization.

[0030] Figure 3 This is a flowchart of the temperature correction process for the compensation coefficient;

[0031] Figure 4 This is a curve showing the effect of temperature on the phase compensation coefficient and the gain compensation coefficient;

[0032] Figure 5 This is the convergence curve of the integrating capacitor fine-tuning in the digital integrator of the energy meter error compensation. Detailed Implementation

[0033] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0034] See Figure 1 This invention provides an automatic error compensation calibration method for energy meters based on bench testing, comprising: acquiring a high-frequency pulse sequence and a low-frequency pulse sequence generated by the energy meter under test under stable output of the bench; extracting the time interval between adjacent pulses in the high-frequency pulse sequence to generate a high-frequency interval sequence, and extracting the time interval between adjacent pulses in the low-frequency pulse sequence to generate a low-frequency interval sequence; aligning the high-frequency interval sequence and the low-frequency interval sequence along the time axis, calculating the difference at each corresponding point, and constructing a pulse deviation matrix; determining the error type based on the sign distribution pattern of each row vector in the pulse deviation matrix, wherein the error type includes phase lag error and phase lead error; extracting the corresponding compensation coefficient vector from a preset compensation mapping table according to the error type; decomposing the compensation coefficient vector into multi-level fine-tuning codes, and adjusting the switching state of the integrating capacitor of the digital integrator inside the energy meter under test level by level; recalculating the pulse deviation matrix after each level of adjustment, and determining the polarity of the next level of adjustment based on the convergence direction of the main diagonal elements in the deviation matrix.

[0035] Example 1:

[0036] In practice, the high-frequency and low-frequency pulse sequences generated by the tested energy meter under stable output are acquired, with the testing device providing the electrical connection and signal synchronization basis. The testing device applies rated power frequency voltage and current to the tested energy meter, simultaneously outputting a power frequency periodic synchronization signal phase-locked with the power frequency voltage. This signal is a square wave, and its rising edge is aligned with the zero-crossing point of the power frequency voltage. The high-frequency pulse generation unit inside the tested energy meter converts electrical energy into a high-frequency pulse train based on the measured power; the frequency of the high-frequency pulses is proportional to the real-time power. Under stable output conditions, the testing device maintains constant voltage, current, and power factor, ensuring the repeatability of the high-frequency and low-frequency pulse sequences.

[0037] The system reads the power frequency periodic synchronization signal output by the test bench, using the rising edge of the power frequency periodic synchronization signal as the starting trigger point. In practice, the processor captures the logic level transition of the power frequency periodic synchronization signal via interrupt or hardware triggering. When a transition from low to high level to the power frequency periodic synchronization signal is detected, a start trigger flag is generated. The start trigger flag enables the high-frequency counter to start operating.

[0038] A high-frequency counter is started at the initial trigger point to count high-frequency pulses. Counting stops at the next rising edge of the power frequency cycle synchronization signal, and the counting result is recorded. The clock input of the high-frequency counter is connected to the high-frequency pulse output of the energy meter under test, and the counting enable signal of the high-frequency counter is controlled by a trigger flag. At the initial trigger point, the counting enable signal is enabled, and the high-frequency counter starts counting from zero on the rising edge of the high-frequency pulse. When the processor detects the next rising edge of the power frequency cycle synchronization signal, the counting enable signal is disabled, and the high-frequency counter stops counting. The processor reads the counting result of the high-frequency counter.

[0039] The counting result is converted into a time length value, which serves as the interval data for the corresponding pulses in the high-frequency pulse sequence. One possible conversion method is to multiply the counting result by the clock period of the high-frequency counter to obtain the time length value of the corresponding pulse interval. The conversion formula is:

[0040]

[0041] in, This represents the time length value of the high-frequency pulse interval. This represents the high-frequency pulse count result recorded by the high-frequency counter between the rising edges of the synchronization signal in two adjacent power frequency cycles. This indicates the period of the counting clock signal inside the high-frequency counter. The value is the clock source period of the processor's timer peripheral, determined by the processor's main frequency and the timer prescaler. For example, when the processor uses a 72MHz clock source and the timer prescaler is set to 71, Equal to 1 microsecond. (The result of the conversion) As a high-frequency pulse interval data, it is sequentially stored into the storage buffer corresponding to the high-frequency pulse sequence.

[0042] The power frequency periodic synchronization signal itself is used as a low-frequency pulse. The period of the power frequency periodic synchronization signal is determined by the power frequency output by the test bench. The power frequency signal source inside the test bench outputs a standard sine wave with a frequency of 50Hz or 60Hz, and the period of the power frequency periodic synchronization signal is 20 milliseconds or 16.67 milliseconds. The processor measures the time interval between adjacent rising edges of the power frequency periodic synchronization signal and continuously extracts the period values ​​to form a low-frequency interval sequence. The measurement method is as follows: when the processor captures the rising edge of the power frequency periodic synchronization signal, it reads the time value of the system timer, subtracts the time values ​​of two adjacent captured system timers, and obtains the low-frequency pulse interval value, which is an element of the low-frequency interval sequence. The low-frequency pulse interval values ​​obtained from multiple consecutive power frequency cycles are stored in the low-frequency interval sequence in chronological order.

[0043] During the generation of high-frequency pulse sequences and low-frequency interval sequences, the capture of the power frequency cycle synchronization signal and the control of the high-frequency counter are completed collaboratively through the same internal hardware timer channel of the processor to ensure the time correspondence between high-frequency interval data and low-frequency interval data.

[0044] Example 2:

[0045] In specific implementation, please refer to Figure 2 The processor continuously acquires the rising edge of high-frequency pulses and records the absolute timestamp corresponding to each rising edge, achieved through a hardware timer capture channel within the processor. One timer channel of the processor is configured in input capture mode, with its trigger edge set to the rising edge. The signal input terminal of the input capture channel is connected to the high-frequency pulse output pin of the energy meter under test. When a high-frequency pulse transitions from low to high, the input capture channel latches the current value of the timer counter into the capture register and generates a capture interrupt. The processor reads the count value from the capture register in the capture interrupt service routine and uses this count value as the absolute timestamp of the rising edge of the high-frequency pulse. The accuracy of the absolute timestamp depends on the timer's counting frequency, which is set to ensure that the resolution of the absolute timestamp is no higher than 1 microsecond. Each captured absolute timestamp is sequentially stored in an absolute timestamp buffer array.

[0046] The absolute timestamps of two adjacent rising edges are subtracted to obtain a single high-frequency pulse interval value. The processor retrieves the a-th and (a+1)-th absolute timestamps from the absolute timestamp buffer array by address, subtracts the a-th absolute timestamp from the (a+1)-th absolute timestamp value, and multiplies the difference by the timer count period to obtain the high-frequency pulse interval value. This subtraction operation is performed sequentially on all adjacent absolute timestamp pairs to obtain all high-frequency pulse interval values. These high-frequency pulse interval values ​​are then arranged in chronological order of their generation and stored in the original high-frequency interval sequence.

[0047] The original high-frequency interval sequence is processed by median filtering. Specifically, a sliding window is formed by taking each high-frequency pulse interval as the center and selecting several adjacent high-frequency pulse intervals before and after the center value. The length of the sliding window is set to 5 high-frequency pulse intervals. Within one sliding window, the average value of the remaining high-frequency pulse intervals (excluding the center value) is calculated to obtain the average of adjacent intervals. The formula for calculating the average of adjacent intervals is:

[0048]

[0049] Where w represents the index number of the high-frequency pulse interval value at the center of the sliding window in the original high-frequency interval sequence; s represents the span of the single-sided neighborhood within the sliding window, and when the length of the sliding window is 5, s takes the value of 2; This represents the high-frequency pulse interval value with index number b in the original high-frequency interval sequence; This represents the high-frequency pulse interval value with index number c in the original high-frequency interval sequence; This represents the average of the adjacent intervals of the high-frequency pulse interval corresponding to the index number w. The reason for setting s to 2 is that choosing a sliding window length of 5 can maintain the ability to track rapidly changing pulse intervals while ensuring sufficient noise suppression capability, and the single-sided neighborhood span s is 2.

[0050] Within the same sliding window, the standard deviation of adjacent intervals is calculated based on the mean of adjacent intervals. The calculation method for the standard deviation of adjacent intervals is as follows: first, calculate the squared deviation of each high-frequency pulse interval value (excluding the central high-frequency pulse interval value) from the mean of adjacent intervals within the sliding window; then calculate the average of these squared deviations and take the square root. For the high-frequency pulse interval value at index w in the original high-frequency interval sequence, if the absolute deviation of this high-frequency pulse interval value from the mean of adjacent intervals is greater than three times the standard deviation of adjacent intervals, then this high-frequency pulse interval value is determined to be an abnormal interval value. The three-times threshold is set based on the characteristic that the probability of data falling within three times the mean of a normal distribution exceeds 99.7%. The processor removes abnormal interval values ​​from the original high-frequency interval sequence and replaces the removed abnormal interval value with the arithmetic mean of the two high-frequency pulse interval values ​​before and after the abnormal interval value. The two high-frequency pulse interval values ​​before and after the abnormal interval value refer to two high-frequency pulse interval values ​​adjacent to the abnormal interval value that have not themselves been determined to be abnormal interval values. After performing median filtering on all high-frequency pulse interval values ​​in the original high-frequency interval sequence, the high-frequency interval sequence is obtained.

[0051] The high-frequency interval sequence and the low-frequency interval sequence are aligned along the time axis as follows: The start and end times of the low-frequency intervals within the same power frequency cycle are taken as the time window of that cycle. The low-frequency interval sequence is formed by continuously extracting cycle values ​​from the power frequency cycle synchronization signal output from the test bench. Each low-frequency interval value in the low-frequency interval sequence corresponds to a complete power frequency cycle. The start time of a low-frequency interval value is the absolute timestamp corresponding to the rising edge of the power frequency cycle synchronization signal within that low-frequency cycle, and the end time is the absolute timestamp corresponding to the rising edge of the synchronization signal of the next power frequency cycle. Within the time window defined by the start and end times of the low-frequency interval values, the processor extracts all high-frequency interval values ​​from the high-frequency interval sequence whose timestamps fall within that time window. The timestamp corresponding to each high-frequency interval value in the high-frequency interval sequence is determined by the start absolute timestamps of the two adjacent rising edges that generated the high-frequency interval value. The processor compares this start absolute timestamp with the boundary of the time window. High-frequency interval values ​​whose start absolute timestamps are greater than or equal to the start time of the time window and less than the end time of the time window are determined to belong to that time window.

[0052] If the number of intercepted high-frequency interval values ​​is not equal to the preset number of standard pulses within a period, a standardization operation is performed. The preset number of standard pulses within a period is calculated by multiplying the pulse constant of the tested energy meter by the output power of the test setup and then by the duration of the power frequency cycle. The pulse constant is the number of pulses per kilowatt-hour indicated on the nameplate of the tested energy meter. When the number of intercepted high-frequency interval values ​​is less than the preset number of standard pulses within a period, zero values ​​are padded to the beginning of the intercepted high-frequency interval value sequence. The number of zero values ​​padded is equal to the preset number of standard pulses within a period minus the number of intercepted high-frequency interval values. When the number of intercepted high-frequency interval values ​​is greater than the preset number of standard pulses within a period, excess high-frequency interval values ​​are deleted from the end of the intercepted high-frequency interval value sequence. The number of deleted values ​​is equal to the intercepted high-frequency interval values ​​minus the preset number of standard pulses within a period. After the zero-padding or deletion operation, the length of the high-frequency interval value sequence is equal to the preset number of standard pulses within a period, resulting in a standardized high-frequency interval sequence.

[0053] The standardized high-frequency interval sequence is mapped one-to-many to low-frequency interval values ​​within the same period, with one low-frequency interval value corresponding to multiple high-frequency interval values. The mapping relationship is stored in a two-dimensional array structure, where the row index is the low-frequency period number. Each row of the array contains the corresponding low-frequency interval value and all standardized high-frequency interval values ​​within that low-frequency period's time window. The low-frequency interval value is stored as an independent field of that row, while the high-frequency interval values ​​are stored in the remaining fields of that row according to their pulse phase order.

[0054] Example 3:

[0055] In practice, the high-frequency interval sequence within each low-frequency period is divided by the corresponding low-frequency interval value to obtain the normalized ratio. A one-to-many mapping relationship has been established between the low-frequency and high-frequency interval sequences through time axis alignment; one low-frequency interval value corresponds to one row of the normalized high-frequency interval sequence. For a low-frequency period with index p, the low-frequency interval value is denoted as... The normalized high-frequency interval sequence within the low-frequency period contains M high-frequency interval values, where M equals the preset number of standard pulses within the period. The high-frequency interval value with phase sequence number q in the high-frequency interval sequence is denoted as... Where q takes values ​​from 1 to M. The processor processes each... Execution and The division operation yields the normalized ratio. The normalized ratio is calculated as follows:

[0056]

[0057] in, This represents the normalized ratio with low-frequency period number p and phase sequence number q. This represents the high-frequency interval value with phase sequence number q within the low-frequency period with low-frequency period number p, in seconds; This represents the low-frequency interval value with low-frequency period number p, in seconds. Read from the low-frequency interval sequence according to the sequence number. Read from the two-dimensional array structure corresponding to the standardized high-frequency interval sequence according to row number p and column number q.

[0058] The absolute value of the normalized ratio minus 1 is taken to obtain a single deviation. The processor iterates through all low-frequency cycle indices p and all phase sequence indices q, and for each... After performing the subtraction operation, take the absolute value to obtain the deviation D. p,q Deviation D p,q This reflects the relative deviation between the high-frequency interval value and the low-frequency interval value at phase sequence number q. (D) p,q A value of zero indicates that the high-frequency interval value is exactly the same as the low-frequency interval value, D p,q When the value is positive, the larger the value, the greater the degree of deviation.

[0059] All deviations within the same low-frequency period are arranged into a row vector according to the phase order of the high-frequency pulses. For the low-frequency period with index p, the row vector V... p Its composition is as follows:

[0060]

[0061] row vector V pThe order of the elements in the row vector corresponds to the chronological order of the high-frequency pulses generated. The first element D in the row vector... p,1 The deviation corresponding to the earliest high-frequency pulse within the low-frequency period time window, the last element D p,M The deviation corresponding to the latest high-frequency pulse within the low-frequency period time window.

[0062] Row vectors from multiple consecutive low-frequency cycles are stacked in chronological order to form a two-dimensional pulse deviation matrix. N row vectors from consecutive low-frequency cycles are acquired, where N is the preset number of matrix rows. The number of matrix rows N is set to be greater than or equal to the number of cycles corresponding to three or more consecutive low-frequency cycles. The N row vectors with low-frequency cycle indices p from 1 to N are arranged sequentially to form a two-dimensional pulse deviation matrix A:

[0063]

[0064] The row numbers of the two-dimensional pulse deviation matrix A correspond to the low-frequency cycle numbers, with the row numbers ranging from 1 to N; the column numbers of the two-dimensional pulse deviation matrix A correspond to the phase positions, with the column numbers ranging from 1 to M.

[0065] In determining the error type based on the sign distribution pattern of each row vector in the pulse deviation matrix, the positive and negative signs of the deviations in each row vector are first extracted. For the row vector with row number p, each deviation D in the row vector is extracted. p,q The symbol. When D p,q When the value is greater than zero, the sign is determined to be positive, and it is represented by +1; when D p,q When less than zero, the sign is determined to be negative, and it is represented by -1; when D p,q When the sign is zero, it is considered neutral and represented by 0. The sign of all elements in the row vector is traversed, and deviations with the same sign are grouped into the same sign group. Within the same row vector, all deviations with a sign of +1 are grouped into the positive sign group, all deviations with a sign of -1 are grouped into the negative sign group, and all deviations with a sign of 0 are grouped into the neutral sign group.

[0066] In a row vector, the column index range is divided into the beginning, middle, and end regions. The beginning region is defined as the column index from 1 to... The region at the end of the row is defined as the region from the column number... The region up to M, where floor represents rounding down. M is the preset standard number of pulses within the period. The number of positive deviations in the first region of the row is counted and denoted as... The number of positive deviations within the row tail region is counted and denoted as... The number of negative deviations within the first row area is recorded as follows: The number of negative deviations within the row tail region is counted and denoted as... If in the row vector Greater than If the low-frequency period corresponding to the row vector exhibits phase lag error characteristics, then the row vector is determined to have this characteristic. Greater than If so, then the low-frequency period corresponding to the row vector exhibits a phase lead error characteristic. During comparison, only when... and A judgment is only made when the difference is greater than a preset judgment threshold, which is set to... If the distribution of positive and negative deviations in a row vector exhibits an alternating pattern, and the alternation frequency is higher than a preset threshold, then the low-frequency period corresponding to that row vector is determined to exhibit gain fluctuation error characteristics. The alternation frequency is calculated by iterating through the row vector and counting the number of sign changes of adjacent deviations; the ratio of the number of sign changes to the total number of elements in the row vector is the alternation frequency. The preset alternation frequency threshold is set to 0.5.

[0067] Error type determination is performed on all N row vectors in the pulse deviation matrix to obtain a preliminary error type determination result for each row vector. A majority vote is then conducted on the preliminary determination results from three or more consecutive low-frequency cycles. The majority vote method is as follows: take the preliminary determination results from an odd number of consecutive low-frequency cycles, count the frequency of each error type, and output the error type with the highest frequency as the final error type. If there is a tie, the determination result of the most recent low-frequency cycle is used as the final error type. The final error type is selected from phase lag error, phase lead error, and gain fluctuation error for output.

[0068] Example 4:

[0069] In specific implementation, please refer to Figure 3The compensation mapping table stores the correspondence between error type identifiers and compensation coefficient vectors. The compensation coefficient vectors include phase compensation coefficients and gain compensation coefficients. The compensation mapping table is pre-built and stored in the processor's internal non-volatile memory. Each entry in the compensation mapping table contains three fields: an error type identifier field, a phase compensation coefficient field, and a gain compensation coefficient field. The error type identifier field uses enumerated values ​​for encoding: 0x01 for phase lag error, 0x02 for phase lead error, and 0x03 for gain fluctuation error. The phase compensation coefficient field stores a signed fixed-point value. The phase compensation coefficient has a 16-bit width, with the highest bit being the sign bit and the lower 15 bits being the value bits. A positive phase compensation coefficient indicates that the integration capacitor needs to be increased to compensate for phase lag, while a negative phase compensation coefficient indicates that the integration capacitor needs to be decreased to compensate for phase lead. The gain compensation coefficient field stores an unsigned fixed-point value. The gain compensation coefficient has a 16-bit width and is used to adjust the integration gain of the digital integrator. The initial values ​​of the compensation coefficient vectors corresponding to each error type identifier in the compensation mapping table are determined through a calibration experiment. The calibration experiment is conducted under standard ambient temperature of 25 degrees Celsius. After applying known error amounts to multiple tested energy meters with different error types, the compensation coefficients required to bring the error to zero are recorded. The average of multiple records is taken as the initial value of the compensation coefficient vector corresponding to the error type identifier in the compensation mapping table.

[0070] The compensation mapping table is searched using the error type as an index to obtain the initial value of the compensation coefficient vector that matches the current error type. After receiving the final error type determination result, the processor uses the error type identifier corresponding to the final error type as the query key, traverses the error type identifier field in the compensation mapping table, and when the query key completely matches the error type identifier field of a certain entry in the compensation mapping table, the initial value of the phase compensation coefficient is read from the matching entry. and initial value of gain compensation coefficient . For signed fixed-point numbers, The value range is determined based on the adjustment range of the integrating capacitor array of the digital integrator of the tested energy meter. The integrating capacitor array includes a coarse adjustment capacitor group and a fine adjustment capacitor group. The coarse adjustment capacitor group contains 4 capacitor weight bits, and the fine adjustment capacitor group contains 8 capacitor weight bits. The initial value of the phase compensation coefficient is... The absolute value does not exceed the range corresponding to the sum of the maximum adjustment of the coarse adjustment capacitor group and the maximum adjustment of the fine adjustment capacitor group. It is an unsigned fixed-point number. The range of values ​​corresponds to the tap position encoding range of the gain adjustment resistor network in the digital integrator.

[0071] The current temperature value of the tested energy meter is read, and the corresponding temperature correction factor is looked up in the compensation mapping table. The temperature value is collected in real time by a temperature sensor installed on the digital circuit board inside the tested energy meter. The temperature sensor is connected to the processor via an I2C interface. The processor reads the output value of the temperature sensor every minute and uses the most recently read temperature value as the current temperature value. In addition to storing the initial values ​​of the compensation coefficient vector, the compensation mapping table also stores a temperature correction factor lookup table. The temperature correction factor lookup table is indexed by temperature ranges, which are divided into 5-degree Celsius units, ranging from -25 degrees Celsius to 85 degrees Celsius. Each temperature range in the temperature correction factor lookup table corresponds to two temperature correction factors: a phase temperature correction factor. and gain temperature correction factor The temperature correction factor is obtained through a temperature cycling experiment. In this experiment, the energy meter under test is placed in a temperature-controlled chamber, and the temperature is changed in 5-degree increments within a range of -25°C to 85°C. At each temperature point, the compensation coefficient required to bring the energy meter's error to zero is recorded. This compensation coefficient is then divided by the coefficient recorded at the standard temperature of 25°C to obtain the temperature correction factor for each temperature point. After reading the current temperature value, the processor divides it by 5 and maps it to the corresponding temperature range. The phase temperature correction factor for the current temperature range is then obtained from a temperature correction factor lookup table. and gain temperature correction factor .

[0072] The corrected compensation coefficient vector is obtained by multiplying the temperature correction factor by the phase compensation coefficient and the gain compensation coefficient in the initial value of the compensation coefficient vector. The formula for the correction calculation is:

[0073]

[0074]

[0075] in, This represents the corrected phase compensation coefficient. This represents the phase temperature correction factor. This represents the initial value of the phase compensation coefficient obtained from the compensation mapping table; This represents the corrected gain compensation coefficient. This represents the gain temperature correction factor. This represents the initial value of the gain compensation coefficient obtained from the compensation mapping table. The corrected phase compensation coefficient. and the corrected gain compensation coefficient Together they form the corrected compensation coefficient vector. The value ranges from 0.80 to 1.25, a fixed-point decimal, when the temperature is 25 degrees Celsius. The value is 1.00; The value ranges from 0.85 to 1.20 as a fixed-point decimal, when the temperature is 25 degrees Celsius. The value is 1.00. This is the corrected phase compensation coefficient. If the adjustment exceeds the maximum allowable range of the phase compensation coefficient, it is limited to the boundary value of the maximum adjustment range. Corrected gain compensation coefficient. If the gain compensation coefficient exceeds the maximum allowable adjustment range, it is limited to the boundary value of the maximum adjustment range. The compensation coefficient vector after the limiting operation is used as the final output compensation coefficient vector and passed to the digital integrator fine-tuning code decomposition unit.

[0076] See Figure 4 In the graph, the horizontal axis represents temperature, ranging from -25 degrees Celsius to 85 degrees Celsius, and the vertical axis represents the value of the compensation coefficient, ranging from approximately 0.7 to 1.6. Two curves are plotted in the graph: the solid line represents the phase compensation coefficient, and the dashed line represents the gain compensation coefficient. Both curves are marked with data points to show the sampled discrete values.

[0077] As shown in the figure, the phase compensation coefficient exhibits a monotonically increasing trend as the temperature gradually rises from -25℃ to 85℃, starting at approximately 0.74 and ending at approximately 0.88. The entire change is relatively gradual and continuous, indicating that the phase compensation coefficient increases with increasing temperature, and the change amplitude is less than 0.2. This reflects the influence of temperature on the phase compensation amount required for adjusting the switching state of the digital integrator's integrating capacitor, verifying the temperature correction factor described in Example 4. A technical solution for adjusting the phase compensation coefficient.

[0078] The gain compensation coefficient curve also shows a slow upward trend with increasing temperature, starting at approximately 1.4 and ending at approximately 1.6, with an amplitude change of about 0.2. The smooth upward trend of the dashed line indicates that as the temperature changes, the gain compensation coefficient of the digital integrator also needs to be appropriately increased to compensate for the change in the integral gain amplitude caused by temperature. This is consistent with the temperature correction factor used in Example 4. The description of adjusting the gain compensation coefficient is consistent.

[0079] Example 5:

[0080] In practical implementation, the phase compensation coefficients in the compensation coefficient vector are split into high-order and low-order parts. The high-order part corresponds to the coarse adjustment step value, and the low-order part corresponds to the fine adjustment step value. The compensation coefficient vector consists of the corrected phase compensation coefficients. and the corrected gain compensation coefficient Composition. Phase compensation coefficient This is a signed fixed-point number with a bit width of 16 bits. The most significant bit is the sign bit, bits 14 through 8 are the high-order bits, and bits 7 through 0 are the low-order bits. The high-order bits occupy 7 bits and can represent 128 coarse adjustment steps, while the low-order bits occupy 8 bits and can represent 256 fine adjustment steps. The coarse adjustment step value is determined by the phase compensation coefficient. The high-order portion is directly extracted, and the fine-tuning step value is determined by the phase compensation coefficient. The lower part is directly extracted. The capacitor adjustment step size corresponding to the coarse adjustment step value is larger than that corresponding to the fine adjustment step value. The capacitor change corresponding to each adjustment of the coarse adjustment step value is 0.5 picofarads, and the capacitor change corresponding to each adjustment of the fine adjustment step value is 0.0039 picofarads.

[0081] The coarse adjustment step value and the fine adjustment step value are encoded into binary digital codes, with the coarse adjustment code having a smaller bit width than the fine adjustment code. The binary digital code for the coarse adjustment step value is directly derived from the phase compensation coefficient. The second-highest bit to the 8th bit are extracted, and the coarse adjustment code has a bit width of 7 bits. The binary digital code for the fine adjustment step value is directly derived from the phase compensation coefficient. The lower 8 bits are extracted, and the code width is fine-tuned to 8 bits. Gain compensation coefficient. Decompose and encode in the same way. Gain compensation coefficient. This is an unsigned fixed-point number with a 16-bit width. The high-order bits of the gain compensation coefficient are bits 15 to 9, and the low-order bits are bits 8 to 0. The high-order bits correspond to the coarse-adjustment code (7 bits wide), and the low-order bits correspond to the fine-adjustment code (9 bits wide). Each level of the coarse-adjustment code corresponds to a gain change step of 0.5%, and each level of the fine-adjustment code corresponds to a gain change step of 0.004%.

[0082] The binary digital code obtained from the decomposition of the gain compensation coefficient is concatenated with the binary digital code of the phase compensation to form a multi-level fine-tuning code. The concatenation order is as follows: the phase coarse adjustment code is located in the highest bit segment, the phase fine adjustment code is located in the second highest bit segment, the gain coarse adjustment code is located in the third bit segment, and the gain fine adjustment code is located in the lowest bit segment. The total bit width of the multi-level fine-tuning code is 31 bits, with the following bit widths from highest to lowest: 7-bit phase coarse adjustment code, 8-bit phase fine adjustment code, 7-bit gain coarse adjustment code, and 9-bit gain fine adjustment code. Each level of fine-tuning code corresponds to the on / off state combination of an integrating capacitor switch in the digital integrator. The digital integrator contains an integrating capacitor array, which consists of a coarse adjustment capacitor group and a fine adjustment capacitor group. The coarse adjustment capacitor group contains 7 capacitor units, each corresponding to 1 bit in the coarse adjustment code. The capacitor units are arranged according to binary weights, with the highest weight capacitor value being 64 picofarads and the lowest weight capacitor value being 1 picofarad. The fine-tuning capacitor bank contains eight capacitor units, each corresponding to one bit in the fine-tuning code. The capacitor units are arranged according to binary weights, with the highest weight capacitor value being 0.5 picofarads and the lowest weight capacitor value being 0.0039 picofarads. Each capacitor unit in the integrating capacitor array is connected in series with a switch composed of a MOSFET. The on / off state of the switch is controlled by the logic level of the corresponding bit; a high logic level corresponds to a closed switch, and a low logic level corresponds to an open switch. Each logic value in the multi-level fine-tuning code is directly mapped to the control signal of the corresponding switch.

[0083] The process of adjusting the switching state of the integrating capacitor in the digital integrator inside the tested energy meter stepwise is as follows: First, the coarse adjustment code corresponding to the coarse adjustment step value is sent to the coarse adjustment switch group of the integrator to switch the coarse adjustment capacitor connection state. The processor writes the 7-bit phase coarse adjustment code and the 7-bit gain coarse adjustment code into the phase coarse adjustment register and the high-gain coarse adjustment register of the integrator respectively through the SPI interface or parallel I / O interface. The output of the phase coarse adjustment register is connected to the control terminal of the 7 switches in the coarse adjustment capacitor group, and the output of the gain coarse adjustment register is connected to the control terminal of the 7 switches in the gain adjustment resistor network. After the coarse adjustment code is written, the coarse adjustment switch group completes the switching state switching in the next system clock cycle, and the coarse adjustment capacitors are connected to the integration circuit of the digital integrator according to the weight combination corresponding to the coarse adjustment code.

[0084] After waiting for two power frequency cycles, the high-frequency and low-frequency pulse sequences are reacquired. The waiting time of two power frequency cycles is 40 milliseconds based on a power frequency of 50Hz. Under the condition of 50Hz power frequency, two power frequency cycles are 40 milliseconds. The purpose of waiting for two power frequency cycles is to allow the digital integrator to reach steady-state output under the new capacitor configuration, avoiding interference to the pulse sequence caused by the transient process of capacitor switching. The process of reacquiring the high-frequency and low-frequency pulse sequences is the same as the previous pulse sequence acquisition process. The high-frequency counter is triggered by reading the rising edge of the power frequency cycle synchronization signal output by the test bench, and the high-frequency pulse interval value is recorded to form the high-frequency pulse sequence. The period values ​​are continuously extracted from the power frequency cycle synchronization signal to form the low-frequency interval sequence. After reacquisition, the time axis of the high-frequency interval sequence and the low-frequency interval sequence are aligned and the difference is calculated to construct a new pulse deviation matrix.

[0085] Calculate the mean of the main diagonal elements of the current pulse deviation matrix. The current pulse deviation matrix is ​​a two-dimensional pulse deviation matrix reconstructed after re-acquisition. The row indices correspond to the low-frequency cycle indices, and the column indices correspond to the phase positions. The main diagonal elements are those elements in the pulse deviation matrix whose row and column indices are equal. The mean of the main diagonal elements is calculated by extracting all elements in the pulse deviation matrix with equal row and column indices. ,in The value range is from 1 to N is the number of rows in the pulse deviation matrix, and M is the number of columns in the pulse deviation matrix. The sum of all extracted main diagonal elements is divided by the number of main diagonal elements to obtain the mean of the main diagonal elements, denoted as . The formula for calculating the mean of the main diagonal elements is:

[0086]

[0087] Where U represents the number of elements on the main diagonal of the pulse deviation matrix. N is the number of rows in the pulse deviation matrix, and M is the number of columns in the pulse deviation matrix; The row number in the pulse deviation matrix is... Column number is The elements are the elements on the main diagonal. The magnitude of the value reflects the overall deviation of the output pulse interval of the digital integrator from the ideal pulse interval under the current capacitor configuration. The closer it is to zero, the closer the compensation effect is to the ideal state.

[0088] If the mean value of the main diagonal elements of the current pulse deviation matrix is ​​greater than the value before the previous adjustment, the coarse adjustment code is inverted bit by bit and resent to adjust the coarse adjustment capacitor connection status in the reverse direction. The value before the previous adjustment refers to the mean value of the main diagonal elements of the pulse deviation matrix calculated before sending the coarse adjustment code. The processor will then use the current mean value of the main diagonal elements... Mean of the main diagonal elements before the previous adjustment Compare. If Greater than This indicates that the connection direction of the coarse adjustment capacitor increases the deviation, requiring reverse adjustment. The bit-inverting operation is performed on the phase coarse adjustment code, inverting each logic value of the 7-bit phase coarse adjustment code, while the 7-bit gain coarse adjustment code remains unchanged. The bit-inverted coarse adjustment code is rewritten into the phase coarse adjustment register of the integrator, and the coarse adjustment switch group switches its state again, completing the reverse adjustment.

[0089] After coarse adjustment is completed, the fine adjustment code is sent to the fine adjustment switch group of the integrator, and the fine adjustment capacitor is switched sequentially according to the fine adjustment step value. The condition for completing the coarse adjustment is: the change in the mean of the main diagonal elements after two consecutive coarse adjustments is less than the preset coarse adjustment convergence threshold, which is set to... After the coarse adjustment is completed, the processor writes the 8-bit phase fine adjustment code to the phase fine adjustment register of the integrator and the 9-bit gain fine adjustment code to the gain fine adjustment register of the integrator. After each switch of the fine adjustment switch group, it waits for two power frequency cycles, recalculates the mean of the main diagonal elements of the pulse deviation matrix, and determines the adjustment polarity of the next fine adjustment code based on the convergence direction.

[0090] The process of determining the polarity of the next adjustment level based on the convergence direction of the main diagonal elements in the deviation matrix is ​​as follows: Calculate the difference between the mean of the main diagonal elements of the current pulse deviation matrix and the mean of the main diagonal elements before the previous adjustment. The mean of the main diagonal elements before the previous adjustment refers to the mean of the main diagonal elements of the pulse deviation matrix calculated before the previous fine-tuning code was sent. The difference is denoted as... , . The positive or negative sign reflects the direction of increase or decrease in the degree of deviation after adjustment.

[0091] If the difference If the value is positive, the polarity of the next adjustment level is reversed, and the binary value of the next fine-tuning code is decremented by 1 before being output. The next fine-tuning code is the next carry-in value of the current fine-tuning code. The binary value corresponding to the current fine-tuning code is used as an operand. When the polarity is reversed, the operand is decremented by 1, and the result of the decrement is output as the next fine-tuning code to the fine-tuning switch group of the integrator.

[0092] If the difference If the value is negative, the polarity of the next adjustment level is positive, and the binary value of the next fine-tuning code is incremented by 1 before being output. The binary value corresponding to the current fine-tuning code is used as an operand. When the polarity is positive, the operand is incremented by 1, and the result of the increment operation is used as the next fine-tuning code and output to the fine-tuning switch group of the integrator.

[0093] If the difference If the value is zero, the current fine-tuning code remains unchanged, and the subsequent adjustment process is terminated. A value of zero indicates that the mean of the main diagonal elements under the current capacitor configuration has reached a local minimum, and further adjustments cannot reduce the deviation. Therefore, the fine-tuning process is terminated, and the current fine-tuning code is latched as the final compensation configuration.

[0094] The fine-tuning code, after determining the polarity, is output to the integrator as the control instruction for the next stage of adjustment. After determining the polarity for the next stage of adjustment, the processor writes the fine-tuning code, after addition and subtraction operations, into the fine-tuning register group of the integrator. After writing, it restarts the process of waiting for two power frequency cycles and re-acquiring the pulse sequence, repeatedly performing adjustment and judgment until the difference is found. The value is zero or the fine-tuning code reaches the adjustment range boundary value. When the fine-tuning code reaches the adjustment range boundary value, if the current difference is zero... The value is still negative and needs positive adjustment, but the fine-tuning code has already reached the maximum value, or the current difference. If the value is still positive and needs to be adjusted in reverse, but the fine-tuning code is already at its minimum, then the adjustment process is terminated, and the current fine-tuning code is used as the final configuration.

[0095] See Figure 5 In the graph, the horizontal axis represents the number of compensation adjustment steps, ranging from 0 to approximately 600 steps, and the vertical axis is the mean of the main diagonal elements, expressed on a logarithmic scale, with values ​​ranging from approximately 10^1 to 10^-5. Two curves are plotted in the graph, corresponding to the coarse adjustment stage (solid line, blue) and the fine adjustment stage (dashed line, red), respectively. The legend is located at the top center of the graph.

[0096] During the coarse-tuning phase, the mean value of the main diagonal elements begins to decrease rapidly from approximately 8 × 10^-1. As the number of adjustment steps increases, the curve exhibits an exponential decay, indicating that the pulse deviation of the digital integrator's integrating capacitor state gradually decreases after adjustment using the coarse-tuning code, resulting in a significant improvement in compensation effectiveness. When the number of adjustment steps in the coarse-tuning phase is approximately 80, the curve experiences brief fluctuations and a slower decline, indicating that the coarse-tuning steps are stabilizing and the error compensation is converging.

[0097] After entering the fine-tuning stage, the mean value of the main diagonal elements, which started from approximately 10^-2 at the end of the coarse-tuning, gradually decreased to below 10^-5 as the number of adjustment steps increased from about 80 to around 600. This demonstrates the fine-tuning effect of the code decomposition on the integral capacitor, further reducing the error and significantly improving the compensation accuracy. The curve fluctuations in the fine-tuning stage are significantly greater than in the coarse-tuning stage, reflecting smaller fine-tuning steps, a more delicate adjustment process, and higher control precision.

[0098] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application.

Claims

1. An automatic error compensation calibration method for energy meters based on bench testing, characterized in that, include: Acquire the high-frequency pulse sequence and low-frequency pulse sequence generated by the tested energy meter under stable output of the test platform; Extract the time interval between adjacent pulses in a high-frequency pulse sequence to generate a high-frequency interval sequence; extract the time interval between adjacent pulses in a low-frequency pulse sequence to generate a low-frequency interval sequence. Align the high-frequency interval sequence and the low-frequency interval sequence along the time axis, calculate the difference at each corresponding point, and construct the pulse deviation matrix. The error type is determined based on the sign distribution pattern of each row vector in the pulse deviation matrix, and the error type includes phase lag error and phase lead error; Extract the corresponding compensation coefficient vector from the preset compensation mapping table according to the error type; The compensation coefficient vector is decomposed into multi-level fine-tuning codes, and the switching state of the integrating capacitor of the digital integrator inside the tested energy meter is adjusted step by step. After each adjustment is completed, the pulse deviation matrix is ​​recalculated, and the polarity of the next adjustment is determined based on the convergence direction of the main diagonal elements in the deviation matrix.

2. The automatic error compensation calibration method for energy meters based on bench testing according to claim 1, characterized in that, The acquisition of the high-frequency pulse sequence and low-frequency pulse sequence generated by the tested energy meter under stable output of the platform is specifically as follows: Read the power frequency periodic synchronization signal output by the test platform, and use the rising edge of the synchronization signal as the starting trigger point; Start the high-frequency counter at the initial trigger point to count the high-frequency pulses, stop counting at the next rising edge of the synchronization signal, and record the counting result; The counting results are converted into time length values, which are used as the interval data of the corresponding pulses in the high-frequency pulse sequence; The synchronization signal itself is used as a low-frequency pulse, the period of which is determined by the power frequency output by the platform. Periodic values ​​are continuously extracted from the synchronization signal to form a low-frequency interval sequence.

3. The automatic error compensation calibration method for energy meters based on bench testing according to claim 1, characterized in that, The step of extracting the time interval between adjacent pulses in the high-frequency pulse sequence to generate a high-frequency interval sequence specifically involves: Continuously acquire the rising edge times of high-frequency pulses and record the absolute timestamp corresponding to each rising edge; Subtract the timestamps of two adjacent rising edges to obtain the value of a single high-frequency pulse interval; Calculate the interval values ​​of all adjacent pulse pairs in sequence and arrange them into a high-frequency interval sequence according to the order of their generation time; Median filtering is applied to the high-frequency interval sequence to remove outlier interval values ​​that exceed three standard deviations of the mean of adjacent intervals. The removed outlier values ​​are then replaced with the arithmetic mean of the preceding and following intervals.

4. The automatic error compensation calibration method for energy meters based on bench testing according to claim 1, characterized in that, The process of aligning the high-frequency interval sequence and the low-frequency interval sequence along the time axis specifically involves: The start and end times of the low-frequency interval within the same power frequency cycle are taken as the time window of that cycle; Extract all high-frequency interval values ​​whose timestamps fall within the given time window from the high-frequency interval sequence; If the number of high-frequency interval values ​​is not equal to the preset number of standard pulses within the period, zeros are padded at the beginning of the sequence or redundant interval values ​​are deleted at the end of the sequence to standardize the sequence length. The standardized high-frequency interval sequence is mapped one-to-many to the low-frequency interval values ​​of the same period, with one low-frequency interval value corresponding to multiple high-frequency interval values.

5. The automatic error compensation calibration method for energy meters based on bench testing according to claim 1, characterized in that, The process of calculating the difference at each corresponding point to construct the pulse deviation matrix is ​​as follows: The normalized ratio is obtained by dividing the high-frequency interval sequence within each low-frequency period by the corresponding low-frequency interval value. Subtract 1 from the normalized ratio and take the absolute value to obtain the individual deviation. Arrange all deviations within the same low-frequency cycle into a row vector according to the phase order of the high-frequency pulses; The row vectors of multiple consecutive low-frequency cycles are stacked in chronological order to form a two-dimensional pulse deviation matrix. The row number of the matrix corresponds to the low-frequency cycle number, and the column number corresponds to the phase position.

6. The automatic error compensation calibration method for energy meters based on bench testing according to claim 5, characterized in that, The method of determining the error type based on the sign distribution pattern of each row vector in the pulse deviation matrix is ​​as follows: Extract the positive and negative signs of the deviations of each row vector in the pulse deviation matrix, and group the deviations with the same sign into the same sign group; If the positive deviations in a row vector are concentrated at the beginning of the row and the number is greater than the number of positive deviations at the end of the row, then it is determined to be a phase lag error. If the negative deviations in a row vector are concentrated at the beginning of the row and the number of them is greater than the number of negative deviations at the end of the row, then it is determined to be a phase lead error. If positive and negative deviations alternate in the row vector and the frequency of alternation is higher than a preset threshold, it is determined to be a gain fluctuation error. The judgment results of three or more consecutive low-frequency cycles are voted on by majority vote, and the final error type is output.

7. The automatic error compensation calibration method for energy meters based on bench testing according to claim 1, characterized in that, The step of extracting the corresponding compensation coefficient vector from the preset compensation mapping table according to the error type is as follows: The compensation mapping table stores the correspondence between error type identifiers and compensation coefficient vectors. The compensation coefficient vectors include phase compensation coefficients and gain compensation coefficients. The compensation mapping table is searched using the error type as the index to obtain the initial value of the compensation coefficient vector that matches the current error type; Read the current temperature value of the tested energy meter and look up the temperature correction factor corresponding to that temperature value from the compensation mapping table; The corrected compensation coefficient vector is obtained by multiplying the phase compensation coefficient and gain compensation coefficient in the initial value of the compensation coefficient vector by the temperature correction factor.

8. The automatic error compensation calibration method for energy meters based on bench testing according to claim 1, characterized in that, The decomposition of the compensation coefficient vector into multi-level fine-tuning code is specifically as follows: The phase compensation coefficients in the compensation coefficient vector are split into high-order and low-order parts. The high-order part corresponds to the coarse adjustment step value, and the low-order part corresponds to the fine adjustment step value. The coarse adjustment step value and the fine adjustment step value are encoded into binary numeric codes respectively, with the coarse adjustment code having a smaller bit width than the fine adjustment code. The gain compensation coefficients are decomposed and encoded in the same way, and then concatenated with the binary digital code of phase compensation to form a multi-level fine-tuning code; Each level of fine-tuning code corresponds to the on / off state combination of an integrating capacitor switching switch of the digital integrator. The stepwise adjustment of the integrating capacitor switching state of the internal digital integrator of the tested energy meter is specifically as follows: First, send the coarse adjustment code corresponding to the coarse adjustment step value to the coarse adjustment switch group of the integrator to switch the coarse adjustment capacitor connection status; After waiting for two power frequency cycles, high-frequency pulse sequences and low-frequency pulse sequences are reacquired, and the mean of the main diagonal elements of the current pulse deviation matrix is ​​calculated. If the average value of the main diagonal elements is greater than the value before the previous adjustment, the coarse adjustment code is inverted bit by bit and resent to adjust the coarse adjustment capacitor connection status in the reverse direction. After the coarse adjustment is completed, the fine adjustment code is sent to the fine adjustment switch group of the integrator, and the fine adjustment capacitor is switched one by one according to the fine adjustment step value.

9. The automatic error compensation calibration method for energy meters based on bench testing according to claim 8, characterized in that, The determination of the polarity of the next level of adjustment based on the convergence direction of the main diagonal elements in the deviation matrix is ​​as follows: Calculate the difference between the mean of the main diagonal elements of the current pulse deviation matrix and the mean of the main diagonal elements before the previous adjustment; If the difference is positive, the polarity of the next level adjustment is reversed, and the binary value of the next level fine-tuning code is reduced by 1 before being output. If the difference is negative, the polarity of the next level adjustment is positive, and the binary value of the next level fine-tuning code is incremented by 1 and then output. If the difference is zero, keep the current fine-tuning code unchanged and terminate the subsequent adjustment process; The fine-tuning code, after determining the polarity, is output to the integrator as the control command for the next level of adjustment.

10. An automatic error compensation calibration system for electricity meters based on bench testing, comprising a memory, a processor, and a computer program stored in the memory and running on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the automatic error compensation calibration method for an energy meter based on a platform test as described in any one of claims 1 to 9.

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