A method, device and storage medium for dynamically switching charging protocols

Abstract

The application discloses a method and device for dynamically switching a charging protocol and a storage medium, and is used for protecting a transistor of an SoC chip. The method for dynamically switching the charging protocol comprises the following steps: acquiring charging parameters of the transistor of the SoC chip in real time, wherein the charging parameters comprise a frequency offset of a ring oscillator, a gate leakage current, a junction temperature and an HCI index; after the charging parameters are converted from analog signals to digital signals, taking the gate leakage current as a calibration factor, calibrating the frequency offset to obtain a calibration value; taking the junction temperature as a correction factor, correcting the calibration value to obtain a correction value; determining a target charging protocol matched at present according to a preset protocol mapping table, the correction value and the HCI index; and executing the target charging protocol.

Description

Technical Field

[0001] This application relates to the field of battery charging technology, and in particular to a method, apparatus and storage medium for dynamically switching charging protocols. Background Technology

[0002] High-power fast charging technology has become an industry standard in the consumer electronics field. Mainstream fast charging protocols such as Qualcomm QC, USB PD, QC4+, and PPS are widely used, bringing efficient charging experiences to devices. Existing fast charging technologies primarily use monitoring of the battery's internal resistance or temperature as a basis for regulation. Some solutions also set fixed temperature thresholds, reducing charging power when the detected temperature reaches preset values ​​such as 45°C. This achieves basic control over the charging process, forming an initial balance between fast charging speed and basic safety.

[0003] However, current high-power fast charging technologies, whether PMIC power management chips or CPU power supply modules, cannot effectively detect and evaluate the negative bias temperature instability (NBTI) and hot carrier injection (HCI) effects. Consequently, they cannot establish a dynamic matching relationship between transistor aging and charging parameters. In other words, they cannot quantify the aging degree of transistors inside the SoC chip of the device being charged. This causes the SoC chip to operate in a critical aging over-stress charging state for a long time, accelerating the aging and failure of the SoC chip. Summary of the Invention

[0004] To address the aforementioned technical issues, this application provides a method, apparatus, and storage medium for dynamically switching charging protocols to protect SoC chip transistors.

[0005] The technical solution provided in this application is described below:

[0006] The first aspect of this application provides a method for dynamically switching charging protocols, including: Real-time acquisition of the charging parameters of the transistors in the SoC chip, including the frequency offset of the ring oscillator, gate leakage current, junction temperature, and HCI index; After performing analog-to-digital conversion on the charging parameters, the frequency offset is calibrated using the gate leakage current as a calibration factor to obtain a calibration value. Using the junction temperature as a correction factor, the calibration value is safely corrected to obtain the corrected value; The target charging protocol is determined based on the preset protocol mapping table, the correction value, and the HCI index. Execute the target charging protocol.

[0007] Optionally, calibrating the frequency offset using the gate leakage current as a calibration factor to obtain a calibration value includes: If the frequency offset shows an upward trend and the gate leakage current shows a synchronous upward trend of the frequency offset, then the frequency offset is confirmed to be valid and the frequency offset is used as a calibration value. If the frequency offset and the gate leakage current show inconsistent trends, it is determined that the frequency offset is affected by noise interference. The charging parameters are then re-acquired and the frequency offset is calibrated.

[0008] Optionally, the step of using the junction temperature as a correction factor to perform a safety correction on the calibration value to obtain a corrected value includes: If the calibration value indicates that the current SoC chip transistor has reached the aging level, and the junction temperature is higher than a preset temperature threshold, then the aging level of the SoC chip transistor is increased, and the calibration value is corrected according to the increased aging level to obtain a corrected value. If the calibration value indicates that the current SoC chip transistor has reached the aging level, and the junction temperature is lower than or equal to the preset temperature threshold, then the current aging level of the SoC chip transistor is maintained, and the calibration value is used as the correction value. If the calibration value indicates that the transistors of the current SoC chip have not reached the aging level, and the junction temperature is higher than the safety limit, then the basic charging protocol will be forcibly executed or charging will be suspended.

[0009] Optionally, determining the currently matched target charging protocol based on a preset protocol mapping table, the correction value, and the HCI index includes: The correction value is compared with the first threshold and the second threshold in the preset protocol mapping table, and the HCI index is compared with the third threshold and the fourth threshold in the preset protocol mapping table. The first threshold and the second threshold are the classification judgment thresholds for the correction value, and the third threshold and the fourth threshold are the classification judgment thresholds for the HCI index. If the correction value is less than the first threshold and the HCI index is less than the third threshold, then the full-power fast charging protocol is matched. If the correction value is greater than or equal to the first threshold and less than or equal to the second threshold, or if the HCI index is greater than or equal to the third threshold and less than or equal to the fourth threshold, then the buck current limiting protocol is matched. If the correction value is greater than the second threshold, or the HCI index is greater than the fourth threshold, then the basic charging protocol is matched.

[0010] Optionally, the frequency offset is calculated using the following formula: Δf=|f0 ft| / f0, where Δf is the frequency offset, f0 is the factory reference frequency of the ring oscillator, and ft is the current frequency of the ring oscillator obtained in real time.

[0011] Optionally, executing the target charging protocol includes: The system sends execution commands to the charging IC via the I²C bus or SMBus system management bus, controlling the charging IC to switch voltage and / or current levels according to the target charging protocol within a preset time.

[0012] Optionally, after determining the currently matched target charging protocol, the method further includes: Send the charging mode corresponding to the target charging protocol to the user interface; When the frequency offset exceeds the preset aging intervention threshold multiple times consecutively, an NBTI warning is triggered and sent to the user interface.

[0013] A second aspect of this application provides a device for dynamically switching charging protocols, comprising: The real-time acquisition unit is used to acquire the charging parameters of the transistors of the SoC chip in real time. The charging parameters include the frequency offset of the ring oscillator, the gate leakage current, the junction temperature, and the HCI index. The calibration unit is used to calibrate the frequency offset by using the gate leakage current as a calibration factor after the charging parameters are converted from analog to digital, and to obtain a calibration value. A correction unit is used to perform a safety correction on the calibration value using the junction temperature as a correction factor to obtain a corrected value. The determining unit is used to determine the currently matched target charging protocol based on a preset protocol mapping table, the correction value, and the HCI index. An execution unit is used to execute the target charging protocol.

[0014] A third aspect of this application provides an apparatus for dynamically switching charging protocols, the apparatus comprising: Processor, memory, input / output units, and bus; The processor is connected to the memory, the input / output unit, and the bus; The memory stores a program that the processor invokes to execute the method of the first aspect and any optional one of the first aspects of the dynamic switching charging protocol.

[0015] A fourth aspect of this application provides a computer-readable storage medium storing a program that, when executed on a computer, performs the method of the first aspect and any optional one of the first aspects of the dynamic switching charging protocol.

[0016] As can be seen from the above technical solutions, this application has the following beneficial effects: This application provides a method for dynamically switching charging protocols. It acquires multi-dimensional charging parameters of the SoC chip transistors in real time, using gate leakage current as a calibration factor and junction temperature as a correction factor, and performs dual processing on the frequency offset to quantify the aging degree of the SoC chip transistors. Then, it dynamically matches the charging protocol best suited to the current chip health state using a preset protocol mapping table. This establishes a dynamic matching relationship between aging degree and charging parameters at the SoC transistor level, effectively mitigating the damage to transistors caused by NBTI and HCI effects. Simultaneously, it ensures that the charging power always matches the actual aging state of the SoC chip, reducing the aging failure rate of the SoC chip. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 A schematic flowchart of an embodiment of the method for dynamically switching charging protocols provided in this application; Figure 2 A schematic flowchart of another embodiment of the method for dynamically switching charging protocols provided in this application; Figure 3 A schematic flowchart of another embodiment of the method for dynamically switching charging protocols provided in this application; Figure 4 A schematic flowchart of another embodiment of the method for dynamically switching charging protocols provided in this application; Figure 5 A schematic diagram of an embodiment of the device for dynamically switching charging protocols provided in this application; Figure 6 A schematic diagram of another embodiment of the device for dynamically switching charging protocols provided in this application. Detailed Implementation

[0019] This application provides a method, apparatus, and storage medium for dynamically switching charging protocols to protect SoC chip transistors.

[0020] It should be noted that the method for dynamically switching charging protocols provided in this application can be applied to terminals, systems, and servers. For example, a terminal can be a smartphone, computer, tablet computer, portable computer terminal, or a desktop computer or other fixed terminal.

[0021] It should also be noted that the terms "first," "second," etc., in the specification and drawings are used to distinguish similar objects and are not necessarily used to describe a specific order, sequence, or importance.

[0022] Please see Figure 1 This application first provides an embodiment of a method for dynamically switching charging protocols, the method comprising: Step S101: Real-time acquisition of the charging parameters of the transistors in the SoC chip, including the frequency offset of the ring oscillator, gate leakage current, junction temperature, and HCI index. Step S102: After performing analog-to-digital conversion on the charging parameters, the frequency offset is calibrated using the gate leakage current as a calibration factor to obtain the calibration value. Step S103: Using junction temperature as a correction factor, perform a safety correction on the calibration value to obtain the corrected value; Step S104: Determine the target charging protocol to be matched based on the preset protocol mapping table, correction value and HCI index; Step S105: Execute the target charging protocol.

[0023] In step S101 of this embodiment, the charging parameters of the SoC chip transistors are acquired in real time. These charging parameters include the frequency offset of the ring oscillator, gate leakage current, junction temperature, and HCI index. Real-time acquisition is performed through a sensor layer integrated within the SoC's PMIC power management chip. The acquired charging parameters mainly include data such as the frequency offset of the ring oscillator, gate leakage current, junction temperature, and HCI index. Specifically, the frequency offset is calculated using the following formula: Δf = |f0| ft| / f0, where Δf is the frequency offset, f0 is the factory reference frequency of the ring oscillator, and ft is the current frequency of the ring oscillator acquired in real time. Therefore, the actual frequency acquired is the current frequency of the ring oscillator. The analog gate leakage current signal is acquired in real time using a voltage sensor, and the transistor junction temperature is accurately acquired using a temperature sensor. All of the above acquisition processes are continuously completed at a sampling frequency of once every 10ms. In addition, the peak gate current, transistor switching frequency, and drain-source voltage should also be acquired. Based on the acquired peak gate current, transistor switching frequency, and drain-source voltage, the HCI index is calculated using an empirical formula. This HCI index complements the frequency offset, quantifying the transistor's transient switching stress and long-term DC stress damage, respectively. Finally, a full-dimensional charging parameter dataset is formed, including time-synchronized frequency offset, gate leakage current, junction temperature, and HCI index.

[0024] It should also be noted that the acquisition of all charging parameters is carried out synchronously with the charging process. The acquired analog signals are directly transmitted to the PMIC data processing layer without the need for additional external hardware intervention, ensuring the real-time and synchronous nature of parameter acquisition. That is, the acquired raw data is temporarily stored in a register and is accompanied by a timestamp.

[0025] In step S102 of the embodiment, after the charging parameters are converted from analog to digital, the frequency offset is calibrated using the gate leakage current as a calibration factor to obtain a calibration value. The collected analog charging parameters such as frequency offset, gate leakage current, junction temperature, and HCI index are uniformly converted by an ADC to digital aging evaluation parameters that can be recognized by subsequent processing modules. The conversion process uses 12 bits or more of precision to avoid conversion errors affecting the results of subsequent parameter processing.

[0026] After analog-to-digital conversion, the frequency offset is verified and calibrated using the gate leakage current as the core calibration factor. The core logic of the calibration is to determine the consistency of the trends of the two. If the frequency offset and the gate leakage current both show an upward trend, it indicates that the frequency offset can truly reflect the aging state of the transistor, and the frequency offset is directly used as the calibration value. If the trends of the two are inconsistent, it is determined that the parameter is abnormal due to external noise interference. At this time, a resampling process is triggered to collect the charging parameters again and repeat the analog-to-digital conversion steps until a valid parameter with a consistent trend is obtained. Then, the final frequency offset calibration value is determined to ensure that the calibration value can accurately characterize the actual aging degree of the transistor.

[0027] In step S103 of the embodiment, the junction temperature is used as a correction factor to perform a safety correction on the calibration value, resulting in a corrected value. Since the aging rate of NBTI and HCI is exponentially related to temperature, the actual aging degree corresponding to the same frequency offset varies significantly at different junction temperatures. Therefore, using junction temperature as an aging degree correction factor, based on the characteristic that the aging rate of transistor NBTI / HCI is exponentially related to temperature, the calibration value of the frequency offset is specifically and safely corrected. The correction process follows the principle that, for the same calibration value, the higher the junction temperature, the more severe the aging degree determination. While performing aging correction through junction temperature, the junction temperature also serves as a safety protection fallback function. During the correction process, it is simultaneously determined whether the junction temperature exceeds a preset safety limit. If the junction temperature exceeds this safety limit, regardless of the range of the calibration value, the calibration value will be directly corrected to the limit, triggering the highest level of aging protection determination; if the junction temperature is within the safe range, the calibration value correction is only completed according to the conventional correspondence between temperature and aging rate, ultimately outputting a frequency offset correction value that takes into account both the actual aging state and temperature safety.

[0028] In step S104 of the embodiment, the target charging protocol for the current matching is determined according to the preset protocol mapping table, correction value, and HCI index. The protocol mapping table preset in the decision module is retrieved. This protocol mapping table presets the basic matching relationship between the frequency offset correction value and different fast charging protocols. Under the premise of basic matching, the protocol is accurately matched by combining the HCI index, realizing dual adaptation to the two aging effects of NBTI and HCI. Specifically: if the correction value reflects a high degree of NBTI aging but a low HCI index, i.e., a high-load low-frequency switching scenario, the corresponding fast charging protocol is directly matched according to the correction value; if the correction value is within the normal range but the HCI index is abnormally high, i.e., a low-load high-frequency switching scenario, the protocol parameters are specifically adjusted based on the basic matching protocol, or the fast charging protocol that is more friendly to HCI aging is switched; if both the correction value and the HCI index show a high degree of aging, the most conservative low-voltage fast charging protocol is matched to ensure that the target charging protocol is fully adapted to the overall aging state of the transistor.

[0029] In step S105 of this embodiment, the target charging protocol is executed. It should be noted that executing the target charging protocol includes: sending an execution command to the charging IC via the I²C bus or SMBus system management bus, controlling the charging IC to switch voltage and / or current levels according to the target charging protocol within a preset time. The preset time can be set to 20ms, or can be set according to actual needs without limitation. The execution command includes the identifier parameter of the target fast charging protocol, such as 0x34 representing QC3.0. When switching voltage and / or current levels, the smooth switching of charging electrical parameters is achieved by adjusting the PWM duty cycle, avoiding secondary damage to the SoC chip and battery caused by parameter abrupt changes.

[0030] Optionally, after determining the target charging protocol, the system further includes: sending the charging mode corresponding to the target charging protocol to the user interface; and triggering an NBTI warning and sending it to the user interface when the frequency offset exceeds a preset aging intervention threshold multiple times consecutively. After the charging IC completes the protocol switching and parameter adjustment, it sends a protocol switching confirmation signal to the SoC's PMIC. Upon receiving the confirmation signal, the PMIC continues to detect charging parameters according to the target protocol standard. Simultaneously, the protocol switching module sends a preset status code to the device's user interface. After receiving the status code, the user interface displays the corresponding visual prompt information in real time. Furthermore, after calibrating and correcting the frequency offset, the system continuously monitors the change in the corrected frequency offset value. When this value exceeds the system's preset aging intervention threshold for multiple consecutive sampling periods, the NBTI warning mechanism is immediately triggered, and the NBTI warning signal is simultaneously transmitted to the device's user interface, completing the real-time push of warning information. This allows users to be aware of the NBTI aging status of the SoC chip transistors in a timely manner. After the warning is triggered, the system will directly start the subsequent charging protocol matching and switching process, achieving preventive protection against NBTI aging.

[0031] The dynamic switching charging protocol method of this application first acquires multi-dimensional charging parameters of the SoC chip transistors in real time. Using the gate leakage current and junction temperature in the charging parameters as calibration factors and correction factors as correction factors, the frequency offset is processed in two ways to quantify the aging degree of the SoC chip transistors. Then, it dynamically matches the charging protocol that best suits the current chip health state by combining a preset protocol mapping table. This establishes a dynamic matching relationship between the aging degree and charging parameters at the SoC transistor level, effectively mitigating the damage to transistors caused by NBTI and HCI effects. At the same time, it ensures that the charging power is always adapted to the actual aging state of the SoC chip, reducing the aging failure rate of the SoC chip.

[0032] Reference Figure 2 According to some embodiments of this application, step S102, which uses the gate leakage current as a calibration factor to calibrate the frequency offset and obtain a calibration value, may specifically include, but is not limited to, the following: Step S201: If the frequency offset shows an upward trend and the gate leakage current shows an upward trend synchronous with the frequency offset, then the frequency offset is confirmed to be valid, and the frequency offset is used as the calibration value. In step S202, if the trends of frequency offset and gate leakage current are inconsistent, it is determined that the frequency offset is affected by noise interference. The charging parameters are then re-acquired and the frequency offset is calibrated.

[0033] In steps S201 to S202 of the embodiment, after the analog-to-digital conversion of the charging parameters is completed, the digital change trends of the frequency offset and gate leakage current are synchronously compared and analyzed. Because the NBTI effect can simultaneously cause an increase in transistor frequency offset and an increase in gate oxide layer defects, thereby leading to an increase in gate leakage current, the effectiveness of the frequency offset can be verified. Specifically, frequency offset and gate leakage current data from multiple consecutive sampling periods are extracted, and their change curves are generated respectively. If both curves show a clear upward trend, and the time nodes and amplitude changes of the rise are synchronous, it is determined that the change in frequency offset is caused by actual transistor aging rather than external interference, and the frequency offset after analog-to-digital conversion is directly determined as the calibration value. This determination process should pre-set a reasonable fluctuation tolerance range, and small parameter fluctuations should not be judged as inconsistent trends to avoid misjudgment due to slight signal fluctuations during the sampling process, ensuring the accuracy and stability of the calibration value determination; at the same time, the confirmed calibration value will be stored in real time in the data processing module and correlated with parameters such as junction temperature and HCI index.

[0034] If the frequency offset and gate leakage current curves are out of sync and their amplitude changes are uncorrelated, it can be determined that the frequency offset is affected by noise factors such as environmental electromagnetic interference and abnormal temporary sensor signals. Its value cannot accurately reflect the actual aging state of the transistor. In this case, the invalid frequency offset data will be discarded and not used as a calibration value. Then, the charging parameter re-acquisition process is immediately triggered, re-acquiring all dimensions of charging parameters such as frequency offset, gate leakage current, junction temperature, and HCI index. The newly acquired parameters undergo analog-to-digital conversion and trend comparison operations until valid parameters with synchronized trends are obtained and the calibration value is determined. The entire recalibration process is seamless, without interrupting real-time parameter monitoring during fast charging or affecting subsequent steps. It should be noted that in the above-mentioned out-of-sync situation, if the device is under high-load fast charging and the frequency offset curve follows a normal trend, but the gate leakage current curve shows an abnormally increasing trend, it indicates that the SoC chip transistor has reached its aging state, and an HCI protection strategy should be triggered, such as reducing the switching frequency.

[0035] Steps S201 to S202 verify the synchronization of the changing trends of gate leakage current and frequency offset, thereby achieving accurate calibration of the validity of frequency offset. This can confirm the frequency offset caused by the actual NBTI aging of the transistor and use it as a valid calibration value. It can also accurately identify invalid frequency offsets affected by noise interference and trigger a re-acquisition and calibration process, effectively avoiding parameter misjudgment problems caused by environmental electromagnetic interference, temporary abnormal sensor signals, and other factors.

[0036] Reference Figure 3According to some embodiments of this application, step S103, which uses junction temperature as a correction factor to perform a safety correction on the calibration value, may specifically include, but is not limited to, the following: Step S301: If the calibration value indicates that the current SoC chip transistor has reached the aging level and the junction temperature is higher than the preset temperature threshold, then the aging level of the SoC chip transistor is increased, and the calibration value is corrected according to the increased aging level to obtain the corrected value. Step S302: If the calibration value indicates that the current SoC chip transistor has reached the aging level and the junction temperature is lower than or equal to the preset temperature threshold, then the aging level of the current SoC chip transistor is maintained, and the calibration value is used as the correction value. Step S303: If the calibration value indicates that the transistors of the current SoC chip have not reached the aging level and the junction temperature is higher than the safety limit, then the basic charging protocol is forcibly executed or charging is paused.

[0037] In steps S301 to S303 of the embodiment, the initial aging level of the SoC chip transistors is first determined based on the calibration value. After confirming that the transistors have reached the aging level, the real-time junction temperature data is retrieved and compared with a preset temperature threshold. When the junction temperature is detected to be higher than the preset temperature threshold, the current aging level is upgraded based on the physical characteristic that the NBTI / HCI aging rate is exponentially related to temperature. For example, mild aging is upgraded to moderate aging, and moderate aging is upgraded to severe aging. After the aging level upgrade is completed, the system will correct the calibration value according to the preset temperature-aging weighting rule. By amplifying the aging characterization of the calibration value through numerical weighting, a corrected value matching the upgraded aging level is finally obtained. This corrected value can better reflect the actual aging state of the transistors under high temperature conditions. The preset temperature threshold is pre-calibrated according to the transistor process characteristics. Different SoC chips with different processes correspond to different temperature threshold standards to ensure the rationality of the aging level upgrade and avoid excessive transistor damage due to the protocol matching being too loose because the accelerating effect of temperature on aging is not considered at high temperatures.

[0038] When the junction temperature is detected to be below or equal to the threshold, it is determined that the current temperature environment does not significantly accelerate transistor aging, and the actual aging state of the transistor is consistent with the aging degree characterized by the calibration value. Therefore, there is no need to adjust the aging degree level, and the initially determined aging level is maintained. After determining to maintain the current aging degree level, the calibration value after gate leakage current calibration is directly used as the correction value, without the need for additional numerical weighting or adjustment, ensuring the simplicity and efficiency of parameter processing. This correction value is directly passed as a core parameter to the protocol mapping table matching stage, ensuring that under normal temperature aging scenarios, the charging protocol matching can accurately match the actual aging state of the transistor.

[0039] When the SoC chip transistors are determined to be within their aging range, a junction temperature safety threshold check is triggered. This involves retrieving real-time junction temperature data and comparing it to a preset safety limit. If the junction temperature exceeds this limit, it indicates that the transistor's operating temperature during fast charging has exceeded the safe range. Even if the chip has not aged, high temperatures can cause irreversible electrical stress damage to the transistors. Therefore, aging parameters are not required, and the highest level of safety protection is activated directly. After triggering the safety protection mechanism, a forced protocol switching command is sent to the charging IC, directly switching the current fast charging protocol to the basic charging protocol. The basic charging protocol is a low-voltage, low-current conventional charging mode, which minimizes the transistor's workload. If the junction temperature exceeds the safety limit by a significant margin, a pause charging command is sent until the junction temperature drops to a safe range before resuming basic charging. The entire operation does not require protocol mapping table matching, has an extremely short response time, and simultaneously feeds back the reason for the forced switch / pause charging and the current junction temperature data to the user interface, providing a visual indication of the safety status.

[0040] Steps S301 to S303 combine junction temperature characteristics and transistor aging degree determination results to correct the frequency offset calibration value. Based on the exponential acceleration effect of junction temperature on aging, the aging level is increased and the calibration value is corrected when the transistor is aged and the junction temperature exceeds the threshold, so that the parameters can accurately match the actual aging state under high temperature. When the transistor is aged but the junction temperature is normal, the original calibration value is maintained to ensure the rationality of parameter correction. At the same time, a fallback protection of junction temperature safety limit is set. When the transistor is not aged but the junction temperature exceeds the limit, the basic charging protocol is forcibly executed or charging is suspended to avoid irreversible damage to the chip caused by high temperature.

[0041] Reference Figure 4 According to some embodiments of this application, the step S104 of determining the currently matched target charging protocol based on a preset protocol mapping table, correction value, and HCI index may specifically include, but is not limited to, the following: Step S401: Compare the correction value with the first and second thresholds in the preset protocol mapping table, and compare the HCI index with the third and fourth thresholds in the preset protocol mapping table. Step S402: If the correction value is less than the first threshold and the HCI index is less than the third threshold, then the full-power fast charging protocol is matched. Step S403: If the correction value is greater than or equal to the first threshold and less than or equal to the second threshold, or the HCI index is greater than or equal to the third threshold and less than or equal to the fourth threshold, then the buck current limiting protocol is matched. Step S404: If the correction value is greater than the second threshold, or the HCI index is greater than the fourth threshold, then the basic charging protocol is matched.

[0042] In steps S401 to S404 of the embodiment, a preset protocol mapping table has been pre-defined with multiple sets of thresholds corresponding to the degree of aging based on the aging characteristics of the SoC chip transistors. The first and second thresholds are grading thresholds for the correction value, and the third and fourth thresholds are grading thresholds for the HCI index. Each threshold is pre-set in conjunction with the critical values ​​of transistor NBTI and HCI aging damage. Generally, the first threshold can be set to 2%, the second threshold to 5%, the third threshold to 0.1%, and the fourth threshold to 0.3. Specifically, the correction value is precisely compared with the first and second thresholds in the protocol mapping table, and the real-time calculated HCI index is synchronously compared with the third and fourth thresholds in the mapping table to obtain the threshold range assignment results for the correction value and the HCI index, respectively.

[0043] When the frequency offset correction value is less than the first threshold, it indicates that the NBTI aging level of the SoC chip transistor is at an extremely low level, the NBTI effect is slight, the threshold voltage drift is negligible, and it does not significantly affect the chip performance. Simultaneously, when the HCI index is less than the third threshold, it indicates that the transistor is in a healthy state within its design life, and the transistor's switching transient stress damage is also within a safe range. The current overall aging level of the transistor is extremely low and can withstand the electrical stress of full-power fast charging. Based on the above dual-safety judgment results, the decision module directly matches the full-power fast charging protocol from the preset protocol mapping table. This protocol is the highest-specification fast charging protocol supported by the device, such as QC4+ or PPS high-power mode, maintaining the highest voltage / current level to maximize fast charging efficiency. After matching, the corresponding protocol execution instruction is immediately generated, and the full-power fast charging status information is temporarily stored to prepare for subsequent protocol execution and status feedback, ensuring that the efficient charging advantages of fast charging technology are fully utilized when the chip is in good condition.

[0044] If the correction value is greater than or equal to the first threshold and less than or equal to the second threshold, it indicates that the NBTI effect is significant, the threshold voltage drift reaches 5%~10% of the initial value, the transistor transconductance begins to decrease, the on-resistance increases, and the transistor exhibits mild to moderate NBTI aging, making it unsuitable for full-power fast charging. Alternatively, if the HCI index is greater than or equal to the third threshold and less than or equal to the fourth threshold, it indicates that the transistor has suffered a certain degree of switching transient stress damage, and the charging electrical stress should be reduced, i.e., the fast charging power should be specifically limited. For the above situations, a buck-current limiting fast charging protocol, such as QC3.0, should be matched. This protocol reduces the charging voltage and limits the charging current, reducing the transistor's operating electrical stress, which can both alleviate the continued development of NBTI aging and reduce further damage from the HCI effect, achieving preventative protection for the chip.

[0045] When the correction value exceeds the second threshold, it indicates that the transistor's NBTI aging has reached a severe level, meaning the NBTI effect is serious and the threshold voltage drift may exceed 15%. Transistor performance degrades significantly, switching speed slows, and dynamic power consumption increases; continued use of fast charging protocols will drastically accelerate chip failure. Alternatively, if the HCI index exceeds the fourth threshold, it indicates that the transistor's transient switching stress damage is approaching a critical value; high-power fast charging will cause irreversible hardware damage, and charging electrical stress should be thoroughly reduced. Based on the above severe aging judgment results, a basic charging protocol is directly matched. This basic charging protocol is a low-voltage, low-current conventional charging mode, such as 5V and 1A, which can minimize the transistor's workload, reduce the continuous damage of electrical stress to aging transistors from the root, and delay the chip failure process. The basic charging protocol is matched and locked until the chip transistor's aging parameters decline, and this matching result takes precedence over other judgment logic to ensure the highest level of hardware protection when the chip is severely aged.

[0046] Steps S401 to S404 establish a two-dimensional threshold comparison logic between the correction value and the HCI index, combined with a preset protocol mapping table, to achieve accurate and hierarchical matching of fast charging protocols. This not only incorporates the correction value reflecting NBTI aging and the HCI index reflecting HCI aging into the same judgment system, solving the problem that traditional technologies cannot simultaneously adapt to the two transistor aging effects, but also achieves a tiered matching of three levels of protocols—full-power fast charging, buck current limiting, and basic charging—through multi-threshold division. This ensures that the charging protocol is highly compatible with the overall aging state of the SoC chip transistors, avoiding over-protection that could affect the user's fast charging experience and significantly improving the long-term reliability of the SoC chip and the device.

[0047] The above embodiments illustrate the method for dynamically switching charging protocols provided in this application. The apparatus and storage medium for dynamically switching charging protocols provided in this application are described below: Please see Figure 5 This application provides an embodiment of a device for dynamically switching charging protocols, the device comprising: The real-time acquisition unit 501 is used to acquire the charging parameters of the transistors of the SoC chip in real time. The charging parameters include the frequency offset of the ring oscillator, the gate leakage current, the junction temperature, and the HCI index. The calibration unit 502 is used to calibrate the frequency offset by using the gate leakage current as a calibration factor after the charging parameters are converted from analog to digital, and obtain the calibration value. The correction unit 503 is used to perform a safety correction on the calibration value using the junction temperature as a correction factor to obtain the corrected value. The determining unit 504 is used to determine the target charging protocol currently matched based on a preset protocol mapping table, correction value and HCI index; Execution unit 505 is used to execute the target charging protocol.

[0048] Optionally, calibration unit 502 is specifically used for: If the frequency offset shows an upward trend and the gate leakage current shows an upward trend synchronous with the frequency offset, then the frequency offset is confirmed to be valid and the frequency offset is used as the calibration value. If the trends of frequency offset and gate leakage current are inconsistent, it is determined that the frequency offset is affected by noise interference. The charging parameters are then reacquired and the frequency offset is calibrated.

[0049] Optionally, the correction unit 503 is specifically used for: If the calibration value indicates that the transistor of the current SoC chip has reached the aging level and the junction temperature is higher than the preset temperature threshold, then the aging level of the SoC chip transistor is increased, and the calibration value is corrected according to the increased aging level to obtain the corrected value. If the calibration value indicates that the current SoC chip transistor has reached the aging level and the junction temperature is lower than or equal to the preset temperature threshold, then the aging level of the current SoC chip transistor is maintained, and the calibration value is used as the correction value. If the calibration value indicates that the transistors of the current SoC chip have not reached the aging level and the junction temperature is higher than the safety limit, then the basic charging protocol will be enforced or charging will be paused.

[0050] Optionally, the determining unit 504 is specifically used for: The correction value is compared with the first and second thresholds in the preset protocol mapping table, and the HCI index is compared with the third and fourth thresholds in the preset protocol mapping table. The first and second thresholds are the classification judgment thresholds for the correction value, and the third and fourth thresholds are the classification judgment thresholds for the HCI index. If the correction value is less than the first threshold and the HCI index is less than the third threshold, then the full-power fast charging protocol is matched. If the correction value is greater than or equal to the first threshold and less than or equal to the second threshold, or the HCI index is greater than or equal to the third threshold and less than or equal to the fourth threshold, then the buck current limiting protocol is matched. If the correction value is greater than the second threshold, or the HCI index is greater than the fourth threshold, then the basic charging protocol is matched.

[0051] Optionally, the frequency offset is calculated using the following formula: Δf=|f0 ft| / f0, where Δf is the frequency offset, f0 is the factory reference frequency of the ring oscillator, and ft is the current frequency of the ring oscillator obtained in real time.

[0052] Optionally, execution unit 505 is specifically used for: The system sends execution commands to the charging IC via the I²C bus or SMBus system management bus, controlling the charging IC to switch voltage and / or current levels according to the target charging protocol within a preset time.

[0053] Optionally, after determining unit 504, the following may also be included: The sending unit 506 is used to send the charging mode corresponding to the target charging protocol to the user interface; The trigger warning unit 507 is used to trigger an NBTI warning and send it to the user interface when the frequency offset exceeds the preset aging intervention threshold multiple times in a row.

[0054] Please see Figure 6 This application also provides a device for dynamically switching charging protocols, comprising: Processor 601, memory 602, input / output unit 603, bus 604; The processor 601 is connected to the memory 602, the input / output unit 603, and the bus 604; The memory 602 stores a program, and the processor 601 calls the program to execute it, such as... Figure 1 , Figure 2 , Figure 3 or Figure 4 The method for dynamically switching charging protocols is shown in the embodiment.

[0055] This application also relates to a computer-readable storage medium on which a program is stored, which, when run on a computer, causes the computer to perform actions such as... Figure 1 , Figure 2 , Figure 3 or Figure 4 The method for dynamically switching charging protocols is shown in the embodiment.

[0056] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0057] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection between apparatuses or units through some interfaces, and may be electrical, mechanical, or other forms.

[0058] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0059] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0060] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

Claims

1. A method for dynamically switching charging protocols, characterized in that, The method includes: Real-time acquisition of the charging parameters of the transistors in the SoC chip, including the frequency offset of the ring oscillator, gate leakage current, junction temperature, and HCI index; After performing analog-to-digital conversion on the charging parameters, the frequency offset is calibrated using the gate leakage current as a calibration factor to obtain a calibration value. Using the junction temperature as a correction factor, the calibration value is safely corrected to obtain the corrected value; The target charging protocol is determined based on the preset protocol mapping table, the correction value, and the HCI index. Execute the target charging protocol.

2. The method according to claim 1, characterized in that, The step of calibrating the frequency offset using the gate leakage current as a calibration factor to obtain the calibration value includes: If the frequency offset shows an upward trend and the gate leakage current shows a synchronous upward trend of the frequency offset, then the frequency offset is confirmed to be valid and the frequency offset is used as a calibration value. If the frequency offset and the gate leakage current show inconsistent trends, it is determined that the frequency offset is affected by noise interference. The charging parameters are then re-acquired and the frequency offset is calibrated.

3. The method according to claim 1, characterized in that, The step of using the junction temperature as a correction factor to perform a safety correction on the calibration value to obtain a corrected value includes: If the calibration value indicates that the current SoC chip transistor has reached the aging level, and the junction temperature is higher than a preset temperature threshold, then the aging level of the SoC chip transistor is increased, and the calibration value is corrected according to the increased aging level to obtain a corrected value. If the calibration value indicates that the current SoC chip transistor has reached the aging level, and the junction temperature is lower than or equal to the preset temperature threshold, then the current aging level of the SoC chip transistor is maintained, and the calibration value is used as the correction value. If the calibration value indicates that the transistors of the current SoC chip have not reached the aging level, and the junction temperature is higher than the safety limit, then the basic charging protocol will be forcibly executed or charging will be suspended.

4. The method according to claim 1, characterized in that, The step of determining the currently matched target charging protocol based on the preset protocol mapping table, the correction value, and the HCI index includes: The correction value is compared with the first threshold and the second threshold in the preset protocol mapping table, and the HCI index is compared with the third threshold and the fourth threshold in the preset protocol mapping table. The first threshold and the second threshold are the classification judgment thresholds for the correction value, and the third threshold and the fourth threshold are the classification judgment thresholds for the HCI index. If the correction value is less than the first threshold and the HCI index is less than the third threshold, then the full-power fast charging protocol is matched. If the correction value is greater than or equal to the first threshold and less than or equal to the second threshold, or if the HCI index is greater than or equal to the third threshold and less than or equal to the fourth threshold, then the buck current limiting protocol is matched. If the correction value is greater than the second threshold, or the HCI index is greater than the fourth threshold, then the basic charging protocol is matched.

5. The method according to any one of claims 1-4, characterized in that, The frequency offset is calculated using the following formula: Δf=|f0 ft| / f0, where Δf is the frequency offset, f0 is the factory reference frequency of the ring oscillator, and ft is the current frequency of the ring oscillator obtained in real time.

6. The method according to any one of claims 1-4, characterized in that, The execution of the target charging protocol includes: The system sends execution commands to the charging IC via the I²C bus or SMBus system management bus, controlling the charging IC to switch voltage and / or current levels according to the target charging protocol within a preset time.

7. The method according to any one of claims 1-4, characterized in that, After determining the currently matched target charging protocol, the method further includes: Send the charging mode corresponding to the target charging protocol to the user interface; When the frequency offset exceeds the preset aging intervention threshold multiple times consecutively, an NBTI warning is triggered and sent to the user interface.

8. A device for dynamically switching charging protocols, characterized in that, The device for dynamically switching charging protocols includes: The real-time acquisition unit is used to acquire the charging parameters of the transistors of the SoC chip in real time. The charging parameters include the frequency offset of the ring oscillator, the gate leakage current, the junction temperature, and the HCI index. The calibration unit is used to calibrate the frequency offset by using the gate leakage current as a calibration factor after the charging parameters are converted from analog to digital, and to obtain a calibration value. The correction unit is used to perform a safety correction on the calibration value using the junction temperature as a correction factor to obtain a corrected value; The determining unit is used to determine the currently matched target charging protocol based on a preset protocol mapping table, the correction value, and the HCI index. An execution unit is used to execute the target charging protocol.

9. A device for dynamically switching charging protocols, characterized in that, The device includes: Processor, memory, input / output units, and bus; The processor is connected to the memory, the input / output unit, and the bus; The memory stores a program, which the processor calls to execute the method of the dynamic switching charging protocol as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium contains a program that, when executed on a computer, performs the method of dynamically switching charging protocols as described in any one of claims 1 to 7.

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