Display panel and display device

Abstract

The application discloses a display panel and a display device, and belongs to the technical field of display. A second cathode layer is arranged on a first cathode layer, the second cathode layer enhances the conductivity to reduce the overall cathode resistance, thereby relieving display voltage drop. A transparent partition part corresponds to a pixel unit, the optical influence of the transparent partition part corresponds to the whole pixel unit, the overall light-emitting uniformity of the pixel unit is ensured, optical compensation and process debugging in the later stage are facilitated, yield and display consistency are improved, the transparent partition part reduces the process requirement, and the implementability is relatively high.

Description

Technical Field

[0001] This application relates to the field of display technology, and more particularly to a display panel and display device. Background Technology

[0002] Most mainstream organic light-emitting diode (OLED) displays currently use a top-emitting structure. Top-emitting structures require the cathode to have sufficient light transmittance. This requirement necessitates the use of special materials or a thinner film thickness for the cathode, which increases the cathode resistance and leads to voltage drop issues in the display.

[0003] Therefore, how to improve the cathode voltage drop problem is a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0004] This application provides a display panel and a display device to at least partially solve the above-mentioned technical problems.

[0005] To achieve the above objectives, according to a first aspect of this application, a display panel is provided, comprising: Light-emitting device layer; The first cathode layer is disposed on the light-emitting side of the light-emitting device layer; Multiple transparent partitions are disposed on the side of the first cathode layer away from the light-emitting device layer; The second cathode layer is disposed on the side of the first cathode layer away from the light-emitting device layer, and includes a plurality of patterned cathode structures. The display panel includes multiple pixel units, each pixel unit includes multiple sub-pixels, the transparent partition is disposed on the light-emitting side of the pixel unit, and the cathode structure is disposed between two adjacent transparent partitions.

[0006] Optionally, one transparent partition corresponds to one pixel unit, and multiple transparent partitions are arranged in an array.

[0007] Optionally, the display panel includes a plurality of pixel rows arranged along a first direction, and each pixel row includes a plurality of pixel units arranged along a second direction, wherein the first direction intersects the second direction; wherein one transparent partition corresponds to one pixel row.

[0008] Optionally, the orthographic projection of the second cathode layer onto the light-emitting device layer is located outside the orthographic projection of the pixel opening of the sub-pixel onto the light-emitting device layer.

[0009] Optionally, the thickness of the transparent partition is greater than the thickness of the cathode structure.

[0010] Optionally, the thickness of the second cathode layer is greater than the thickness of the first cathode layer.

[0011] Optionally, the light-emitting device layer includes a pixel definition layer and a common layer; the pixel definition layer is provided with a plurality of first grooves, and the common layer is at least partially located in the first grooves; wherein, at least one first groove is provided between two adjacent sub-pixels, and at least a portion of the cathode structure is provided in the first grooves.

[0012] Optionally, the number of the first grooves between a set of two adjacent sub-pixels is different from the number of the first grooves between at least another set of two adjacent sub-pixels.

[0013] Optionally, a cathode structure is provided between at least two adjacent pixel units, and the orthographic projection of all the first grooves between two adjacent pixel units corresponding to the cathode structure is located within the cathode structure.

[0014] Optionally, a plurality of the sub-pixels are arranged in a first direction and a second direction, the first direction intersecting the second direction; wherein, the first groove between two adjacent sub-pixels arranged in the first direction extends along the second direction, and the first groove between two adjacent sub-pixels arranged in the second direction extends along the first direction.

[0015] Optionally, the pixel unit includes a first sub-pixel, a second sub-pixel, and a third sub-pixel; the display panel includes a plurality of first pixel columns and a plurality of second pixel columns, the first pixel columns and the second pixel columns being alternately arranged in a second direction; the first pixel column includes a plurality of first sub-pixel groups, the plurality of first sub-pixel groups being arranged in a first direction, the first sub-pixel group including two first sub-pixels arranged in the first direction, the distance between two adjacent first sub-pixel groups in the first direction being greater than the distance between two first sub-pixels within the first sub-pixel group in the first direction, the first direction intersecting the second direction; the second pixel column includes a plurality of second sub-pixels and a plurality of third sub-pixels, the second sub-pixels and the third sub-pixels being alternately arranged in the first direction; wherein, the cathode structure includes a first part and a second part, the first part being disposed between two adjacent first sub-pixel groups, the second part being connected between two adjacent first parts, the second part extending along the second direction, the length of the first part in the first direction being greater than the length of the second part in the first direction.

[0016] Optionally, the display panel includes a first display area and a second display area; wherein the number of pixel units corresponding to the transparent partition in the first display area is greater than the number of pixel units corresponding to the transparent partition in the second display area.

[0017] Optionally, the display panel includes a cathode power supply line electrically connected to the first cathode layer; wherein the second display area is located on the side of the first display area away from the cathode power supply line.

[0018] Optionally, the material of the transparent partition includes a cathode patterned material.

[0019] According to a second aspect of this application, a display device is provided, comprising a display panel as described in any of the above.

[0020] In the display panel of this application embodiment, through the above technical solution, a second cathode layer is provided on the first cathode layer. The second cathode layer enhances conductivity to reduce the overall cathode resistance, thereby alleviating the display voltage drop. The transparent partition corresponds to at least one pixel unit, and the optical influence of the transparent partition corresponds to the entire pixel unit, ensuring the overall light emission uniformity of the pixel unit, facilitating subsequent optical compensation and process debugging, improving yield and display consistency. The transparent partition corresponding to at least one pixel unit reduces the process requirements and has high feasibility.

[0021] Other features and advantages of this application will be described in detail in the following detailed description section. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] To gain a more complete understanding of this application and its beneficial effects, the following description will be provided in conjunction with the accompanying drawings, wherein the same reference numerals in the following description denote the same parts.

[0024] Figure 1 This is a schematic diagram of a first structure of a display panel provided in an exemplary embodiment of this disclosure; Figure 2 This is a schematic diagram of a second structure of the display panel provided in an exemplary embodiment of this disclosure; Figure 3 This is a schematic diagram of a third structure of the display panel provided in an exemplary embodiment of this disclosure; Figure 4This is a schematic diagram of a fourth structure of the display panel provided in an exemplary embodiment of this disclosure; Figure 5 This is a fifth structural schematic diagram of the display panel provided in an exemplary embodiment of this disclosure; Figure 6 This is a sixth structural schematic diagram of the display panel provided in an exemplary embodiment of this disclosure; Figure 7 This is a seventh structural schematic diagram of the display panel provided in an exemplary embodiment of this disclosure; Figure 8 This is an eighth structural schematic diagram of the display panel provided in an exemplary embodiment of this disclosure; Figure 9 This is a ninth structural schematic diagram of the display panel provided in an exemplary embodiment of this disclosure; Figure 10 This is a schematic diagram of the area division of the display panel provided in an exemplary embodiment of this disclosure; Figure 11 This is a schematic diagram of the structure of a display device provided in an exemplary embodiment of this disclosure.

[0025] Explanation of reference numerals in the attached figures: 10. Display panel; A1. First display area; A2. Second display area; 11. Array substrate; 12. Anode layer; 20. Light-emitting device layer; 21. Pixel definition layer; 22. Common layer; 23. Light-emitting material layer; 24. First material layer; 25. Second material layer; 30. First cathode layer; 40. Transparent partition; 50. Second cathode layer; 51. Cathode structure; 52. First part; 53. Second part; 60. Pixel unit; 61. First sub-pixel; 62. Second sub-pixel; 63. Third sub-pixel; 71. Pixel row; 72. First pixel column; 73. Second pixel column; 74. First sub-pixel group; 80. First groove; 90. Cathode power supply line; 91. First power supply line; 92. Second power supply line; 93. Third power supply line; 100. Display device; 110. Device body. Detailed Implementation

[0026] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the protection scope of this application.

[0027] According to the first aspect of this application, referring to Figures 1 to 10This disclosure provides a display panel 10, including a light-emitting device layer 20, a first cathode layer 30, a plurality of transparent partitions 40, and a second cathode layer 50; the first cathode layer 30 is disposed on the light-emitting side of the light-emitting device layer 20; the transparent partitions 40 are disposed on the side of the first cathode layer 30 away from the light-emitting device layer 20; the second cathode layer 50 is disposed on the side of the first cathode layer 30 away from the light-emitting device layer 20, and includes a plurality of patterned cathode structures 51; wherein, the display panel 10 includes a plurality of pixel units 60, the transparent partitions 40 are correspondingly disposed on the light-emitting side of the pixel units 60, and the cathode structures 51 are disposed between two adjacent transparent partitions 40.

[0028] It is understandable that the first cathode layer 30 can be a whole layer. The superimposed second cathode layer 50 can improve the overall conductivity of the first cathode layer 30, reduce the overall sheet resistance and line voltage drop, and improve the problems of uneven voltage drop across the entire display panel 10 and uneven display in different areas.

[0029] The transparent partition 40 has light-transmitting characteristics and will not block the light emitted by the pixel unit 60, ensuring light transmission efficiency and normal light emission effect. The transparent partition 40 is correspondingly disposed on the light-emitting side of the pixel unit 60, and the transparent partition 40 is disposed for at least one pixel unit 60. The partition structure is precisely aligned with the pixel unit 60, so that the effects of optical interference, film thickness difference, stress difference and other factors are uniformly applied to one or more complete pixel units 60, avoiding the local light emission abnormality of sub-pixels caused by scattered partition structures, improving the overall light emission uniformity of the pixel, and facilitating subsequent optical compensation and process debugging.

[0030] By utilizing the limiting effect of adjacent transparent partitions 40, the cathode structure 51 of the second cathode layer 50 is precisely patterned and arranged, eliminating the need for high-precision global etching and reducing the difficulty of the manufacturing process. Each sub-pixel includes a pixel opening, which is the light-emitting area, while the area between the pixel openings of two sub-pixels is the non-light-emitting area. The patterned cathode structure 51 is concentrated in the non-light-emitting area between corresponding adjacent pixel units 60. This can strengthen the overall conductive path and reduce the voltage drop through the continuous cathode conductive structure, while also avoiding the metal cathode structure 51 from blocking the light-emitting area of ​​the pixel. It takes into account both the low resistance conductivity requirement of the cathode and the light emission and transmission requirements, making it highly feasible.

[0031] For details, please refer to Figures 1 to 9The multiple sub-pixels of pixel unit 60 may include a first sub-pixel 61, a second sub-pixel 62, and a third sub-pixel 63. For ease of explanation, this paper uses the symbol B to represent the first sub-pixel 61 whose light emission color is blue, the symbol R to represent the second sub-pixel 62 whose light emission color is red, and the symbol G to represent the third sub-pixel 63 whose light emission color is green.

[0032] In the accompanying drawings, the first direction is parallel to the extension direction of the Y-axis, the second direction is parallel to the extension direction of the X-axis, and the Z-axis is perpendicular to the plane where the array substrate 11 of the display panel 10 is located.

[0033] In some embodiments, please refer to the following for details. Figure 3 , Figure 7 , Figure 9 One transparent partition 40 corresponds to one pixel unit 60, and multiple transparent partitions 40 are arranged in an array. Each transparent partition 40 matches a single pixel unit 60, achieving independent optical isolation and process adaptation for the pixel unit 60. The light-emitting area of ​​each pixel unit 60 is covered by the transparent partition 40, ensuring that the optical influence and process errors between each pixel unit 60 are independent, reducing cross-pixel optical interference and improving the consistency of single-pixel light emission. The array arrangement of multiple transparent partitions 40 conforms to the conventional arrangement process of a 10-pixel array in a display panel, adapting to the array preparation, photolithography, and coating processes of the pixel unit 60, resulting in strong process compatibility. The orderly array arrangement ensures uniform cathode structures 51 and partition structures for all pixels across the screen, resulting in uniform voltage drop distribution and optical performance across the entire screen. This facilitates subsequent unified optical compensation and brightness calibration across the entire screen, improving the overall display quality and product yield.

[0034] In some embodiments, please refer to the following for details. Figure 4 , Figure 8 The display panel 10 includes multiple pixel rows 71 arranged along a first direction, and each pixel row 71 includes multiple pixel units 60 arranged along a second direction, the first direction intersecting the second direction; wherein, one transparent partition 40 corresponds to one pixel row 71. A single transparent partition 40 corresponds to a single pixel row 71, which, compared to a single transparent partition 40 corresponding to a single pixel unit 60, reduces the number of patterned transparent partitions 40, lowers the processing difficulty and process error, and improves production efficiency; simultaneously, by using pixel rows 71 as units to uniformly manage optical and electrical performance, the cathode resistance, voltage drop, and light emission effect of pixels in the same row tend to be consistent, improving the brightness difference of horizontal pixel rows 71, and better meeting the mass production requirements of the large-screen display panel 10.

[0035] In some embodiments, please refer to the following for details. Figure 1 , Figures 3 to 9 The orthographic projection of the second cathode layer 50 onto the light-emitting device layer 20 is located outside the orthographic projection of the pixel opening of the sub-pixel onto the light-emitting device layer 20. The pixel opening is the core light-emitting area of ​​the sub-pixel. The transmittance of the second cathode layer 50 is limited by the material, and at present, it still has a certain amount of light absorption and blocking. This ensures that the second cathode layer 50, which has light-shielding properties, does not occupy the light-emitting area at all, thus avoiding the second cathode layer 50 from blocking or absorbing light emitted by the pixel, and improving the transmittance and luminous efficiency of the sub-pixel.

[0036] In some embodiments, please refer to the following for details. Figure 1 , Figure 2 The thickness of the transparent partition 40 is greater than the thickness of the cathode structure 51. This greater thickness of the transparent partition 40 helps to limit the forming space of the cathode structure 51, preventing overflow, misalignment, and uneven thickness during the cathode structure 51 deposition process. This improves the forming accuracy and consistency of the cathode structure 51, and prevents the cathode structure 51 from covering the side of the transparent partition 40 away from the light-emitting device layer 20, thus avoiding the second cathode layer 50 from blocking or absorbing light from the pixel. Simultaneously, the thicker transparent partition 40 exhibits stronger optical stability, resisting the effects of temperature and stress in subsequent processes, preventing interference with the optical performance of the pixel opening area, and ensuring long-term stability of the light-emitting area.

[0037] Specifically, the thickness of the transparent partition 40 is 5 nm to 20 nm, and the thickness of the cathode structure 51 is 1 nm to 20 nm.

[0038] In some embodiments, please refer to the following for details. Figure 1 , Figure 2 The thickness of the second cathode layer 50 is greater than that of the first cathode layer 30. The first cathode layer 30 is close to the light-emitting device layer 20 and is a single layer. The thin film thickness of the first cathode layer 30 can ensure basic light transmittance, meet the light transmittance requirements, and ensure the basic light output efficiency of the pixel. The second cathode layer 50 is the main conductive reinforcement layer. The thickened design can significantly reduce its own resistance and reduce the overall cathode voltage drop. At the same time, the second cathode layer 50 is not located in the orthographic projection area of ​​the pixel opening, so its light transmittance does not need to be considered, and the focus can be on improving its conductivity.

[0039] In some embodiments, please refer to the following for details. Figure 1 , Figures 3 to 9 The light-emitting device layer 20 includes a pixel definition layer 21 and a common layer 22; the pixel definition layer 21 is provided with a plurality of first grooves 80, and the common layer 22 is at least partially located in the first grooves 80; wherein, at least one first groove 80 is provided between two adjacent sub-pixels, and at least a portion of the cathode structure 51 is provided in the first grooves 80.

[0040] It is understood that the common layer 22 is a global common functional film layer of the display panel 10, which can realize the functions of carrier injection and transport. Depending on the structural type of the display panel 10, it may specifically include at least one of hole injection layer (HIL), hole transport layer (HTL), electron transport layer (ETL), electron injection layer (EIL), hole blocking layer, and electron blocking layer. Specifically, when the display panel 10 is a tandem display panel 10, the common layer 22 may also include a charge generation layer (CGL), which may specifically include N-CGL and P-CGL. The common layer 22 is a conventional functional layer well known to those skilled in the art, and its structure and materials will not be described in detail here.

[0041] Setting a first groove 80 between adjacent sub-pixels can increase the transmission path of the common layer 22 between adjacent sub-pixels, reduce current leakage and crosstalk problems between adjacent sub-pixels, and ensure that each sub-pixel emits light independently and stably. However, at the same time, the uneven structure of the first groove 80 will destroy the flatness of the film layer of the first cathode layer 30, causing the first cathode layer 30 to deform with the groove structure, the film to become thinner, or even locally micro-fractured, resulting in the obstruction of the conductive path of the first cathode layer 30, the increase of local resistance, and the aggravation of panel voltage drop.

[0042] A cathode structure 51 is set in the first groove 80, and a reinforcing conductive structure is arranged in the gap space of the groove. This can specifically compensate for the resistance increase of the first cathode layer 30 caused by the first groove 80, repair the conductive path defects at the position of the first groove 80, and offset the conductivity loss caused by the deformation of the film structure. The double-layer cathode, together with the reinforcing structure of the first groove 80, forms a complete low-resistance conductive network, which solves the problem of sub-pixel leakage crosstalk, reduces the disadvantage of the cathode resistance rise caused by the first groove 80, further improves the overall voltage drop, and takes into account both electrical stability and light emission uniformity.

[0043] Experimental simulations were conducted on the cathode structure 51 and the first groove 80. Experiment 1 was conducted under the following conditions: no first groove 80 was placed between two adjacent sub-pixels, no second cathode layer 50 or cathode structure 51 was placed on the first cathode layer 30, and the thickness of the first cathode layer 30 was 12.1 nm. Experiment 2 was conducted under the following conditions: a first groove 80 was placed between two adjacent sub-pixels, no second cathode layer 50 or cathode structure 51 was placed on the first cathode layer 30, and the thickness of the first cathode layer 30 was 12.1 nm. Experiment 3 was conducted under the following conditions: a first groove 80 was placed between two adjacent sub-pixels, and no second cathode layer 50 or cathode structure 51 was placed on the first cathode layer 30. Experiment 4 and Experiment 5 were conducted with a first cathode layer 30 and cathode structure 51, the thickness of which was 13.2 nm. Experiment 4 was conducted with no first recess 80 between adjacent sub-pixels, a second cathode layer 50 and cathode structure 51 on the first cathode layer 30, the thickness of which was 12.1 nm and the thickness of which was 1.1 nm. Experiment 5 was conducted with a first recess 80 between adjacent sub-pixels, a second cathode layer 50 and cathode structure 51 on the first cathode layer 30, the thickness of which was 12.1 nm and the thickness of which was 1.1 nm. The experimental results are shown in Table 1. Table 1

[0044] Compared to Experiment 1, setting the first groove 80 in Experiment 2 leads to a more severe voltage drop problem and an increase in lateral impedance, so voltage drop compensation is needed for the first groove 80. Compared to Experiment 2, thickening the first cathode layer 30 in Experiment 3 can compensate for the voltage drop to some extent, but the transmittance decreases and the viewing angle attenuation is significant. Compared to Experiment 1, the introduction of the second cathode layer 50 and cathode structure 51 in Experiment 4 reduces the voltage drop and lateral impedance, while the viewing angle attenuation remains basically unchanged. Experiment 5 adds the first groove 80 to the foundation of Experiment 4. Compared to Experiment 3, the second cathode layer 50 is not set in the pixel opening in Experiment 5, which improves the transmittance and significantly improves the viewing angle attenuation. Compared to Experiment 2, the addition of the second cathode layer 50 and cathode structure 51 in Experiment 5 reduces the voltage drop and lateral impedance. In summary, Experiment 4 and Experiment 5 together constitute the optimal solution. Experiment 4 can focus on balancing high transmittance and low impedance, while Experiment 5, while improving leakage current, maintains the voltage drop advantage and further optimizes viewing angle consistency and optical performance.

[0045] In some embodiments, please refer to the following for details. Figure 6 The number of the first grooves 80 between two adjacent sub-pixels is different from the number of the first grooves 80 between at least another set of two adjacent sub-pixels. Different numbers of the first grooves 80 can be set according to the difference in leakage current between different sub-pixels or the distance between different sub-pixels.

[0046] Specifically, for at least two groups of adjacent sub-pixels with different spacings, the number of first grooves 80 between the groups with larger spacings is greater than the number of first grooves 80 between the groups with smaller spacings. For example, the distance between two adjacent sub-pixels between two adjacent pixel units 60 is less than the distance between two adjacent sub-pixels within the pixel unit 60, and the distance between adjacent second sub-pixels 62 and third sub-pixels 63 between two pixel units 60 is less than the distance between second sub-pixels 62 and third sub-pixels 63 within the pixel unit 60. In this case, one first groove 80 is provided between adjacent second sub-pixels 62 and third sub-pixels 63 between two pixel units 60, and two first grooves 80 are provided between second sub-pixels 62 and third sub-pixels 63 within the pixel unit 60, to accommodate different pixel spacings.

[0047] For details, please refer to Figure 6 At least one of the first grooves 80 surrounds the first edge corresponding to the sub-pixel and the two corners corresponding to the first edge. This annular surrounding structure can further increase the blocking of leakage current paths and suppress lateral leakage current diffusion.

[0048] For details, please refer to Figures 3 to 6 At least one group of two adjacent sub-pixels are provided with two first grooves 80, and the surrounding directions of the two first grooves 80 are opposite to each other.

[0049] In some embodiments, please refer to the following for details. Figure 6 , Figure 9 A cathode structure 51 is disposed between at least two adjacent pixel units 60. The orthographic projection of all the first grooves 80 between two adjacent pixel units 60 corresponding to the cathode structure 51 is located within the cathode structure 51. If a cathode structure 51 is disposed between two adjacent pixel units 60, the cathode structure 51 must completely cover the projection area of ​​all the first grooves 80 below it to improve the local high blocking points that may exist in the first grooves 80 and improve the problems of sudden voltage drop and uneven brightness in local areas.

[0050] In some embodiments, please refer to the following for details. Figures 7 to 9 The plurality of said sub-pixels are arranged in a first direction and a second direction, the first direction intersecting the second direction; wherein, the first groove 80 between two adjacent said sub-pixels arranged in the first direction extends along the second direction, and the first groove 80 between two adjacent said sub-pixels arranged in the second direction extends along the first direction.

[0051] Multiple subpixels are arranged in an array, such as adaptable to the mainstream RGBW four-pixel arrangement and SPR (Sub-Pixel Rendering) arrangement architecture in the industry; taking the SPR arrangement as an example, the four subpixels can be arranged in a rectangle, and the four subpixels can be one first subpixel 61, one second subpixel 62 and two third subpixels 63 respectively.

[0052] The first groove 80 extends orthogonally to the sub-pixel arrangement direction, forming a regular matrix grid structure that fits the gap layout of the four sub-pixels, making the gap space inside the pixel unit 60 evenly distributed, laying the structural foundation for the regular arrangement of the cathode structure 51; the orthogonal grid first groove 80 structure can evenly disperse the film layer stress, reduce the light emission defects caused by stress concentration in the light-emitting device layer 20, and improve the overall stability of the panel.

[0053] In some embodiments, please refer to the following for details. Figures 7 to 9 The extension direction of the cathode structure 51 is parallel to the extension direction of the corresponding first groove 80. The cathode structure 51 extends in the same parallel direction as the first groove 80, achieving a precise fit and match between the cathode structure 51 and the first groove 80. The cathode structure 51 can completely fill and fit the extension path of the first groove 80, maximizing the use of the gap space to reduce leakage risk, reduce line impedance, and achieve a more stable voltage drop optimization effect.

[0054] In some embodiments, please refer to the following for details. Figure 5 The pixel unit 60 includes a first sub-pixel 61, a second sub-pixel 62, and a third sub-pixel 63; the display panel 10 includes a plurality of first pixel columns 72 and a plurality of second pixel columns 73, the first pixel columns 72 and the second pixel columns 73 being arranged alternately in a second direction; the first pixel column 72 includes a plurality of first sub-pixel groups 74, the plurality of first sub-pixel groups 74 being arranged in a first direction, the first sub-pixel group 74 including two first sub-pixels 61 arranged in the first direction, the distance between two adjacent first sub-pixel groups 74 in the first direction being greater than the distance between two first sub-pixels 61 within the first sub-pixel group 74 in the first direction. The upward distance, the first direction intersects the second direction; the second pixel column 73 includes a plurality of second sub-pixels 62 and a plurality of third sub-pixels 63, the second sub-pixels 62 and the third sub-pixels 63 are arranged alternately in the first direction; wherein, the cathode structure 51 includes a first part 52 and a second part 53, the first part 52 is disposed between two adjacent first sub-pixel groups 74, the second part 53 is connected between two adjacent first parts 52, the second part 53 extends along the second direction, and the length of the first part 52 in the first direction is greater than the length of the second part 53 in the first direction.

[0055] The first part 52 of the cathode structure 51 is arranged in the large spacing space between the first sub-pixel group 74, which has high space utilization, does not require compression of the pixel light-emitting area, and improves the conductivity reinforcement effect. The large-sized first part 52 is arranged in the high spacing gap, which greatly enhances the local conductivity.

[0056] In some embodiments, please refer to the following for details. Figure 5 The first portion 52 and the second portion 53 are arranged alternately in the first direction and the second direction. This alternating arrangement enables the cathode structure 51 to form a continuous conductive path, resulting in a shorter and more uniform current path, effectively suppressing the generation of local hot spots.

[0057] In some embodiments, the display panel 10 includes a first display area A1 and a second display area A2; wherein the size of the first portion 52 within the second display area A2 is larger than the size of the first portion 52 within the first display area A1. The display panel 10 includes a cathode power supply line 90, which is electrically connected to the first cathode layer 30; wherein the second display area A2 is located on the side of the first display area A1 away from the cathode power supply line 90. This design allows the second display area A2, located away from the power supply line, to have a larger cross-sectional area cathode structure 51 first portion 52, thereby reducing voltage attenuation caused by long-distance transmission and ensuring full-screen brightness uniformity and color consistency.

[0058] In some embodiments, please refer to the following for details. Figure 10 The display panel 10 includes a first display area A1 and a second display area A2; wherein, the number of the transparent partition portion 40 corresponding to the pixel unit 60 in the first display area A1 is greater than the number of the transparent partition portion 40 corresponding to the pixel unit 60 in the second display area A2.

[0059] It is understood that the relationship between the number of transparent partition portions 40 and the number of pixel units 60 within the first display area A1 can be that one transparent partition portion 40 corresponds to multiple pixel units 60, such as a row of pixels 71. Please refer to [link / reference] for details. Figure 4 The relationship between the number of transparent partition portions 40 and pixel units 60 within the second display area A2 can be one transparent partition portion 40 corresponding to one pixel unit 60. Please refer to [link / reference] for details. Figure 3By configuring transparent partitions 40 with different densities in different display areas, the cathode conductive area, resistance characteristics, and process difficulty are matched differently to adapt to the voltage drop differences in different areas of the panel. Specifically, the fewer the number of pixel units 60 corresponding to the transparent partitions 40, the smaller the coverage area of ​​a single transparent partition 40, the larger the usable space between pixels, the larger the effective area of ​​the cathode structure 51 that can be arranged, the lower the local cathode resistance, and the stronger the conductivity reinforcement effect, which can specifically compensate for the electrical losses in high voltage drop areas. Conversely, the more pixel units 60 corresponding to the transparent partitions 40, the more regular the size of a single partition structure and the higher the overall uniformity of the arrangement. Although this will reduce the arrangement area of ​​the cathode structure 51 accordingly, it can greatly reduce the process precision requirements of the transparent partitions 40, avoid the process deviations and pattern distortions caused by high-precision micro-nano processing, and significantly improve the manufacturability and mass production yield.

[0060] The number of pixel units 60 corresponding to the transparent partition portion 40 in the first display area A1 is greater, which reduces the difficulty of manufacturing and aligning the partition structure and ensures the optical uniformity and process yield of the first display area A1. The number of pixel units 60 corresponding to the transparent partition portion 40 in the second display area A2 is less, with more pixel gap space to arrange a larger area of ​​cathode structure 51, which significantly reduces the cathode resistance in the far-end area and specifically compensates for the voltage drop loss in the area far from the power supply end.

[0061] In some embodiments, please refer to the following for details. Figure 10 The display panel 10 includes a cathode power supply line 90, which is electrically connected to the first cathode layer 30. The second display area A2 is located on the side of the first display area A1 furthest from the cathode power supply line 90. The cathode power supply line 90 is electrically connected to the first cathode layer 30, ensuring stable power supply to the entire cathode circuit. The first cathode layer 30, as a substrate conductive layer, can quickly conduct the power supply current to the entire screen, ensuring basic stability of current transmission. The second display area A2 is a remote area far from the power supply line, inherently having a larger voltage drop. By adapting differentiated isolation and cathode structure 51, the resistance and voltage drop of the remote area are specifically optimized to compensate for power loss at the remote end, reduce the brightness difference between the near and far display areas, and achieve uniform brightness across the entire screen.

[0062] Specifically, the cathode power supply line 90 includes a first power supply line 91, a second power supply line 92, and a third power supply line 93. The display panel 10 includes four sides, wherein the first power supply line 91 and the second power supply line 92 extend along a first direction and are respectively located on two opposite sides of the display panel 10, and the third power supply line 93 extends along a second direction and is correspondingly located on the other side of the display panel 10, forming a three-sided encircling power supply layout. The first display area A1 is close to the first power supply line 91, the second power supply line 92, and the third power supply line 93, while the second display area A2 is located on the side without the cathode power supply line 90. The second display area A2 becomes the area with the longest power supply path and the most significant voltage drop accumulation.

[0063] Specifically, the boundary between the first display area A1 and the second display area A2 is arc-shaped, specifically an arc-shaped line convex toward the third power supply line 93.

[0064] In some embodiments, the material of the transparent partition 40 includes a cathode patterning material. Specifically, the cathode patterning material is CPM (Cathode Patterning Material), which can be simultaneously deposited and formed through vacuum evaporation, eliminating the need for additional high-precision post-processing steps such as photolithography, etching, and masking. It also eliminates the need for additional special equipment and processes, significantly simplifying the patterning process of the transparent partition 40, reducing the complexity of mass production processes and the costs of materials and equipment, and adapting to the needs of large-scale mass production. CPM material is an organic small molecule material containing fluorine or nitrogen elements, with a low surface energy, generally less than 20 mN / m. During evaporation, it can prevent metal atoms from wetting, nucleating, and forming films on its surface, exhibiting film-forming inhibition characteristics for metals such as Yb, Mg, and Ag. Simultaneously, CPM material possesses excellent visible light transmittance characteristics, ensuring that as a transparent partition 40, it does not obstruct pixel light emission, does not generate light absorption or polarization defects, has no optical loss, and can stably guarantee the high transmittance of the top-emitting structure and the uniformity of light emission across the entire screen.

[0065] In some embodiments, the material of the first cathode layer 30 includes one or more combinations of Yb, Mg, and Ag, and the material of the second cathode layer 50 includes one or more combinations of Mg and Ag.

[0066] In some embodiments, please refer to the following for details. Figure 1 , Figure 2 The display panel 10 includes an array substrate 11 and an anode layer 12 located on the array substrate 11.

[0067] Specifically, please refer to Figure 1 , Figure 2 The light-emitting device layer 20 also includes a light-emitting material layer 23.

[0068] Specifically, please refer to Figure 2The light-emitting material layer 23 of the light-emitting device layer 20 includes a first material layer 24 and a second material layer 25 stacked together, with at least a portion of the common layer 22 disposed between the first material layer 24 and the second material layer 25. That is, the light-emitting device layer 20 of the display panel 10 can be a tandem structure, which improves luminous efficiency and brightness by synergistically emitting light through the two material layers, while extending the device lifespan.

[0069] Specifically, the pixel definition layer 21 includes a plurality of first openings, and the light-emitting material layer 23 is disposed within the first openings. Specifically, the first material layer 24 and the second material layer 25 may be disposed within the first openings. One first opening corresponds to one sub-pixel.

[0070] According to the second aspect of this disclosure, in conjunction with Figure 11 This disclosure also provides a display device 100, which includes any of the above-described display panels 10.

[0071] For the specific structure of the display panel 10, please refer to any of the above-described embodiments of the display panel 10 and the accompanying drawings. The display device 100 has all the beneficial effects of the above-described display panel 10, which will not be repeated here.

[0072] Understandably, please refer to the details. Figure 11 The display device 100 also includes a device body 110, which is integrated with the display panel 10. The device body 110 may include a middle frame, frame adhesive, etc., which are only examples and not specific limitations.

[0073] The display device 100 can be widely used in smartphones, laptops, tablets, monitors, vehicle displays, etc. This is just an example and is not a specific limitation.

[0074] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0075] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0076] The embodiments, implementation methods, and related technical features of this application can be combined and substituted for each other without conflict.

[0077] The above are merely preferred embodiments of this application and are not intended to limit this application in any way. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of this application without departing from the scope of the technical solution of this application shall still fall within the scope of the technical solution of this application.

Claims

1. A display panel, characterized in that, include: Light-emitting device layer; The first cathode layer is disposed on the light-emitting side of the light-emitting device layer; Multiple transparent partitions are disposed on the side of the first cathode layer away from the light-emitting device layer; The second cathode layer is disposed on the side of the first cathode layer away from the light-emitting device layer, and includes a plurality of patterned cathode structures. The display panel includes multiple pixel units, each pixel unit includes multiple sub-pixels, the transparent partition is disposed on the light-emitting side of the pixel unit, and the cathode structure is disposed between two adjacent transparent partitions.

2. The display panel according to claim 1, characterized in that, One transparent partition corresponds to one pixel unit, and multiple transparent partitions are arranged in an array.

3. The display panel according to claim 1, characterized in that, The display panel includes multiple pixel rows arranged along a first direction, and each pixel row includes multiple pixel units arranged along a second direction, wherein the first direction intersects the second direction. Each of the transparent partition portions corresponds to one of the pixel rows.

4. The display panel according to any one of claims 1 to 3, characterized in that, The orthographic projection of the second cathode layer onto the light-emitting device layer is located outside the orthographic projection of the pixel opening of the sub-pixel onto the light-emitting device layer.

5. The display panel according to any one of claims 1 to 3, characterized in that, The thickness of the transparent partition is greater than the thickness of the cathode structure.

6. The display panel according to any one of claims 1 to 3, characterized in that, The thickness of the second cathode layer is greater than the thickness of the first cathode layer.

7. The display panel according to claim 1, characterized in that, The light-emitting device layer includes a pixel definition layer and a common layer; The pixel definition layer is provided with a plurality of first grooves, and the common layer is at least partially located within the first grooves; Wherein, at least one of the first grooves is provided between two adjacent sub-pixels, and at least a portion of the first grooves are provided with a portion of the cathode structure.

8. The display panel according to claim 7, characterized in that, The number of the first grooves between two adjacent sub-pixels in one group is different from the number of the first grooves between at least another group of two adjacent sub-pixels.

9. The display panel according to claim 7, characterized in that, The cathode structure is disposed between at least two adjacent pixel units, and the orthogonal projection of all the first grooves between the two adjacent pixel units corresponding to the cathode structure is located within the cathode structure.

10. The display panel according to claim 7, characterized in that, The plurality of said sub-pixels are arranged in a first direction and a second direction, wherein the first direction intersects the second direction; Wherein, the first groove between two adjacent sub-pixels arranged in the first direction extends along the second direction, and the first groove between two adjacent sub-pixels arranged in the second direction extends along the first direction.

11. The display panel according to claim 1, characterized in that, The pixel unit includes a first sub-pixel, a second sub-pixel, and a third sub-pixel; The display panel includes a plurality of first pixel columns and a plurality of second pixel columns, wherein the first pixel columns and the second pixel columns are arranged alternately in a second direction; The first pixel column includes a plurality of first sub-pixel groups, the plurality of first sub-pixel groups are arranged in a first direction, the first sub-pixel group includes two first sub-pixels arranged in the first direction, the distance between two adjacent first sub-pixel groups in the first direction is greater than the distance between two first sub-pixels in the first sub-pixel group in the first direction, and the first direction intersects with the second direction; The second pixel column includes a plurality of second sub-pixels and a plurality of third sub-pixels, wherein the second sub-pixels and the third sub-pixels are arranged alternately in the first direction; The cathode structure includes a first part and a second part. The first part is disposed between two adjacent first sub-pixel groups, and the second part is connected between two adjacent first parts. The second part extends along a second direction, and the length of the first part in the first direction is greater than the length of the second part in the first direction.

12. The display panel according to claim 1, characterized in that, The display panel includes a first display area and a second display area; The number of pixel units corresponding to the transparent partition in the first display area is greater than the number of pixel units corresponding to the transparent partition in the second display area.

13. The display panel according to claim 12, characterized in that, The display panel includes a cathode power supply line, which is electrically connected to the first cathode layer. The second display area is located on the side of the first display area away from the cathode power supply line.

14. The display panel according to claim 1, characterized in that, The material of the transparent partition includes a cathode patterned material.

15. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 14.

Images