A self-protected power-on glitch suppression circuit

Abstract

This invention relates to the automotive electronics industry and the field of hardware circuit design technology, specifically disclosing a self-protected power-on fluctuation suppression circuit. The circuit includes a primary power supply, a secondary power supply, a self-protection module, and a subsequent power-consuming module. The input terminal of the primary power supply receives the primary input voltage. The output terminal of the primary power supply is connected to the input terminal of the secondary power supply and the first input terminal of the self-protection module. The output terminal of the secondary power supply is connected to the second input terminal of the self-protection module and the subsequent power-consuming module. The output terminal of the self-protection module is also connected to the subsequent power-consuming module. The self-protection module generates a control signal based on the received primary and secondary output voltages and outputs this control signal to the subsequent power-consuming module. The subsequent power-consuming module then determines whether to perform subsequent operations. The self-protected power-on fluctuation suppression circuit provided by this invention can ensure the stability and reliability of the power supply operation at each stage, preventing abnormal failure of core components due to voltage fluctuations during power-on.

Description

Technical Field

[0001] This invention relates to the automotive electronics industry and the field of hardware circuit design technology, and in particular to a self-protected power-on fluctuation suppression circuit. Background Technology

[0002] Currently, in the testing and practical application of low-voltage motor controllers, when the controller and motor assembly are working in a stable state, their performance can meet the initial design requirements and failures are basically not expected. However, unpredictable problems often occur when the power is applied. After repeated testing, analysis, and comparative experiments, the cause of the intermittent failure of the controller or motor assembly during power-up was finally determined: when the controller is powered by a secondary or higher power supply, the downstream power supply starts working when the input voltage Vin2 / Vout1 meets its operating voltage threshold. When its output voltage Vout2 reaches the required voltage value of the downstream power-consuming module (MCU, CAN, etc.), the downstream power-consuming module starts working. At this time, the primary voltage Vin1 has not yet reached a steady state. Therefore, the current demand of the downstream power-consuming module will cause fluctuations in the output voltage Vout2. At the same time, the fluctuations will be transmitted to the input voltage Vin2 / Vout1, causing fluctuations in the input voltage Vin2. The fluctuations in the input voltage Vin2 will cause abnormalities in the output voltage Vout2. During this period, the power supply is repeatedly powered on and off, resulting in an overshoot phenomenon in the output voltage Vout2, which damages the core components of the downstream power-consuming module and causes the controller or assembly to fail.

[0003] like Figure 1 The image shows the power supply topology before optimization. It includes: a primary power supply, a secondary power supply, and subsequent power-consuming modules (MCU, CAN, etc.). This topology does not include voltage detection and power-on enable logic, and fluctuations in the supply voltage Vout2 have already caused damage to core components such as the MCU and CAN.

[0004] like Figure 2 The diagram shows the power fluctuation before optimization. When Vin2 reaches the operating voltage Vth1 of the secondary power supply, the secondary power supply starts working. When Vout2 reaches the operating voltage Vth2 of the downstream power-consuming module, the current demand of the downstream power-consuming module causes fluctuations in Vout2. This fluctuation is also transmitted to the input of the secondary power supply, causing fluctuations in Vin2. When the secondary power supply rises again, the output voltage Vout2 reaches the maximum fluctuation voltage Voutmax. At this point, the maximum fluctuation voltage Voutmax exceeds the withstand voltage of core components such as the MCU and CAN, and there is a high probability of failure.

[0005] Therefore, the power supply structure before optimization is too simple, and it cannot effectively suppress power fluctuations when the downstream power-consuming modules have a large current demand.

[0006] Based on the above analysis and practical applications, this invention adds enable logic to the secondary power input, that is, the secondary power supply can only start working when the input power reaches a steady state. At the same time, it detects whether Vout1 and Vout2 have reached a stable working state. In this way, the probability of core components failing due to voltage instability during power-on is greatly reduced. Summary of the Invention

[0007] To address the shortcomings and deficiencies in existing technologies, this invention provides a self-protected power-on fluctuation suppression circuit. By optimizing the circuit structure and power-on logic, it can ensure the stability and reliability of power supply at each stage. Under different power-on conditions, it can ensure that the supply voltage remains stable and avoid abnormal failure of core components due to voltage fluctuations during power-on.

[0008] As a first aspect of the present invention, a self-protected power-on fluctuation suppression circuit is provided. The self-protected power-on fluctuation suppression circuit includes a primary power supply, a secondary power supply, a self-protection module, and a subsequent power consumption module. The input terminal of the primary power supply is used to receive a primary input voltage Vin1. The output terminal of the primary power supply is connected to the input terminal of the secondary power supply and the first input terminal of the self-protection module. The output terminal of the secondary power supply is connected to the second input terminal of the self-protection module and the subsequent power consumption module. The output terminal of the self-protection module is also connected to the subsequent power consumption module. The self-protection module has the following features: a first input terminal receives the first-stage output voltage Vout1 from the first-stage power supply; the first-stage output voltage Vout1 is also input to the second-stage power supply as its second-stage input voltage Vin2; the first-stage power supply outputs an enable signal EN to the second-stage power supply; a second input terminal receives the second-stage output voltage Vout2 from the second-stage power supply; and the second-stage output voltage Vout2 is also input to the subsequent power consumption module. The self-protection module generates a control signal based on the received first-level output voltage Vout1 and second-level output voltage Vout2, and outputs the control signal to the subsequent power consumption module. The subsequent power consumption module then determines whether to perform subsequent operations.

[0009] Further, the primary power supply includes a first power chip IC1, a first capacitor C1, a second capacitor C2, a third capacitor C3, a first resistor R1, a second resistor R2, a third resistor R3, an inductor L1, and a freewheeling diode DR1. One end of the first capacitor C1 is connected to the primary input voltage Vin1, one end of the first resistor R1, and the fifth pin of the first power chip IC1. The other end of the first capacitor C1 is connected to the other end of the first resistor R1, the fourth pin of the first power chip IC1, and ground. The positive terminal of the freewheeling diode DR1 is grounded, and its negative terminal is connected to the... One end of inductor L1, one end of second capacitor C2, and the sixth pin of the first power chip IC1 are connected; the other end of second capacitor C2 is connected to the first pin of the first power chip IC1; the other end of inductor L1 is connected to one end of third capacitor C3, one end of second resistor R2, and the first-stage output voltage Vout1; the other end of third capacitor C3 is connected to the second pin of the first power chip IC1 and ground; the other end of second resistor R2 is connected to one end of third resistor R3 and the third pin of the first power chip IC1; the other end of third resistor R3 is grounded.

[0010] Furthermore, the first power chip IC1 is a DC / DC switching power supply chip or a high-precision voltage regulator chip.

[0011] Further, the secondary power supply includes a second power chip IC2, a fourth capacitor C4, a fifth capacitor C5, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7. One end of the fourth resistor R4 is connected to the primary output voltage Vout1, one end of the fourth capacitor C4, and the seventh pin of the second power chip IC2. The other end of the fourth resistor R4 is connected to one end of the fifth resistor R5. The node voltage between the fourth resistor R4 and the fifth resistor R5 is connected to the sixth pin of the second power chip IC2. The node voltage between the fifth resistor R5 serves as the enable signal EN; the other end of the fourth capacitor C4 and the other end of the fifth resistor R5 are both grounded; the second pin of the second power chip IC2 is connected to one end of the sixth resistor R6, one end of the fifth capacitor C5, and the secondary output voltage Vout2, respectively; the other end of the sixth resistor R6 is connected to one end of the seventh resistor R7, the node voltage between the sixth resistor R6 and the seventh resistor R7 is connected to the third pin of the second power chip IC2, and the other end of the fifth capacitor C5 and the other end of the seventh resistor R7 are both grounded.

[0012] Furthermore, the second power chip IC2 is a linear regulated power chip.

[0013] Further, the self-protection module includes a first voltage follower IC3B, a second voltage follower IC4B, an AND gate IC5A, a sixth capacitor C6, a seventh capacitor C7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, and a thirteenth resistor R13; wherein, one end of the eighth resistor R8 is connected to the first-stage output voltage Vout1, and the other end of the eighth resistor R8 is connected to one end of the ninth resistor R9, one end of the sixth capacitor C6, and the positive input terminal of the first voltage follower IC3B, and the other ends of the ninth resistor R9 and the sixth capacitor C6 are both grounded; the negative input terminal of the first voltage follower IC3B is connected to one end of the tenth resistor R10, and the tenth resistor R10... The other end is connected to the output terminal of the first voltage follower IC3B and the first pin of the AND gate IC5A, respectively; one end of the eleventh resistor R11 is connected to the second-stage output voltage Vout2, and the other end of the eleventh resistor R11 is connected to one end of the twelfth resistor R12, one end of the seventh capacitor C7, and the positive input terminal of the second voltage follower IC4B, and the other ends of the twelfth resistor R12 and the seventh capacitor C7 are both grounded; the negative input terminal of the second voltage follower IC4B is connected to one end of the thirteenth resistor R13, and the other end of the thirteenth resistor R13 is connected to the output terminal of the second voltage follower IC4B and the second pin of the AND gate IC5A, respectively; the third pin of the AND gate IC5A is connected to the subsequent power consumption module.

[0014] Furthermore, the downstream power-consuming module includes an MCU.

[0015] The self-protected power-on fluctuation suppression circuit provided by this invention has the following advantages: (1) The power supply topology has not changed significantly compared to before optimization, the volume has not increased significantly, and the cost pressure has not increased; (2) The optimized power-on logic can ensure that the power supply and power-consuming modules at all levels work normally when power fluctuations occur, and avoid abnormal failure of core components caused by voltage fluctuations during power-on. Attached Figure Description

[0016] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used together with the following detailed description to explain the invention, but do not constitute a limitation thereof.

[0017] Figure 1 This is a schematic diagram of the power supply topology before optimization.

[0018] Figure 2 Power fluctuation diagram before optimization.

[0019] Figure 3 The schematic diagram of the self-protected power-on fluctuation suppression circuit provided by the present invention.

[0020] Figure 4 The power supply voltage fluctuation diagram of the self-protected power-on fluctuation suppression circuit provided by the present invention.

[0021] Figure 5 The circuit diagram of the primary power supply provided for this invention.

[0022] Figure 6 The circuit diagram of the secondary power supply provided by this invention.

[0023] Figure 7 The circuit diagram of the self-protection module provided by the present invention. Detailed Implementation

[0024] It should be noted that, unless otherwise specified, the embodiments and features described in the present invention can be combined with each other. The present invention will now be described in detail with reference to the accompanying drawings and embodiments.

[0025] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0026] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of the invention described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0027] This embodiment provides a self-protected power-on fluctuation suppression circuit, such as... Figure 3As shown, the self-protected power-on fluctuation suppression circuit includes a primary power supply, a secondary power supply, a self-protection module, and a subsequent power consumption module. The input terminal of the primary power supply is used to receive the primary input voltage Vin1. The output terminal of the primary power supply is connected to the input terminal of the secondary power supply and the first input terminal of the self-protection module. The output terminal of the secondary power supply is connected to the second input terminal of the self-protection module and the subsequent power consumption module. The output terminal of the self-protection module is also connected to the subsequent power consumption module. The self-protection module has the following features: a first input terminal receives the first-stage output voltage Vout1 from the first-stage power supply; the first-stage output voltage Vout1 is also input to the second-stage power supply as its second-stage input voltage Vin2; the first-stage power supply outputs an enable signal EN to the second-stage power supply; a second input terminal receives the second-stage output voltage Vout2 from the second-stage power supply; and the second-stage output voltage Vout2 is also input to the subsequent power consumption module. The self-protection module generates a control signal based on the received first-level output voltage Vout1 and second-level output voltage Vout2, and outputs the control signal to the subsequent power consumption module. The subsequent power consumption module then determines whether to perform subsequent operations.

[0028] Preferably, such as Figure 4 As shown, after the power-on logic is optimized, a power-on enable signal EN is added to the input of the secondary power supply. When the output voltage Vout2 reaches the operating voltage Vth2 of the downstream power-consuming device, Vout2 fluctuates slightly. When the voltage Vout2 rises again, it will not exceed the maximum fluctuation voltage Voutmax. During this process, Vout1 and Vout2 are monitored in real time. The MCU determines whether they have reached a stable operating state. Then, the MCU determines whether to perform subsequent operations to avoid drastic voltage fluctuations caused by excessive instantaneous current demand from the downstream core device.

[0029] It should be noted that selecting a suitable primary power supply provides appropriate voltages for each subsequent module, and selecting a suitable secondary power supply provides appropriate voltages for the core components of the subsequent stage.

[0030] Preferably, such as Figure 5As shown, the primary power supply includes a first power chip IC1, a first capacitor C1, a second capacitor C2, a third capacitor C3, a first resistor R1, a second resistor R2, a third resistor R3, an inductor L1, and a freewheeling diode DR1. One end of the first capacitor C1 is connected to the primary input voltage Vin1, one end of the first resistor R1, and the fifth pin of the first power chip IC1. The other end of the first capacitor C1 is connected to the other end of the first resistor R1, the fourth pin of the first power chip IC1, and ground. The positive terminal of the freewheeling diode DR1 is grounded, and its negative terminal is connected to the first power chip IC1. One end of inductor L1, one end of second capacitor C2, and the sixth pin of first power chip IC1 are connected; the other end of second capacitor C2 is connected to the first pin of first power chip IC1; the other end of inductor L1 is connected to one end of third capacitor C3, one end of second resistor R2, and the first-stage output voltage Vout1; the other end of third capacitor C3 is connected to the second pin of first power chip IC1 and ground; the other end of second resistor R2 is connected to one end of third resistor R3 and the third pin of first power chip IC1; the other end of third resistor R3 is grounded.

[0031] Specifically, the first power chip IC1 is a DC / DC switching power supply chip or a high-precision voltage regulator chip.

[0032] Preferably, such as Figure 6 As shown, the secondary power supply includes a second power chip IC2, a fourth capacitor C4, a fifth capacitor C5, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7. One end of the fourth resistor R4 is connected to the primary output voltage Vout1, one end of the fourth capacitor C4, and the seventh pin of the second power chip IC2. The other end of the fourth resistor R4 is connected to one end of the fifth resistor R5. The node voltage between the fourth resistor R4 and the fifth resistor R5 is connected to the sixth pin of the second power chip IC2. The fourth resistor R4 and the... The node voltage between the fifth resistor R5 serves as the enable signal EN; the other ends of the fourth capacitor C4 and the fifth resistor R5 are both grounded; the second pin of the second power chip IC2 is connected to one end of the sixth resistor R6, one end of the fifth capacitor C5, and the secondary output voltage Vout2, respectively; the other end of the sixth resistor R6 is connected to one end of the seventh resistor R7, the node voltage between the sixth resistor R6 and the seventh resistor R7 is connected to the third pin of the second power chip IC2, and the other ends of the fifth capacitor C5 and the seventh resistor R7 are both grounded.

[0033] Specifically, the second power chip IC2 is a linear regulated power chip.

[0034] Preferably, such as Figure 7 As shown, the self-protection module includes a first voltage follower IC3B, a second voltage follower IC4B, an AND gate IC5A, a sixth capacitor C6, a seventh capacitor C7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, and a thirteenth resistor R13. One end of the eighth resistor R8 is connected to the first-stage output voltage Vout1, and the other end of the eighth resistor R8 is connected to one end of the ninth resistor R9, one end of the sixth capacitor C6, and the positive input terminal of the first voltage follower IC3B. The other ends of the ninth resistor R9 and the sixth capacitor C6 are both grounded. The negative input terminal of the first voltage follower IC3B is connected to one end of the tenth resistor R10, and the other end of the tenth resistor R10... One end of the resistor is connected to the output of the first voltage follower IC3B and the first pin of the AND gate IC5A; one end of the eleventh resistor R11 is connected to the second-stage output voltage Vout2, and the other end of the eleventh resistor R11 is connected to one end of the twelfth resistor R12, one end of the seventh capacitor C7, and the positive input of the second voltage follower IC4B, and the other ends of the twelfth resistor R12 and the seventh capacitor C7 are both grounded; the negative input of the second voltage follower IC4B is connected to one end of the thirteenth resistor R13, and the other end of the thirteenth resistor R13 is connected to the output of the second voltage follower IC4B and the second pin of the AND gate IC5A; the third pin of the AND gate IC5A is connected to the subsequent power consumption module.

[0035] In this embodiment of the invention, the downstream power consumption module includes an MCU.

[0036] The self-protected power-on fluctuation suppression circuit provided in this embodiment of the invention operates as follows: (1) such as Figure 5 As shown, C1 and R1 provide filtering and enabling functions for the primary power supply. C1 should be adapted according to the specific manual requirements. C2 serves as the bypass capacitor for the first power chip IC1, which can suppress high-frequency self-oscillating EMI, filter AC noise, and ensure normal DC current flow. L1 and DR1 serve as freewheeling and energy storage current supply devices for the switching current output section of the first power chip IC1, ensuring that the first power chip IC1 can output voltage normally. R2 and R3 serve as output voltage feedback resistors, and the voltage value at their nodes is input to the first power chip IC1, which can help the first power chip IC1 detect whether the output voltage meets the requirements in real time and adjust accordingly. C3 serves as the output filter capacitor, which can filter AC noise and ensure the stability of the output voltage. (2) Connect Vin2 / Vout1, output from the primary power supply, to the input terminal of the secondary power supply; such as Figure 6 As shown, one path of Vin2 / Vout1 is connected to the input pin IN of the second power chip IC2, and the other path is connected to the enable pin EN of the second power chip IC2. R4 and R5 divide Vin2 / Vout1 and connect the node voltage to the enable pin EN of the second power chip IC2. When the node voltage reaches the enable voltage of the second power chip IC2, the secondary power supply starts to work. C4 serves as the input filter capacitor, which can filter out AC noise and ensure that the voltage input to the second power chip IC2 is stable. R6 and R7 serve as the output voltage feedback resistor, and their node voltage values ​​are input to the second power chip IC2, which can help the second power chip IC2 detect whether the output voltage meets the requirements in real time and adjust it accordingly. C5 serves as the output filter capacitor, which can filter out AC noise and ensure the stability of the output voltage. (3) such as Figure 7 As shown, R8 and R9 are connected in series to divide the input voltage Vin2, ensuring that the value at this point is within a reasonable range that the first voltage follower IC3B can acquire (referencing the threshold voltage of the high level of AND gate IC5A). C6 then filters the voltage. R10 connects the output of the first voltage follower IC3B to its negative input as voltage feedback. R11 and R12 are connected in series to divide the input voltage Vout2, ensuring that the value at this point is within a reasonable range that the second voltage follower IC4B can acquire (referencing the threshold voltage of the high level of AND gate IC5A). C7 then filters the voltage. R13 connects the output of the second voltage follower IC4B to its negative input as... Voltage feedback: The acquired results are input to AND gate IC5A after passing through voltage followers (first voltage follower IC3B and second voltage follower IC4B). AND gate IC5A compares the values ​​input from the first voltage follower IC3B and the second voltage follower IC4B with their high and low level thresholds. When both reach the high level threshold voltage, AND gate IC5A will output a high level signal to the subsequent power consumption module. Under any other conditions, it will output a low level to the subsequent power consumption module. The subsequent power consumption module determines whether to start subsequent operations with high current consumption after Vin1 / Vout1 and Vout2 have reached a steady state. In this way, the failure phenomenon of core components being damaged due to drastic voltage fluctuations caused by excessive current demand of the subsequent stage can be avoided to the greatest extent.

[0037] In this embodiment of the invention, Vin1 / Vout1 and Vout2 are divided by resistors R8 / R9 and R11 / R12. The divided voltage values ​​are filtered and delayed by voltage follower IC3B and IC4B before being sent to AND gate IC5A. After processing by IC3B, IC4B, and IC5A, it can be ensured that the power supply voltages at each stage are in a stable state when the MCU receives the power-on stability flag. The result of the operation by AND gate IC5A is transmitted to the MCU, which makes a judgment. When the MCU receives a high level signal MCU_TX, it detects the signal and determines whether to perform subsequent operations after confirming that the MCU_TX high level is maintained for a certain period of time (which can be adjusted according to the actual situation: for example, 50ms).

[0038] The present invention provides a self-protected power-on fluctuation suppression circuit, which, through a combination of a voltage follower and a logic AND gate, minimizes the failure of core components caused by drastic voltage fluctuations due to excessive current demand in the downstream stage.

[0039] It is understood that the above embodiments are merely exemplary implementations used to illustrate the principles of the present invention, and the present invention is not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and essence of the present invention, and these modifications and improvements are also considered to be within the scope of protection of the present invention.

Claims

1. A self-protected power-on fluctuation suppression circuit, characterized in that, The self-protected power-on fluctuation suppression circuit includes a primary power supply, a secondary power supply, a self-protection module, and a subsequent power consumption module. The input terminal of the primary power supply is used to receive the primary input voltage Vin1. The output terminal of the primary power supply is connected to the input terminal of the secondary power supply and the first input terminal of the self-protection module. The output terminal of the secondary power supply is connected to the second input terminal of the self-protection module and the subsequent power consumption module. The output terminal of the self-protection module is also connected to the subsequent power consumption module. The self-protection module has the following features: a first input terminal receives the first-stage output voltage Vout1 from the first-stage power supply; the first-stage output voltage Vout1 is also input to the second-stage power supply as its second-stage input voltage Vin2; the first-stage power supply outputs an enable signal EN to the second-stage power supply; a second input terminal receives the second-stage output voltage Vout2 from the second-stage power supply; and the second-stage output voltage Vout2 is also input to the subsequent power consumption module. The self-protection module generates a control signal based on the received first-level output voltage Vout1 and second-level output voltage Vout2, and outputs the control signal to the subsequent power consumption module. The subsequent power consumption module then determines whether to perform subsequent operations.

2. The self-protected power-on fluctuation suppression circuit according to claim 1, characterized in that, The primary power supply includes a first power chip IC1, a first capacitor C1, a second capacitor C2, a third capacitor C3, a first resistor R1, a second resistor R2, a third resistor R3, an inductor L1, and a freewheeling diode DR1. One end of the first capacitor C1 is connected to the primary input voltage Vin1, one end of the first resistor R1, and the fifth pin of the first power chip IC1. The other end of the first capacitor C1 is connected to the other end of the first resistor R1, the fourth pin of the first power chip IC1, and ground. The positive terminal of the freewheeling diode DR1 is grounded, and its negative terminal is connected to the inductor L1. One end of the inductor L1 is connected to one end of the second capacitor C2 and the sixth pin of the first power chip IC1; the other end of the second capacitor C2 is connected to the first pin of the first power chip IC1; the other end of the inductor L1 is connected to one end of the third capacitor C3, one end of the second resistor R2 and the first-stage output voltage Vout1; the other end of the third capacitor C3 is connected to the second pin of the first power chip IC1 and ground; the other end of the second resistor R2 is connected to one end of the third resistor R3 and the third pin of the first power chip IC1; the other end of the third resistor R3 is grounded.

3. The self-protected power-on fluctuation suppression circuit according to claim 2, characterized in that, The first power chip IC1 is a DC / DC switching power supply chip or a high-precision voltage regulator chip.

4. The self-protected power-on fluctuation suppression circuit according to claim 1, characterized in that, The secondary power supply includes a second power chip IC2, a fourth capacitor C4, a fifth capacitor C5, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7. One end of the fourth resistor R4 is connected to the first-stage output voltage Vout1, one end of the fourth capacitor C4, and the seventh pin of the second power chip IC2. The other end of the fourth resistor R4 is connected to one end of the fifth resistor R5. The node voltage between the fourth resistor R4 and the fifth resistor R5 is connected to the sixth pin of the second power chip IC2. The node voltage between resistors R5 serves as the enable signal EN; the other end of the fourth capacitor C4 and the other end of the fifth resistor R5 are both grounded; the second pin of the second power chip IC2 is connected to one end of the sixth resistor R6, one end of the fifth capacitor C5, and the secondary output voltage Vout2, respectively; the other end of the sixth resistor R6 is connected to one end of the seventh resistor R7, the node voltage between the sixth resistor R6 and the seventh resistor R7 is connected to the third pin of the second power chip IC2, and the other end of the fifth capacitor C5 and the other end of the seventh resistor R7 are both grounded.

5. The self-protected power-on fluctuation suppression circuit according to claim 4, characterized in that, The second power chip IC2 is a linear regulated power chip.

6. The self-protected power-on fluctuation suppression circuit according to claim 1, characterized in that, The self-protection module includes a first voltage follower IC3B, a second voltage follower IC4B, an AND gate IC5A, a sixth capacitor C6, a seventh capacitor C7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, and a thirteenth resistor R13. One end of the eighth resistor R8 is connected to the first-stage output voltage Vout1, and the other end of the eighth resistor R8 is connected to one end of the ninth resistor R9, one end of the sixth capacitor C6, and the positive input terminal of the first voltage follower IC3B. The other ends of the ninth resistor R9 and the sixth capacitor C6 are both grounded. The negative input terminal of the first voltage follower IC3B is connected to one end of the tenth resistor R10, and the other end of the tenth resistor R10... The output terminal of the first voltage follower IC3B and the first pin of the AND gate IC5A are connected respectively; one end of the eleventh resistor R11 is connected to the second-stage output voltage Vout2, and the other end of the eleventh resistor R11 is connected to one end of the twelfth resistor R12, one end of the seventh capacitor C7, and the positive input terminal of the second voltage follower IC4B respectively; the other ends of the twelfth resistor R12 and the seventh capacitor C7 are both grounded; the negative input terminal of the second voltage follower IC4B is connected to one end of the thirteenth resistor R13, and the other end of the thirteenth resistor R13 is connected to the output terminal of the second voltage follower IC4B and the second pin of the AND gate IC5A respectively; the third pin of the AND gate IC5A is connected to the subsequent power consumption module.

7. The self-protected power-on fluctuation suppression circuit according to claim 1, characterized in that, The power-consuming module includes an MCU.

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