High-voltage LED chip and method for manufacturing the same

Abstract

The application provides a high-voltage LED chip and a preparation method thereof, and belongs to the field of semiconductors. The high-voltage LED chip comprises an epitaxial structure layer, a circuit wafer, and an interconnection metal layer which spans an isolation groove and is sequentially connected with a second type ohmic contact electrode and a first type ohmic contact electrode of two adjacent LED light emitting units to connect the two adjacent LED light emitting units. The interconnection metal layer spans the isolation groove to connect the two adjacent LED light emitting units, that is, the interconnection metal layer does not extend along the sidewall of the isolation groove, so that the situation that the sidewall of the isolation groove is covered by the interconnection metal layer and is broken can be fundamentally avoided.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a high-voltage LED chip and its fabrication method. Background Technology

[0002] A light-emitting diode (LED) is a semiconductor light-emitting device with characteristics such as low power consumption, small size, long lifespan, good stability, fast response, and stable emission wavelength. It is currently widely used in lighting, home appliances, displays, indicator lights, and other fields.

[0003] Chip-level high-voltage LED chips have seen rapid development due to their low power loss during packaging, greater ease of back-end packaging, and higher cost-effectiveness. However, chip-level high-voltage designs can only achieve this by isolating individual chips and then applying photomask coatings and metal interconnects. While individual chips are physically isolated via isolation trenches, the steep angles of these trenches can cause the interconnect metal covering the slopes to break, leading to chip failure and reduced reliability.

[0004] It should be noted that the information disclosed in the background section of this invention is intended only to enhance the understanding of the general background of this invention, and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention

[0005] The purpose of this invention is to provide a high-voltage LED chip and its manufacturing method to solve the problem of chip failure caused by the breakage of interconnect metal between two adjacent chips.

[0006] To solve the above-mentioned technical problems, the present invention provides a high-voltage LED chip, comprising:

[0007] An epitaxial structure layer includes at least two LED light-emitting units, each of which is formed with a first type of ohmic contact electrode and a second type of ohmic contact electrode;

[0008] Isolation trenches are set between two adjacent LED light-emitting units;

[0009] A circuit wafer having a first type of contact pad and a second type of contact pad, wherein the first type of contact pad is connected to a first type of ohmic contact electrode of an LED light-emitting unit at the beginning, and the second type of contact pad is connected to a second type of ohmic contact electrode of an LED light-emitting unit at the end.

[0010] An interconnecting metal layer spans the isolation trench and sequentially connects the second type of ohmic contact electrode and the first type of ohmic contact electrode of two adjacent LED light-emitting units to connect the two adjacent LED light-emitting units.

[0011] Preferably, the interconnecting metal layer is electrically connected to the second type of ohmic contact electrode and the first type of ohmic contact electrode by bonding or welding.

[0012] Preferably, the area of ​​the interconnect metal layer in contact with the first type of ohmic contact electrode is larger than the area of ​​the first type of ohmic contact electrode, and the area of ​​the interconnect metal layer in contact with the second type of ohmic contact electrode is larger than the area of ​​the second type of ohmic contact electrode.

[0013] Preferably, the first type of ohmic contact electrode is a p-type ohmic contact electrode, the second type of ohmic contact electrode is an n-type ohmic contact electrode, the first type of contact pad is a p-type contact pad, and the second type of contact pad is an n-type contact pad.

[0014] Preferably, each of the LED light-emitting units includes an n-type semiconductor layer, a quantum well structure, and a p-type semiconductor layer arranged sequentially, wherein the n-type ohmic contact electrode is disposed on the surface of the n-type semiconductor layer and the p-type ohmic contact electrode is disposed on the surface of the p-type semiconductor layer.

[0015] Preferably, the LED light-emitting unit further includes a buffer layer, and the n-type semiconductor layer is disposed on the surface of the buffer layer.

[0016] Preferably, a first insulating layer is disposed on the surface of the epitaxial structure layer, and a second insulating layer is disposed between the circuit wafer and the p-type contact pad, n-type contact pad and interconnect metal layer.

[0017] Preferably, the first insulating layer includes a DBR optical reflective layer, and the second insulating layer includes at least one of a silicon oxide layer, a silicon nitride layer, and an aluminum oxide layer.

[0018] Preferably, the DBR optical reflective layer is provided with through holes, including a first through hole and a second through hole. The p-type contact pad is electrically connected to the p-type ohmic contact electrode of the LED light-emitting unit located at the first end of the chip through the first through hole, and the n-type contact pad is electrically connected to the n-type ohmic contact electrode of the LED light-emitting unit located at the end of the chip through the second through hole.

[0019] Preferably, the circuit wafer includes any one of sapphire wafers, Si wafers, GaAs wafers, and InP wafers.

[0020] Based on the same inventive concept, the present invention also provides a method for fabricating a high-voltage LED chip, including providing a substrate;

[0021] An epitaxial structure layer is formed on the substrate, including at least two LED light-emitting units, each of the LED light-emitting units having a first type of ohmic contact electrode and a second type of ohmic contact electrode;

[0022] Isolation trenches are formed in the epitaxial structure layer between two adjacent LED light-emitting units;

[0023] A circuit wafer is provided, the circuit wafer having a first type of contact pad and a second type of contact pad, the first type of contact pad being connected to a first type of ohmic contact electrode of an LED light-emitting unit at the beginning, and the second type of contact pad being connected to a second type of ohmic contact electrode of an LED light-emitting unit at the end.

[0024] An interconnect metal layer is formed on the circuit wafer;

[0025] The interconnect metal layer is sequentially connected to the second type of ohmic contact electrode and the first type of ohmic contact electrode of two adjacent LED light-emitting units to connect the two adjacent LED light-emitting units, and the interconnect metal layer spans the isolation trench;

[0026] Remove the substrate.

[0027] Compared with the prior art, the high-voltage LED chip of the present invention has the following advantages:

[0028] This invention connects two adjacent LED light-emitting units by having an interconnect metal layer spanning an isolation trench. This means the interconnect metal layer does not extend along the sidewall of the isolation trench, fundamentally preventing breakage of the interconnect metal layer covering the sidewall of the isolation trench and thus avoiding chip failure due to interconnect metal layer breakage. Furthermore, high-voltage LED chips fabricated using this design have identical interconnect metal layer formation processes. Later, only the flow structure after connecting the interconnect metal layer to the ohmic contact electrode needs to be changed according to actual voltage requirements. This eliminates the need for photolithography costs in the design and manufacturing process, thereby reducing the cost of high-voltage LED chips. Attached Figure Description

[0029] Figure 1 This is a top view of the high-voltage LED chip in one embodiment of the present invention;

[0030] Figure 2 It is along Figure 1 Schematic diagram of the cross-sectional structure at point AA;

[0031] Figure 3 It is along Figure 2 A schematic diagram of the structure including the first LED light-emitting unit after being divided along dividing line a;

[0032] Figure 4 This is a schematic diagram of an LED light-emitting unit formed on a substrate according to an embodiment of the present invention;

[0033] Figure 5 This is a schematic diagram of the structure of a circuit wafer in one embodiment of the present invention;

[0034] Figure 6 This is a flowchart of a method for preparing a high-voltage LED chip according to an embodiment of the present invention;

[0035] In the picture,

[0036] 10. First LED light-emitting unit; 20. Second LED light-emitting unit; 30. Third LED light-emitting unit; 100. Epitaxial structure layer; 110. n-type semiconductor layer; 120. Quantum well structure; 130. p-type semiconductor layer; 140. First type ohmic contact electrode; 150. First via; 160. First insulating layer; 170. Second type ohmic contact electrode; 180. Second via; 200. Circuit wafer; 210. First type contact pad; 220. Second type contact pad; 230. Interconnect metal layer; 240. Second insulating layer; 300. Isolation trench; 310. First ramp sidewall; 320. Bottom platform; 330. Second ramp sidewall; 400. Substrate. Detailed Implementation

[0037] To make the objectives, advantages, and features of the present invention clearer, the high-voltage LED chip and its fabrication method proposed in this invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, used only to facilitate and clarify the illustration of the embodiments of the present invention. It should be understood that the accompanying drawings do not necessarily show the specific structure of the invention to scale, and the illustrative features used to illustrate certain principles of the invention in the accompanying drawings are also drawn in a slightly simplified manner. Specific design features of the invention disclosed herein, including, for example, specific dimensions, orientations, positions, and shapes, will be determined in part by the specific application and environment in which they are used. Furthermore, in the embodiments described below, the same reference numerals are sometimes used across different drawings to denote the same parts or parts having the same function, and their repeated descriptions are omitted. In this specification, similar reference numerals and letters are used to denote similar items; therefore, once an item is defined in one drawing, it does not need to be further discussed in subsequent drawings.

[0038] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0039] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0040] The core idea of ​​this invention is to provide a high-voltage LED chip that can avoid chip failure caused by the breakage of the interconnect metal layer at the ramp of the isolation trench, thereby improving the reliability of the product.

[0041] To achieve the above-mentioned goals, this invention provides a high-voltage LED chip, as shown in the figure. Figures 1 to 5 This invention discloses a specific embodiment of a high-voltage LED chip. The high-voltage LED chip includes: an epitaxial structure layer 100, an isolation trench 300, a circuit wafer 200, and an interconnect metal layer 230. The epitaxial structure layer 100 includes at least two LED light-emitting units, each of which forms a first type ohmic contact electrode 140 and a second type ohmic contact electrode 170. The isolation trench 300 is disposed between two adjacent LED light-emitting units. The circuit wafer 200 has a first type contact pad 210 and a second type contact pad 220. The first type contact pad 210 is connected to the first type ohmic contact electrode 140 of the first-end LED light-emitting unit, and the second type contact pad 220 is connected to the second type ohmic contact electrode 170 of the last-end LED light-emitting unit. The interconnect metal layer 230 spans the isolation trench 300 and sequentially connects the second type ohmic contact electrode 170 and the first type ohmic contact electrode 140 of two adjacent LED light-emitting units to connect the two adjacent LED light-emitting units.

[0042] Traditional interconnect metal layers cover the sidewalls and bottom of isolation trenches. Due to the steep angle of the sidewalls of the isolation trenches, traditional interconnect metal layers are prone to breakage at the sidewalls, resulting in discontinuities in the interconnect metal layers. This leads to an increase in the on-resistance of the chip, and may even cause the chip to fail, reducing the chip's reliability.

[0043] However, the high-voltage LED chip disclosed in this application connects two adjacent LED light-emitting units by having the interconnect metal layer 230 span the isolation trench 300. In other words, the interconnect metal layer 230 does not extend along the sidewall of the isolation trench 300, thereby avoiding the possibility of the interconnect metal layer 230 breaking and preventing chip failure due to the breakage of the interconnect metal layer 230. At the same time, the high-voltage LED chip fabricated using this design has the same design for forming the interconnect metal layer 230. Later, according to the actual voltage requirements, only the process structure after connecting the interconnect metal layer 230 to the ohmic contact electrode needs to be changed. That is, to meet different requirements, the photolithography cost in the design and manufacturing process can be saved, thereby reducing the cost of the high-voltage LED chip.

[0044] The following is combined Figures 1 to 5 This application is described in detail.

[0045] refer to Figures 1 to 3 As shown, the epitaxial structure layer 100 can be provided with two LED light-emitting units, or with three or more LED light-emitting units. Figure 1 and Figure 2 The three LED light-emitting units shown are for illustrative purposes only; no specific requirement is made regarding the number of LED light-emitting units. The following will use… Figure 1 and Figure 2 The three LED light-emitting units shown are explained as examples. The first LED light-emitting unit is referred to as the first LED light-emitting unit 10, the middle LED light-emitting unit is referred to as the second LED light-emitting unit 20, and the last LED light-emitting unit is referred to as the third LED light-emitting unit 30. Each of the LED light-emitting units has a first type ohmic contact electrode 140 and a second type ohmic contact electrode 170.

[0046] refer to Figure 2 , Figure 3 and Figure 5As shown, the circuit wafer 200 is disposed opposite to the epitaxial structure layer 100. For example, the circuit wafer 200 can be vertically disposed above the epitaxial structure layer 100. The circuit wafer 200 has a first type of contact pad 210 and a second type of contact pad 220. The first type of contact pad 210 is connected to the first type of ohmic contact electrode 140 of the first LED light-emitting unit, and the second type of contact pad 220 is connected to the second type of ohmic contact electrode 170 of the last LED light-emitting unit. That is, the first type of contact pad 210 is electrically connected to the first type of ohmic contact electrode 140 of the first LED light-emitting unit 10, and the second type of contact pad 220 is electrically connected to the second type of ohmic contact electrode 170 of the third LED light-emitting unit 30. The circuit wafer 200 includes any one of sapphire wafer, Si wafer, GaAs wafer, and InP wafer. The circuit wafer 200 serves as the substrate for a high-voltage LED chip.

[0047] refer to Figure 2 and Figure 3 As shown, in some embodiments, the first type ohmic contact electrode 140 is a p-type ohmic contact electrode, the second type ohmic contact electrode 170 is an n-type ohmic contact electrode, the first type contact pad 210 is a p-type contact pad, and the second type contact pad 220 is an n-type contact pad. The metal forming the p-type ohmic contact electrode, n-type ohmic contact electrode, p-type contact pad, and n-type contact pad can be at least one of nickel (Ni), titanium (Ti), gold (Au), and aluminum (Al). The p-type ohmic contact electrode, n-type ohmic contact electrode, p-type contact pad, and n-type contact pad achieve electrical connection between the chip and the outside.

[0048] refer to Figure 2 and Figure 3 As shown, in some embodiments, each LED light-emitting unit includes an n-type semiconductor layer 110, a quantum well structure 120, and a p-type semiconductor layer 130 sequentially disposed therefrom. The n-type ohmic contact electrode is disposed on the surface of the n-type semiconductor layer 110, and the p-type ohmic contact electrode is disposed on the surface of the p-type semiconductor layer 130. The n-type semiconductor layer 110 can be an n-type gallium nitride material (n-GaN), and the p-type semiconductor layer 130 can be a p-type gallium nitride material (p-GaN).

[0049] In some embodiments, each of the LED light-emitting units further includes a buffer layer (not shown in the figure), and the n-type semiconductor layer 110 covers the surface of the buffer layer.

[0050] refer to Figures 3 to 5As shown, in some embodiments, a first insulating layer 160 is disposed on the surface of the epitaxial structure layer 100, and a second insulating layer 240 is disposed between the circuit wafer 200 and the p-type contact pads, n-type contact pads, and interconnect metal layer 230. The first insulating layer 160 includes a DBR optical reflective layer, which serves to isolate the p-type contact pads and p-type ohmic contact electrodes, and the n-type contact pads and n-type ohmic contact electrodes. The DBR optical reflective layer covers the surface of the epitaxial structure layer 100, as well as the sidewalls and bottom of the isolation trench 300, blocking direct light emission to the interconnect metal layer and contact pads, reducing light absorption loss in the metal. The second insulating layer 240 includes at least one of a silicon oxide layer, a silicon nitride layer, and an aluminum oxide layer. The second insulating layer 240 serves to isolate and insulate the n-type contact pads, p-type contact pads, and interconnect metal layer 230 from the circuit wafer 200.

[0051] refer to Figure 3 As shown, the DBR optical reflective layer is provided with through holes, including a first through hole 150 and a second through hole 180. The p-type contact pad is electrically connected to the p-type ohmic contact electrode of the LED light-emitting unit located at the first end of the chip through the first through hole 150, and the n-type contact pad is electrically connected to the n-type ohmic contact electrode of the LED light-emitting unit located at the end of the chip through the second through hole 180. That is, the p-type ohmic contact electrode of the first LED light-emitting unit 10 is electrically connected to the p-type contact pad through the first through hole 150, and the n-type ohmic contact electrode of the third LED light-emitting unit 30 is electrically connected to the n-type contact pad through the second through hole 180.

[0052] refer to Figure 3 and Figure 4 As shown, an isolation trench 300 is disposed between two adjacent LED light-emitting units to achieve electrical isolation between them. The isolation trench 300 includes a first ramp sidewall 310, a bottom platform 230, and a second ramp sidewall 330. Conventional interconnect metal layers extend sequentially along the first ramp sidewall 310, the bottom platform 230, and the second ramp sidewall 330 of the isolation trench 300. Breakage is prone to occur at the first ramp sidewall 310 and the second ramp sidewall 330.

[0053] refer to Figure 2 , Figure 3 and Figure 5 As shown, the interconnect metal layer 230 spans the isolation trench 300 and sequentially connects the second type ohmic contact electrode 170 and the first type ohmic contact electrode 140 of two adjacent LED light-emitting units to connect the two adjacent LED light-emitting units. For example, as Figure 3As shown, the interconnect metal layer 230 spans the isolation trench 300 and sequentially connects the n-type ohmic contact electrode of the first LED light-emitting unit 10 to the p-type ohmic contact electrode of the second LED light-emitting unit 20. The material of the interconnect metal layer 230 can be at least one of tin (Sn), indium (In), and gold (Au). As can be seen from the structure, the interconnect metal layer 230 disclosed in this application spans the isolation trench 300, realizing the electrical connection between two adjacent LED light-emitting units. That is, the interconnect metal layer 230 does not extend along the first ramp sidewall 310, the bottom platform 230, and the second ramp sidewall 330, thereby fundamentally avoiding the situation where the interconnect metal layer 230 covers the first ramp sidewall 310 and the second ramp sidewall 330 and causing breakage, thus avoiding chip failure caused by discontinuity of the interconnect metal layer 230.

[0054] In some embodiments, the interconnect metal layer 230 is electrically connected to the second type of ohmic contact electrode 170 and the first type of ohmic contact electrode 140 by bonding or welding. The bonding method between the interconnect metal layer 230 and the n-type and p-type ohmic contact electrodes can be metal eutectic bonding, high-temperature bonding, laser bonding, etc., as long as the interconnect metal layer 230 can be fixed together with the n-type and p-type ohmic contact electrodes through bonding to achieve electrical connection.

[0055] In some embodiments, the area of ​​the interconnect metal layer 230 in contact with the first type of ohmic contact electrode 140 is larger than the area of ​​the first type of ohmic contact electrode 140, and the area of ​​the interconnect metal layer 230 in contact with the second type of ohmic contact electrode 170 is larger than the area of ​​the second type of ohmic contact electrode 170. The area of ​​the interconnect metal layer 230 electrically connected to the p-type ohmic contact electrode is larger than the area of ​​the p-type ohmic contact electrode, and the area of ​​the interconnect metal layer 230 electrically connected to the n-type ohmic contact electrode is larger than the area of ​​the n-type ohmic contact electrode. By increasing the contact area, the load distribution is more uniform, the peak stress at the contact edge is reduced, and cracking is reduced, thereby ensuring the reliability of the electrical connection between the interconnect metal layer 230 and the n-type and p-type ohmic contact electrodes and improving the reliability of the high-voltage LED chip.

[0056] In this embodiment, the p-type ohmic contact electrode of the first LED light-emitting unit 10 is electrically connected to the p-type contact pad, the n-type ohmic contact electrode of the third LED light-emitting unit 30 is electrically connected to the n-type contact pad, two adjacent light-emitting units are electrically connected through an interconnecting metal layer 230, the positive terminal of the external power supply is electrically connected to the p-type contact pad, the p-type contact pad serves as the current input terminal, the negative terminal of the external power supply is electrically connected to the n-type ohmic contact electrode, the n-type ohmic contact electrode serves as the current output terminal, thereby realizing the electrical connection between the high-voltage LED chip and the external source.

[0057] In this embodiment, structurally speaking, the interconnect metal layer 230 of multiple LED light-emitting units connected in series inevitably has to climb the sidewall slope of the isolation trench multiple times. The interconnect metal layer at these slopes is often thin due to poor coverage, resulting in higher resistance. In more serious cases, the interconnect metal layer 230 may be discontinuous in some areas due to the steep shape of some slopes. This application connects the interconnect metal layer 230 to the ohmic contact electrode by crossing the isolation trench 300, which fundamentally avoids the slope coverage of the interconnect metal layer and avoids chip failure caused by the discontinuity of the interconnect metal layer.

[0058] In this embodiment, from an economic perspective, this application separates the traditional rule of designing a photomask for each requirement of a high-voltage LED chip. The overall chip is divided into physically isolated LED light-emitting units, circuit wafer 200, and interconnect metal layer 230. When the high-voltage LED chip has different high-voltage requirements, the physically isolated LED light-emitting units can remain unchanged, and only the circuit wafer 200 and interconnect metal layer 230 need to be changed. Therefore, the photomask cost in the design and manufacturing process can be saved to meet different requirements, thereby reducing the cost of the high-voltage LED chip.

[0059] To achieve the above-mentioned goals, this invention provides a method for fabricating a high-voltage LED chip, as described above. Figures 1 to 6 A specific embodiment of the disclosed method for fabricating a high-voltage LED chip. The method for fabricating the high-voltage LED chip includes:

[0060] Step S1: Provide a substrate.

[0061] refer to Figure 4 and Figure 6 As shown, substrate 400 includes any one of sapphire substrate, Si substrate, GaAs substrate, and InP substrate. Taking sapphire substrate as an example, the thickness of the sapphire substrate can be set to 600 μm.

[0062] Step S2: An epitaxial structure layer is formed on the substrate, including at least two LED light-emitting units, each of the LED light-emitting units having a first type of ohmic contact electrode and a second type of ohmic contact electrode.

[0063] refer to Figure 2 , Figure 3 and Figure 6Each of the LED light-emitting units shown includes an n-type semiconductor layer 110, a quantum well structure 120, and a p-type semiconductor layer 130 sequentially disposed therefrom. An n-type ohmic contact electrode is disposed on the surface of the n-type semiconductor layer 110, and a p-type ohmic contact electrode is disposed on the surface of the p-type semiconductor layer 130. The n-type semiconductor layer 110 can be made of n-type gallium nitride (n-GaN), and the p-type semiconductor layer 130 can be made of p-type gallium nitride (p-GaN). The thickness of the epitaxial structure layer 100 can be set to 5 μm.

[0064] Each of the LED light-emitting units further includes a buffer layer (not shown in the figure), and the n-type semiconductor layer 110 covers the surface of the buffer layer.

[0065] Step S3: Form isolation trenches in the epitaxial structure layer between two adjacent LED light-emitting units. (Reference) Figure 2 , Figure 3 So and Figure 6 As shown, before forming the LED light-emitting unit, an n-type semiconductor material layer, a quantum well structure material layer, and a p-type semiconductor material layer are sequentially deposited on the substrate 400. Using a photomask, exposure, development, and dry etching techniques are employed to etch away portions of the n-type semiconductor material layer, quantum well structure material layer, and p-type semiconductor material layer, forming a P-GaN mesa and its sidewalls, an N-GaN mesa and its sidewalls, and a bottom mesa 230. An isolation trench 300 is formed on the bottom mesa 230 to isolate adjacent LED light-emitting units. Figure 3 As shown, the three LED light-emitting units are isolated.

[0066] Next, refer to Figure 3 As shown, a DBR optical reflective layer is formed as the first insulating layer, and the DBR optical reflective layer is subjected to processes such as exposure, development and wet etching to form a patterned DBR insulating protective layer.

[0067] Continue to refer to Figure 3 As shown, a first through-hole 150 and a second through-hole 180 are then formed on the DBR optical reflective layer.

[0068] Finally, using photolithography and metal evaporation lift-off processes, p-type ohmic contact electrodes are formed on the P-GaN mesa, and n-type ohmic contact electrodes are formed on the N-GaN mesa. In subsequent processes, the p-type ohmic contact electrode of the first LED light-emitting unit 10 is electrically connected to the p-type contact pad through the first via 150, and the n-type ohmic contact electrode of the third LED light-emitting unit 30 is electrically connected to the n-type contact pad through the second via 180.

[0069] Step S4: Provide a circuit wafer having a first type of contact pad and a second type of contact pad. The first type of contact pad is connected to a first type of ohmic contact electrode of the LED light-emitting unit at the beginning, and the second type of contact pad is connected to a second type of ohmic contact electrode of the LED light-emitting unit at the end.

[0070] refer to Figure 2 , Figure 3 , Figure 5 and Figure 6 As shown, the circuit wafer 200 includes any one of sapphire wafers, Si wafers, GaAs wafers, and InP wafers. The circuit wafer 200 serves as the substrate for a high-voltage LED chip. Taking a sapphire wafer as an example, the thickness of the sapphire wafer can be set to 600 μm.

[0071] First, a 50nm thick SiNx insulating layer is deposited on the sapphire wafer using a PECVD process as a second insulating layer 240. The second insulating layer 240 is provided between the circuit wafer 200 and the p-type contact pads, n-type contact pads, and interconnect metal layer 230, serving as an insulating layer between the n-type contact pads, p-type contact pads, interconnect metal layer 230, and the circuit wafer 200.

[0072] Step S5: Form an interconnect metal layer on the circuit wafer.

[0073] refer to Figure 2 , Figure 3 and Figure 5 As shown, a metal material layer is first formed on the circuit wafer 200; then, the metal material layer is patterned by exposure, development, etching, and metal stripping processes to form p-type contact pads, n-type contact pads, and interconnect metal layer 230, respectively.

[0074] Step S6: Connect the interconnect metal layer sequentially to the second type of ohmic contact electrode and the first type of ohmic contact electrode of two adjacent LED light-emitting units to connect the two adjacent LED light-emitting units. The interconnect metal layer spans the isolation trench.

[0075] refer to Figure 3 As shown, the interconnect metal layer 230 can be electrically connected to the second type of ohmic contact electrode 170 and the first type of ohmic contact electrode 140 by bonding or soldering. The bonding method between the interconnect metal layer 230 and the n-type and p-type ohmic contact electrodes can be metal eutectic bonding, high-temperature bonding, laser bonding, etc., as long as the interconnect metal layer 230 can be fixed together with the n-type and p-type ohmic contact electrodes through bonding to achieve electrical connection.

[0076] Step S7: Remove the substrate.

[0077] In some embodiments, the substrate 400 can be removed by chemical mechanical polishing (CMP).

[0078] Step S8: Thin the circuit wafer to form a high-voltage LED chip.

[0079] The sapphire wafer is thinned to 90μm using chemical mechanical polishing (CMP). It should be noted that hundreds or thousands of LED light-emitting units are fabricated on a conventional wafer. Therefore, after fabrication, the wafer needs to be cut along pre-defined grooves to form a single high-voltage LED chip.

[0080] It should be noted that those skilled in the art are already familiar with the specific processes involved in the above preparation method, and will not elaborate further here.

[0081] The high-voltage LED chip fabrication method disclosed in this embodiment connects the interconnect metal layer 230 to the ohmic contact electrode by having the interconnect metal layer 230 span the isolation trench 300, fundamentally avoiding the breakage of the interconnect metal layer during ramping and preventing chip failure caused by discontinuity of the interconnect metal layer.

[0082] In summary, the above embodiments have provided detailed descriptions of different configurations of high-voltage LED chips and their fabrication methods. Of course, the above descriptions are only descriptions of preferred embodiments of the present invention and are not intended to limit the scope of the present invention in any way. The present invention includes, but is not limited to, the configurations listed in the above embodiments. Those skilled in the art can draw inferences from the above embodiments. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A high-voltage LED chip, characterized in that, include: An epitaxial structure layer includes at least two LED light-emitting units, each of which is formed with a first type of ohmic contact electrode and a second type of ohmic contact electrode; Isolation trenches are set between two adjacent LED light-emitting units; A circuit wafer having a first type of contact pad and a second type of contact pad, wherein the first type of contact pad is connected to a first type of ohmic contact electrode of an LED light-emitting unit at the beginning, and the second type of contact pad is connected to a second type of ohmic contact electrode of an LED light-emitting unit at the end. An interconnecting metal layer spans the isolation trench and sequentially connects the second type of ohmic contact electrode and the first type of ohmic contact electrode of two adjacent LED light-emitting units to connect the two adjacent LED light-emitting units.

2. The high-voltage LED chip according to claim 1, characterized in that, The interconnecting metal layer is electrically connected to the second type of ohmic contact electrode and the first type of ohmic contact electrode by bonding or welding.

3. The high-voltage LED chip according to claim 1, characterized in that, The area of ​​the interconnect metal layer in contact with the first type of ohmic contact electrode is larger than the area of ​​the first type of ohmic contact electrode, and the area of ​​the interconnect metal layer in contact with the second type of ohmic contact electrode is larger than the area of ​​the second type of ohmic contact electrode.

4. The high-voltage LED chip according to claim 1, characterized in that, The first type of ohmic contact electrode is a p-type ohmic contact electrode, the second type of ohmic contact electrode is an n-type ohmic contact electrode, the first type of contact pad is a p-type contact pad, and the second type of contact pad is an n-type contact pad.

5. The high-voltage LED chip according to claim 4, characterized in that, Each LED light-emitting unit includes an n-type semiconductor layer, a quantum well structure, and a p-type semiconductor layer arranged sequentially. The n-type ohmic contact electrode is disposed on the surface of the n-type semiconductor layer, and the p-type ohmic contact electrode is disposed on the surface of the p-type semiconductor layer.

6. The high-voltage LED chip according to claim 5, characterized in that, The LED light-emitting unit further includes a buffer layer, and the n-type semiconductor layer is disposed on the surface of the buffer layer.

7. The high-voltage LED chip according to claim 5, characterized in that, A first insulating layer is disposed on the surface of the epitaxial structure layer, and a second insulating layer is disposed between the circuit wafer and the p-type contact pad, n-type contact pad and interconnect metal layer.

8. The high-voltage LED chip according to claim 7, characterized in that, The first insulating layer includes a DBR optical reflective layer, and the second insulating layer includes at least one of a silicon oxide layer, a silicon nitride layer, and an aluminum oxide layer.

9. The high-voltage LED chip according to claim 8, characterized in that, The DBR optical reflective layer is provided with through holes, including a first through hole and a second through hole. The p-type contact pad is electrically connected to the p-type ohmic contact electrode of the LED light-emitting unit located at the beginning of the chip through the first through hole, and the n-type contact pad is electrically connected to the n-type ohmic contact electrode of the LED light-emitting unit located at the end of the chip through the second through hole.

10. The high-voltage LED chip according to claim 1, characterized in that, The circuit wafer includes any one of sapphire wafers, Si wafers, GaAs wafers, and InP wafers.

11. A method for preparing a high-voltage LED chip as described in any one of claims 1-10, characterized in that, include: Provide a substrate; An epitaxial structure layer is formed on the substrate, including at least two LED light-emitting units, each of the LED light-emitting units having a first type of ohmic contact electrode and a second type of ohmic contact electrode; Isolation trenches are formed in the epitaxial structure layer between two adjacent LED light-emitting units; A circuit wafer is provided, the circuit wafer having a first type of contact pad and a second type of contact pad, the first type of contact pad being connected to a first type of ohmic contact electrode of an LED light-emitting unit at the beginning, and the second type of contact pad being connected to a second type of ohmic contact electrode of an LED light-emitting unit at the end. An interconnect metal layer is formed on the circuit wafer; The interconnect metal layer is sequentially connected to the second type of ohmic contact electrode and the first type of ohmic contact electrode of two adjacent LED light-emitting units to connect the two adjacent LED light-emitting units, and the interconnect metal layer spans the isolation trench; Remove the substrate.

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