Mainboard and electronic equipment

Abstract

The utility model discloses a mainboard and electronic equipment. The mainboard comprises a processor, a bridge piece, a microcontroller and a network card chip, the microcontroller has a remote switch awakening function, the processor is connected with the bridge piece through a data bus, the bridge piece is connected with the microcontroller through a control bus, the microcontroller is connected with the bridge piece through a power switch interface, and the network card chip is connected with the power switch interface. The microcontroller is connected with the network card wake-up interface of the network card chip, and the microcontroller is connected with the peripheral wake-up interface of the bridge chip, so that the mainboard realizes remote startup and shutdown and wake-up control, and the mainboard is simple in design, low in cost and convenient to maintain.

Description

Technical Field

[0001] The utility model relates to the technical field of computers, in particular to a mainboard and an electronic device. Background Art

[0002] With the development of science and technology, the demand for high-performance computers is increasing day by day, and the performance of core components such as processors, bridge chips, and microcontrollers has been greatly improved. The motherboard design of notebook or desktop platforms based on high-performance processors, bridge chips, and microcontrollers has become particularly important. The current motherboard design can no longer meet the requirements of real-time and reliability of information processing. Utility Model Content

[0003] In view of the above problems, the present utility model is proposed to provide a mainboard and an electronic device that overcome the above problems or at least partially solve the above problems.

[0004] According to one aspect of the utility model, a mainboard is provided, the mainboard comprising a processor, a bridge chip, a microcontroller, and a network card chip; the microcontroller has a remote switch wake-up function;

[0005] The processor is connected to the bridge chip via a data bus;

[0006] The bridge chip is connected to the microcontroller via a control bus;

[0007] The microcontroller is connected to the bridge chip via a power switch interface, the microcontroller is connected to a network card wake-up interface of the network card chip, and the microcontroller is connected to a peripheral wake-up interface of the bridge chip.

[0008] Optionally, the processor is connected to the microcontroller via an asynchronous serial port bus.

[0009] Optionally, the bridge chip is connected to the microcontroller via a power management state interface.

[0010] Optionally, the processor is connected to the microcontroller via an input / output interface, and the bridge chip is connected to the microcontroller via a standby voltage state interface.

[0011] Optionally, the mainboard further includes a network connector, the bridge chip is connected to the network connector via a universal serial bus, the bridge chip is connected to the network card chip via a peripheral interconnect bus, and the network connector is connected to the network card chip.

[0012] Optionally, the mainboard further includes a display interface and a serial communication interface, and the processor and the bridge chip are both connected to the display interface and the serial communication interface.

[0013] Optionally, the bridge chip is connected to one 16-bit wide peripheral slot, one 8-bit wide peripheral slot, and one 4-bit wide peripheral slot respectively through a peripheral interconnect bus.

[0014] Optionally, the bridge chip is connected to a plurality of universal serial interfaces via a universal serial bus.

[0015] Optionally, the processor is a Loongson 3A6000 processor, the bridge chip is a Loongson 7A2000 bridge chip, and the microcontroller is a Loongson 1C103 microcontroller.

[0016] According to another aspect of the utility model, an electronic device is provided, comprising the mainboard as claimed in the above claims.

[0017] According to a mainboard of the utility model, a processor, a bridge chip, a microcontroller, and a network card chip are included. The microcontroller has a remote switch wake-up function. The processor is connected to the bridge chip through a data bus, the bridge chip is connected to the microcontroller through a control bus, the microcontroller is connected to the bridge chip through a power switch interface, the microcontroller is connected to the network card wake-up interface of the network card chip, and the microcontroller is connected to the peripheral wake-up interface of the bridge chip, so that the mainboard can realize remote power on / off and wake-up control, and has a simple design, low cost, and easy maintenance.

[0018] The above description is only an overview of the technical solution of the utility model. In order to more clearly understand the technical means of the utility model, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the utility model more obvious and easy to understand, the specific implementation methods of the utility model are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] By reading the detailed description of the preferred embodiment below, various other advantages and benefits will become clear to those of ordinary skill in the art. The accompanying drawings are only used for the purpose of illustrating the preferred embodiment and are not considered to be limiting of the present invention. Moreover, the same reference symbols are used throughout the accompanying drawings to represent the same components. In the accompanying drawings:

[0020] Figure 1 A schematic diagram of the structure of a mainboard according to an embodiment of the utility model is shown;

[0021] Figure 2 A schematic diagram of a mainboard is shown;

[0022] Figure 3 A structural schematic diagram of a mainboard described in an embodiment of the utility model is shown. DETAILED DESCRIPTION

[0023] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0024] In the description of the present invention, unless otherwise specified, "plurality" means two or more than two; the directions or positional relationships indicated by the terms "upper", "lower", "left", "right", "inside", "outside", etc. are based on the directions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the machine or component referred to must have a specific direction, be constructed and operated in a specific direction, and therefore cannot be understood as a limitation on the present invention.

[0025] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0026] The specific implementation of the utility model is further described in detail below in conjunction with the accompanying drawings and examples. The following examples are used to illustrate the utility model, but are not used to limit the scope of the utility model.

[0027] See also Figure 1 The utility model provides a mainboard 100 including a processor 101 , a bridge chip 102 , a microcontroller 103 , and a network card chip 104 .

[0028] The processor 101 is connected to the bridge chip 102 via a data bus; the bridge chip 102 is connected to the microcontroller 103 via a control bus; the microcontroller 103 is connected to the bridge chip 102 via a power switch interface, the microcontroller is connected to the network card wake-up interface of the network card chip 104, and the microcontroller 103 is connected to the peripheral wake-up interface of the bridge chip 102.

[0029] In an embodiment of the utility model, the microcontroller has a remote switch wake-up function. The data bus refers to a bus mainly used for data sharing and exchange, such as HT (HyperTransport, end-to-end bus), or any other applicable bus, and the embodiment of the utility model does not limit this. The control bus refers to a bus mainly used for one device to control another device, such as I2C (Inter-Integrated Circuit, internal integrated circuit) bus, or any other applicable bus, and the embodiment of the utility model does not limit this. The power switch interface refers to an interface for controlling the power switch, such as the ACPI_PWRBTn (Advanced Configuration Power Interface_Power Button) interface on the bridge chip, or any other applicable interface, and the embodiment of the utility model does not limit this. The wake-up interface of the network card chip is recorded as the network card wake-up interface. The wake-up interface of the peripheral of the bridge chip is recorded as the peripheral wake-up interface.

[0030] For example, Figure 2 In the schematic diagram of the motherboard shown, the processor can be a Loongson 3A6000 processor. The bridge chip can be a Loongson 7A2000 bridge chip. The 3A6000 processor and the 7A2000 bridge chip can be connected to each other through a 16-bit wide HT. The microcontroller unit (MCU) can be a Loongson 1C103 MCU. The 7A2000 bridge chip is connected to the I2C (slave end) of the 1C103 MCU through I2C1 (host end). The 7A2000 bridge chip is connected to the 1C103 MCU through ACPI_PWRBTn. The 1C103 MCU is connected to the network card WAKEn (network card wake-up interface), and the 1C103 MCU is connected to the PCIe_SLOT WAKEn (network card wake-up interface). The above connection can not only realize the monitoring of the number of boot times, but also realize remote power on and off in conjunction with the network card wake-up state or the peripheral wake-up state.

[0031] According to a mainboard of the utility model, a processor, a bridge chip, a microcontroller, and a network card chip are included. The microcontroller has a remote switch wake-up function. The processor is connected to the bridge chip through a data bus, the bridge chip is connected to the microcontroller through a control bus, the microcontroller is connected to the bridge chip through a power switch interface, the microcontroller is connected to the network card wake-up interface of the network card chip, and the microcontroller is connected to the peripheral wake-up interface of the bridge chip, so that the mainboard can realize remote power on / off and wake-up control, and has a simple design, low cost, and easy maintenance.

[0032] It should be noted that, in addition to the above-mentioned processor, bridge chip and microcontroller, the mainboard proposed in the embodiment of the utility model also requires basic components such as power module, clock module, various slots, etc., and the embodiment of the utility model does not limit this.

[0033] In the embodiment of the utility model, optionally, the processor is connected to the microcontroller via an asynchronous serial bus. The asynchronous serial bus may refer to a UART (Universal Asynchronous Receiver / Transmitter) bus, or any other applicable bus, which is not limited in the embodiment of the utility model. The processor is connected to the microcontroller via the asynchronous serial bus, which can realize communication between the processor / bridge and the microcontroller, and update the firmware of the microcontroller.

[0034] For example, Figure 2 As shown, the 3A6000 processor is connected to the UART of the 1C103 MCU via the serial port UART1 through the voltage conversion module. Among them, the voltage conversion module is a component required when there is a voltage difference between the selected processor and the microcontroller.

[0035] In the embodiment of the utility model, optionally, the bridge chip is connected to the microcontroller via a power management status interface. The power management status interface refers to an interface for managing the status of the power supply, such as ACPI_S3n, ACPI_S4n, ACPI_S5n, etc., or any other applicable interface, which is not limited in the embodiment of the utility model. The bridge chip is connected to the microcontroller via the power management status interface to realize the indication of the working status of the power supply.

[0036] For example, Figure 2 As shown in the figure, the 7A2000 bridge chip is connected to the 1C103MCU through ACPI_S3n, ACPI_S4n and ACPI_S5n, and can realize S0 / S3 / S4 / S5 status indication. Among them, S0 indicates the normal power state, S3 indicates the state where all components except the memory stop working, S4 indicates the state where the memory information is written to the hard disk and all components stop, and S5 indicates the power off state. In different motherboard designs, the representations of S0, S3, S4, and S5 can be different.

[0037] In an embodiment of the utility model, optionally, the processor is connected to the microcontroller via an input / output interface, and the bridge chip is connected to the microcontroller via a standby voltage state interface. The input / output interface refers to an interface that can be used as both input and output, such as GPIO (General Purpose Input Output), or any other applicable interface, and the embodiment of the utility model does not limit this. The standby voltage state interface refers to an interface that determines whether the standby voltage of the power supply is normal, such as an ACPI_RSMRSTn interface, or any other applicable interface, and the embodiment of the utility model does not limit this.

[0038] The processor is connected to the microcontroller through the input and output interface, and the bridge chip is connected to the microcontroller through the standby voltage state interface, which can not only realize the control of the power-on timing, but also realize the overload protection function in conjunction with the state of the processor's input and output interface.

[0039] For example, Figure 2 As shown in the figure, the 3A6000 processor is connected to the 1C103 MCU through GPIO14 and GPIO15 via the voltage conversion module. The 7A2000 bridge chip is connected to the 1C103 MCU through the ACPI_RSMRSTn interface. It can realize power-on timing control and also realize the Thermal Trip function in conjunction with the status of 3A6000 GPIO14 / GPIO15.

[0040] In the embodiment of the present utility model, optionally, referring to Figure 3 The mainboard 100 also includes a network connector 105 , the bridge chip 102 is connected to the network connector 105 via a universal serial bus, the bridge chip 102 is connected to the network card chip 104 via a peripheral interconnect bus, and the network connector 105 is connected to the network card chip 104 .

[0041] The network connector is a module used to connect to a network cable, and the universal serial bus may refer to USB (Universal Serial Bus). The peripheral interconnect bus refers to a bus used to interconnect with peripherals, such as PCIe (Peripheral Component Interconnect express), or any other applicable bus, which is not limited in the embodiments of the present invention.

[0042] For example, Figure 2As shown in the figure, the USB interface of the 7A2000 bridge chip is connected to the RJ45+Transformer module, which is a network connector with a built-in transformer. The PCIe-F0 interface of the 7A2000 bridge chip is connected to the network card chip. The RJ45+Transformer module is connected to the network card chip. There is a Gigabit Ethernet interface on the motherboard, which is the interface for the 7A2000 bridge chip to transfer out through the external network card chip.

[0043] In an embodiment of the utility model, optionally, the mainboard further includes a display interface and a serial communication interface, and the processor and the bridge chip are both connected to the display interface and the serial communication interface.

[0044] The display interface is an interface for connecting to a display device for data signal transmission, such as a VGA (Video Graphics Array) interface, or any other applicable interface, which is not limited in the embodiments of the present invention. The serial communication interface refers to an interface for serial communication between devices, such as a DB9 CON (9-pin serial communication interface), or any other applicable interface, which is not limited in the embodiments of the present invention.

[0045] For example, Figure 2 As shown, the UART0 interface of the 3A6000 processor is connected to VGA+DB9 CON via the voltage conversion module and the 3232 chip, and the VGA interface of the 7A2000 bridge chip is connected to VGA+DB9CON.

[0046] In the embodiment of the utility model, optionally, the bridge chip is connected to one 16-bit wide peripheral slot, one 8-bit wide peripheral slot, and one 4-bit wide peripheral slot respectively through a peripheral interconnect bus.

[0047] For example, Figure 2 As shown, there are 3 standard PCIe3.0 slots in total, namely 1 X16-bit wide slot, 1 X8-bit wide slot, and 1 X4-bit wide slot. The 7A2000 bridge is connected to PCIe X4 SLOT, PCIe X8 SLOT, and PCIe X16 SLOT.

[0048] In the embodiment of the utility model, optionally, the bridge chip is connected to a plurality of universal serial interfaces via a universal serial bus.

[0049] For example, Figure 2 As shown in the figure, the 7A2000 bridge chip has a maximum of 10 USB interfaces, including 4 USB3.0 interfaces and 6 USB2.0 interfaces. USB interfaces 1 / 2 / 3 / 4 / 5 represent a maximum of 2 USB2.0 or USB3.0 interfaces, and the specific number of each interface index can be adjusted.

[0050] In an embodiment of the utility model, optionally, the processor is a Loongson 3A6000 processor, the bridge chip is a Loongson 7A2000 bridge chip, and the microcontroller is a Loongson 1C103 microcontroller.

[0051] As described above, in addition to being compatible with the Loongson 3A6000 processor, the embodiments of the present invention can also be compatible with any other applicable processors, in addition to being compatible with the Loongson 7A2000 bridge chip, it can also be compatible with any other applicable bridge chips, in addition to being compatible with the Loongson 1C103 microcontroller, it can also be compatible with any other applicable microcontrollers.

[0052] In the embodiment of the utility model, the motherboard may also include an M.2 interface of M-key PCIe X4. M-key is a type of interface for solid-state hard disks, with 5 gold fingers on the right. M.2 interface is also called NGFF, which stands for Next Generation Form Factor in English. It is a new interface specification that replaces MSATA.

[0053] For example, Figure 2 As shown, the PCIe-F1 on the 7A2000 bridge chip is connected to PCIe-M.2X4.

[0054] In an embodiment of the utility model, optionally, the motherboard also includes multiple memory slots. For example, 2 DDR4 memory slots. 2 SLOTs (slots) supporting DIMM (Dual Inline Memory Module). The memory SPD (Serial Presence Detect) is connected to the I2C0 of the 3A6000 processor. In the single-line solution of the 3A6000 processor, the SA2:SA1:SA0 of the MC0 DIMM Slot is 000, and the SA2:SA1:SA0 of the MC1 DIMM Slot is 010.

[0055] also, Figure 2In the figure, power module 1 is a collection of all power supplies on the mainboard except for the 3A6000 processor. Power module 2 supplies power to the 3A6000 processor and can be controlled by the 3A6000 processor. The power module needs to be connected to all electronic devices on the motherboard that need power. The GMEM (Graphics Memory) interface of the main bridge is connected to the DDR4 memory particles. The SPI (Serial Peripheral interface) of the 3A6000 processor is connected to the boot firmware. The SE (Secure Element) QSPI of the 3A6000 processor is connected to the SE firmware. The JTAG (Joint Test Action Group) interface of the 3A6000 processor is connected to the JTAG CON (JTAG socket).

[0056] An embodiment of the utility model provides an electronic device, comprising the mainboard in the above embodiment.

[0057] The motherboard composed of the above-mentioned multiple processors can be used as a server motherboard for industrial-level applications or as a desktop motherboard for serving families, business offices, etc., thereby ensuring the reliability of data computing and processing and improving work efficiency.

[0058] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0059] A motherboard and an electronic device provided by the present invention are introduced in detail above. Specific examples are used in this article to illustrate the principle and implementation mode of the present invention. The description of the above embodiments is only used to help understand the method and core idea of ​​the present invention. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation mode and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A motherboard, characterized in that: The mainboard includes a processor, a bridge chip, a microcontroller, and a network card chip; the microcontroller has a remote switch wake-up function; The processor is connected to the bridge chip via a data bus; The bridge chip is connected to the microcontroller via a control bus; The microcontroller is connected to the bridge chip via a power switch interface, the microcontroller is connected to a network card wake-up interface of the network card chip, and the microcontroller is connected to a peripheral device wake-up interface of the bridge chip.

2. The mainboard according to claim 1, characterized in that: The processor is connected to the microcontroller via an asynchronous serial port bus.

3. The mainboard according to claim 1, characterized in that: The bridge chip is connected to the microcontroller via a power management state interface.

4. The mainboard according to claim 1, characterized in that: The processor is connected to the microcontroller via an input / output interface, and the bridge chip is connected to the microcontroller via a standby voltage state interface.

5. The mainboard according to claim 1, characterized in that: The mainboard also includes a network connector, the bridge chip is connected to the network connector via a universal serial bus, the bridge chip is connected to the network card chip via a peripheral interconnect bus, and the network connector is connected to the network card chip.

6. The mainboard according to claim 1, characterized in that: The mainboard also includes a display interface and a serial communication interface, and the processor and the bridge chip are both connected to the display interface and the serial communication interface.

7. The mainboard according to claim 1, characterized in that: The bridge chip is respectively connected to a 16-bit wide peripheral slot, an 8-bit wide peripheral slot, and a 4-bit wide peripheral slot through a peripheral interconnection bus.

8. The mainboard according to claim 1, characterized in that: The bridge chip is connected to a plurality of universal serial interfaces via a universal serial bus.

9. The mainboard according to any one of claims 1 to 8, characterized in that: The processor is a Loongson 3A6000 processor, the bridge chip is a Loongson 7A2000 bridge chip, and the microcontroller is a Loongson 1C103 microcontroller.

10. An electronic device, characterized in that: A mainboard comprising any one of claims 1 to 9.

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