Power line communication circuit, power line communication system and electronic equipment

Abstract

The utility model discloses a power line communication circuit and system and electronic equipment, and belongs to the technical field of electronic circuits. An enable signal is accessed through a rectification isolation circuit and is rectified and isolated to output a trigger signal; the control circuit outputs own parameter information according to the trigger signal; the carrier communication circuit outputs a first carrier signal to an upper computer according to the parameter information of the carrier communication circuit, so that the upper computer outputs a second carrier signal based on the first carrier signal; the carrier communication circuit outputs a wired communication signal according to the second carrier signal; the control circuit writes a physical address according to the wired communication signal and outputs a control signal; the switch circuit accesses an enable signal and outputs the enable signal according to the control signal to serve as an enable signal of a next-stage power line communication circuit; the next-stage power line communication circuit can execute the same action according to the corresponding enable signal, and so on, until all the power line communication circuits are written into the physical addresses; the physical address setting efficiency of the power line communication circuit is improved.

Description

Technical Field

[0001] The present application belongs to the field of electronic circuit technology, and in particular, relates to a power line communication circuit and system, and electronic equipment. Background Art

[0002] When the relevant power line communication circuit is applied to the Internet of Things, it has a physical address. When it is set at the factory, it is generally written one by one through tooling equipment, and the physical address is solidified in the software of the slave control module or the electrically erasable programmable read only memory (EEPROM). The problem is that the total assembly quantity of the tooling equipment is limited, and it cannot be quickly set up in large quantities, and the production efficiency is low.

[0003] Therefore, the efficiency of setting the physical address of the related power line communication circuit is low. Utility Model Content

[0004] The purpose of the present application is to provide a power line communication circuit and system, and electronic equipment, aiming to solve the problem of low efficiency in setting physical addresses in related power line communication circuits.

[0005] An embodiment of the present application provides a power line communication circuit, including:

[0006] A rectification and isolation circuit, configured to receive an enable signal, rectify and isolate the enable signal, and output a trigger signal;

[0007] A control circuit, connected to the rectification isolation circuit, configured to output its own parameter information according to the trigger signal;

[0008] A carrier communication circuit, connected to the control circuit, configured to output a first carrier signal to a host computer according to the own parameter information so that the host computer outputs a second carrier signal based on the first carrier signal, and outputs a wired communication signal according to the second carrier signal;

[0009] a switch circuit connected to the control circuit and configured to receive the enable signal and output the enable signal according to the control signal to serve as an enable signal for the power line communication circuit of the next level;

[0010] The control circuit is further configured to write a physical address according to the wired communication signal and output the control signal.

[0011] In one of the embodiments, the power line communication circuit is connected to the host computer;

[0012] The host computer is configured to output the second carrier signal based on the first carrier signal;

[0013] The carrier communication circuit is specifically configured to generate a first digital signal based on its own parameter information, and modulate the first digital signal into a power signal to output a first carrier signal to the host computer, and demodulate the second carrier signal output by the host computer to obtain a second digital signal, and convert the second digital signal into the wired communication signal.

[0014] In one embodiment, the control circuit is further configured to write a physical address according to the wired communication signal and output the control signal and the indication signal; the power line communication circuit further includes:

[0015] The indication circuit is connected to the control circuit and is configured to indicate according to the indication signal.

[0016] In one embodiment, the control circuit includes a microprocessor, a first resistor, a second resistor, and a third resistor;

[0017] The first general input / output terminal of the microprocessor is used as a control signal output terminal of the control circuit and is connected to the switch circuit to output the control signal;

[0018] The second general input and output terminal of the microprocessor is used as a trigger signal input terminal of the control circuit and is connected to the rectification isolation circuit to receive the trigger signal;

[0019] The third general purpose input and output terminal of the microprocessor is connected to the first end of the second resistor; the fourth general purpose input and output terminal of the microprocessor is connected to the first end of the third resistor;

[0020] The second end of the second resistor and the first end of the first resistor serve together as a wired communication signal input end of the control circuit, and are connected to the carrier communication circuit to access the wired communication signal;

[0021] The second end of the third resistor is used as the self-parameter information output end of the control circuit, and is connected to the carrier communication circuit to output the self-parameter information;

[0022] The second end of the first resistor is connected to the first power source.

[0023] In one embodiment, the rectification isolation circuit includes a photocoupler, a first diode, a second diode, a second capacitor, a fourth resistor, and a fifth resistor;

[0024] The first end of the fourth resistor serves as the enable signal input end of the rectification isolation circuit to access the enable signal; the second end of the fourth resistor is connected to the anode of the first diode, the cathode of the first diode is connected to the cathode of the second diode, the first end of the second capacitor and the anode of the photoelectric coupler, the cathode of the photoelectric coupler, the anode of the second diode and the second end of the second capacitor are connected to the neutral line; the emitter of the photoelectric coupler is connected to the power ground; the collector of the photoelectric coupler and the first end of the fifth resistor serve as the trigger signal output end of the rectification isolation circuit, and are connected to the control circuit to output the trigger signal; the second end of the fifth resistor is connected to the second power supply.

[0025] In one embodiment, the switch circuit includes a relay, a first transistor, a third diode and a sixth resistor;

[0026] The normally open end of the relay is connected to the host computer or the power line communication circuit of the previous level to access the enable signal; the common end of the relay is connected to the power line communication circuit of the next level as the output end of the switch circuit to output the enable signal of the power line communication circuit of the next level; the first control end of the relay and the cathode of the third diode are connected to the third power supply, the second control end of the relay is connected to the anode of the third diode and the collector of the first transistor, the base of the third diode is connected to the first end of the sixth resistor, and the emitter of the third diode is connected to the power ground; the second end of the sixth resistor is connected to the control circuit as the control signal input end of the switch circuit to access the control signal.

[0027] The embodiment of the present application further provides a power line communication system, the power line communication system comprising a host computer and n of the above-mentioned power line communication circuits;

[0028] Wherein, the rectifying isolation circuit of the first power line communication circuit and the switching circuit of the first power line communication circuit are both connected to the host computer;

[0029] The rectifying and isolating circuit of the (i+1)th power line communication circuit and the switching circuit of the (i+1)th power line communication circuit are both connected to the switching circuit of the (i)th power line communication circuit.

[0030] In one of the embodiments, the host computer is further configured to output a notification message to each of the power line communication circuits and then output an enable signal to the first power line communication circuit;

[0031] The power line communication circuit is also configured to send fault information to the host computer after receiving the notification information for a preset time period and without receiving an enable signal.

[0032] An embodiment of the present application further provides an electronic device, which includes the above-mentioned power line communication circuit.

[0033] In one embodiment, the electronic device includes an LED display device.

[0034] Compared with the prior art, the beneficial effects of the embodiment of the utility model are as follows: since the rectifier isolation circuit is connected to the enable signal, and rectifies and isolates the enable signal to output a trigger signal; the control circuit outputs its own parameter information according to the trigger signal; the carrier communication circuit outputs a first carrier signal to the host computer according to its own parameter information so that the host computer outputs a second carrier signal based on the first carrier signal; and the carrier communication circuit outputs a wired communication signal according to the second carrier signal; the control circuit writes a physical address according to the wired communication signal and outputs a control signal; the switch circuit is connected to the enable signal, and outputs alternating current according to the control signal as an enable signal for the next-level power line communication circuit; the next-level power line communication circuit can perform the same action according to the corresponding enable signal, and so on, until all power line communication circuits are written to the physical address; multiple cascaded power line communication circuits are written in sequence to the address code assigned by the host computer, thereby improving the efficiency of setting the physical address of the power line communication circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical utility model in the embodiments of the utility model, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0036] Figure 1 A schematic diagram of a structure of a power line communication circuit provided in one embodiment of the present application;

[0037] Figure 2 Another structural schematic diagram of a power line communication circuit provided in an embodiment of the present application;

[0038] Figure 3 A partial exemplary circuit schematic diagram of a power line communication circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0039] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0040] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0041] It should be understood that the orientation or position relationship indicated by terms such as "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside" and "outside" are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0042] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0043] Figure 1 The structure diagram of the power line communication circuit provided by the preferred embodiment of the present application is shown. For the convenience of explanation, only the part related to the present embodiment is shown, which is described in detail as follows:

[0044] The power line communication circuit comprises a rectifying and isolating circuit 01 , a control circuit 02 , a carrier communication circuit 03 and a switch circuit 04 .

[0045] The rectifying and isolating circuit 01 is configured to receive the enable signal ENi, rectify and isolate the enable signal ENi, and output a trigger signal;

[0046] The control circuit 02 is connected to the rectifying isolation circuit 01 and is configured to output its own parameter information according to the trigger signal;

[0047] The carrier communication circuit 03 is connected to the control circuit 02 and is configured to output a first carrier signal to the host computer 90 according to its own parameter information so that the host computer 90 outputs a second carrier signal based on the first carrier signal, and outputs a wired communication signal according to the second carrier signal;

[0048] The switch circuit 04 is connected to the control circuit 02 and is configured to receive an enable signal and output the enable signal according to the control signal to serve as an enable signal Eni+1 of the next-level power line communication circuit;

[0049] The control circuit 02 is further configured to write a physical address according to the wired communication signal and output a control signal.

[0050] In a specific implementation, the host computer 90 and n power line communication circuits are connected in series in sequence through the enable control line, and the host computer 90 and the n power line communication circuits are all connected to the power line. The host computer 90 sends the first enable signal EN1. In the first power line communication circuit, the rectifier isolation circuit 01 rectifies and isolates the first enable signal EN1 to output a trigger signal; the control circuit 02 outputs the self-parameter information of the first power line communication circuit according to the trigger signal; the carrier communication circuit 03 outputs the first carrier signal to the host computer 90 according to its own parameter information, and the host computer 90 outputs the second carrier signal based on the first carrier signal; the carrier communication circuit 03 outputs a wired communication signal according to the second carrier signal; the control circuit 02 writes the physical address according to the wired communication signal, and outputs the control signal after writing the physical address; the switch circuit 04 is connected to the alternating current, and uses the alternating current as the enable signal EN2 of the second power line communication circuit according to the control signal. The second power line communication circuit performs the same action as the first power line communication circuit according to the enable signal EN2 of the second power line communication circuit, and so on until the nth power line communication circuit writes the physical address.

[0051] Therefore, by cascading a plurality of the above-mentioned power line communication circuits, the power line communication circuits of the subsequent stages can be enabled step by step from the first power line communication circuit, so as to sequentially write the address codes assigned by the host computer 90, thereby improving the efficiency of setting the physical address of the power line communication circuit.

[0052] It should be noted that there are two specific implementations of the control circuit.

[0053] Among them, the first implementation method is as follows: the control circuit is specifically configured to output its own parameter information according to the trigger signal, and set the built-in flag position to the first value; the control circuit is also configured to write the physical address according to the flag bit of the first value and the wired communication signal, and output the control signal after writing the physical address and set the flag position to the second value.

[0054] By setting the flag bit, the control circuit writes the physical address according to the wired communication signal only when the built-in flag position is the first value; and after writing the physical address, the flag position is set to the second value; the built-in flag position of the power line communication circuit after writing the physical address is the second value, which reduces the possibility of the power line communication circuit repeatedly writing the physical address.

[0055] Among them, the second implementation is as follows: the control circuit is configured to output its own parameter information according to the trigger signal; the control circuit is also specifically configured to respond to the disconnection of the control signal, write the physical address according to the wired communication signal, and output the control signal after writing the physical address.

[0056] The control circuit outputs a control signal after writing a physical address and detects the control signal output by itself, thereby reducing the possibility of the power line communication circuit repeatedly writing a physical address.

[0057] It should be noted that the self-parameter information includes self-identification information and the number of channels.

[0058] It can be understood that the first carrier signal carries its own identification information and the number of channels, and the second carrier signal carries the number of channels and the physical address; the upper computer 90 is specifically configured to obtain its own identification information and the number of channels based on the first carrier signal, and determine the number of channels and the physical address based on its own identification information and the number of channels, and output the second carrier signal according to the number of channels and the physical address.

[0059] In a specific implementation, the host computer 90 assigns a physical address to each channel of the power line communication circuit; for example, when the self-identification information of the first power line communication circuit is 1010 and the number of channels is 3, the host computer 90 may assign a physical address (00000001) to the first channel of the first power line communication circuit, assign a physical address (00000010) to the second channel of the first power line communication circuit, and assign a physical address (00000011) to the third channel of the first power line communication circuit.

[0060] Through its own parameter information including its own identification information and the number of channels, the host computer 90 can set the number of channels and physical addresses for the power line communication circuit, so that when the power line communication circuit is applied to the Internet of Things, each channel of the power line communication circuit can be controlled separately, thereby improving the control flexibility of the power line communication circuit.

[0061] As an example but not limitation, the power line communication circuit is connected to the host computer 90; the host computer 90 is configured to output a second carrier signal based on the first carrier signal; the carrier communication circuit 03 is specifically configured to generate a first digital signal according to its own parameter information, and modulate the first digital signal into the power signal to output the first carrier signal to the host computer 90, and demodulate the second carrier signal output by the host computer 90 to output a wired communication signal.

[0062] It should be noted that the carrier communication circuit 03 includes a first carrier communication module and a first coupling transformer. The host computer 90 includes a second microprocessor, a second carrier communication module and a second coupling transformer.

[0063] During uplink communication, the control circuit 02 transmits its own parameter information to the carrier communication module through the first asynchronous receiver / transmitter (UART) signal. The first carrier communication module converts the first UART signal into a first digital signal and modulates it onto the power line through a first coupling transformer to generate a first carrier signal. The host computer 90 receives the first carrier signal accordingly. The host computer 90 couples the first carrier signal to the second power carrier module through a second coupling transformer, and performs analog-to-digital conversion on the second power carrier module to demodulate the third digital signal and send it to the second microprocessor, so that the second microprocessor outputs a first serial communication signal carrying a physical address according to its own parameter information.

[0064] Similarly, during downlink communication, the second carrier communication module converts the first serial communication signal into a fourth digital signal and modulates it to the power line through the second coupling transformer to generate a second carrier signal. The carrier communication circuit 03 in the power line communication circuit receives the first carrier signal accordingly, couples the second carrier signal to the first power carrier module through the first coupling transformer, and the first power carrier module performs analog-to-digital conversion to demodulate the wired communication signal and send it to the control module. The wired communication signal can be a second UART signal.

[0065] Through the modulation and demodulation functions of the carrier communication circuit 03, communication between each power line communication circuit and the host computer 90 can be achieved without setting up additional communication lines, thereby simplifying the hardware connection.

[0066] like Figure 2 As shown, the control circuit is further configured to write a physical address according to the wired communication signal and output the control signal and the indication signal; the power line communication circuit also includes an indication circuit 80.

[0067] The indication circuit 80 is connected to the control circuit 02 and is configured to give indication according to the indication signal.

[0068] Figure 3 A partial exemplary circuit structure of a power line communication circuit provided by an embodiment of the utility model is shown. For the sake of convenience, only the part related to the embodiment of the utility model is shown, which is described in detail as follows:

[0069] The control circuit 02 includes a microprocessor U1 , a first resistor R1 , a second resistor R2 , and a third resistor R3 .

[0070] The first general input and output terminal PA10 of the microprocessor U1 serves as the control signal output terminal of the control circuit 02, and is connected to the switch circuit 04 to output the control signal; the second general input and output terminal PA9 of the microprocessor U1 serves as the trigger signal input terminal of the control circuit 02, and is connected to the rectifier isolation circuit 01 to receive the trigger signal; the third general input and output terminal PB4 of the microprocessor U1 is connected to the first end of the second resistor R2; the fourth general input and output terminal PB3 of the microprocessor U1 is connected to the first end of the third resistor R3; the second end of the second resistor R2 and the first end of the first resistor R1 serve together as the wired communication signal input terminal of the control circuit 02, and are connected to the carrier communication circuit 03 to receive the wired communication signal; the second end of the third resistor R3 serves as the self-parameter information output terminal of the control circuit 02, and is connected to the carrier communication circuit 03 to output its own parameter information; the second end of the first resistor R1 is connected to the first power supply VAA.

[0071] The control circuit 02 is simple and reliable.

[0072] The rectifying and isolating circuit 01 includes a photocoupler U3 , a first diode D1 , a second diode D2 , a second capacitor C2 , a fourth resistor R4 , and a fifth resistor R5 .

[0073] The first end of the fourth resistor R4 serves as the enable signal ENi input end of the rectification and isolation circuit 01 to access the enable signal ENi; the second end of the fourth resistor R4 is connected to the anode of the first diode D1, the cathode of the first diode D1 is connected to the cathode of the second diode D2, the first end of the second capacitor C2 and the anode of the photoelectric coupler U3, the cathode of the photoelectric coupler U3, the anode of the second diode D2 and the second end of the second capacitor C2 are connected to the neutral line N; the emitter of the photoelectric coupler U3 is connected to the power ground; the collector of the photoelectric coupler U3 and the first end of the fifth resistor R5 serve as the trigger signal output end of the rectification and isolation circuit 01, and are connected to the control circuit 02 to output the trigger signal; the second end of the fifth resistor R5 is connected to the second power supply VBB.

[0074] The photocoupler U3 realizes the isolation function, and the first diode D1 realizes the rectification function.

[0075] The switch circuit 04 includes a relay K1 , a first transistor Q1 , a third diode D3 and a sixth resistor R6 .

[0076] The normally open end of the relay K1 is connected to the upper computer or the power line communication circuit of the previous level to access the enable signal ENi; the common end of the relay K1 is used as the output end of the switch circuit 04, and is connected to the power line communication circuit of the next level to output the enable signal ENi+1 of the power line communication circuit of the next level; the first control end of the relay K1 and the cathode of the third diode D3 are connected to the third power supply VCC, the second control end of the relay K1 is connected to the anode of the third diode D3 and the collector of the first transistor Q1, the base of the third diode D3 is connected to the first end of the sixth resistor R6, and the emitter of the third diode D3 is connected to the power ground; the second end of the sixth resistor R6 is used as the control signal input end of the switch circuit 04, and is connected to the control circuit 02 to access the control signal.

[0077] The following is a combination of working principles Figure 3 As shown for further explanation:

[0078] The host computer 90 and the n power line communication circuits are sequentially connected in series through the enable control line, and the host computer 90 and the n power line communication circuits are all connected to the power line. The host computer 90 sends the first enable signal ENi.

[0079] In the first power line communication circuit, the first enable signal ENi is sent to the positive electrode of the first diode D1 through the fourth resistor R4, the first diode D1 rectifies the first enable signal EN1, and the rectified first enable signal EN1 is connected to the positive electrode of the photoelectric coupler U3, the photoelectric coupler U3 isolates the rectified first enable signal EN1 to output a trigger signal; the second general input and output terminal PA9 of the microprocessor U1 is connected to the trigger signal, and the microprocessor U1 outputs the self-identification information (for example, 1010) and the channel number (for example, 3) of the first power line communication circuit from the fourth general input and output terminal PB3 of the microprocessor U1 according to the trigger signal to the carrier communication circuit 03, and the carrier communication circuit 03 receives the self-identification information (for example, 1010) and the channel number of the first power line communication circuit according to the trigger signal. (For example 3) outputs a first carrier signal to the host computer 90, and the host computer 90 outputs a second carrier signal based on the first carrier signal; the carrier communication circuit 03 outputs a wired communication signal to the third general input and output terminal PB4 of the microprocessor U1 according to the second carrier signal, wherein the second carrier signal and the wired communication signal both carry a physical address (for example, the physical address is 00000001, 00000010 and 00000011), and the microprocessor U1 writes the physical address according to the wired communication signal, and outputs a control signal to the base of the first transistor Q1 after writing the physical address, the first transistor is turned on, the coil of the relay K1 is energized, the relay K1 is closed, and the enable signal EN1 is output through the normally open end of the relay K1 and the common end of the relay K1 to output the enable signal EN2 of the second power line communication circuit.

[0080] The second power line communication circuit performs the same action as the first power line communication circuit according to the enable signal EN2 of the second power line communication circuit, and so on until the nth power line communication circuit writes the physical address.

[0081] The embodiment of the utility model further provides a power line communication system, the power line communication system comprising a host computer and n of the above-mentioned power line communication circuits;

[0082] Wherein, the rectifying isolation circuit of the first power line communication circuit and the switch circuit of the first power line communication circuit are both connected to the host computer;

[0083] The rectifying and isolating circuit of the (i+1)th power line communication circuit and the switching circuit of the (i+1)th power line communication circuit are both connected to the switching circuit of the (i)th power line communication circuit.

[0084] In a specific implementation, the host computer is further configured to output notification information to each power line communication circuit and then output an enable signal to the first power line communication circuit;

[0085] The power line communication circuit is also configured to send fault information to the host computer after receiving the notification information for a preset time period and without receiving the enable signal.

[0086] When a power line communication circuit at a certain level fails, the power line communication circuit at the subsequent level can report the fault information to the host computer, thus realizing the fault alarm function of the power line communication system.

[0087] The embodiment of the utility model further provides an electronic device, the electronic device comprising the above-mentioned power line communication circuit. As an example but not a limitation, the electronic device comprises an LED display device.

[0088] The embodiment of the utility model accesses the enable signal through the rectification and isolation circuit, and rectifies and isolates the enable signal to output a trigger signal; the control circuit outputs its own parameter information according to the trigger signal; the carrier communication circuit outputs the first carrier signal to the host computer according to its own parameter information so that the host computer outputs the second carrier signal based on the first carrier signal; and the carrier communication circuit outputs the wired communication signal according to the second carrier signal; the control circuit writes the physical address according to the wired communication signal and outputs the control signal; the switch circuit accesses the enable signal, and outputs the enable signal according to the control signal to serve as the enable signal of the next level power line communication circuit; the next level power line communication circuit can perform the same action according to the corresponding enable signal, and so on, until all power line communication circuits are written to the physical address; multiple cascaded power line communication circuits are written in turn to the address code assigned by the host computer, thereby improving the efficiency of setting the physical address of the power line communication circuit.

[0089] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0090] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A power line communication circuit, characterized in that: include: A rectification and isolation circuit, configured to receive an enable signal, rectify and isolate the enable signal, and output a trigger signal; A control circuit, connected to the rectification isolation circuit, configured to output its own parameter information according to the trigger signal; A carrier communication circuit, connected to the control circuit, configured to output a first carrier signal to a host computer according to the own parameter information so that the host computer outputs a second carrier signal based on the first carrier signal, and outputs a wired communication signal according to the second carrier signal; a switch circuit connected to the control circuit and configured to receive the enable signal and output the enable signal according to the control signal to serve as an enable signal for the power line communication circuit of the next level; The control circuit is further configured to write a physical address according to the wired communication signal and output the control signal.

2. The power line communication circuit according to claim 1, characterized in that: The power line communication circuit is connected to the host computer; The host computer is configured to output the second carrier signal based on the first carrier signal; The carrier communication circuit is specifically configured to generate a first digital signal based on its own parameter information, and modulate the first digital signal into a power signal to output a first carrier signal to the host computer, and demodulate the second carrier signal output by the host computer to obtain a second digital signal, and convert the second digital signal into the wired communication signal.

3. The power line communication circuit according to claim 1, characterized in that: The control circuit is further configured to write a physical address according to the wired communication signal and output the control signal and the indication signal; the power line communication circuit further includes: The indication circuit is connected to the control circuit and is configured to indicate according to the indication signal.

4. The power line communication circuit according to any one of claims 1 to 3, characterized in that: The control circuit includes a microprocessor, a first resistor, a second resistor and a third resistor; The first general input / output terminal of the microprocessor is used as a control signal output terminal of the control circuit and is connected to the switch circuit to output the control signal; The second general input and output terminal of the microprocessor is used as a trigger signal input terminal of the control circuit and is connected to the rectification isolation circuit to receive the trigger signal; The third general purpose input and output terminal of the microprocessor is connected to the first end of the second resistor; the fourth general purpose input and output terminal of the microprocessor is connected to the first end of the third resistor; The second end of the second resistor and the first end of the first resistor serve together as a wired communication signal input end of the control circuit, and are connected to the carrier communication circuit to access the wired communication signal; The second end of the third resistor is used as the self-parameter information output end of the control circuit, and is connected to the carrier communication circuit to output the self-parameter information; The second end of the first resistor is connected to the first power source.

5. The power line communication circuit according to any one of claims 1 to 3, characterized in that: The rectifying isolation circuit comprises a photoelectric coupler, a first diode, a second diode, a second capacitor, a fourth resistor and a fifth resistor; The first end of the fourth resistor serves as the enable signal input end of the rectification isolation circuit to access the enable signal; the second end of the fourth resistor is connected to the anode of the first diode, the cathode of the first diode is connected to the cathode of the second diode, the first end of the second capacitor and the anode of the photoelectric coupler, the cathode of the photoelectric coupler, the anode of the second diode and the second end of the second capacitor are connected to the neutral line; the emitter of the photoelectric coupler is connected to the power ground; the collector of the photoelectric coupler and the first end of the fifth resistor serve as the trigger signal output end of the rectification isolation circuit, and are connected to the control circuit to output the trigger signal; the second end of the fifth resistor is connected to the second power supply.

6. The power line communication circuit according to claim 1, characterized in that: The switch circuit includes a relay, a first transistor, a third diode and a sixth resistor; The normally open end of the relay is connected to the host computer or the power line communication circuit of the previous level to access the enable signal; the common end of the relay is connected to the power line communication circuit of the next level as the output end of the switch circuit to output the enable signal of the power line communication circuit of the next level; the first control end of the relay and the cathode of the third diode are connected to the third power supply, the second control end of the relay is connected to the anode of the third diode and the collector of the first transistor, the base of the third diode is connected to the first end of the sixth resistor, and the emitter of the third diode is connected to the power ground; the second end of the sixth resistor is connected to the control circuit as the control signal input end of the switch circuit to access the control signal.

7. A power line communication system, characterized in that: The power line communication system comprises a host computer and n power line communication circuits according to any one of claims 1 to 6; Wherein, the rectifying isolation circuit of the first power line communication circuit and the switching circuit of the first power line communication circuit are both connected to the host computer; The rectifying and isolating circuit of the (i+1)th power line communication circuit and the switching circuit of the (i+1)th power line communication circuit are both connected to the switching circuit of the (i)th power line communication circuit.

8. The power line communication system according to claim 7, characterized in that: The host computer is further configured to output notification information to each of the power line communication circuits and then output an enable signal to the first power line communication circuit; The power line communication circuit is also configured to send fault information to the host computer after receiving the notification information for a preset time period and without receiving an enable signal.

9. An electronic device, characterized in that: The electronic device comprises the power line communication circuit according to any one of claims 1 to 6.

10. The electronic device according to claim 9, characterized in that: The electronic device includes an LED display device.

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