Corrected sine wave inverter

Abstract

The utility model discloses a modified sine wave inverter, which comprises a sine wave generation module, the sine wave generation module comprises an operational amplifier IC2A, an operational amplifier IC2B, an operational amplifier IC2C and an operational amplifier IC2D, the first end of the operational amplifier IC2A is connected to the fifth end of the operational amplifier IC2B through a resistor R11, and the second end of the operational amplifier IC2B is connected to the fifth end of the operational amplifier IC2B through a resistor R12. The seventh end of the operational amplifier IC2B is connected to the tenth end of the operational amplifier IC2C through a resistor R12, and the eighth end of the operational amplifier IC2C is connected to the twelfth end of the operational amplifier IC2D through a resistor R13. The correction sine wave inverter disclosed by the utility model has the beneficial effects that a novel circuit structure of the sine wave generation module is provided, and the correction sine wave inverter output is realized by matching with other circuit modules such as the triangular wave generation module and the like.

Description

Technical Field

[0001] The utility model belongs to the field of inverters, and in particular relates to a modified sine wave inverter. Background Art

[0002] The publication number is CN220254341U, the subject name is modified sine wave inverter with protective structure, and its IPC classification numbers are H02M1 / 00, H05K7 / 20, and H05K5 / 02. Its technical solution discloses "including a shell 10, a support assembly 20 and an electronic device 30. The support assembly 20 and the electronic device 30 are both arranged in the shell 10. Ventilation holes 131 are provided at opposite ends of the shell 10, and the position of the ventilation holes 131 is opposite to the position of the electronic device 30, so that the air flow enters from one ventilation hole 131 and flows out from the other ventilation hole 131, passing through the electronic device 30, thereby being able to cool the electronic device 30."

[0003] However, the above utility model patent only discloses one mechanical structure of the modified sine wave inverter, and does not further extend to the circuit structure, which needs to be further improved. Utility Model Content

[0004] The utility model aims at the prior art, overcomes the above defects and provides a modified sine wave inverter.

[0005] The utility model adopts the following technical scheme to modify the sine wave inverter, including:

[0006] The sine wave generating module includes an operational amplifier IC2A, an operational amplifier IC2B, an operational amplifier IC2C and an operational amplifier IC2D. Terminal 1 of the operational amplifier IC2A is connected to terminal 5 of the operational amplifier IC2B through a resistor R11, terminal 7 of the operational amplifier IC2B is connected to terminal 10 of the operational amplifier IC2C through a resistor R12, and terminal 8 of the operational amplifier IC2C is connected to terminal 12 of the operational amplifier IC2D through a resistor R13;

[0007] The triangular wave generating module includes an operational amplifier IC1A and an operational amplifier IC1B. Terminal 1 of the operational amplifier IC1A is connected to terminal 6 of the operational amplifier IC1B through resistors R2 and R3 in sequence.

[0008] A first input module, the first input module includes an operational amplifier IC3A, terminal 4 of the operational amplifier IC3A is connected to a common terminal between terminal 5 of the operational amplifier IC1B and terminal 14 of the operational amplifier IC1D, and terminal 5 of the operational amplifier IC3A is connected to terminal 14 of the operational amplifier IC1D through a resistor R16;

[0009] The second input module includes an operational amplifier IC1D, terminal 12 of the operational amplifier IC1D is connected to a common terminal between terminal 2 of the operational amplifier IC2A and terminal 14 of the operational amplifier IC2D, and terminal 13 of the operational amplifier IC1D is connected to a common terminal between terminal 5 of the operational amplifier IC1B and terminal 4 of the operational amplifier IC3A through a resistor R29.

[0010] As a further preferred technical solution of the above technical solution, the modified sine wave inverter further includes:

[0011] A first driving module, the first driving module includes an operational amplifier IC3B and an operational amplifier IC3C, terminal 6 of the operational amplifier IC3B is connected to terminal 2 of the operational amplifier IC3A through a resistor R18, terminal 7 of the operational amplifier IC3B is connected to a common terminal between terminal 14 of the operational amplifier IC1D and terminal 8 of the operational amplifier IC3C, terminal 9 of the operational amplifier IC3C is connected to terminal 6 of the operational amplifier IC3B, and terminal 8 of the operational amplifier IC3C is connected to terminal 7 of the operational amplifier IC3B;

[0012] The second driving module includes an operational amplifier IC3D and an operational amplifier IC4A, terminal 11 of the operational amplifier IC3D is connected to terminal 2 of the operational amplifier IC3A, terminal 10 of the operational amplifier IC3D is connected to terminal 5 of the operational amplifier IC1B, terminal 5 of the operational amplifier IC4A is connected to terminal 10 of the operational amplifier IC3D, and terminal 4 of the operational amplifier IC4A is connected to terminal 11 of the operational amplifier IC3D.

[0013] As a further preferred technical solution of the above technical solution, the modified sine wave inverter further includes an output module, and the output module includes:

[0014] MOS tube Q1, MOS tube Q2 and driver chip IC5, terminal 1 of operational amplifier IC3B is connected to terminal 12 of driver chip IC5, terminal 14 of operational amplifier IC3C is connected to terminal 10 of driver chip IC5, the gate of MOS tube Q1 is connected to terminal 7 of driver chip IC5 through resistor R9, the gate of MOS tube Q2 is connected to terminal 1 of driver chip IC5 through resistor R30, and terminal 5 of driver chip IC5 is connected to the output terminal through inductor L1 and inductor L2 in sequence;

[0015] MOS tube Q3, MOS tube Q4 and driver chip IC6, terminal 13 of operational amplifier IC3D is connected to terminal 12 of driver chip IC6, terminal 2 of operational amplifier IC4A is connected to terminal 10 of driver chip IC6, the gate of MOS tube Q3 is connected to terminal 7 of driver chip IC6 through resistor R31, the gate of MOS tube Q4 is connected to terminal 1 of driver chip IC6 through resistor R32, and terminal 5 of driver chip IC6 is connected to the output terminal.

[0016] As a further preferred technical solution of the above technical solution, the output module further includes a capacitor C10, and the capacitor C10 and the inductor L1 form a resonance unit.

[0017] As a further preferred technical solution of the above technical solution, the output module further includes a capacitor C11, and the capacitor C11 and the inductor L2 form a resonance unit.

[0018] The modified sine wave inverter disclosed by the utility model has the beneficial effect of providing a new circuit structure of a sine wave generating module, which is matched with other circuit modules such as a triangle wave generating module to realize modified sine wave inverter output. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is the main circuit structure diagram (circuit principle diagram) of this application.

[0020] Figure 2 It is a circuit structure block diagram of this application.

[0021] Figure 3 It is a circuit schematic diagram of the sine wave generating module of the present application. DETAILED DESCRIPTION

[0022] The utility model discloses a modified sine wave inverter. Figure 1-3 , the specific implementation methods of the utility model are further described.

[0023] See attached figure Figures 1 to 3 , Figure 1 The main circuit structure of the modified sine wave inverter is shown. Figure 2 The circuit framework of the modified sine wave inverter is shown. Figure 3 The circuit structure of the sine wave generating module is shown.

[0024] Example 1.

[0025] Preferably, the modified sine wave inverter comprises:

[0026] Sine wave generator module (see attached figure Figure 1), the sine wave generating module includes an operational amplifier IC2A, an operational amplifier IC2B, an operational amplifier IC2C and an operational amplifier IC2D, terminal 1 of the operational amplifier IC2A is connected to terminal 5 of the operational amplifier IC2B through a resistor R11, terminal 7 of the operational amplifier IC2B is connected to terminal 10 of the operational amplifier IC2C through a resistor R12, and terminal 8 of the operational amplifier IC2C is connected to terminal 12 of the operational amplifier IC2D through a resistor R13, so that the sine wave generating module outputs a sine wave signal;

[0027] The triangular wave generating module includes an operational amplifier IC1A and an operational amplifier IC1B. Terminal 1 of the operational amplifier IC1A is connected to terminal 6 of the operational amplifier IC1B through resistors R2 and R3 in sequence, so that the triangular wave generating module outputs a triangular wave signal.

[0028] The first input module includes an operational amplifier IC3A, wherein terminal 4 of the operational amplifier IC3A is connected to a common terminal between terminal 5 of the operational amplifier IC1B and terminal 14 of the operational amplifier IC1D, and terminal 5 of the operational amplifier IC3A is connected to terminal 14 of the operational amplifier IC1D through a resistor R16, so that the first input module outputs a square wave signal to the first driving module after acquiring a sine wave signal;

[0029] The second input module includes an operational amplifier IC1D, terminal 12 of the operational amplifier IC1D is connected to the common terminal between terminal 2 of the operational amplifier IC2A and terminal 14 of the operational amplifier IC2D, and terminal 13 of the operational amplifier IC1D is connected to the common terminal between terminal 5 of the operational amplifier IC1B and terminal 4 of the operational amplifier IC3A through a resistor R29, so that the second input module outputs a triangular wave signal to the second driving module after obtaining the triangular wave signal.

[0030] The modified sine wave inverter also includes:

[0031] A first driving module, the first driving module includes an operational amplifier IC3B and an operational amplifier IC3C, terminal 6 of the operational amplifier IC3B is connected to terminal 2 of the operational amplifier IC3A through a resistor R18, terminal 7 of the operational amplifier IC3B is connected to a common terminal between terminal 14 of the operational amplifier IC1D and terminal 8 of the operational amplifier IC3C, terminal 9 of the operational amplifier IC3C is connected to terminal 6 of the operational amplifier IC3B, and terminal 8 of the operational amplifier IC3C is connected to terminal 7 of the operational amplifier IC3B, so that the first driving module outputs a PWM signal to the output module after acquiring the square wave signal;

[0032] The second driving module includes an operational amplifier IC3D and an operational amplifier IC4A. Terminal 11 of the operational amplifier IC3D is connected to terminal 2 of the operational amplifier IC3A, terminal 10 of the operational amplifier IC3D is connected to terminal 5 of the operational amplifier IC1B, terminal 5 of the operational amplifier IC4A is connected to terminal 10 of the operational amplifier IC3D, and terminal 4 of the operational amplifier IC4A is connected to terminal 11 of the operational amplifier IC3D, so that the second driving module obtains the triangular wave signal and then outputs a PWM signal to the output module.

[0033] The modified sine wave inverter further includes an output module, which includes:

[0034] MOS tube Q1, MOS tube Q2 and driver chip IC5, terminal 1 of operational amplifier IC3B is connected to terminal 12 of driver chip IC5, terminal 14 of operational amplifier IC3C is connected to terminal 10 of driver chip IC5, the gate of MOS tube Q1 is connected to terminal 7 of driver chip IC5 through resistor R9, the gate of MOS tube Q2 is connected to terminal 1 of driver chip IC5 through resistor R30, and terminal 5 of driver chip IC5 is connected to the output terminal (i.e., Vout) of (modified sine wave inverter) through inductor L1 and inductor L2 in sequence;

[0035] MOS tube Q3, MOS tube Q4 and driver chip IC6, terminal 13 of operational amplifier IC3D is connected to terminal 12 of driver chip IC6, terminal 2 of operational amplifier IC4A is connected to terminal 10 of driver chip IC6, the gate of MOS tube Q3 is connected to terminal 7 of driver chip IC6 through resistor R31, the gate of MOS tube Q4 is connected to terminal 1 of driver chip IC6 through resistor R32, and terminal 5 of driver chip IC6 is connected to the output terminal (i.e., Vout) of (modified sine wave inverter).

[0036] Among them, the output end (i.e., Vout) (of the modified sine wave inverter) can be connected to a load (not shown in the figure), so that the output end (of the modified sine wave inverter) can realize a modified sine wave inverter output according to PWM signal modulation.

[0037] The output module further includes a capacitor C10, and the capacitor C10 and the inductor L1 form a resonance unit to filter the clutter signal.

[0038] The output module further includes a capacitor C11, and the capacitor C11 and the inductor L2 form a resonance unit to filter the clutter signal twice.

[0039] The operational amplifier IC1A and the operational amplifier IC1B are preferably TL084D.

[0040] Among them, the models of operational amplifier IC2A, operational amplifier IC2B, operational amplifier IC2C and operational amplifier IC2D are preferably LM348, and the models of other operational amplifiers and other devices are shown in the attached figure. Figure 1 .

[0041] It is worth mentioning that the technical features of the utility model patent application, such as the specific modulation process of how the output module outputs a modified sine wave according to the PWM signal modulation, should be regarded as the prior art. The specific structure, working principle and possible control method and spatial layout method of these technical features can be selected according to the conventional selection in the field, and should not be regarded as the inventive point of the utility model patent. The utility model patent will not be further elaborated.

[0042] For those skilled in the art, it is still possible to modify the technical solutions described in the aforementioned embodiments, or to make equivalent substitutions for some of the technical features therein. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present utility model should be included in the protection scope of the present utility model.

Claims

1. A modified sine wave inverter, characterized in that: include: The sine wave generating module includes an operational amplifier IC2A, an operational amplifier IC2B, an operational amplifier IC2C and an operational amplifier IC2D. Terminal 1 of the operational amplifier IC2A is connected to terminal 5 of the operational amplifier IC2B through a resistor R11, terminal 7 of the operational amplifier IC2B is connected to terminal 10 of the operational amplifier IC2C through a resistor R12, and terminal 8 of the operational amplifier IC2C is connected to terminal 12 of the operational amplifier IC2D through a resistor R13; The triangular wave generating module includes an operational amplifier IC1A and an operational amplifier IC1B. Terminal 1 of the operational amplifier IC1A is connected to terminal 6 of the operational amplifier IC1B through resistors R2 and R3 in sequence. A first input module, the first input module includes an operational amplifier IC3A, terminal 4 of the operational amplifier IC3A is connected to a common terminal between terminal 5 of the operational amplifier IC1B and terminal 14 of the operational amplifier IC1D, and terminal 5 of the operational amplifier IC3A is connected to terminal 14 of the operational amplifier IC1D through a resistor R16; The second input module includes an operational amplifier IC1D, terminal 12 of the operational amplifier IC1D is connected to a common terminal between terminal 2 of the operational amplifier IC2A and terminal 14 of the operational amplifier IC2D, and terminal 13 of the operational amplifier IC1D is connected to a common terminal between terminal 5 of the operational amplifier IC1B and terminal 4 of the operational amplifier IC3A through a resistor R29.

2. The modified sine wave inverter according to claim 1, characterized in that: Modified sine wave inverters also include: A first driving module, the first driving module includes an operational amplifier IC3B and an operational amplifier IC3C, terminal 6 of the operational amplifier IC3B is connected to terminal 2 of the operational amplifier IC3A through a resistor R18, terminal 7 of the operational amplifier IC3B is connected to a common terminal between terminal 14 of the operational amplifier IC1D and terminal 8 of the operational amplifier IC3C, terminal 9 of the operational amplifier IC3C is connected to terminal 6 of the operational amplifier IC3B, and terminal 8 of the operational amplifier IC3C is connected to terminal 7 of the operational amplifier IC3B; The second driving module includes an operational amplifier IC3D and an operational amplifier IC4A, terminal 11 of the operational amplifier IC3D is connected to terminal 2 of the operational amplifier IC3A, terminal 10 of the operational amplifier IC3D is connected to terminal 5 of the operational amplifier IC1B, terminal 5 of the operational amplifier IC4A is connected to terminal 10 of the operational amplifier IC3D, and terminal 4 of the operational amplifier IC4A is connected to terminal 11 of the operational amplifier IC3D.

3. The modified sine wave inverter according to claim 1, characterized in that: The modified sine wave inverter also includes an output module, which includes: MOS tube Q1, MOS tube Q2 and driver chip IC5, terminal 1 of operational amplifier IC3B is connected to terminal 12 of driver chip IC5, terminal 14 of operational amplifier IC3C is connected to terminal 10 of driver chip IC5, the gate of MOS tube Q1 is connected to terminal 7 of driver chip IC5 through resistor R9, the gate of MOS tube Q2 is connected to terminal 1 of driver chip IC5 through resistor R30, and terminal 5 of driver chip IC5 is connected to the output terminal through inductor L1 and inductor L2 in sequence; MOS tube Q3, MOS tube Q4 and driver chip IC6, terminal 13 of operational amplifier IC3D is connected to terminal 12 of driver chip IC6, terminal 2 of operational amplifier IC4A is connected to terminal 10 of driver chip IC6, the gate of MOS tube Q3 is connected to terminal 7 of driver chip IC6 through resistor R31, the gate of MOS tube Q4 is connected to terminal 1 of driver chip IC6 through resistor R32, and terminal 5 of driver chip IC6 is connected to the output terminal.

4. The modified sine wave inverter according to claim 3, characterized in that: The output module further includes a capacitor C10, and the capacitor C10 and the inductor L1 form a resonance unit.

5. The modified sine wave inverter according to claim 3, characterized in that: The output module further includes a capacitor C11, and the capacitor C11 and the inductor L2 form a resonance unit.

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