Chip vacuum packaging structure

Abstract

The utility model relates to a chip vacuum packaging structure, comprising a substrate, a solder sheet and a sealing cover, the substrate and the sealing cover are connected through the solder sheet and form a cavity, and a chip is arranged on the substrate and in the cavity; a sealing groove is formed in the base plate, a plurality of flow channels are formed in the sealing groove, and the flow channels are connected with the cavity. According to the invention, the flow channel is arranged in the sealing groove of the substrate, so that a flow guiding effect on the molten solder is achieved, when the getter is activated and the cavity is vacuumized, the molten solder flows into the cavity through the flow channel, enough space is provided for overflow of the solder, and the situation that other parts are influenced due to random overflow of the solder can be avoided.

Description

Technical Field

[0001] The utility model relates to the technical field of chip packaging, in particular to a chip vacuum packaging structure. Background Art

[0002] In the process of electronic packaging, the substrate mainly plays the role of mechanical support protection and electrical interconnection (insulation). There are four main types of substrate materials commonly used in electronic packaging: polymer substrate, metal substrate, composite substrate, ceramic substrate. Ceramic substrate materials are widely used in electronic packaging substrates due to their high strength, good insulation, excellent thermal conductivity and heat resistance, small thermal expansion coefficient, good chemical stability and other advantages: In the existing ceramic packaging, solder and ceramic substrates will have more or less problems of bubbles and solder overflow during the welding process. More bubbles means high void rate, and high void rate will lead to difficulties in heat dissipation of ceramic packaging products, thereby indirectly affecting the product life and product reliability: Solder overflow to other devices will affect the use function of ceramic packaging products. A chip vacuum packaging structure is proposed to solve the problems existing in the prior art. Utility Model Content

[0003] The utility model aims to provide a chip vacuum packaging structure to solve the problems of packaging bubbles and solder overflow in the prior art.

[0004] The technical solution of the utility model is: a chip vacuum packaging structure, comprising a substrate, a solder sheet and a sealing cover, wherein the substrate and the sealing cover are connected by the solder sheet to form a cavity, and the chip is arranged on the substrate and inside the cavity;

[0005] A sealing groove is arranged on the substrate, a plurality of flow channels are arranged in the sealing groove, and the flow channels are connected to the cavity.

[0006] Preferably, the flow channel comprises a bottom flow channel arranged at the bottom of the sealing groove and a side flow channel arranged on the inner wall of the sealing groove, the bottom flow channel is connected to the side flow channel, and the upper end of the side flow channel is connected to the cavity;

[0007] After the substrate is connected with the solder sheet and the sealing cover, the solder sheet and the bottom flow channel form a first channel, and the inner wall of the sealing cover and the side flow channel form a second channel.

[0008] Preferably, the opening area of ​​the end of the second channel connected to the first channel is larger than the opening area of ​​the end connected to the cavity.

[0009] Preferably, a fin is provided on the top of the sealing cover, and a getter is provided on the fin.

[0010] Preferably, when the sealing cover is connected to the substrate, the inner wall of the sealing cover and the inner wall of the sealing groove are in abutting connection.

[0011] Compared with the prior art, the advantages of the utility model are:

[0012] (1) A flow channel is provided in the sealing groove of the substrate to guide the molten solder. When the getter is activated and a vacuum is generated in the cavity, the molten solder flows into the cavity through the flow channel, and sufficient space is provided for the overflow of the solder, thereby avoiding the occurrence of the situation in which the solder overflows and affects other components;

[0013] (2) The setting of the flow channel increases the regularity of solder flow, greatly reduces the generation of bubbles, reduces the void rate, and increases the reliability of the product. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The utility model is further described below in conjunction with the accompanying drawings and embodiments:

[0015] Figure 1 This is a schematic diagram of the exploded structure of the chip vacuum packaging structure of the utility model;

[0016] Figure 2 for Figure 1 A schematic diagram of the enlarged structure at B in the middle;

[0017] Figure 3 This is a schematic diagram of the chip vacuum packaging structure of the utility model in front view and AA cross-sectional view;

[0018] Figure 4 for Figure 3 Schematic diagram of the enlarged structure at C in the middle.

[0019] Among them: substrate 1, sealing groove 11, flow channel 12, bottom flow channel 121, side flow channel 122, first channel 13, second channel 14, solder sheet 2, sealing cover 3, fin 31, cavity 4. DETAILED DESCRIPTION

[0020] The following is a further detailed description of the present invention in conjunction with specific embodiments:

[0021] like Figure 1-4 As shown, a chip vacuum packaging structure includes a substrate 1, a solder sheet 2 and a sealing cover 3. The substrate 1 and the sealing cover 3 are connected through the solder sheet 2 to form a cavity 4. The chip is arranged on the substrate 1 and inside the cavity 4. A sealing groove 11 is arranged on the substrate 1, and a plurality of flow channels 12 are arranged in the sealing groove 11. The flow channels 12 are connected to the cavity 4.

[0022] The flow channel 12 includes a bottom flow channel 121 arranged at the bottom of the sealing groove 11 and a side flow channel 122 arranged on the inner wall of the sealing groove 11, the bottom flow channel 121 is connected to the side flow channel 122, and the upper end of the side flow channel 122 is connected to the cavity 4; after the substrate 1 is connected with the solder sheet 2 and the sealing cover 3, the solder sheet 2 and the bottom flow channel 121 form a first channel 13; the inner wall of the sealing cover 3 and the inner wall of the sealing groove 11 are in abutting connection, so that the inner wall of the sealing cover 3 and the side flow channel 122 form a second channel 14. The opening area of ​​the end of the second channel 14 connected to the first channel 13 is larger than the opening area of ​​the end connected to the cavity 4.

[0023] The top of the sealing cover 3 is provided with a fin 31 , and a getter (not shown in the figure) is provided at the fin 31 .

[0024] In this embodiment, the chip is mounted on the substrate 1, and the getter is placed on the fin 31. The getter is a solid getter for easy placement. Of course, the fin 31 can also adopt other structures and positions, such as connecting a small box-like structure to the inner wall of the sealing cover 3 to facilitate the placement of powdered getter.

[0025] The solder sheet 2 is an annular structure, and is similar to the structure of the sealing groove 11. The solder sheet 2 is placed at the bottom of the sealing groove 11; the lower end of the sealing cover 3 is placed in the sealing groove 11 and connected to the solder sheet 2. During packaging, the entire structure is placed in a gradually heated environment, the solder first melts, and the molten solder flows into the first channel 13; then the getter is excited to generate a vacuum in the cavity 4; at the same time, due to the vacuum environment, the molten solder flows from the first channel 13 to the second channel 14, the first channel 13 is completely filled, and the second channel 14 is completely filled or partially filled.

[0026] It should be noted that in actual operation, the amount of getter needs to be strictly controlled. If there is too much getter, the molten solder may be sucked into the cavity 4; and if there is too little getter, the required vacuum environment cannot be generated.

[0027] The above embodiments are only for illustrating the technical concept and features of the utility model, and their purpose is to enable people familiar with this technology to understand the content of the utility model and implement it accordingly, and they cannot be used to limit the protection scope of the utility model. For those skilled in the art, it is obvious that the utility model is not limited to the details of the above exemplary embodiments, and the utility model can be implemented in other specific forms without departing from the spirit or basic features of the utility model. Therefore, no matter from which point of view, the embodiments should be regarded as exemplary and non-restrictive. The scope of the utility model is limited by the attached claims rather than the above description, so it is intended to include all changes within the meaning and scope of the equivalent elements of the claims in the utility model.

Claims

1. A chip vacuum packaging structure, characterized in that: The device comprises a substrate, a solder sheet and a sealing cover, wherein the substrate and the sealing cover are connected by the solder sheet to form a cavity, and the chip is arranged on the substrate and inside the cavity; A sealing groove is arranged on the substrate, a plurality of flow channels are arranged in the sealing groove, and the flow channels are connected to the cavity.

2. The chip vacuum packaging structure according to claim 1, characterized in that: The flow channel includes a bottom flow channel arranged at the bottom of the sealing groove and a side flow channel arranged on the inner wall of the sealing groove, the bottom flow channel is connected to the side flow channel, and the upper end of the side flow channel is connected to the cavity; After the substrate is connected with the solder sheet and the sealing cover, the solder sheet and the bottom flow channel form a first channel, and the inner wall of the sealing cover and the side flow channel form a second channel.

3. The chip vacuum packaging structure according to claim 2, characterized in that: The opening area of ​​the end of the second channel connected to the first channel is larger than the opening area of ​​the end of the second channel connected to the cavity.

4. The chip vacuum packaging structure according to claim 1, characterized in that: The top of the sealing cover is provided with fins, and a getter is provided at the fins.

5. The chip vacuum packaging structure according to claim 1, characterized in that: When the sealing cover is connected to the substrate, the inner wall of the sealing cover and the inner wall of the sealing groove are in abutting connection.

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