Broadcast frequency channel switching controller

Abstract

The utility model discloses a broadcast frequency channel switching controller, which comprises a channel selection module, a main controller, a channel jump module and an output driving module, wherein the channel selection module is connected with the main controller and is used for coding a broadcast frequency channel to be switched; the main controller is used for transmitting the sequence switching signal to the channel jump module and receiving a channel jump signal generated by the channel jump module in response to the sequence switching signal; the channel jump module is respectively connected with the output end and the input end of the main controller; and the output driving module is connected with the main controller and is used for driving to output a broadcast frequency program corresponding to the target broadcast frequency channel after receiving the channel jump signal or the channel switching signal. According to the embodiment of the utility model, the automatic switching of the broadcast frequency programs is realized, the manual switching cost of the broadcast frequency programs is reduced, and the user experience is improved.

Description

Technical Field

[0001] The utility model relates to the technical field of broadcasting and television, in particular to a broadcast frequency channel switcher. Background Art

[0002] During radio and television broadcasting, it is necessary to monitor the programs on each broadcast frequency channel to determine the program content and quality, thereby ensuring the security of signal broadcasting.

[0003] So far, the channel switching of radio and television generally adopts manual switching or remote control switching. Manual switching requires staff to manually switch the broadcast frequency channel, and the staff needs to switch the broadcast frequency channel in real time, which consumes manpower and material resources; remote control switching can be remotely controlled by a remote control panel or a computer. When one or several broadcast frequency programs are off the air, the corresponding broadcast frequency channel cannot be automatically skipped, and the staff still needs to manually switch the frequency channel, which is time-consuming and laborious. It can be seen that how to solve the problem of manually switching the broadcast frequency channel in the prior art has become a problem that needs to be solved urgently. Utility Model Content

[0004] The utility model provides a broadcast frequency channel switcher to solve the problem of manually switching broadcast frequency channels in the prior art.

[0005] According to one aspect of the utility model, a broadcast frequency channel switching controller is provided, which includes: a channel selection module, a main controller, a channel jump module and an output drive module;

[0006] Wherein, the channel selection module is connected to the main controller and is used to encode the broadcast frequency channel to be switched and generate an interrupt flag corresponding to the broadcast frequency channel;

[0007] The main controller is used to transmit the sequential switching signal to the channel jump module, receive the channel jump signal generated by the channel jump module in response to the sequential switching signal, and generate a channel switching signal in response to the interrupt flag;

[0008] The channel jump module is connected to the output end and the input end of the main controller respectively, and is used to generate the channel jump signal after receiving the sequential switching signal, and transmit the channel jump signal to the main controller;

[0009] The output driving module is connected to the main controller, and is used for driving and outputting the broadcast frequency program corresponding to the target broadcast frequency channel after receiving the channel jump signal or the channel switching signal.

[0010] In one embodiment, the broadcast frequency channel switching controller further includes: a channel stopping module;

[0011] The channel stop module is connected to the main controller and is used for transmitting an interrupt request to the main controller to trigger the suspension of the main controller so that the main controller suspends the generation of the sequential switching signal and the channel jump signal.

[0012] In one embodiment, the channel jump module is further used for:

[0013] Generate an external interrupt signal to close the current broadcast frequency channel to trigger the main controller to suspend transmission of the channel jump signal corresponding to the current broadcast frequency channel to the output driver module, and generate a channel jump signal corresponding to the next broadcast frequency channel.

[0014] In one embodiment, between the channel selection module and the channel jump module, it further includes: a signal selection unit;

[0015] The input end of the signal selection unit is connected to the channel selection module and the channel jump module respectively, and the output end of the signal selection unit is connected to the input end of the main controller;

[0016] The signal selection unit is used to stop transmitting the channel jump signal to the main controller when receiving the interrupt flag.

[0017] In one embodiment, the broadcast frequency channel switching controller further includes: a crystal oscillator module;

[0018] The crystal oscillator module is connected to the main controller and is used to generate an oscillation frequency so that the main controller generates a sequential switching signal according to the oscillation frequency.

[0019] In one embodiment, the channel selection module includes: a first resistor unit, a switch module, an encoder, a first logic gate unit and a second logic gate unit;

[0020] The switch module is connected to the first resistor unit, and is used to select the broadcast frequency channel and generate a selection signal corresponding to the selected broadcast frequency channel;

[0021] The input end of the encoder is connected to the switch module and the first resistor unit respectively, and is used to generate the interrupt flag corresponding to the broadcast frequency channel in response to the selection signal; wherein the number of the encoders is at least two;

[0022] The first logic gate unit and the second logic gate unit are respectively connected to the output end of the encoder, the first logic gate unit is used to transmit the interrupt flag to the main controller, and the second logic gate unit is used to transmit the interrupt flag to the signal selection unit.

[0023] In one embodiment, the first logic gate unit includes at least a first OR gate and a buffer gate;

[0024] The input end of the first OR gate is connected to the output ends of the two encoders respectively, and is used to receive the interrupt flag bit. The output end of the first OR gate is connected to the input end of the buffer gate, and the output end of the buffer gate is connected to the input end of the main controller.

[0025] The second logic gate unit at least includes a second OR gate and a first NOT gate;

[0026] The input end of the second OR gate is connected to the output ends of the two encoders respectively, the output end of the second OR gate is connected to the input end of the first NOT gate, and the first NOT gate is connected to the input end of the signal selection unit.

[0027] In one embodiment, the channel jump module includes: a second resistor unit, a dip switch module, a multi-channel switch unit, a first resistor, a third logic gate unit and a fourth logic gate unit;

[0028] The input end of the third logic gate unit is connected to the output end of the main controller; the output end of the third logic gate unit is connected to the input end of the multi-channel switch unit; the second resistor unit is connected to the DIP switch module, and the input end of the multi-channel switch unit is connected between the second resistor unit and the DIP switch module; the output end of the multi-channel switch unit is respectively connected to the first end of the first resistor and the input end of the fourth logic gate unit; the output end of the fourth logic gate unit is connected to the input end of the signal selection unit; the second end of the first resistor is grounded;

[0029] Wherein, the number of the multi-channel switch units, the second resistor row units, the dip switch modules and the first resistors is the same.

[0030] In one embodiment, the third logic gate unit at least includes a third OR gate, a first AND gate, a second NOT gate and a third NOT gate;

[0031] The input end of the third OR gate is connected to the output end of the main controller, and the output end of the third OR gate is connected to the input end of the first multi-channel switch unit; wherein the multi-channel switch unit includes the first multi-channel switch unit, the second multi-channel switch unit and the third multi-channel switch unit;

[0032] The input end of the third NOT gate is connected to the output end of the main controller, and the output end of the third NOT gate is connected to the input end of the second multi-channel switch unit;

[0033] The input end of the first AND gate is connected to the output end of the main controller and the output end of the third NOT gate, the output end of the first AND gate is connected to the input end of the second NOT gate, and the output end of the second NOT gate is connected to the input end of the third multi-channel switch unit;

[0034] The fourth logic gate unit at least includes a fourth OR gate;

[0035] The input end of the fourth OR gate is respectively connected to the output ends of the two multi-channel switch units and the first resistor connected to the multi-channel switch unit, and the fourth OR gate is connected to the input end of the signal selection unit.

[0036] In one embodiment, the output driving module includes: a decoder, a Darlington array chip and a driving relay group;

[0037] The input end of the decoder is connected to the output end of the main controller, and the number of the decoders is the same as the number of encoders in the channel selection module;

[0038] The output end of the decoder is connected to the input end of the Darlington array chip, and the output end of the Darlington array chip is connected to the driving relay group.

[0039] The technical solution of the embodiment of the utility model is to encode the broadcast frequency channel to be switched through the channel selection module, generate an interrupt flag corresponding to the broadcast frequency channel, the main controller transmits the sequential switching signal to the channel jump module, and receives the channel jump signal generated by the channel jump module in response to the sequential switching signal, and generates a channel switching signal in response to the interrupt flag. After receiving the sequential switching signal, the channel jump module generates a channel jump signal and transmits the channel jump signal to the main controller. After receiving the channel jump signal or the channel switching signal, the output driving module drives the broadcast frequency program corresponding to the target broadcast frequency channel to output, so as to realize automatic switching of the broadcast frequency program, reduce the manual switching cost of the broadcast frequency program, and improve the user experience.

[0040] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present utility model, nor are they intended to limit the scope of the present utility model. Other features of the present utility model will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0042] Figure 1 It is a structural schematic diagram of a broadcast frequency channel switching controller provided according to the first embodiment of the utility model;

[0043] Figure 2 It is a structural schematic diagram of a broadcast frequency channel switching controller provided according to the second embodiment of the utility model;

[0044] Figure 3 It is a structural diagram of a broadcast frequency channel switching controller provided according to Embodiment 3 of the present utility model;

[0045] Figure 4 It is a structural diagram of a broadcast frequency channel switching controller provided according to the fourth embodiment of the utility model;

[0046] Figure 5 It is a structural schematic diagram of a channel selection module provided according to Embodiment 5 of the present utility model;

[0047] Figure 6 It is a structural schematic diagram of a channel selection module provided according to Embodiment 5 of the present utility model;

[0048] Figure 7 This is a structural diagram of a channel jump module provided according to Embodiment 6 of the present utility model;

[0049] Figure 8 This is a structural diagram of a channel jump module provided according to Embodiment 6 of the present utility model;

[0050] Fig. 9 This is a structural diagram of an output drive module provided according to Embodiment 7 of the present utility model;

[0051] Fig. 10A It is a partial circuit diagram of a broadcast frequency channel switching controller provided according to Embodiment 8 of the present utility model;

[0052] Fig. 10B It is a partial circuit diagram of a broadcast frequency channel switching controller provided according to Embodiment 8 of the present utility model;

[0053] Fig. 10C It is a partial circuit diagram of a broadcast frequency channel switching controller provided according to Embodiment 8 of the present utility model. DETAILED DESCRIPTION

[0054] In order to enable those skilled in the art to better understand the solution of the utility model, the technical solution in the embodiment of the utility model will be clearly and completely described below in conjunction with the drawings in the embodiment of the utility model. Obviously, the described embodiment is only a part of the embodiment of the utility model, not all of the embodiments. Based on the embodiment of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the utility model.

[0055] It should be noted that the terms "first", "second", etc. in the specification and claims of the utility model and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the utility model described here can be implemented in an order other than those illustrated or described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0056] Embodiment 1

[0057] Figure 1 1 is a schematic diagram of the structure of a broadcast frequency channel switching controller provided according to the first embodiment of the utility model. This embodiment is applicable to the case of switching broadcast frequency channels, such as Figure 1 As shown, the broadcast frequency channel switching controller includes: a channel selection module 10, a main controller 20, a channel jump module 30 and an output drive module 40.

[0058] The channel selection module 10 is connected to the main controller 20 and is used to encode the broadcast frequency channel to be switched and generate an interrupt flag corresponding to the broadcast frequency channel.

[0059] The main controller 20 is used to transmit the sequential switching signal to the channel jump module, receive the channel jump signal generated by the channel jump module 30 in response to the sequential switching signal, and generate a channel switching signal in response to the interrupt flag.

[0060] The channel jump module 30 is connected to the output end and the input end of the main controller 20 respectively, and is used to generate a channel jump signal after receiving the sequence switching signal, and transmit the channel jump signal to the main controller.

[0061] The output driving module 40 is connected to the main controller 20, and is used for driving and outputting the broadcast frequency program corresponding to the target broadcast frequency channel after receiving a channel jump signal or a channel switching signal.

[0062] In the embodiment, the channel selection module 10 is connected to the main controller 20, the channel jump module 30 is respectively connected to the output end and the input end of the main controller 20, and the output driver module 40 is connected to the main controller 20. In the actual connection process, the channel selection module 10, the main controller 20, the channel jump module 30 and the output driver module 40 can be wired to ensure the transmission of information between the channel selection module 10, the main controller 20, the channel jump module 30 and the output driver module 40.

[0063] It should be noted that the main controller 20 can issue commands according to certain logical operation requirements to control the coordinated work of the three parts of the computer: input, operation and output. The main controller 20 may include a microcontroller unit (MCU), a single-chip microcomputer, a central processing unit (CPU), and other logical operation devices with data processing capabilities and / or program execution capabilities.

[0064] The sequential switching signal may be generated by the main controller 20, and is used to control the channel jump module 30 to generate a channel jump signal corresponding to the channel jump instruction in a preset order. The channel jump signal is a module generated by the channel jump module 30 after receiving the sequential switching signal to instruct the main controller 20 to control the output driver module 40 to perform channel jump. Specifically, when the main controller 20 generates the sequential switching signal, the channel jump module 30 sequentially generates channel jump signals corresponding to channels 1 to N and feeds them back to the main controller 20. It can be understood that if the current channel jump module 30 generates a channel jump signal corresponding to channel 1 after receiving the sequential switching signal, it generates a channel jump signal corresponding to channel 2 the next time it receives the sequential switching signal.

[0065] The interrupt flag may refer to an external interrupt signal triggered by a level triggering method, which is used to control the main controller 20 to generate a channel switching signal in response to the interrupt flag. The channel switching signal may be a signal generated by the main controller 20 in response to the interrupt flag to jump to the channel corresponding to the interrupt flag. Specifically, when the main controller 20 receives the interrupt flag, it may generate a channel switching signal for the channel corresponding to the interrupt flag.

[0066] In one embodiment, the main controller 20 can generate a sequential switching signal. After receiving the sequential switching signal, the channel jump module 30 sequentially generates channel jump signals corresponding to channels 1 to N and feeds them back to the main controller 20. The main controller 20 sequentially transmits the channel jump signals to the output driver module 40. After receiving the channel jump signals, the output driver module 40 drives the output of the broadcast frequency program corresponding to the target broadcast frequency channel. When the user needs to jump the broadcast frequency channel to the broadcast frequency channel to be switched, the channel selection module 10 can encode the broadcast frequency channel to be switched and generate an interrupt flag corresponding to the broadcast frequency channel. For example, the encoding corresponding to each broadcast channel to be switched can be a binary encoding, a 5-bit binary encoding, a 6-bit binary encoding, etc. When the main controller 20 receives the interrupt flag, it can generate a channel switching signal of the channel corresponding to the interrupt flag, and transmit the channel switching signal to the output driver module 40. After receiving the channel switching signal, the output driver module 40 drives the output of the broadcast frequency program corresponding to the target broadcast frequency channel.

[0067] In the embodiment of the utility model, the channel selection module encodes the broadcast frequency channel to be switched, generates an interrupt flag corresponding to the broadcast frequency channel, the main controller transmits the sequential switching signal to the channel jump module, and receives the channel jump signal generated by the channel jump module in response to the sequential switching signal, and generates a channel switching signal in response to the interrupt flag. After receiving the sequential switching signal, the channel jump module generates a channel jump signal and transmits the channel jump signal to the main controller. After receiving the channel jump signal or the channel switching signal, the output driver module drives the output of the broadcast frequency program corresponding to the target broadcast frequency channel to realize automatic switching of the broadcast frequency program, thereby reducing the cost of manual switching of the broadcast frequency program and improving the user experience.

[0068] In one embodiment, the channel jump module 30 is further configured to:

[0069] An external interrupt signal is generated to close the current broadcast frequency channel to trigger the main controller 20 to suspend transmission of the channel jump signal corresponding to the current broadcast frequency channel to the output driver module 40 and generate a channel jump signal corresponding to the next broadcast frequency channel.

[0070] The external interrupt signal may refer to an external interrupt signal triggered by a level triggering method, which is used to control the main controller 20 to suspend transmitting the channel jump signal to the driving module 40 .

[0071] In an embodiment, when the channel jump module 30 generates an external interrupt signal to close the current broadcast frequency channel, the main controller 20 can control the signal to be unable to switch to the current broadcast frequency channel, and the main controller 20 can suspend the transmission of the channel jump signal corresponding to the current broadcast frequency channel to the output driver module 40, and at the same time, generate a channel jump signal corresponding to the next broadcast frequency channel. In an embodiment, the current broadcast frequency channel can be a stopped broadcast frequency channel, that is, the main controller 20 can control the skipping of the stopped broadcast frequency channel and enter the jump to the next broadcast channel.

[0072] In this embodiment, the channel jump module generates an external interrupt signal for closing the current broadcast frequency channel, thereby skipping the current broadcast frequency channel and automatically jumping to the next broadcast frequency channel.

[0073] Embodiment 2

[0074] Figure 2 1 is a schematic diagram of the structure of a broadcast frequency channel switching controller provided according to the second embodiment of the present utility model. This embodiment is a further description of the structure of a broadcast frequency channel switching controller based on the above embodiment. Figure 2 As shown, the broadcast frequency channel switching controller further includes: a channel stopping module 50.

[0075] The channel stop module 50 is connected to the main controller 20 and is used for transmitting an interrupt request to the main controller 20 to trigger the main controller 20 to stop generating the sequence switching signal and the channel jump signal.

[0076] The interrupt request may refer to an external interrupt signal triggered by a level trigger, which is used to suspend the stop working mode of the main controller 20. For example, assuming that the main controller 20 is configured to be woken up by an external low-level interrupt, when the main controller 20 does not detect an interrupt request, the main controller 20 is at a high level; when the main controller 20 detects an interrupt request, the main controller 20 switches to a low level, and accordingly, when the main controller 20 reads a low voltage signal, the working mode can be stopped.

[0077] In an embodiment, the channel stop module 50 and the main controller 20 may be connected by wire to realize signal transmission between the channel stop module 50 and the main controller 20. The channel stop module 50 may generate an interrupt request and transmit the interrupt request to the main controller 20. After receiving the interrupt request, the main controller 20 may suspend the generation of the sequential switching signal and the channel jump signal.

[0078] The technical solution of this embodiment transmits an interrupt request to the main controller through the channel stop module to trigger the suspension of the main controller, so that the main controller pauses the generation of sequential switching signals and channel jump signals to achieve the process of pausing the broadcast channel switching.

[0079] Embodiment 3

[0080] Figure 3 1 is a schematic diagram of the structure of a broadcast frequency channel switching controller provided according to the third embodiment of the present utility model. This embodiment is a further description of the structure of a broadcast frequency channel switching controller based on the above embodiment. Figure 3 As shown, the broadcast frequency channel switching controller further includes: a signal selection unit 60.

[0081] The input end of the signal selection unit 60 is connected to the channel selection module 10 and the channel jump module 30 respectively, and the output end of the signal selection unit 60 is connected to the input end of the main controller 20;

[0082] The signal selection unit 60 is used to stop transmitting the channel jump signal to the main controller 20 when receiving the interrupt flag.

[0083] In an embodiment, the signal selection unit 60 may be connected to the channel selection module 10, the channel jump module 30 and the main controller 20 by wired connection. The signal selection unit 60 may receive the interrupt flag bit generated by the channel selection module 10 and the channel jump signal generated by the channel jump module 30, and after receiving the interrupt flag bit, the channel jump signal may be transmitted to the main controller 20.

[0084] In one embodiment, the signal selection unit 60 can be an AND gate. Correspondingly, when the channel jump signal is at a high level, a low level is generated while the channel selection module 10 generates an interrupt flag. If the interrupt flag is not generated, a high level is output. Only when all inputs of the signal selection unit 60 are at a high level (logic 1), the output is at a high level; as long as one input is at a low level (logic 0), the output is at a low level. In other words, when there is an interrupt flag, the signal selection unit 60 outputs a low level and stops transmitting the channel jump signal to the main controller 20. When the main controller 20 is an AT89C52 8-bit single-chip microcomputer, the signal selection unit 60 can be connected to the P3.2 port of the main controller.

[0085] The technical solution of this embodiment is to stop transmitting the channel jump signal to the main controller when the signal selection unit receives the interrupt flag, thereby ensuring that the main controller can receive the interrupt flag first and switch the broadcast frequency channel to the broadcast frequency channel to be switched in time according to user needs.

[0086] Embodiment 4

[0087] Figure 4 1 is a schematic diagram of the structure of a broadcast frequency channel switching controller provided according to the fourth embodiment of the present utility model. This embodiment is a further description of the structure of a broadcast frequency channel switching controller based on the above embodiment. Figure 4 As shown, the broadcast frequency channel switching controller further includes: a crystal oscillator module 70.

[0088] The crystal oscillator module 70 is connected to the main controller 20 and is used to generate an oscillation frequency so that the main controller 20 generates a sequential switching signal according to the oscillation frequency.

[0089] In an embodiment, the crystal oscillator module 70 can generate an oscillation frequency, and the main controller 20 switches the signal in sequence according to the oscillation frequency generation order, so as to switch the broadcast frequency channel at a certain time interval. At the same time, by using the crystal oscillator module, the relevant oscillation frequency can be adjusted according to the actual needs of the user.

[0090] Embodiment 5

[0091] Figure 5 1 is a schematic diagram of a channel selection module according to the fifth embodiment of the present utility model. This embodiment is based on the above embodiment, taking two encoders 13, two first row group units 12 and two switch modules 12 as examples, and further refines the structure of the channel selection module 10. Figure 5 As shown, the channel selection module 10 includes: a first resistor unit 11, a switch module 12, an encoder 13, a first logic gate unit 14, and a second logic gate unit 15.

[0092] The switch module 12 is connected to the first resistor unit 11, and is used to select a broadcast frequency channel and generate a selection signal corresponding to the selected broadcast frequency channel;

[0093] The input end of the encoder 13 is connected to the switch module 12 and the first resistor unit 11 respectively, and is used to generate an interrupt flag corresponding to the broadcast frequency channel in response to the selection signal; wherein the number of the encoders is at least two;

[0094] The first logic gate unit 14 and the second logic gate unit 15 are respectively connected to the output end of the encoder 13 . The first logic gate unit 14 is used to transmit the interrupt flag to the main controller 20 , and the second logic gate unit 15 is used to transmit the interrupt flag to the signal selection unit 60 .

[0095] In an embodiment, the number of interfaces at the input end of the encoder 13 is the same as the number of interfaces at the first resistor unit 11, and each interface of the first resistor unit 11 is connected to the switch module 12. The input end of the first logic gate unit 14 is connected to the output end of the encoder 13, and the output end of the first logic gate unit 14 is connected to the main controller 20. The input end of the second logic gate unit 15 is connected to the output end of the encoder 13, and the output end of the second logic gate unit 15 is connected to the signal selection unit 60. The first resistor unit 11, the switch module 12, the encoder 13, the first logic gate unit 14, and the second logic gate unit 15 can be connected in a wired manner. In an embodiment, the number of the first resistor unit 11 is the same as that of the encoder 13.

[0096] In an embodiment, each switch module 12 may correspond to a broadcast frequency channel, and the switch module 12 corresponding to the broadcast frequency channel to be switched may be selected to generate a selection signal corresponding to the selected broadcast frequency channel, and the encoder 13 generates an interrupt flag corresponding to the broadcast frequency channel in response to the selection signal, and transmits the interrupt flag to the main controller 20 through the first logic gate unit 14, and the second logic gate unit 15 transmits the interrupt flag to the signal selection unit 60. In an embodiment, the model of the encoder 13 may include but is not limited to 4532.

[0097] In one embodiment, Figure 6 1 is a schematic diagram of the structure of a channel selection module according to the fifth embodiment of the present utility model. This embodiment further refines the structure of the channel selection module 10 based on the above embodiment. Figure 6 As shown, the first logic gate unit 14 at least includes a first OR gate 141 and a buffer gate 142 .

[0098] The input end of the first OR gate 141 is respectively connected to the output ends of the two encoders 13 for receiving the interrupt flag bit. The output end of the first OR gate 141 is connected to the input end of the buffer gate 142 . The output end of the buffer gate 142 is connected to the input end of the main controller 20 .

[0099] The second logic gate unit 15 at least includes a second OR gate 151 and a first NOT gate 152;

[0100] The input end of the second OR gate 151 is connected to the output ends of the two encoders 13 respectively, the output end of the second OR gate 152 is connected to the input end of the first NOT gate 141 , and the first NOT gate 141 is connected to the input end of the signal selection unit 60 .

[0101] In the embodiment, when the main controller 20 is an AT89C52 8-bit single-chip microcomputer, the buffer gate 142 can be connected to the P2.0-P2.4 port of the main controller, and the buffer gate 142 can be a common-phase buffer to isolate the front and rear circuits. Among them, as long as one or more inputs of the first or gate 141 and the second or gate 151 are high level (logic 1), the output is high level; only when all inputs are low level (logic 0), the output is low level. That is to say, when the first or gate 141 receives the interrupt flag bit, it outputs the interrupt flag bit. When the input signal of the first not gate 152 is high level (logic 1), the output is low level (logic 0); when the input signal is low level (logic 0), the output is high level (logic 1). That is to say, when the first not gate 152 receives the high level, it outputs the low level.

[0102] In one embodiment, when any of the first OR gates 141 receives an interrupt flag, the interrupt flag can be transmitted to the main controller 20. At the same time, since the interrupt flag is at a high level, when the first OR gate 151 receives a high level, it outputs a low level after passing through the first NOT gate 152 and transmits it to the signal selection unit 60. In one embodiment, the models of the first OR gate 141 and the second OR gate 151 can include but are not limited to 4071, the model of the buffer gate 142 can include but are not limited to 4050, and the model of the first NOT gate 152 can include but are not limited to 74HC14.

[0103] The technical solution of this embodiment selects the broadcast frequency channel through the switch module and generates a selection signal corresponding to the selected broadcast frequency channel. The encoder generates an interrupt flag corresponding to the broadcast frequency channel in response to the selection signal. The first logic gate unit transmits the interrupt flag to the main controller, and the second logic gate unit transmits the interrupt flag to the signal selection unit, thereby realizing the accurate generation of the channel switching signal.

[0104] Embodiment 6

[0105] Figure 7 1 is a schematic diagram of the structure of a channel jump module according to the sixth embodiment of the present utility model. This embodiment further refines the structure of the channel jump module 30 based on the above embodiment. Figure 7 As shown, the channel jump module 30 includes: a second resistor unit 31 , a dip switch module 32 , a multi-channel switch unit 33 , a third logic gate unit 34 , a fourth logic gate unit 35 and a first resistor 36 .

[0106] The input end of the third logic gate unit 34 is connected to the output end of the main controller 20; the output end of the third logic gate unit 34 is connected to the input end of the multi-channel switch unit 33; the second resistor unit 31 is connected to the dial switch module 32, and is connected to the input end of the multi-channel switch unit 33 between the second resistor unit 31 and the dial switch module 32, and the output end of the multi-channel switch unit 33 is respectively connected to the first end of the first resistor 36 and the input end of the fourth logic gate unit 35; the output end of the fourth logic gate unit 35 is connected to the input end of the signal selection unit 60; the second end of the first resistor 36 is grounded.

[0107] The number of the multi-channel switch units 33 , the second resistor unit 31 , the DIP switch modules 32 and the first resistors 36 is the same.

[0108] In an embodiment, the second resistor unit 31, the DIP switch module 32, the multi-channel switch unit 33, the first resistor 36, the third logic gate unit 34 and the fourth logic gate unit 35 can be connected by wired connection. In one embodiment, the number of interfaces between the second resistor unit 31 and the DIP switch module 32 and the multi-channel switch unit 33 is the same.

[0109] In one embodiment, the input end of the third logic gate unit 34 is connected to the output end of the main controller 20, receives the sequential switching signal output by the main controller 20, and inputs the sequential switching signal to the corresponding multi-channel switch unit 33 to generate a channel jump signal, and then feeds the channel jump signal back to the main controller 20 through the fourth logic gate unit 35. In addition, the external interrupt signal for closing the current broadcast frequency channel can be generated through the dip switch module 32 to trigger the main controller 20 to suspend the transmission of the channel jump signal corresponding to the current broadcast frequency channel to the output driver module 40.

[0110] In one embodiment, Figure 8 1 is a schematic diagram of the structure of a channel jump module according to the sixth embodiment of the present utility model. This embodiment further refines the structure of the channel jump module 30 based on the above embodiment. Figure 8 As shown, the third logic gate unit 34 at least includes a third OR gate 341, a first AND gate 342, a second NOT gate 343 and a third NOT gate 344;

[0111] The input end of the third OR gate 341 is connected to the output end of the main controller 20, and the output end of the third OR gate 341 is connected to the input end of the first multi-channel switch unit 331; wherein the multi-channel switch unit 33 includes the first multi-channel switch unit 331, the second multi-channel switch unit 332 and the third multi-channel switch unit 333;

[0112] The input end of the third NOT gate 344 is connected to the output end of the main controller 20, and the output end of the third NOT gate 344 is connected to the input end of the second multi-channel switch unit 332;

[0113] The input end of the first AND gate 342 is connected to the output end of the main controller 20 and the output end of the third NOT gate 344 , the output end of the first AND gate 342 is connected to the input end of the second NOT gate 343 , and the output end of the second NOT gate 343 is connected to the input end of the third multi-channel switch unit 333 .

[0114] The fourth logic gate unit 35 at least includes a fourth OR gate 351;

[0115] The input end of the fourth OR gate 351 is respectively connected to the output ends of the two multi-channel switch units 33 and the first resistor 36 connected to the multi-channel switch unit 33 , and the fourth OR gate 351 is connected to the input end of the signal selection unit 60 .

[0116] In the embodiment, when the main controller 20 is an AT89C52 8-bit single-chip microcomputer, the third logic gate unit 34 can be connected to the P1.0-P1.4 port of the main controller. The number of the multiplexer channel switch units 33 is the same as the number of the encoders 13. The output end of the third OR gate 341 is connected to the input end of the first multiplexer channel switch unit 331, the output end of the third NOT gate 344 is connected to the input end of the second multiplexer channel switch unit 332, the input end of the first AND gate 342 is connected to the output end of the main controller 20 and the output end of the third NOT gate 344, the output end of the first AND gate 342 is connected to the input end of the second NOT gate 343, and the output end of the second NOT gate 343 is connected to the input end of the third multiplexer channel switch unit 333. When the main controller 20 sends a sequential switching signal, according to the logic function of the logic gate, only one of the first multiplexer channel switch unit 331, the second multiplexer channel switch unit 332 and the third multiplexer channel switch unit 333 receives the corresponding sequential switching signal to generate a channel jump signal. Input terminals of the four OR gates 351 are respectively connected to the output terminals of the two multi-channel switch units 33 and the first resistor 36 connected to the multi-channel switch unit 33 , so as to feed back the channel jump signal to the main controller 20 .

[0117] The technical solution of this embodiment realizes the accurate generation of the channel jump signal. At the same time, an external interrupt signal for shutting down the current broadcast frequency channel is generated through the dip switch module to trigger the main controller to suspend the transmission of the channel jump signal corresponding to the current broadcast frequency channel to the output driver module, thereby realizing the skipping of the broadcast frequency channel.

[0118] Embodiment 7

[0119] Fig. 91 is a schematic diagram of the structure of an output driver module according to Embodiment 7 of the present utility model. This embodiment is based on the above embodiment and takes the number of decoders 41 as one as an example to further refine the structure of the output driver module 40. Fig. 9 As shown, the output driving module 40 includes: a decoder 41 , a Darlington array chip 42 and a driving relay group 43 .

[0120] The input end of the decoder 41 is connected to the output end of the main controller 20, and the number of the decoders 41 is the same as the number of the encoders 13 in the channel selection module 10;

[0121] The output end of the decoder 41 is connected to the input end of the Darlington array chip 42 , and the output end of the Darlington array chip 42 is connected to the driving relay group 43 .

[0122] The decoder 41 is a multi-input, multi-output combinational logic circuit, which is mainly used to convert the input binary code into a specific output signal, and can determine the broadcast signal channel corresponding to the channel switching signal or the channel jump signal. The Darlington array chip 42 is used for power buffering, and the driving relay group 43 is used to play the broadcast frequency program corresponding to the broadcast signal channel. In one embodiment, the Darlington array chip 42 can be a Darlington array chip of the ULN2003 series, and the model of the decoder 41 can include but is not limited to 74HC138.

[0123] Embodiment 8

[0124] In one embodiment, Figure 10A-10C Circuit diagram of the broadcast frequency channel switching controller. Fig. 10A It is a partial circuit diagram of a broadcast frequency channel switching controller provided according to Embodiment 8 of the present utility model. Fig. 10A The middle channel selection module 10 includes: 3 first resistor units 11, 24 switch modules 12, 3 encoders (encoder 13A, encoder 13B and encoder 13C), a first logic gate unit 14, and a second logic gate unit 15. The first logic gate unit 14 includes at least 6 first OR gates 141 (first OR gate 141A, first OR gate 141B, first OR gate 141C, first OR gate 141D, first OR gate 141E and first OR gate 141F) and 5 buffer gates 142 (buffer gate 142A, buffer gate 142B, buffer gate 142C, buffer gate 142D and buffer gate 142E). The second logic gate unit 15 includes 2 second OR gates 151 (second OR gate 151A and second OR gate 151B) and a first NOT gate 152.

[0125] The switch module 12 is respectively connected to each interface of the first resistor unit 11, and is used to select a broadcast frequency channel and generate a selection signal corresponding to the selected broadcast frequency channel. The input end of the encoder 13 is respectively connected to the switch module 12 and the first resistor unit 11, and is used to generate an interrupt flag corresponding to the broadcast frequency channel in response to the selection signal. The Q0 output terminal of encoder 13A and the Q0 output terminal of encoder 13B are connected to the input terminal of the first OR gate 141A, the Q1 output terminal of encoder 13A and the Q1 output terminal of encoder 13B are connected to the input terminal of the first OR gate 141B, the Q2 output terminal of encoder 13A and the Q2 output terminal of encoder 13B are connected to the input terminal of the first OR gate 141C, the output terminal of the first OR gate 141A is connected to the Q0 input terminal of encoder 13C and the input terminal of the first OR gate 141D, the output terminal of the first OR gate 141B is connected to the Q1 input terminal of encoder 13C and the input terminal of the first OR gate 141E, and the output terminal of the first OR gate 141C is connected to the Q2 input terminal of encoder 13C and the input terminal of the first OR gate 141F. The output end of the first OR gate 141D is connected to the input end of the buffer gate 142A, the output end of the first OR gate 141E is connected to the input end of the buffer gate 142B, the output end of the first OR gate 141F is connected to the input end of the buffer gate 142C, the GS end of the encoder 13A is connected to the input end of the buffer gate 142D, the GS end of the encoder 13C is connected to the input end of the buffer gate 142F, the output end of the buffer gate 142A is connected to P2.0 of the main controller 20, the output end of the buffer gate 142B is connected to P2.1 of the main controller 20, the output end of the buffer gate 142C is connected to P2.2 of the main controller 20, the output end of the buffer gate 142D is connected to P2.3 of the main controller 20, and the output end of the buffer gate 142E is connected to P2.4 of the main controller 20.

[0126] The GS end of encoder 13A and the GS end of encoder 13B are connected to the input end of the second OR gate 151A, the GS end of encoder 13C and the output end of the second OR gate 151A are connected to the input end of the second OR gate 151B, the output end of the second OR gate 151B is connected to the input end of the first NOT gate 152, and the output end of the first NOT gate 152 is connected to the input end of the signal selection unit 60.

[0127] Fig. 10B This is a partial circuit diagram of a broadcast frequency channel switching controller provided according to Embodiment 8 of the present utility model. Fig. 10B The channel stop module 50 can be a DIP switch, the channel stop module 50 is connected to the P3.3 terminal of the main controller 20, the output end of the signal selection unit 60 is connected to the P3.2 terminal of the main controller 20, and the crystal oscillator module 70 is connected to the XTAL1 and XTAL2 ports of the main controller 20.

[0128] Fig. 10C This is a partial circuit diagram of a broadcast frequency channel switching controller provided according to Embodiment 8 of the present utility model. Fig. 10C The channel jump module 30 includes: a second resistor unit 31, a dip switch module 32, three multi-channel switch units 33 (a first multi-channel switch unit 331, a first multi-channel switch unit 332 and a first multi-channel switch unit 333), a first resistor 36, a third logic gate unit 34 and a fourth logic gate unit 35. The third logic gate unit 34 includes a third OR gate 341, a first AND gate 342, a second NOT gate 343 and two third NOT gates 344; the fourth logic gate unit 35 includes a fourth OR gate 351 (a fourth OR gate 351A and a fourth OR gate 351B).

[0129] The dip switch module 32 is connected to each interface of the second resistor unit 31 and the multi-channel switch unit 33 respectively, and the dip switch module 32 may be a single-ended multi-channel multi-way switch.

[0130] The input end of the third OR gate 341 is connected to P1.3 and P1.4 of the main controller 20, and the output end of the third OR gate 341 is connected to the INH end of the first multi-channel switch unit 331; the input end of the NOT gate 344 is connected to P1.4 of the main controller 20, and the output end of the third NOT gate 344 is connected to the INH end of the second multi-channel switch unit 332; the input end of the first AND gate 342 is connected to the P1.3 end of the main controller 20 and the output end of the third NOT gate 344, the output end of the first AND gate 342 is connected to the input end of the second NOT gate 343, and the output end of the second NOT gate 343 is connected to the INH end of the third multi-channel switch unit 333. The output end of the multi-channel switch unit 33 is respectively connected to the first end of the first resistor 36 and the input of the fourth logic gate unit 35, and the second end of the first resistor 36 is grounded. The X port of the first multi-channel switch unit 331 and the X port of the second multi-channel switch unit 332 are connected to the input end of the fourth OR gate 351A, the X port of the third multi-channel switch unit 333 and the output end of the fourth OR gate 351A are connected to the input end of the fourth OR gate 351B, and the output end of 351B is connected to the input end of the signal selection unit 60.

[0131] Fig. 10C The output drive module 40 includes: a decoder 41 (decoder 41A, decoder 41B and decoder 41C), a Darlington array chip 42 and a drive relay group 43.

[0132] Among them, the A, B and C ports of decoder 41A, the A, B and C ports of decoder 41B and the A, B and C ports of decoder 41C are connected to P1.0, P1.1 and P1.2 of the main controller 20 respectively, the E2 port of decoder 41A is connected to the E1 port of decoder 41B, the E23 port of decoder 41A is connected to the E2 port of decoder 41B and the E1 port of decoder 41C, the E1 port of decoder 41C is also connected to P1.4 of the main controller 20, and the E3 port of decoder 41B is grounded. The E2 and E3 ports of decoder 41C are grounded. Y0-Y7 of decoder 41A, decoder 41B and decoder 41C are connected to Darlington array chip 42, and Darlington array chip 42 is connected to driving relay group 43 to drive the broadcast frequency program of the broadcast frequency channel to broadcast.

[0133] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be performed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0134] The above specific implementations do not constitute a limitation on the protection scope of the present utility model. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present utility model shall be included in the protection scope of the present utility model.

Claims

1. A broadcast frequency channel switching controller, It is characterized in that include: Channel selection module, main controller, channel jump module and output driver module; The channel selection module is connected to the main controller and is used to encode the broadcast frequency channel to be switched and generate an interrupt flag corresponding to the broadcast frequency channel; The main controller is used to transmit the sequential switching signal to the channel jump module, receive the channel jump signal generated by the channel jump module in response to the sequential switching signal, and generate a channel switching signal in response to the interrupt flag; The channel jump module is connected to the output end and the input end of the main controller respectively, and is used to generate the channel jump signal after receiving the sequential switching signal, and transmit the channel jump signal to the main controller; The output driving module is connected to the main controller, and is used for driving and outputting the broadcast frequency program corresponding to the target broadcast frequency channel after receiving the channel jump signal or the channel switching signal.

2. The broadcast frequency channel switching controller according to claim 1, It is characterized in that The broadcast frequency channel switching controller further includes: a channel stop module; The channel stop module is connected to the main controller and is used for transmitting an interrupt request to the main controller to trigger the suspension of the main controller so that the main controller suspends the generation of the sequential switching signal and the channel jump signal.

3. The broadcast frequency channel switching controller according to claim 1, It is characterized in that The channel jump module is also used for: Generate an external interrupt signal to close the current broadcast frequency channel to trigger the main controller to suspend transmission of the channel jump signal corresponding to the current broadcast frequency channel to the output driver module, and generate a channel jump signal corresponding to the next broadcast frequency channel.

4. The broadcast frequency channel switching controller according to claim 1, It is characterized in that Between the channel selection module and the channel jump module, it also includes: a signal selection unit; The input end of the signal selection unit is connected to the channel selection module and the channel jump module respectively, and the output end of the signal selection unit is connected to the input end of the main controller; The signal selection unit is used to stop transmitting the channel jump signal to the main controller when receiving the interrupt flag.

5. The broadcast frequency channel switching controller according to claim 1, It is characterized in that The broadcast frequency channel switching controller further includes: a crystal oscillator module; The crystal oscillator module is connected to the main controller and is used to generate an oscillation frequency so that the main controller generates a sequential switching signal according to the oscillation frequency.

6. The broadcast frequency channel switching controller according to claim 4, It is characterized in that The channel selection module includes: a first resistor unit, a switch module, an encoder, a first logic gate unit and a second logic gate unit; The switch module is connected to the first resistor unit, and is used to select the broadcast frequency channel and generate a selection signal corresponding to the selected broadcast frequency channel; The input end of the encoder is connected to the switch module and the first resistor unit respectively, and is used to generate the interrupt flag corresponding to the broadcast frequency channel in response to the selection signal; wherein the number of the encoders is at least two; The first logic gate unit and the second logic gate unit are respectively connected to the output end of the encoder, the first logic gate unit is used to transmit the interrupt flag to the main controller, and the second logic gate unit is used to transmit the interrupt flag to the signal selection unit.

7. The broadcast frequency channel switching controller according to claim 6, It is characterized in that The first logic gate unit at least includes a first OR gate and a buffer gate; The input end of the first OR gate is connected to the output ends of the two encoders respectively, and is used to receive the interrupt flag bit. The output end of the first OR gate is connected to the input end of the buffer gate, and the output end of the buffer gate is connected to the input end of the main controller. The second logic gate unit at least includes a second OR gate and a first NOT gate; The input end of the second OR gate is connected to the output ends of the two encoders respectively, the output end of the second OR gate is connected to the input end of the first NOT gate, and the first NOT gate is connected to the input end of the signal selection unit.

8. The broadcast frequency channel switching controller according to claim 4, It is characterized in that The channel jump module includes: a second resistor unit, a dip switch module, a multi-channel switch unit, a first resistor, a third logic gate unit and a fourth logic gate unit; The input end of the third logic gate unit is connected to the output end of the main controller; the output end of the third logic gate unit is connected to the input end of the multi-channel switch unit; the second resistor unit is connected to the DIP switch module, and the input end of the multi-channel switch unit is connected between the second resistor unit and the DIP switch module; the output end of the multi-channel switch unit is respectively connected to the first end of the first resistor and the input end of the fourth logic gate unit; the output end of the fourth logic gate unit is connected to the input end of the signal selection unit; the second end of the first resistor is grounded; Wherein, the number of the multi-channel switch units, the second resistor row units, the dip switch modules and the first resistors is the same.

9. The broadcast frequency channel switching controller according to claim 8, It is characterized in that The third logic gate unit at least includes a third OR gate, a first AND gate, a second NOT gate and a third NOT gate; The input end of the third OR gate is connected to the output end of the main controller, and the output end of the third OR gate is connected to the input end of the first multi-channel switch unit; wherein the multi-channel switch unit includes the first multi-channel switch unit, the second multi-channel switch unit and the third multi-channel switch unit; The input end of the third NOT gate is connected to the output end of the main controller, and the output end of the third NOT gate is connected to the input end of the second multi-channel switch unit; The input end of the first AND gate is connected to the output end of the main controller and the output end of the third NOT gate, the output end of the first AND gate is connected to the input end of the second NOT gate, and the output end of the second NOT gate is connected to the input end of the third multi-channel switch unit; The fourth logic gate unit at least includes a fourth OR gate; The input end of the fourth OR gate is respectively connected to the output ends of the two multi-channel switch units and the first resistor connected to the multi-channel switch unit, and the fourth OR gate is connected to the input end of the signal selection unit.

10. The broadcast frequency channel switching controller according to claim 1, It is characterized in that The output drive module includes: a decoder, a Darlington array chip and a drive relay group; The input end of the decoder is connected to the output end of the main controller, and the number of the decoders is the same as the number of encoders in the channel selection module; The output end of the decoder is connected to the input end of the Darlington array chip, and the output end of the Darlington array chip is connected to the driving relay group.

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