Circuit for executing bias current temperature constant compensation through nonlinear current mirror

Abstract

The utility model discloses a circuit for executing bias current temperature constant compensation through a non-linear current mirror, and belongs to the technical field of compensation circuits. The circuit comprises a first transistor and a second transistor which are mutually connected to form a current mirror structure, wherein the first transistor and the second transistor are MOS transistors with different threshold voltages; the grid electrode of the first transistor is connected with a channel, an input current is formed on the channel, a voltage difference exists between the grid electrode of the second transistor and the grid electrode of the first transistor, the second transistor generates a voltage difference having a nonlinear relation with the input current through a current mirror structure, and an output current having a temperature constant different from that of the input current; performing temperature constant compensation; according to the scheme, the number of components can be greatly reduced, the circuit area and action current can be reduced, and the temperature coefficient of the output bias current can be widely set according to the intention of a designer.

Description

Technical Field

[0001] The utility model belongs to the technical field of compensation circuits, and in particular relates to a circuit for performing bias current temperature constant compensation through a nonlinear current mirror. Background Art

[0002] In analog circuits, bias current is a very important factor that determines the circuit's operating characteristics. In general, analog circuits obtain the bias current they need from a separate bias circuit. In this case, the bias circuit is required to output a current that suppresses the effects of process, voltage, and temperature fluctuations.

[0003] The method of generating bias current through reference voltage has been widely used, such as Figure 1 As shown, Figure 1 The configuration for generating bias current (I2) from reference voltage (VREF) related to this scheme is shown. Figure 1 In the way, under the action of the operational amplifier, a voltage of the same magnitude as the reference voltage (VREF) is generated across the resistor (R1), so the current flowing through the resistor is the current of the reference voltage divided by the value of the resistor (R1) (I1=VREF / R1). Therefore, if Figure 1 As shown, using a current mirror (M1, M2) can generate a bias current (I2=m*I1) that is a constant multiple of the current (I1) flowing through the resistor (R1).

[0004] Figure 1 There are many types of circuits used to generate the reference voltage (VREF), but the BGR (Band Gap Reference) circuit and BMR (Beta Multiplier Reference) circuit that generate the reference voltage in accordance with the band gap on the semiconductor substrate are more commonly used. Figure 2 and Figure 3 A form of a BGR circuit and a BMR circuit are shown respectively. Figure 2 The circuit in the circuit is mainly used to generate a reference voltage (VBGR, VBMR) with little temperature dependence, but it is not limited to this. The indicator that reflects the temperature dependence of voltage or current is called the temperature constant (Temperature Coefficient), which is the fluctuation rate of voltage or current (ΔR / R) divided by the magnitude of temperature change (ΔT), that is, the partial differential of the resistance (R) value with respect to temperature (T) divided by the resistance value (R).

[0005] It can be seen from this that there is currently no universal method that can input a temperature-dependent current from a reference voltage generating circuit such as BGR, BMR, and output a bias current with improved temperature dependence. The existing methods require a large number of components, resulting in a large circuit area and a large operating current. Utility Model Content

[0006] In view of the above-mentioned problems existing in the prior art, the purpose of the utility model is to provide a compensation circuit which utilizes a nonlinear current mirror to perform temperature constant compensation of a bias current, which can input a current having temperature dependence from a reference voltage generating circuit such as a BGR or a BMR, and output a bias current having improved temperature dependence; at the same time, the bias current output by its BGR can completely eliminate the zero temperature coefficient of temperature dependence; at the same time, it also has a positive temperature coefficient and a negative temperature coefficient, the current of the former increases in direct proportion to the temperature, and the current of the latter increases in inverse proportion to the temperature.

[0007] In order to solve the above problems, the technical solution adopted by the utility model is as follows:

[0008] A circuit for performing bias current temperature constant compensation by a nonlinear current mirror comprises a first transistor and a second transistor connected to each other to form a current mirror structure, wherein the first transistor and the second transistor are MOS transistors with different threshold voltages;

[0009] The gate of the first transistor is connected to a channel and an input current is formed on the channel. There is a voltage difference between the gate of the second transistor and the gate of the first transistor. The second transistor generates an output current with a voltage difference that has a nonlinear relationship with the input current and a different temperature constant from the input current through the current mirror structure, thereby performing temperature constant compensation.

[0010] Furthermore, the nonlinear relationship can be obtained by being proportional or inversely proportional to the size of the resistor connected to the source of the second transistor.

[0011] Further, the circuit includes a first voltage source arranged at the gate of the first transistor;

[0012] or comprising a second voltage source arranged at a gate of the second transistor;

[0013] Or include a first voltage source and a second voltage source respectively arranged at the gates of the first transistor and the second transistor.

[0014] Further, the gate of the first transistor is connected to the gate of the second transistor, and the source of the second transistor is connected to a resistor.

[0015] Further, the first transistor may be configured to be included in a reference voltage generating circuit, and in this case, the source of the first transistor is connected to a first resistor, and the gate of the first transistor is connected to an input terminal of a differential amplifier in the reference voltage generating circuit.

[0016] Furthermore, the channel of the first transistor is connected to the channels of other transistors in the reference voltage generating circuit through a second resistor, and the channel of the second transistor is connected to the sources of the other transistors.

[0017] Compared with the prior art, the beneficial effects of the utility model are:

[0018] The method of using a nonlinear current mirror to compensate for the temperature dependence of the bias current proposed in the utility model can greatly reduce the number of components, thereby facilitating the reduction of the circuit area and the operating current; in addition, it also has the advantage of being able to widely set the temperature coefficient of the output bias current according to the designer's intention. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A schematic diagram of a process of generating a bias current from a reference voltage in the prior art;

[0020] Figure 2 A schematic diagram of a BGR reference voltage circuit in the prior art;

[0021] Figure 3 A schematic diagram of a BMR circuit in the prior art;

[0022] Figure 4 The schematic diagram of the voltage and current configuration of the MOS transistor in this scheme and the schematic diagram of the voltage and current of the MOS transistor at different temperatures;

[0023] Figure 5 Schematic diagram of the temperature dependence of the MOS transistor after inputting the static current in this scheme;

[0024] Figure 6 The curve diagram between the circuit implemented in the form of nonlinear current mirror in this scheme and the input and output currents;

[0025] Figure 7 for Figure 6 Schematic diagram of the temperature variation of output current with gate voltage difference and temperature constant;

[0026] Figure 8 is a schematic diagram of the circuit structure of the nonlinear current mirror of the first embodiment;

[0027] Fig. 9 is a schematic diagram of the circuit structure of the nonlinear current mirror of the second embodiment;

[0028] Fig.10 is a schematic diagram of the circuit structure of the nonlinear current mirror of the third embodiment;

[0029] Fig.11 A schematic diagram of an application circuit structure for using a BMR as one of the reference voltage circuits and combining it with a differential amplifier to buffer the reference voltage;

[0030] In the figure: 200-BMR; 300-differential amplifier; 1000-temperature constant compensation circuit. DETAILED DESCRIPTION

[0031] The utility model is further described below in conjunction with specific embodiments.

[0032] first, Figure 2 A form of a BGR reference voltage circuit according to the prior art is shown. Figure 3 FIG. 1 shows one form of a BMR circuit according to the prior art. Figure 2 and Figure 3 The principle of adjusting the temperature constant of the reference voltage is to adjust the CTAT (Complementary To Absolute Temperature) voltage (VCTAT) which is inversely proportional to the temperature and the PTAT (Proportional To Absolute Temperature) voltage (VPTAT) which is proportional to the temperature. Figure 2 and Figure 3 According to the operating principle of BGR and BMR shown in , a current proportional to the temperature will flow through the current mirrors that constitute each circuit. Furthermore, the following equations (1) and (2) describe the current flowing through BGR and BMR respectively:

[0033] (1)

[0034] (2)

[0035] In formula (1), ;

[0036] In formula (2), ;

[0037] also, is the Boltzman constant ; The unit charge ; Absolute temperature ; The mobility of electrons ; Hydroxyl heritability ; The thickness of the gate OH groups of MN0 and MN1 ; is the ratio of the width to the length of the MOS transistor (MN0, MN1). At this time, equation (1) and temperature Equation (2) also shows that the mobility of electrons in semiconductors is inversely proportional to temperature, so the result is that the current increases in direct proportion to the temperature. Therefore, in both BGR and BMR cases, a PTAT voltage will be generated across the resistor (R1b), so adjusting the value of the resistor (R1b) will only increase or decrease the PTAT voltage, thereby adjusting the ratio of the CTAT voltage to the PTAT voltage. Figure 2 The diode and Figure 3 The current (I0=I1) can be determined by R1a, m and W / L at both ends of the MOS transistor in order to generate the CTAT voltage at the operating temperature.

[0038] In order to Figure 2 BGR or Figure 3 The BMR in the generator generates bias current and can be used Figure 1 The well-known voltage-to-current converter circuit is used to generate a current with improved temperature dependence. However, in this case, if the temperature constant of the resistor (R1) that determines the ratio of converting the reference voltage to the current is not zero, the temperature constant of the Bayers current will be compensated. Therefore, it is proposed to input a current with temperature dependence from the reference voltage generation circuit such as BGR and BMR of this scheme, and output a bias current with improved temperature dependence. At this time, the output bias current can be one of the two cases of proportional to temperature (PTAT) or inversely proportional to temperature (CTAT), including the case of completely eliminating temperature dependence.

[0039] also, Figure 4 The configuration of the voltage and current of the MOS transistor according to the present solution is shown, and the voltage and current diagrams of the MOS transistor at different temperatures are also given. Figure 4 In (a), when the gate of the MOS transistor is connected to the gate voltage (VGS), the current (ID) entering the transistor is as follows Figure 4 As shown in (b), Figure 4 (b) at different temperatures The current (ID) is plotted on a logarithmic scale.

[0040] Reference Figure 4(b), in the area (Sub-threshold) where the gate voltage (VGS) is lower than the threshold voltage (VTH), the drag current (ID) increases in proportion to the temperature, but the slope is decreasing. In addition, if the gate voltage is above the threshold voltage (threshold voltage), that is, in the figure, when the channel current is fixed at IVTH, it can be seen that the threshold voltage (threshold voltage) is inversely proportional to the temperature. When the gate voltage is further increased, causing the channel current (ID) to reach IZTC, the constant current (IZTC) is independent of temperature changes. When the gate voltage is increased to a higher voltage, it is seen that the current (ID) is inversely proportional to the temperature. Therefore, when the channel current is greater than IZTC, the gate voltage has a positive temperature constant under constant current, and when the channel current is less than IZTC, the gate voltage has a negative temperature constant under constant current.

[0041] Figure 5 (a) is a circuit that connects the gates of MOS transistors together, inputs a static current, and measures the voltage between the gate and the source. When a constant current (IREF0, IREF1) is input and the temperature is changed, a voltage Figure 5 (b) The change of gate voltage (ΔVGS0, ΔVGS1) is shown. At this time, it can be seen from the fluctuation of the gate that the lower the channel current (ID) is than IZTC, the larger the value displayed. When the channel current is IZTC, the gate voltage does not change. When the channel current is greater than IZTC and the larger it is, the larger its value is. It can be further seen that when the channel current is less than IZTC, the fluctuation of the gate voltage has a negative value; when the channel current is greater than IZTC, the fluctuation of the gate voltage has a positive value, that is, the temperature constant of the gate voltage of the MOS transistor can change from negative to positive according to the current.

[0042] Figure 5 (c) Determine using simulation tools Figure 5 Temperature dependence of the MOS transistor gate voltage with current (ID) in the circuit in (a), where the solid line is ΔVGS / ΔT and the dashed line is the temperature constant of VGS TC(VGS). Figure 5 (c) shows that for MOS transistors, the temperature constant varies with the magnitude of the current. Figure 6 A graph showing the input and output currents of a circuit implemented in the form of a nonlinear current mirror according to the present scheme.

[0043] like Figure 6 As shown in the figure, when forming a nonlinear current mirror, the gate voltages of two MOS transistors with the same electrical characteristics are different, which will generate currents of different magnitudes. It can be seen from this that the input and output currents of the current mirror will have different temperature dependencies. Figure 6The input current and output current diagram of the linear current mirror when the dotted line ΔVTH=0 is drawn here for comparison with the nonlinear current mirror. The nonlinear current mirror in this scheme refers to the situation where the input current and output current are not linear due to the difference in the operating conditions or characteristics of the two MOS transistors constituting the current mirror.

[0044] Figure 7 express Figure 6 The temperature dependence of the output current in the circuit with the gate voltage difference and the temperature constant change. Specifically, Figure 7 yes Figure 6 The temperature dependence of the output current under the gate voltage difference (VTH) of two MOS transistors with the same electrical characteristics is determined and summarized in the simulation of a nonlinear current mirror while keeping the input current constant.

[0045] Figure 7 (a) is the circuit for performing simulation, and Figure 6 (a) The same. Figure 7 (b) shows the temperature dependence of the output current (IOUT) plotted against the gate voltage difference of the two mode transistors. Figure 7 (b) It can be seen that when the difference between the two gate voltages (ΔVTH) is positive, the output current decreases inversely with the temperature; when it is negative, the output current increases in direct proportion to the temperature. It can be seen that the larger the difference between the two gate voltages (ΔVTH), the more obvious the nonlinear relationship is and the greater the temperature dependence is. Figure 7 (c) shows the temperature constant of the output current calculated based on the input current (IREF). As can be seen from the figure, as the output current increases, the temperature constant approaches zero. The greater the nonlinearity, the greater the absolute value of the obtained temperature constant. Therefore, in order to compensate for the temperature dependence of the input current, the gate voltage difference and the input current size or the nonlinear current mirror input side MOS transistor (M0) can be adjusted. method.

[0046] pass Figure 7 The diagram shown in (c) summarizes the method of compensating the temperature dependence of the input current as follows.

[0047] 1) In order to make the temperature constant TC (Temperature Coefficient) fluctuate in the positive direction, the difference between the gate voltages of the nonlinear current mirror must be set to a negative value (ΔVTH < 0); conversely, in order to make the temperature constant fluctuate in the negative direction, it must be set to a positive value (ΔVTH > 0).

[0048] 2) In order to increase the absolute value of the compensated temperature constant, the difference between the gate voltages of the current mirror must be set larger, or the input current must be reduced, or the input side MOS transistor must be increased. , making the gate voltage on the input side lower.

[0049] 3) In order to reduce the absolute value of the compensated temperature constant, the difference between the gate voltages of the current mirror must be set smaller, or the input current must be increased, or the input side MOS transistor must be reduced. , making the gate voltage on the input side higher.

[0050] Figure 8 The circuit shown in FIG. 1 is a circuit implemented by a nonlinear current mirror according to the first embodiment. Figure 8 (b) Figure 8 Different forms of nonlinear current mirrors in (a) use MOS transistors with different threshold voltages. Figure 8 In (a), a voltage source is used to make the threshold voltage of two identical MOS transistors different. Figure 8 In (b), an equivalent nonlinear current mirror is formed by making the threshold voltage of the MOS transistors different.

[0051] Fig. 9 and Fig.10 The circuits of the nonlinear current mirrors in two other embodiments and two forms are shown respectively. Figure 8 A first voltage source is set at the gate of the first transistor (M0, M0a) of (a). Fig. 9 A second voltage source is provided at the gate of the second transistor (M1, M1a) of (a), and furthermore, Fig.10 A first voltage source and a second voltage source are respectively provided at the gate of the first transistor (M0, M0a) and the gate of the second transistor (M1, M1a) in (a).

[0052] If there is no separate voltage source related to the threshold voltage, it can also be constructed Figure 8 (b) Fig. 9 (b) and Fig.10 The first transistor (M0, M0b) and the second transistor (M1) in (b). Correspondingly, the gate of the first transistor (M0, M0b, MN1, m) is connected to the gate of the second transistor (M1, MN2), and the resistor (R1) is connected to the source of the second transistor (M1, MN2).

[0053] Fig. 9 (a) and Fig. 9 (b) shows the implementation of nonlinear current mirrors that are equivalent to each other. Similarly, Fig.10(a) and Fig.10 (b) shows the implementation of nonlinear current mirrors that are equivalent to each other. Fig. 9 (b) and Fig.10 In (b), if the output current (IOUT) is not temperature-dependent, then the resistor (R1) is also not temperature-dependent, and a constant voltage independent of temperature will be generated across the resistor, resulting in a constant voltage difference between the gate and the source. However, the nonlinear current mirror of this scheme is not limited to the case where the output current (IOUT) and the resistor (R1) are not temperature-dependent.

[0054] also, Fig. 9 (a) (or Fig.10 (a)) and Fig. 9 (b) (or Fig.10 (b) can be understood as a more common implementation form of a nonlinear current mirror. The threshold voltage of the components available in the project is already determined, and designers cannot change the value at will. Fig. 9 In the form of (b), there is a resistor in the path through which the output current flows, and the designer can arbitrarily set the resistor value and thereby set the voltage difference between the gate and source of the two MOS transistors to a continuous value. Fig. 9 In (b), the output current (IOUT) and the resistor (R1) are considered to have no temperature dependence, so by adjusting the value of the resistor (R1), the temperature constant of the output current can be continuously changed. Fig. 9 (b) or Fig.10 In (b), the influence of the output current and the resistance (R1) can be compensated by slightly increasing or decreasing the resistance (R1).

[0055] Fig.11 The application circuit of buffering the reference voltage by combining a BMR, one of the reference voltage circuits, with a differential amplifier. In this circuit, the bias current flowing through the differential amplifier is generated by the BMR current with a positive temperature constant, but the temperature dependence (ZTC) can be completely eliminated. It can be seen that the MOS transistor is not used alone to form a nonlinear current mirror. The dotted line represents a part of the existing circuit, which constitutes a BMR and a differential amplifier respectively, but can simultaneously perform the function of a nonlinear current mirror. Therefore, the present solution does not necessarily include a separate current mirror to compensate for the temperature dependence of the current, but can be fully or partially implemented by part of other application circuits.

[0056] Figures 4 to 11 A compensation circuit (1000) for performing temperature constant compensation on a bias current using a nonlinear current mirror of the present solution is shown. Correspondingly, the compensation circuit (1000) includes a first transistor (M0, M0a, M0b, MN1, m) and a second transistor (M1, M1a, M1b, MN2).

[0057] A first transistor (M0, M0a, M0b, MN1, m) and a second transistor (M1, M1a, M1b, MN2) are connected to each other to form a current mirror structure, a gate of the first transistor (M0, M0a, M0b, MN1, m) is connected to a channel and an input current (IREF) is formed on the channel, a voltage difference exists between the gate of the second transistor (M1, M1a, M1b, MN2) and the gate of the first transistor (M0, M0a, M0b, MN1, m), and the second transistor (M1, M1a, M1b, MN2) generates an output current (IOUT) having a voltage difference with an input current and a different temperature constant from the input current through the current mirror structure, and performs temperature constant compensation.

[0058] The first transistor (M0, M0a, M0b, MN1, m) and the second transistor (M1, M1a, M1b, MN2) are MOS transistors with different threshold voltages, and their nonlinear relationship can be obtained by being proportional or inversely proportional to the size of the resistor (R1, R2) connected to the source of the second transistor (M1, M1a, M1b, MN2).

[0059] The nonlinearity of the nonlinear current mirror can also be determined by the threshold voltage difference between the first transistor (M0, M0a, M0b, MN1, m) and the second transistor (M1, M1a, M1b, MN2). In addition, the nonlinear relationship can be determined by the size of the resistor (R1, R2) connected to the source of the second transistor (M1, M1a, M1b, MN2).

[0060] The circuit may further include a first voltage source disposed at the gate of the first transistor (M0, M0a, M0b, MN1, m), may also include a second voltage source disposed at the gate of the second transistor (M1, M1a, M1b, MN2), or may include a first voltage source and a second voltage source disposed at the gates of the first transistor (M0, M0a, M0b, MN1, m) and the second transistor (M1, M1a, M1b, MN2), respectively.

[0061] The first transistor (M0, M0b, MN1, m) and the second transistor (M1, MN2) may form a separate voltage source that is not related to the aforementioned threshold voltage. Correspondingly, the gate of the first transistor (M0, M0b, MN1, m) may be connected to the gate of the second transistor (M1, MN2). The resistor (R1, R2) may be connected to the source of the second transistor (M1, MN2).

[0062] The first transistor (MN1, m) may be configured to be included in the reference voltage generating circuit (200). The first resistor (R1a) may be connected to the source of the first transistor (MN1, m). The gate of the first transistor (MN1, m) may be connected to the input terminal of the differential amplifier (OP-AMP) of the reference voltage generating circuit (200). The channel of the first transistor (MN1, m) may be connected to the channel of another transistor (MP1) of the reference voltage generating circuit (200) through the second resistor (R1b).

[0063] As part of a current source circuit, the second transistor (MN2) may be connected to the source of the other transistors. Similarly, the current source circuit operates as a nonlinear current mirror to form an output current (IOUT).

[0064] The present scheme is not limited to a specific form of nonlinear current mirror and can be made more widely applicable by finding out the effect of input current (IREF) and degree of nonlinearity (ΔVTH) on the temperature constant.

[0065] The method of using a nonlinear current mirror to compensate for the temperature dependence of the bias current proposed in the utility model can greatly reduce the number of components, thereby facilitating the reduction of the circuit area and the operating current; in addition, it also has the advantage of being able to widely set the temperature coefficient of the output bias current according to the designer's intention.

Claims

1. A circuit for performing bias current temperature constant compensation by means of a nonlinear current mirror, characterized in that: It includes a first transistor and a second transistor connected to each other to form a current mirror structure, wherein the first transistor and the second transistor are MOS transistors with different threshold voltages; The gate of the first transistor is connected to a channel and an input current is formed on the channel. There is a voltage difference between the gate of the second transistor and the gate of the first transistor. The second transistor generates an output current with a voltage difference that has a nonlinear relationship with the input current and a different temperature constant from the input current through the current mirror structure, thereby performing temperature constant compensation.

2. The circuit for performing bias current temperature constant compensation by a nonlinear current mirror according to claim 1, characterized in that: The nonlinear relationship may be obtained by being proportional to or inversely proportional to the size of the resistor connected to the source of the second transistor.

3. The circuit for performing bias current temperature constant compensation by a nonlinear current mirror according to claim 1, characterized in that: The circuit includes a first voltage source disposed at a gate of the first transistor; or comprising a second voltage source arranged at a gate of the second transistor; Or include a first voltage source and a second voltage source respectively arranged at the gates of the first transistor and the second transistor.

4. The circuit for performing bias current temperature constant compensation by a nonlinear current mirror according to claim 1, characterized in that: The gate of the first transistor is connected to the gate of the second transistor, and the source of the second transistor is connected to a resistor.

5. The circuit for performing bias current temperature constant compensation by a nonlinear current mirror according to claim 4, characterized in that: The first transistor may be configured to be included in a reference voltage generating circuit, and in this case, the source of the first transistor is connected to a first resistor, and the gate of the first transistor is connected to an input terminal of a differential amplifier in the reference voltage generating circuit.

6. The circuit for performing bias current temperature constant compensation by a nonlinear current mirror according to claim 5, characterized in that: The channel of the first transistor is connected to the channels of other transistors in the reference voltage generating circuit through a second resistor, and the channel of the second transistor is connected to the sources of the other transistors.

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