Electronic package
By setting up an intermediary plate with openings in the package stack structure and placing a thermal conduction block, the problem of insufficient heat dissipation of the package is solved, and more effective thermal management is achieved, avoiding overheating or damage to the package.
Patent Information
- Application Number
- CN202420572472.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Priority Date
- 2024-03-18
- Filing Date
- 2024-03-22
- Publication Date
- 2024-12-27
- Estimated Expiration
- 2034-03-22
AI Technical Summary
The existing semiconductor packages are overheated or damaged due to heat failure to effectively dissipate heat during operation.
In the package stacking structure, an intermediary plate with an opening is provided, and a heat conducting block is placed thereon to contact the electronic component, providing a heat dissipation path and increasing the heat capacity of the electronic component.
By increasing the heat dissipation path, the temperature of the electronic components is effectively reduced, the package is avoided overheating or damage, and the reliability of the package structure is improved.
Smart Images
Figure CN222261035U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to a semiconductor packaging technology, and more particularly to an electronic package for packaging stacking and a manufacturing method thereof. Background Art
[0002] With the booming development of portable electronic products in recent years, the development of various related products is also moving towards high density, high performance, and light, thin, short, and small trends. For this reason, the industry has developed various integrated multifunctional packaging styles in order to meet the requirements of light, thin, short, and high density for electronic products. In order to improve electrical functions and save packaging space, different three-dimensional packaging technologies have been developed, such as Fan Out Package on Package (FO PoP), etc., to match the greatly increased number of input / output ports on various chips, and then integrate integrated circuits with different functions into a single packaging structure. This packaging method can give full play to the heterogeneous integration characteristics of the system package (SiP), and can achieve system integration of electronic components with different functions, such as memory, central processing unit, graphics processor, image application processor, etc. through stacking design, which is suitable for various thin and light electronic products.
[0003] Figure 1 FIG. 1 is a cross-sectional schematic diagram of an existing semiconductor package 1. Figure 1 As shown, the semiconductor package 1 includes: a packaging substrate 10 configured with a semiconductor chip 11, a circuit structure 14 stacked on the packaging substrate 10 through conductive pillars 13, and a packaging colloid 15 covering the semiconductor chip 11, so that a plurality of solder balls 17 are arranged on the bottom side of the packaging substrate 10, and a packaging module 19 is connected to the circuit structure 14 through a plurality of conductive elements 18.
[0004] However, the semiconductor chip 11 of the lower structure of the semiconductor package 1 is encapsulated in the encapsulation colloid 15. If the heat generated during operation cannot be effectively dissipated, the semiconductor package will be overheated or even damaged.
[0005] Therefore, how to overcome the various problems of the above-mentioned prior art has become a topic that needs to be solved urgently. Utility Model Content
[0006] In view of the various deficiencies of the above-mentioned prior art, the present application provides an electronic package, including: a supporting structure, which is defined with a first side and a second side opposite to each other; an electronic component, which is disposed on the first side of the supporting structure and electrically connected to the supporting structure; an intermediate board, which is disposed on the first side of the supporting structure and electrically connected to the supporting structure and covers the electronic component; and a heat conductive block, which is disposed on the electronic component.
[0007] The present application also provides a method for manufacturing an electronic package, comprising: disposing an electronic component on a supporting structure, wherein the supporting structure is defined with a first side and a second side opposite to each other, and the electronic component is disposed on the first side of the supporting structure and electrically connected to the supporting structure; disposing and electrically connecting an intermediate board on the first side of the supporting structure, and allowing the intermediate board to cover the electronic component; and disposing a heat conductive block on the electronic component.
[0008] In the aforementioned electronic package and its manufacturing method, the electronic element is disposed on the supporting structure through a plurality of conductive bumps, and a bottom glue covering the plurality of conductive elements is formed between the electronic element and the supporting structure.
[0009] In the aforementioned electronic package and its manufacturing method, the intermediate board is formed with an opening to at least partially expose the electronic component and to accommodate the heat conducting block.
[0010] In the aforementioned electronic package and its manufacturing method, the intermediate board has a first surface and a second surface opposite to each other, and a plurality of first conductive members and a plurality of second conductive members are formed on the first surface and the second surface respectively, so that the intermediate board can be connected to the supporting structure through the plurality of second conductive members.
[0011] In the aforementioned electronic package and its manufacturing method, the plurality of first conductive members are solder pads or solder balls, and the plurality of second conductive members are solder balls or copper core balls.
[0012] In the aforementioned electronic packaging component and its manufacturing method, the heat conductive block is a dummy silicon wafer.
[0013] The aforementioned electronic package and its manufacturing method further include a packaging body covering the electronic element, the intermediate board and the heat conducting block.
[0014] In the aforementioned electronic package and its manufacturing method, the electronic element is disposed on the supporting structure through a plurality of conductive bumps, and the package body covers the plurality of conductive bumps.
[0015] In the aforementioned electronic package and its manufacturing method, the side edge of the intermediate board is exposed from the side edge of the package body or the side edge of the intermediate board is still covered by the package body.
[0016] In the aforementioned electronic package and its manufacturing method, the heat conductive block is exposed outside the package body or the heat conductive block is covered by the package body.
[0017] In the aforementioned electronic package and its manufacturing method, the intermediate board has a first surface and a second surface opposite to each other, and a plurality of first conductive members and a plurality of second conductive members are formed on the first surface and the second surface respectively, so that the intermediate board can be connected to the supporting structure through the plurality of second conductive members, and the plurality of first conductive members are exposed outside the package body.
[0018] In the aforementioned electronic package and its manufacturing method, the upper end surface of the heat conductive block and the upper end surfaces of the plurality of first conductive elements are flush with the upper surface of the package body.
[0019] In the aforementioned electronic package and its manufacturing method, the upper end surfaces of the plurality of first conductive elements protrude outwardly from the upper surface of the package body.
[0020] The aforementioned electronic package and its manufacturing method further include a plurality of conductive elements disposed on the second side of the supporting structure.
[0021] The aforementioned electronic package and its manufacturing method also include a packaging module arranged on the intermediate board.
[0022] In the aforementioned electronic package and its manufacturing method, a plurality of the heat conducting blocks are arranged on the electronic element.
[0023] In the aforementioned electronic package and its manufacturing method, the heat conductive block protrudes out of the vertical projection range of the electronic component.
[0024] In the aforementioned electronic package and its manufacturing method, a plurality of electronic components are disposed on the supporting structure, and at least one heat conducting block is disposed on each of the electronic components.
[0025] As can be seen from the above, the electronic package of the present application is mainly to set an intermediate board with an opening on the supporting structure at the bottom of the packaging stacking structure, so that the electronic component at the bottom of the packaging stacking structure is exposed through the opening of the intermediate board, and a heat conductive block contacting the electronic component is placed in the opening to increase the thermal capacity of the electronic component and provide a heat dissipation path. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] Figure 1 It is a cross-sectional schematic diagram of a conventional semiconductor package.
[0027] FIG. 2A to FIG. 2I It is a cross-sectional schematic diagram of a first embodiment of a method for manufacturing an electronic package of the present application.
[0028] Figure 3 It is a cross-sectional schematic diagram of a second embodiment of the electronic package of the present application.
[0029] Figure 4 It is a cross-sectional schematic diagram of a third embodiment of the electronic package of the present application.
[0030] Figure 5 It is a cross-sectional schematic diagram of a fourth embodiment of the electronic package of the present application.
[0031] Fig. 6A and Figure 6B It is a cross-sectional schematic diagram of a fifth embodiment of the electronic package of the present application.
[0032] Fig. 7A and Figure 7B It is a cross-sectional schematic diagram of a sixth embodiment of the electronic package of the present application.
[0033] Figure 8 It is a cross-sectional schematic diagram of a seventh embodiment of the electronic package of the present application.
[0034] Fig. 9 It is a cross-sectional schematic diagram of an eighth embodiment of the electronic package of the present application.
[0035] Main component symbols
[0036] 1 Semiconductor Package
[0037] 10 Package substrate
[0038] 11. Semiconductor Chip
[0039] 13 Conductive column
[0040] 14 Line structure
[0041] 15 Encapsulation colloid
[0042] 17 Solder Balls
[0043] 18 Conductive element
[0044] 19 Packaging Module
[0045] 2,3,4,5,6A,6B,7A,7B,8,9 Electronic packaging
[0046] 20 Load-bearing structure
[0047] 20a First side
[0048] 20b Second side
[0049] 21 Electronic components
[0050] 210 Conductive bump
[0051] 211 Active Side
[0052] 212 Non-active surface
[0053] 213 Primer
[0054] 22 Intermediary board
[0055] 22a First surface
[0056] 22b Second surface
[0057] 220 Opening
[0058] 221 first conductive element
[0059] 222 second conductive member
[0060] 23 Heat transfer block
[0061] 24 Package
[0062] 25 Conductive element
[0063] 26 Packaging Module
[0064] 27 Passive modules. DETAILED DESCRIPTION
[0065] The following describes the implementation methods of the present application through specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification.
[0066] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions for the implementation of this application, so they have no substantial technical significance. Any structural modification, change in proportional relationship, or adjustment of size, without affecting the effects and purposes that can be achieved by this application, should still fall within the scope of the technical contents disclosed in this application. At the same time, the terms such as "on", "first", "second", and "one" cited in this specification are only for the convenience of description, and are not used to limit the scope of the implementation of this application. The change or adjustment of their relative relationship should also be regarded as the scope of the implementation of this application without substantial changes in the technical contents.
[0067] FIG. 2A to FIG. 2H It is a cross-sectional schematic diagram of a first embodiment of a method for manufacturing an electronic package of the present application.
[0068] like Figure 2A As shown, a die placement operation is performed to place at least one electronic component 21 on the supporting structure 20. The supporting structure 20 may be a whole chip structure. To simplify the diagram, this diagram only shows a single supporting structure.
[0069] In this embodiment, the supporting structure 20 is, for example, a packaging substrate with a core layer or a coreless packaging substrate, which has an insulating base and a wiring layer combined with the insulating base, and defines a first side 20a and a second side 20b opposite to each other.
[0070] The electronic component 21 may be an active component, a passive component or a combination thereof, wherein the active component is, for example, a semiconductor chip, and the passive component is, for example, a resistor, a capacitor and an inductor. In the present embodiment, the electronic component 21 is a semiconductor chip having an active surface 211 and a non-active surface 212 opposite to each other, and is disposed on the first side 20a of the supporting structure 20 in a flip chip manner through a plurality of conductive bumps 210 such as solder material and electrically connected to the wiring layer, and a primer 213 is formed between the electronic component 21 and the supporting structure 20 to cover the plurality of conductive bumps 210. However, there are many ways for the electronic component to be electrically connected to the supporting structure, and are not limited to the above.
[0071] like Figure 2B As shown, at least one opening 220 is formed in an interposer 22, and a plurality of first conductive members 221 and a plurality of second conductive members 222 are respectively formed on both sides of the interposer 22. The interposer can be a monolithic structure. To simplify the diagram, this diagram only shows a single interposer.
[0072] In this embodiment, the interposer 22 has a first surface 22a and a second surface 22b opposite to each other, and a plurality of first conductive members 221 and a plurality of second conductive members 222 are formed on the first surface 22a and the second surface 22b, respectively, and conductive through-holes (such as conductive silicon through-holes, not shown) connecting the first surface 22a and the second surface 22b are formed, so that the first conductive members 221 and the second conductive members 222 on the first surface 22a and the second surface 22b can be electrically connected to each other through the conductive through-holes. In addition, the materials of the first conductive member 221 and the second conductive member 222 can be the same or different, for example, they are both solder balls, or the first conductive member 221 is a solder pad, and the second conductive member 222 is a solder ball.
[0073] like Figure 2C As shown, the intermediate board 22 is placed and electrically connected to the first side 20 a of the supporting structure 20 through the plurality of second conductive members 222 , and the position of the electronic component 21 corresponds to the position of the opening 220 , so that at least a portion of the non-active surface 212 of the electronic component is exposed outside the opening 220 .
[0074] like Figure 2D As shown, at least one heat conducting block 23 is connected to the non-active surface 212 of the electronic component that is exposed from the opening 220. In this embodiment, the heat conducting block 23 is, for example, a dummy silicon wafer.
[0075] like Figure 2E As shown, a package body 24 is formed on the supporting structure 20 to cover the electronic component 21, the intermediate board 22, the heat conducting block 23, the first conductive member 221 and the second conductive member 222. In one embodiment, the side edge of the intermediate board 22 can be exposed to the side edge of the package body 24.
[0076] like Figure 2F As shown, a thinning operation is performed to remove a portion of the package body 24 (or even a portion of the heat conductive block 23 ) by, for example, grinding, so that the heat conductive block 23 is exposed outside the package body 24 .
[0077] like Figure 2G As shown, a hole-opening operation is performed, such as laser opening, to expose the plurality of first conductive members 221 to the package body 24. In addition, if the thermal block 23 and the first conductive members 221 can be exposed simultaneously when a portion of the package body 24 is removed in the aforementioned thinning operation, the hole-opening operation can be omitted.
[0078] like Figure 2H As shown, a ball implantation operation is performed to dispose a plurality of conductive elements 25 such as solder balls and a passive module 27 on the second side 20 b of the supporting structure 20 , thereby obtaining the electronic package 2 of the present application.
[0079] In addition, if Fig.2I As shown, a packaging module 26 (such as a storage module) may be disposed on the interposer 22 to form a packaging stacking structure.
[0080] Through the above-mentioned manufacturing process, the present application also discloses an electronic package 2, including a supporting structure 20; an electronic component 21 disposed on the supporting structure 20; an intermediate board 22 disposed on the supporting structure 20, and the intermediate board is formed with an opening 220 to at least partially expose the electronic component 21; and a heat conducting block 23 disposed on the electronic component 21 and accommodated in the opening 220. In addition, a packaging module 26 can be disposed on the intermediate board 22.
[0081] Therefore, the electronic package 2 of the present application mainly arranges an intermediate board 22 with an opening 220 on a supporting structure 20 provided with an electronic component 21, so that the electronic component 21 is exposed from the opening 220, and a heat conductive block 23 contacting the electronic component is arranged in the opening to increase the thermal capacity of the electronic component 21 and provide a heat dissipation path.
[0082] See also Figure 3 , which is a cross-sectional schematic diagram of a second embodiment of the electronic package of the present application. The difference between this embodiment and the above-mentioned embodiment lies in the setting range of the package body, and the other structures are substantially the same, so the same parts will not be repeated.
[0083] like Figure 3 As shown, in the electronic package 3 of this embodiment, the package body 24 can cover the heat conductive block 23 , and only the first conductive member 221 is exposed outside the package body 24 .
[0084] See also Figure 4, which is a cross-sectional schematic diagram of the third embodiment of the electronic package of the present application. The difference between this embodiment and the previous embodiment lies in the number of heat-conducting blocks provided, and the other structures are substantially the same, so the same points will not be repeated.
[0085] like Figure 4 As shown, in the electronic package 4 of this embodiment, a plurality of heat-conducting blocks 23 may be disposed on the electronic component 21 to increase the heat capacity of the electronic component 21 and provide a plurality of heat dissipation paths.
[0086] See also Figure 5 , which is a cross-sectional schematic diagram of the fourth embodiment of the electronic package of the present application. The difference between this embodiment and the previous embodiment lies in the location of the heat conduction block, and the other structures are substantially the same, so the same parts will not be described again.
[0087] like Figure 5 As shown, in the electronic package 5 of this embodiment, the heat conductive block 23 disposed on the electronic component 21 can protrude outward from the vertical projection range of the electronic component, so as to change the dissipation position of the heat conductive block 23 in accordance with the heat dissipation requirement of the electronic component 21 .
[0088] See also Fig. 6A and Figure 6B , which is a cross-sectional schematic diagram of the fifth embodiment of the electronic package of the present application. The difference between this embodiment and the previous embodiments lies in the type of the second conductive member and the layout range of the intermediate board. The other structures are substantially the same, so the same parts will not be repeated.
[0089] like Fig. 6A and Figure 6B As shown, in the electronic package 6A and the electronic package 6B of this embodiment, the plurality of second conductive members 222 disposed on the second surface 22 b of the intermediate board 22 may be copper core balls to effectively maintain the distance between the intermediate board 22 and the supporting structure 20 .
[0090] In addition, the side edge of the intermediate board 22 of the electronic package 6A may be exposed from the side edge of the package body 24 , while the side edge of the intermediate board 22 of the electronic package 6B may be enclosed in the package body 24 and not exposed.
[0091] See also Fig. 7A and Figure 7B , which is a cross-sectional schematic diagram of the sixth embodiment of the electronic package of the present application. The difference between this embodiment and the previous embodiment lies in the type of the first conductive member, and the other structures are substantially the same, so the same parts will not be repeated.
[0092] like Fig. 7AAs shown, during the aforementioned thinning operation, part of the packaging body 24, part of the heat conductive block 23 and part of the first conductive member 221 can be removed simultaneously, so that the heat conductive block 23 and multiple first conductive members 221 of the electronic package 7A are exposed outside the packaging body 24, and at the same time, the upper end surface of the heat conductive block 23 and the upper end surfaces of the multiple first conductive members 221 are made flush with the upper surface of the packaging body 24.
[0093] Or as Figure 7B The electronic package 7B shown in the figure, after the aforementioned thinning operation, exposes the heat conductive block 23 outside the package body 24, and at the same time, through the aforementioned opening operation, exposes the plurality of first conductive members 221 outside the package body 24, and makes the upper end surfaces of the plurality of first conductive members 221 protrude outside the upper surface of the package body 24.
[0094] See also Figure 8 , which is a cross-sectional schematic diagram of the seventh embodiment of the electronic package of the present application. This embodiment is substantially the same as the previous embodiment, mainly in the electronic package 8 of this embodiment, no primer is provided between the electronic component 21 and the supporting structure 20, but the package body 24 is filled between the electronic component 21 and the supporting structure 20 and covers the conductive bump 210.
[0095] See also Fig. 9 , which is a cross-sectional schematic diagram of the eighth embodiment of the electronic package of the present application. This embodiment is substantially the same as the previous embodiment, mainly in the electronic package 9 of this embodiment, a plurality of electronic components 21 are disposed on the supporting structure 20, and at least one heat conducting block 23 is disposed on each of the electronic components 21, so as to provide each of the electronic components 21 with a good heat dissipation path.
[0096] In summary, the electronic package of the present application is mainly to set an intermediate board with an opening on the supporting structure at the bottom of the packaging stacking structure, so that the electronic component at the bottom of the packaging stacking structure is exposed through the opening of the intermediate board, and a heat conductive block contacting the electronic component is placed in the opening to increase the thermal capacity of the electronic component and provide a heat dissipation path.
[0097] The above embodiments are only used to illustrate the principles and effects of the present application, and are not used to limit the present application. Anyone skilled in the art may modify the above embodiments without violating the spirit and scope of the present application. Therefore, the scope of protection of the present application should be as set forth in the claims.
Claims
1. An electronic package, comprising: A load-bearing structure defined by a first side and a second side opposite to each other; an electronic component disposed on the first side of the supporting structure and electrically connected to the supporting structure; An intermediate board, which is disposed on the first side of the supporting structure and electrically connected to the supporting structure and covers the electronic component; as well as The heat conducting block is arranged on the electronic component.
2. The electronic package of claim 1, wherein: The electronic component is arranged on the supporting structure through a plurality of conductive bumps, and a bottom glue covering the plurality of conductive bumps is formed between the electronic component and the supporting structure.
3. The electronic package of claim 1, wherein: The intermediate board is formed with an opening to at least partially expose the electronic component and to accommodate the heat conducting block.
4. The electronic package of claim 1, wherein: The intermediate board has a first surface and a second surface opposite to each other, and a plurality of first conductive members and a plurality of second conductive members are respectively formed on the first surface and the second surface, so that the intermediate board can be connected to the supporting structure through the plurality of second conductive members.
5. The electronic package of claim 4, wherein: The plurality of first conductive members are solder pads or solder balls, and the plurality of second conductive members are solder balls or copper core balls.
6. The electronic package of claim 1, wherein: The heat conducting block is a waste silicon wafer.
7. The electronic package of claim 1, wherein: The electronic package also includes a packaging body covering the electronic element, the intermediate board and the heat conducting block.
8. The electronic package of claim 7, wherein: The electronic element is arranged on the supporting structure through a plurality of conductive bumps, and the packaging body covers the plurality of conductive bumps.
9. The electronic package of claim 7, wherein: The side edge of the intermediate board is exposed from the side edge of the package body or the side edge of the intermediate board is still covered by the package body.
10. The electronic package of claim 7, wherein: The heat-conducting block is exposed outside the packaging body or is covered by the packaging body.
11. The electronic package of claim 7, wherein: The intermediate board has a first surface and a second surface opposite to each other, and a plurality of first conductive members and a plurality of second conductive members are respectively formed on the first surface and the second surface, so that the intermediate board is connected to the supporting structure through the plurality of second conductive members, and the plurality of first conductive members are exposed outside the package body.
12. The electronic package of claim 11, wherein: The upper end surface of the heat conducting block and the upper end surfaces of the plurality of first conductive members are flush with the upper surface of the packaging body.
13. The electronic package of claim 11, wherein: The upper end surfaces of the plurality of first conductive elements protrude out of the upper surface of the packaging body.
14. The electronic package of claim 1, wherein: The electronic package also includes a plurality of conductive elements disposed on the second side of the supporting structure.
15. The electronic package of claim 1, wherein: The electronic package also includes a packaging module arranged on the intermediate board.
16. The electronic package of claim 1, wherein: A plurality of the heat-conducting blocks are arranged on the electronic component.
17. The electronic package of claim 1, wherein: The heat conducting block protrudes out of the vertical projection range of the electronic component.
18. The electronic package of claim 1, wherein: A plurality of electronic components are arranged on the supporting structure, and at least one heat conducting block is arranged on each of the electronic components.