Multi-channel data recorder system

Abstract

The utility model provides a multichannel data recorder system, which comprises a microcontroller, a transceiver, a memory, a monitoring system voltage device and a power supply module, and is characterized in that the power supply module is respectively connected with the monitoring system voltage device and the transceiver and supplies power to the monitoring system voltage device and the transceiver; the microcontroller is respectively connected with the transceiver, the memory and the monitoring system voltage device, and the transceiver comprises one or any combination of an RS422 transceiver, an RS232 transceiver, an RS485 transceiver, a CAN transceiver and a CANFD transceiver. The power-down protection device has access of various data interfaces, has a power-down protection function, and also has the advantages of light weight, small size, safety and reliability in long-term operation and the like.

Description

Technical Field

[0001] The utility model relates to the technical field of multi-channel data recorder, in particular to a multi-channel data recorder system. Background Art

[0002] Data recorders, commonly known as black boxes, are safety devices that record system operation information and control data in real time. When data analysis or accident cause investigation is required, the data is retrieved for analysis to provide important data for improving the reliability of subsequent equipment operation. Therefore, they are widely used in industries that require high reliability, such as special automobile data recording, marine vessel data recording, and aircraft, which are basically equipped with data recorders.

[0003] Currently, many data recording devices generally use magnetic tapes or hard disks as data storage media and are equipped with backup batteries to ensure continuous data recording. However, this design makes the device bulky and heavy, which is not conducive to use in application scenarios with limited space and weight. In addition, the backup battery is kept fully charged for a long time, which may accelerate battery aging, thereby affecting its reliability and service life. These factors together limit the use of these data recording devices in applications with strict requirements on size and weight, and extremely high requirements for data recording reliability, such as in a large number of modern smart devices such as drones and unmanned vehicles. Utility Model Content

[0004] The utility model aims to at least solve the technical problems existing in the prior art, and particularly innovatively proposes a multi-channel data recorder system.

[0005] In order to achieve the above-mentioned purpose of the utility model, the utility model provides a multi-channel data recorder system, including: a microcontroller, a transceiver, a memory, a monitoring system voltage device, and a power supply module.

[0006] The power supply module is respectively connected to the monitoring system voltage device and the transceiver to supply power to the monitoring system voltage device and the transceiver; the microcontroller is respectively connected to the transceiver, the memory, and the monitoring system voltage device.

[0007] The transceiver includes one or any combination of an RS422 transceiver, an RS232 transceiver, an RS485 transceiver, a CAN transceiver, and a CANFD transceiver.

[0008] Furthermore, the power supply module includes a power multiplexer and a linear regulator, the power output end of the power multiplexer is connected to the power input end of the linear regulator, and the voltage output by the power output end of the linear regulator powers the monitoring system voltage regulator and transceiver; the power multiplexer is powered by a power adapter or a USB interface.

[0009] Power multiplexers provide a flexible, reliable and user-friendly power supply solution for data loggers, enabling them to adapt to changing usage environments and power supply conditions.

[0010] Further, the circuit of the power multiplexer includes:

[0011] The state indication terminal STA of the power multiplexer U20 is connected to the first end of the resistor R74, the second end of the resistor R74 is connected to the output terminal OUT of the power multiplexer U20, the first end of the capacitor C74, the positive electrode of the polar capacitor C48, and the first end of the resistor R76, and the output terminal OUT of the power multiplexer U20 outputs the power supply VSYS;

[0012] The second end of the capacitor C74 and the negative electrode of the polar capacitor C48 are connected to the power ground respectively;

[0013] The second end of the resistor R76 is connected to the positive electrode of the LED indicator D17, and the negative electrode of the LED indicator D17 is connected to the power ground;

[0014] The data input terminal D1 of the power multiplexer U20 is connected to the power ground.

[0015] An input current limiting terminal ILIM of the power multiplexer U20 is connected to a first terminal of a resistor R73, and a second terminal of the resistor R73 is connected to a power ground;

[0016] The input terminal IN1 of the power multiplexer U20 is connected to the first end of the capacitor C73 and the I / O signal output terminal VBUS of the USB connector U8;

[0017] An input terminal IN2 of the power multiplexer U20 and a first terminal of the capacitor C72 are connected to the power supply VDD5V2, and a second terminal of the capacitor C72 is connected to the power ground.

[0018] Furthermore, the polar capacitor C48 is a supercapacitor.

[0019] Furthermore, the circuit of the linear regulator includes:

[0020] The power input terminal VIN of the linear regulator U55, the positive electrode of the polar capacitor C85, and the first end of the capacitor C62 are connected to the power supply VSYS, and the negative electrode of the polar capacitor C85 and the second end of the capacitor C62 are connected to the power ground;

[0021] The adjustable / ground terminal ADJ / GND of the linear regulator U55 is connected to the power ground;

[0022] The power output terminal VOUT of the linear regulator U55 is connected to the positive electrode of the polar capacitor C78, ​​the first end of the capacitor C64, the first end of the capacitor C79, and the first end of the resistor R75; the power output terminal VOUT of the linear regulator U55 outputs the power supply VCC3V3;

[0023] The negative electrode of the polar capacitor C78, ​​the second end of the capacitor C64, and the second end of the capacitor C79 are connected to the power ground;

[0024] The second end of the resistor R75 is connected to the positive electrode of the LED indicator light D16, and the negative electrode of the LED indicator light D16 is connected to the power ground.

[0025] Furthermore, the power adapter is a DC converter, and the circuit of the DC converter includes:

[0026] The power input terminal VIN1, the power input terminal VIN2, the operation state control terminal RUN, the cathode of the diode D20, the first end of the capacitor C82, the first end of the capacitor C83, the first end of the capacitor C81, and the first end of the resistor R88 of the DC converter U56 are connected to a 28V power supply;

[0027] The anode of the diode D20, the second end of the capacitor C82, and the second end of the capacitor C83 are connected to the power ground, and the second end of the capacitor C81 is connected to the power ground.

[0028] The second end of the resistor R88 is connected to the power output terminal VOUT1 and the power output terminal VOUT2 of the DC converter U56, the first end of the capacitor C80, and the first end of the capacitor C84. The power output terminal VOUT1 and the power output terminal VOUT2 of the DC converter U56 output the power supply VDD5V2.

[0029] The second end of the capacitor C80 and the second end of the capacitor C84 are connected to the power ground;

[0030] The switching frequency terminal RT of the DC converter U56 is connected to the first end of the resistor R81, and the second end of the resistor R81 is connected to the power ground;

[0031] The feedback terminal FB of the DC converter U56 is connected to the first end of the resistor R82, and the second end of the resistor R82 is connected to the power ground;

[0032] The operation mode terminal SYNC of the DC converter U56 is connected to the first end of the resistor R83, and the SS of the DC converter U56 is connected to the first end of the capacitor C87;

[0033] A second end of the resistor R83 and a second end of the capacitor C87 are connected to a power ground.

[0034] Furthermore, the microcontroller comprises:

[0035] The battery voltage input terminal VBAT of the microcontroller U2, the power supply terminal VDD of the microcontroller U2, the first end of the capacitor C32, the first end of the capacitor C33, the first end of the capacitor C34, the first end of the capacitor C35, and the first end of the capacitor C36 are connected to the power supply VCC3V3;

[0036] The second end of the capacitor C32, the second end of the capacitor C33, the second end of the capacitor C34, the second end of the capacitor C35, and the second end of the capacitor C36 are connected to the power ground;

[0037] The reference voltage terminal VREF+ of the microcontroller U2 is connected to the first end of the inductor L12, and the second end of the inductor L12 is connected to the power supply VCC3V3.

[0038] The positive voltage terminal VDDA of the analog power supply of the microcontroller U2 is connected to the first end of the capacitor C26, the first end of the capacitor C25, and the first end of the inductor L3. The second end of the inductor L3 is connected to the power supply VCC3V3.

[0039] The ground terminal VSSA of the analog power supply of the microcontroller U2, the second end of the capacitor C26, and the second end of the capacitor C25 are connected to the power ground;

[0040] The second power supply terminal VCAP2 of the microcontroller U2 is connected to the first end of the capacitor C29, the first power supply terminal VCAP1 of the microcontroller U2 is connected to the first end of the capacitor C30, the second end of the capacitor C29 and the second end of the capacitor C30 are connected to the power ground; the ground terminal VSS of the microcontroller U2 is connected to the power ground;

[0041] The clock signal input terminal PH0-OSC_IN of the crystal oscillator of the microcontroller U2 is connected to the first end of the crystal oscillator Y1 and the first end of the capacitor C14, the second end of the capacitor C14 is connected to the power ground, the second end and the fourth end of the crystal oscillator Y1 are connected to the power ground, the third end of the crystal oscillator Y1 is connected to the first end of the capacitor C15, and the second end of the capacitor C15 is connected to the power ground;

[0042] The boot mode configuration terminal BOOT0 of the microcontroller U2 is connected to the first end of the resistor R24, and the second end of the resistor R24 ​​is connected to the power ground.

[0043] The reset terminal NRST of the microcontroller U2 is connected to the reset control terminal of the system voltage controller U4; when the voltage of the reset terminal NRST of the microcontroller U2 is less than or equal to the preset voltage threshold, the reset control terminal of the system voltage controller U4 outputs a low level reset.

[0044] Furthermore, the memory is an eMMC memory, including:

[0045] The data terminal DAT0 of the eMMC memory U1B is connected to the first terminal of the resistor R3 and the data transmission terminal of the microcontroller U2.

[0046] The data terminal DAT0 of the eMMC memory U1B is connected to the first terminal of the resistor R3 and the data transmission terminal of the microcontroller U2.

[0047] The data terminal DAT1 of the eMMC memory U1B is connected to the first terminal of the resistor R4 and the data transmission terminal of the microcontroller U2.

[0048] The data terminal DAT2 of the eMMC memory U1B is connected to the first end of the resistor R5 and the data transmission terminal of the microcontroller U2.

[0049] The data terminal DAT3 of the eMMC memory U1B is connected to the first terminal of the resistor R6 and the data transmission terminal of the microcontroller U2.

[0050] The data terminal DAT4 of the eMMC memory U1B is connected to the first end of the resistor R10 and the data transmission terminal of the microcontroller U2.

[0051] The data terminal DAT5 of the eMMC memory U1B is connected to the first end of the resistor R2 and the data transmission terminal of the microcontroller U2.

[0052] The data terminal DAT6 of the eMMC memory U1B is connected to the first terminal of the resistor R9 and the data transmission terminal of the microcontroller U2.

[0053] The data terminal DAT7 of the eMMC memory U1B is connected to the first end of the resistor R1 and the data transmission terminal of the microcontroller U2.

[0054] The second end of the resistor R1, the second end of the resistor R2, the second end of the resistor R3, the second end of the resistor R4, the second end of the resistor R5, the second end of the resistor R6, the second end of the resistor R7, the second end of the resistor R8, the second end of the resistor R9, and the second end of the resistor R10 are connected to the power supply VCCQ;

[0055] The data strobe clock terminal RCLK / DS of the eMMC memory U1B is connected to the first end of the resistor R14.

[0056] The clock signal terminal CLK of the eMMC memory U1B is connected to the first end of the resistor R12, and the second end of the resistor R12 is connected to the clock signal terminal of the microcontroller U2.

[0057] The control command terminal CMD of the eMMC memory U1B is connected to the first end of the resistor R7, the reset signal terminal RST_N of the eMMC memory U1B is connected to the first end of the resistor R8 and the first end of the capacitor C75, and the second end of the capacitor C75 and the second end of the resistor R14 are connected to the power ground;

[0058] The power supply terminal VCC / VDDF of the eMMC memory U1B is connected to the first end of the capacitor C1, the first end of the capacitor C2, the first end of the capacitor C3, and the first end of the inductor L1. The second end of the capacitor C1, the second end of the capacitor C2, and the second end of the capacitor C3 are connected to the power ground. The second end of the inductor L1 is connected to the power supply VDD3V3.

[0059] The power supply terminal VCCQ / VDD of the eMMC memory U1B is connected to the first end of capacitor C5, the first end of capacitor C6, the first end of capacitor C7, the first end of capacitor C8, the first end of capacitor C9, the first end of capacitor C10, and the first end of inductor L2; the second end of capacitor C5, the second end of capacitor C6, the second end of capacitor C7, the second end of capacitor C8, the second end of capacitor C9, and the second end of capacitor C10 are connected to the power ground; and the second end of inductor L2 is connected to the power supply VDD3V3.

[0060] Further, the monitoring system voltage device includes:

[0061] The manual reset terminal MR of the monitoring system voltage regulator U4 is connected to the first end of the resistor R80, and the monitoring voltage terminal SENSE of the monitoring system voltage regulator U4, the power supply terminal VDD of the monitoring system voltage regulator U4, the first end of the capacitor C76, the first end of the capacitor C77, and the second end of the resistor R80 are connected to the power supply VCC3V3. When it is detected that the voltage of the power supply VCC3V3 drops below the threshold voltage, a reset will be triggered.

[0062] The reset delay time terminal CT of the monitoring system voltage regulator U4 is connected to the first terminal of the capacitor C21.

[0063] The second end of the capacitor C76, the second end of the capacitor C77, and the second end of the capacitor C21 are connected to the power ground;

[0064] The reset terminal RST of the monitoring system voltage device U4 is connected to the first end of the resistor R79, the first end of the capacitor C18 and the reset signal terminal of the microcontroller U2, and the detected power supply voltage signal is transmitted to the controller. The second end of the resistor R79 is connected to the power supply VCC3V3, and the second end of the capacitor C18 and the ground terminal GND of the monitoring system voltage device U4 are connected to the power ground.

[0065] Furthermore, the multi-channel data recorder system transmits data with a host computer via a USB OTG interface, and the USB OTG interface includes:

[0066] The I / O signal input terminal VBUS of the USB transceiver U7 is connected to the first end of the resistor R33, the second end of the resistor R33 is connected to the first end of the capacitor C40 and the USB noise suppression module, and the second end of the capacitor C40 is connected to the power ground;

[0067] The enable terminal REG_EN of the USB transceiver U7 and the power terminal VDD3V3 are connected to the first end of the capacitor C38, the first end of the capacitor C39, and the first end of the inductor L6, and the second end of the inductor L6 is connected to the power supply VDD3V3;

[0068] The external clock output terminal XO of the USB transceiver U7 is connected to the first end of the resistor R35, the second output terminal X2 of the crystal oscillator X1, and the first end of the capacitor C43, and the ground terminal GND2 of the USB transceiver U7 and the second end of the capacitor C43 are connected to the power ground;

[0069] The external clock input terminal XI of the USB transceiver U7 is connected to the first end of the capacitor C42 and the first output terminal X1 of the crystal oscillator X1, and the ground terminal GND1 of the USB transceiver U7 and the second end of the capacitor C42 are connected to the power ground;

[0070] The power supply terminal VDD1_8_2 and the power supply terminal VDD1_8_1 of the USB transceiver U7 are connected to the first end of the capacitor C45, and the second end of the capacitor C45 is connected to the power ground;

[0071] The power supply terminal VDDA1_8 of the USB transceiver U7 is connected to the first end of the resistor R37, and the second end of the resistor R37 is connected to the power ground.

[0072] Furthermore, the USB noise reduction module includes:

[0073] The I / O signal output terminal VBUS of the USB connector U8 is connected to the fifth terminal of the transient voltage suppressor D19 to output the VBUS signal;

[0074] The data negative terminal D- of the USB connector U8 is connected to the negative signal output terminal of the common mode filter T1 and the first terminal of the transient voltage suppressor D19.

[0075] The data positive terminal D+ of the USB connector U8 is connected to the positive signal output terminal of the common mode filter T1 and the sixth terminal of the transient voltage suppressor D19;

[0076] The ground terminal of transient voltage suppressor D19 is connected to the power ground;

[0077] The negative signal input terminal of the common mode filter T1 is connected to the USB differential negative signal terminal DMXL of the USB transceiver U7;

[0078] The positive signal input terminal of the common mode filter T1 is connected to the USB differential positive signal terminal DP of the USB transceiver U7.

[0079] Further, the RS422 transceiver comprises:

[0080] The power supply terminal VCC of the RS422 transceiver U12 is connected to the first end of the resistor R54, the first end of the resistor R55, the first end of the capacitor C67, the first end of the capacitor C68, the first end of the resistor R50, and the first end of the inductor L10.

[0081] The second end of capacitor C67 and the second end of capacitor C68 are connected to the power ground, and the second end of inductor L10 is connected to the power supply VCC3V3.

[0082] The receiver output terminal RO of the RS422 transceiver U12 is connected to the second end of the resistor R54 and the RS422 signal input terminal of the microcontroller U2.

[0083] The driver input terminal DI of the RS422 transceiver U12 is connected to the second end of the resistor R55 and the enable signal terminal of the microcontroller U2.

[0084] The ground terminal GND of RS422 transceiver U12 is connected to the power ground.

[0085] The bidirectional data transmission terminal A of the RS422 transceiver U12 is connected to the second end of the resistor R50, the first end of the resistor R51, the first end of the resistor F3, and the second data terminal I / O2 of the transient voltage suppressor U13, and the second end of the resistor F3 is connected to the first data line of the RS422 bus;

[0086] The bidirectional data transmission terminal B of the RS422 transceiver U12 is connected to the second end of the resistor R51, the first end of the resistor R56, the first end of the resistor F4, and the first data terminal I / O1 of the transient voltage suppressor U13, and the second end of the resistor F4 is connected to the second data line of the RS422 bus;

[0087] The ground terminal GND of the transient voltage suppressor U13 is connected to the power ground; the second end of the resistor R56 is connected to the power ground;

[0088] The inverting driver output terminal Z of the RS422 transceiver U12 is connected to the first end of the resistor F5 and the second data terminal I / O2 of the transient voltage suppressor U14, and the second end of the resistor F5 is connected to the third data line of the RS422 bus;

[0089] The non-inverting driver output terminal Y of the RS422 transceiver U12 is connected to the first data terminal I / O1 of the transient voltage suppressor U14 and the first end of the resistor F6, and the second end of the resistor F5 is connected to the fourth data line of the RS422 bus;

[0090] A ground terminal GND of the transient voltage suppressor U14 is connected to the power ground.

[0091] Further, the RS232 transceiver comprises:

[0092] A positive terminal C1+ of a first charge pump capacitor of U166 of the RS232 transceiver is connected to a first terminal of a capacitor C91, and a negative terminal C1- of the first charge pump capacitor is connected to a second terminal of the capacitor C91;

[0093] The positive terminal C2+ of the second charge pump capacitor of U166 of the RS232 transceiver is connected to the first terminal of the capacitor C88, and the negative terminal C1- of the second charge pump capacitor is connected to the second terminal of the capacitor C88;

[0094] A first transmitter signal input terminal T1IN of the RS232 transceiver U166 is connected to a first end of a resistor R998, and a second end of the resistor R998 is connected to an RS232 signal output terminal of the microcontroller U2;

[0095] A first transmitter signal output terminal R1OUT of U166 of the RS232 transceiver is connected to a first end of a resistor R999, and a second end of the resistor R999 is connected to an RS232 signal input terminal of the microcontroller U2;

[0096] The power supply terminal VCC of the RS232 transceiver and the first end of the capacitor C90 are connected to the power supply VCC3V3;

[0097] The voltage doubler charge pump voltage port V+ of the RS232 transceiver is connected to the first end of the capacitor C92.

[0098] The inverting charge pump voltage output terminal V- of the RS232 transceiver is connected to the first terminal of the capacitor C89.

[0099] A second end of the capacitor C90, a second end of the capacitor C92, and a second end of the capacitor C89 are connected to a power ground.

[0100] Further, the RS485 transceiver comprises:

[0101] The receiver output terminal RO of the RS485 transceiver U15 is connected to the first end of the resistor R62 and the RS485 signal input terminal of the microcontroller U2.

[0102] The driver enable terminal DE and the receiver enable terminal / RE of the RS485 transceiver U15 are connected to the first terminal of the resistor R64 and the RS485 enable signal terminal of the microcontroller U2. The second terminal of the resistor R64 is connected to the power ground.

[0103] The driver input terminal DI of the RS485 transceiver U15 is connected to the first end of the resistor R63, the second end of the resistor R62 and the second end of the resistor R63 are connected to the power supply terminal VCC of the RS485 transceiver U15, the first end of the resistor R57, the first end of the inductor L11, the first end of the capacitor C69, and the first end of the capacitor C70, the second end of the inductor L11 is connected to the power supply VCC3V3, the second end of the capacitor C69 and the second end of the capacitor C70 are connected to the power ground,

[0104] The bidirectional data transmission terminal A of the RS485 transceiver U15 is connected to the second end of the resistor R57, the first end of the resistor R60, the first end of the resistor F7, and the second data terminal I / O2 of the transient voltage suppressor U16, and the second end of the resistor F7 is connected to a data line of the RS485 bus;

[0105] The bidirectional data transmission terminal B of the RS485 transceiver U15 is connected to the second end of the resistor R60 and the first end of the resistor R65, the first data terminal I / O1 of the transient voltage suppressor U16 and the first end of the resistor F8 are connected, and the second end of the resistor F8 is connected to another data line of the RS485 bus;

[0106] The second end of the resistor R65 is connected to the power ground, and the ground terminal GND of the transient voltage suppressor U16 is connected to the power ground.

[0107] In summary, due to the adoption of the above technical solution, the utility model has multiple data interface accesses, a power-off protection function, and also has the advantages of light weight, small size, and long-term safe and reliable operation.

[0108] Additional aspects and advantages of the present invention will be given in part in the following description, and in part will become apparent from the following description, or will be learned through the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0109] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0110] Figure 1 It is a schematic diagram of the utility model system.

[0111] Figure 2 The utility model is a circuit connection diagram of the RS485 transceiver.

[0112] Figure 3 The utility model is a circuit connection diagram of the RS422 transceiver.

[0113] Figure 4 It is a circuit connection diagram of the RS232 transceiver of the utility model.

[0114] Figure 5 It is a circuit connection schematic diagram of the microcontroller of the utility model.

[0115] Figure 6 It is a circuit connection schematic diagram of the eMMC memory of the utility model.

[0116] Figure 7 The utility model is a circuit connection diagram of a voltage regulator of a monitoring system.

[0117] Figure 8 It is a circuit connection diagram of the USB interface of the utility model.

[0118] Fig. 9 The utility model is a schematic diagram of the noise-overcoming circuit connection of the USB transceiver.

[0119] Fig.10 It is a circuit connection diagram of the DC converter of the power module of the utility model.

[0120] Fig.11 It is a schematic diagram of the switching circuit of the power module of the utility model.

[0121] Fig.12 The utility model is a schematic diagram of the linear voltage regulator circuit connection of the power module.

[0122] Fig.13 It is a schematic diagram of the startup process of the multi-channel recorder system of the utility model.

[0123] Fig.14 This is a schematic diagram of the data recording process of the utility model.

[0124] Fig.15 This is a schematic diagram of the power-off protection process of the utility model. DETAILED DESCRIPTION

[0125] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0126] The utility model relates to a multi-channel data recorder, comprising a microcontroller, an RS422 transceiver, an RS232 transceiver, an RS485 transceiver, a CAN transceiver, a CANFD transceiver, an eMMC memory, a USB OTG interface, a power control, an LED indicator light, and a DC power supply. The multi-channel data recorder can collect real-time operation data and fault data of vehicles, ships, aircraft, navigation equipment, industrial equipment, etc., and can store data on multiple channels in real time in the eMMC memory by carrying an eMMC memory. The multi-channel data recorder has a long working time and is easy to install and debug. The multi-channel data recorder is connected to a host computer through a USB OTG interface to manage the stored data files.

[0127] 1. The multi-channel data recorder uses STM32H743 as the controller, uses the SDIO interface to mount the eMMC, and implements it as a USB mass storage device through the high-speed USB OTG interface. The computer can directly export and manage the recorded files through the USB interface.

[0128] 2. Implement the STM32H743 driver for eMMC, and transplant the FAT32 file system to the eMMC. The record file is initialized through the self-established file system. During the recording process, the data is directly written into the record file data area by the eMMC write driver.

[0129] 1) Use STM32H743 to drive eMMC and complete eMMC initialization, read drive, write drive and other operations;

[0130] 2) A FAT32 file system is established in the eMMC, and data is directly written into the file data area by the eMMC write driver.

[0131] 3. In the event of an emergency power failure, the battery design can provide 2 seconds of power supply. When the system detects a drop in power supply voltage, the software shuts down the read and write operations of the data files, thus avoiding damage to the recorded files caused by an emergency power failure.

[0132] 4. Indicator lights are used to display the system operating status, including data recording prompts and operating status. Installing indicator lights on the controller chip can provide direct feedback on the data recording status, such as recording started, in progress or completed.

[0133] The utility model proposes a multi-channel data recorder system such as Figure 1 As shown, it includes: microcontroller, transceiver, memory, monitoring system voltage, LED indicator, USB OTG interface, power supply module, clock chip,

[0134] The clock chip is used to provide accurate time information, which the microcontroller can use to timestamp data files.

[0135] The LED indicator lights include a power indicator light and a status indicator light; the power indicator light is used to indicate the power status, and the status indicator light is used to indicate the operating status of the current circuit.

[0136] The microcontroller is respectively connected to the transceiver, the memory, the monitoring system voltage, the USB OTG interface, and the clock chip, and the power supply module is respectively connected to the LED indicator light, the monitoring system voltage, and the transceiver of the microcontroller to supply power thereto.

[0137] The transceiver includes one or any combination of RS422 transceiver, RS232 transceiver, RS485 transceiver, CAN transceiver, and CANFD transceiver;

[0138] The power supply module includes a power supply control and a DC power supply;

[0139] The memory is an eMMC memory.

[0140] The multi-channel data recorder system can collect real-time operation data and fault data of vehicles, ships, aircraft, navigation equipment, industrial equipment, etc. By installing eMMC memory, the data on multiple channels can be stored in real time in the eMMC memory. The eMMC memory has the advantages of long working time and easy installation and debugging. Then, the USB OTG interface is connected to the host computer to manage the stored data files.

[0141] The circuit connection diagram of RS485 transceiver is as follows Figure 2 As shown, the receiver output terminal RO of the RS485 transceiver U15 is connected to the first end of the resistor R62 and the RS485 signal input terminal of the microcontroller U2.

[0142] The driver enable terminal DE and the receiver enable terminal / RE of the RS485 transceiver U15 are connected to the first terminal of the resistor R64 and the RS485 enable signal terminal of the microcontroller U2. The second terminal of the resistor R64 is connected to the power ground.

[0143] The driver input terminal DI of the RS485 transceiver U15 is connected to the first end of the resistor R63, the second end of the resistor R62 and the second end of the resistor R63 are connected to the power supply terminal VCC of the RS485 transceiver U15, the first end of the resistor R57, the first end of the inductor L11, the first end of the capacitor C69, and the first end of the capacitor C70, the second end of the inductor L11 is connected to the power supply VCC3V3, the second end of the capacitor C69 and the second end of the capacitor C70 are connected to the power ground,

[0144] The bidirectional data transmission terminal A of the RS485 transceiver U15 is connected to the second end of the resistor R57, the first end of the resistor R60, the first end of the resistor F7, and the second data terminal I / O2 of the transient voltage suppressor U16, and the second end of the resistor F7 is connected to a data line of the RS485 bus;

[0145] The bidirectional data transmission terminal B of the RS485 transceiver U15 is connected to the second end of the resistor R60 and the first end of the resistor R65, the first data terminal I / O1 of the transient voltage suppressor U16 and the first end of the resistor F8 are connected, and the second end of the resistor F8 is connected to another data line of the RS485 bus;

[0146] The second end of the resistor R65 is connected to the power ground, and the ground terminal GND of the transient voltage suppressor U16 is connected to the power ground.

[0147] The model of RS485 transceiver U15 is preferably MAX3485EESA+T. The model of transient voltage suppressor U16 is preferably PSM712, which is suitable for electrostatic protection of RS485 port and can provide high-reliability protection in harsh industrial environments.

[0148] The circuit connection diagram of RS422 transceiver is as follows Figure 3 As shown, the power supply terminal VCC of the RS422 transceiver U12 is connected to the first end of the resistor R54, the first end of the resistor R55, the first end of the capacitor C67, the first end of the capacitor C68, the first end of the resistor R50, and the first end of the inductor L10.

[0149] The second end of capacitor C67 and the second end of capacitor C68 are connected to the power ground, and the second end of inductor L10 is connected to the power supply VCC3V3.

[0150] The receiver output terminal RO of the RS422 transceiver U12 is connected to the second end of the resistor R54 and the RS422 signal input terminal of the microcontroller U2.

[0151] The driver input terminal DI of the RS422 transceiver U12 is connected to the second end of the resistor R55 and the enable signal terminal of the microcontroller U2.

[0152] The ground terminal GND of RS422 transceiver U12 is connected to the power ground.

[0153] The bidirectional data transmission terminal A of the RS422 transceiver U12 is connected to the second end of the resistor R50, the first end of the resistor R51, the first end of the resistor F3, and the second data terminal I / O2 of the transient voltage suppressor U13, and the second end of the resistor F3 is connected to the first data line of the RS422 bus;

[0154] The bidirectional data transmission terminal B of the RS422 transceiver U12 is connected to the second end of the resistor R51, the first end of the resistor R56, the first end of the resistor F4, and the first data terminal I / O1 of the transient voltage suppressor U13, and the second end of the resistor F4 is connected to the second data line of the RS422 bus;

[0155] The ground terminal GND of the transient voltage suppressor U13 is connected to the power ground; the second terminal of the resistor R56 is connected to the power ground.

[0156] The inverting driver output terminal Z of the RS422 transceiver U12 is connected to the first end of the resistor F5 and the second data terminal I / O2 of the transient voltage suppressor U14, and the second end of the resistor F5 is connected to the third data line of the RS422 bus;

[0157] The non-inverting driver output terminal Y of the RS422 transceiver U12 is connected to the first data terminal I / O1 of the transient voltage suppressor U14 and the first end of the resistor F6, and the second end of the resistor F5 is connected to the fourth data line of the RS422 bus;

[0158] A ground terminal GND of the transient voltage suppressor U14 is connected to the power ground.

[0159] The model of RS422 transceiver is MAX3490EESA+T.

[0160] The circuit connection diagram of RS232 transceiver is as follows Figure 4 shown.

[0161] A positive terminal C1+ of a first charge pump capacitor of U166 of the RS232 transceiver is connected to a first terminal of a capacitor C91, and a negative terminal C1- of the first charge pump capacitor is connected to a second terminal of the capacitor C91;

[0162] The positive terminal C2+ of the second charge pump capacitor of U166 of the RS232 transceiver is connected to the first terminal of the capacitor C88, and the negative terminal C1- of the second charge pump capacitor is connected to the second terminal of the capacitor C88;

[0163] A first transmitter signal input terminal T1IN of the RS232 transceiver U166 is connected to a first end of a resistor R998, and a second end of the resistor R998 is connected to an RS232 signal output terminal of the microcontroller U2;

[0164] A first transmitter signal output terminal R1OUT of U166 of the RS232 transceiver is connected to a first end of a resistor R999, and a second end of the resistor R999 is connected to an RS232 signal input terminal of the microcontroller U2;

[0165] The power supply terminal VCC of the RS232 transceiver and the first end of the capacitor C90 are connected to the power supply VCC3V3;

[0166] The voltage doubler charge pump voltage port V+ of the RS232 transceiver is connected to the first end of the capacitor C92.

[0167] The inverting charge pump voltage output terminal V- of the RS232 transceiver is connected to the first terminal of the capacitor C89.

[0168] A second end of the capacitor C90, a second end of the capacitor C92, and a second end of the capacitor C89 are connected to a power ground.

[0169] The model of RS232 transceiver is preferably SIT3232EEUE.

[0170] The circuit connection of microcontroller is as follows Figure 5 The battery voltage input terminal VBAT of the microcontroller U2, the power supply terminal VDD of the microcontroller U2, the first end of the capacitor C32, the first end of the capacitor C33, the first end of the capacitor C34, the first end of the capacitor C35, and the first end of the capacitor C36 are connected to the power supply VCC3V3;

[0171] The second end of the capacitor C32, the second end of the capacitor C33, the second end of the capacitor C34, the second end of the capacitor C35, and the second end of the capacitor C36 are connected to the power ground;

[0172] The reference voltage terminal VREF+ of the microcontroller U2 is connected to the first end of the inductor L12, and the second end of the inductor L12 is connected to the power supply VCC3V3.

[0173] The positive voltage terminal VDDA of the analog power supply of the microcontroller U2 is connected to the first end of the capacitor C26, the first end of the capacitor C25, and the first end of the inductor L3. The second end of the inductor L3 is connected to the power supply VCC3V3.

[0174] The ground terminal VSSA of the analog power supply of the microcontroller U2, the second end of the capacitor C26, and the second end of the capacitor C25 are connected to the power ground;

[0175] The second power supply terminal VCAP2 of the microcontroller U2 is connected to the first end of the capacitor C29, the first power supply terminal VCAP1 of the microcontroller U2 is connected to the first end of the capacitor C30, the second end of the capacitor C29 and the second end of the capacitor C30 are connected to the power ground; the ground terminal VSS of the microcontroller U2 is connected to the power ground.

[0176] The clock signal input terminal PH0-OSC_IN of the crystal oscillator of the microcontroller U2 is connected to the first end of the crystal oscillator Y1 and the first end of the capacitor C14, the second end of the capacitor C14 is connected to the power ground, the second end and the fourth end of the crystal oscillator Y1 are connected to the power ground, the third end of the crystal oscillator Y1 is connected to the first end of the capacitor C15, and the second end of the capacitor C15 is connected to the power ground;

[0177] The boot mode configuration terminal BOOT0 of the microcontroller U2 is connected to the first end of the resistor R24, and the second end of the resistor R24 ​​is connected to the power ground.

[0178] The reset terminal NRST of the microcontroller U2 is connected to the reset control terminal of the system voltage controller U4; when the voltage of the reset terminal NRST of the microcontroller U2 is too low, the reset control terminal of the system voltage controller U4 outputs a low level reset.

[0179] The model of the microcontroller U2 is preferably STM32H743VIT6, and the model of the crystal oscillator Y1 is preferably 25MHZ.

[0180] The circuit connection diagram of eMMC memory is as follows Figure 6 As shown, the data terminal DAT0 of the eMMC memory U1B is connected to the first end of the resistor R3 and the data transmission terminal of the microcontroller U2.

[0181] The data terminal DAT0 of the eMMC memory U1B is connected to the first terminal of the resistor R3 and the data transmission terminal of the microcontroller U2.

[0182] The data terminal DAT1 of the eMMC memory U1B is connected to the first terminal of the resistor R4 and the data transmission terminal of the microcontroller U2.

[0183] The data terminal DAT2 of the eMMC memory U1B is connected to the first end of the resistor R5 and the data transmission terminal of the microcontroller U2.

[0184] The data terminal DAT3 of the eMMC memory U1B is connected to the first terminal of the resistor R6 and the data transmission terminal of the microcontroller U2.

[0185] The data terminal DAT4 of the eMMC memory U1B is connected to the first end of the resistor R10 and the data transmission terminal of the microcontroller U2.

[0186] The data terminal DAT5 of the eMMC memory U1B is connected to the first end of the resistor R2 and the data transmission terminal of the microcontroller U2.

[0187] The data terminal DAT6 of the eMMC memory U1B is connected to the first terminal of the resistor R9 and the data transmission terminal of the microcontroller U2.

[0188] The data terminal DAT7 of the eMMC memory U1B is connected to the first end of the resistor R1 and the data transmission terminal of the microcontroller U2.

[0189] The second end of the resistor R1, the second end of the resistor R2, the second end of the resistor R3, the second end of the resistor R4, the second end of the resistor R5, the second end of the resistor R6, the second end of the resistor R7, the second end of the resistor R8, the second end of the resistor R9, and the second end of the resistor R10 are connected to the power supply VCCQ;

[0190] The data strobe clock terminal RCLK / DS of the eMMC memory U1B is connected to the first end of the resistor R14.

[0191] The clock signal terminal CLK of the eMMC memory U1B is connected to the first end of the resistor R12, and the second end of the resistor R12 is connected to the clock signal terminal of the microcontroller U2.

[0192] The control command terminal CMD of the eMMC memory U1B is connected to the first end of the resistor R7, the reset signal terminal RST_N of the eMMC memory U1B is connected to the first end of the resistor R8 and the first end of the capacitor C75, and the second end of the capacitor C75 and the second end of the resistor R14 are connected to the power ground;

[0193] The power supply terminal VCC / VDDF of the eMMC memory U1B is connected to the first end of the capacitor C1, the first end of the capacitor C2, the first end of the capacitor C3, and the first end of the inductor L1. The second end of the capacitor C1, the second end of the capacitor C2, and the second end of the capacitor C3 are connected to the power ground. The second end of the inductor L1 is connected to the power supply VDD3V3.

[0194] The power supply terminal VCCQ / VDD of the eMMC memory U1B is connected to the first end of capacitor C5, the first end of capacitor C6, the first end of capacitor C7, the first end of capacitor C8, the first end of capacitor C9, the first end of capacitor C10, and the first end of inductor L2; the second end of capacitor C5, the second end of capacitor C6, the second end of capacitor C7, the second end of capacitor C8, the second end of capacitor C9, and the second end of capacitor C10 are connected to the power ground; and the second end of inductor L2 is connected to the power supply VDD3V3.

[0195] The model of the eMMC memory is preferably FEMDRW016G-88A43.

[0196] Figure 7 The diagram is a circuit connection diagram of the monitoring system voltage device. The manual reset terminal MR of the monitoring system voltage device U4 is connected to the first end of the resistor R80, and the monitoring voltage terminal SENSE of the monitoring system voltage device U4, the power supply terminal VDD of the monitoring system voltage device U4, the first end of the capacitor C76, the first end of the capacitor C77, and the second end of the resistor R80 are connected to the power supply VCC3V3. When it is detected that the voltage of the power supply VCC3V3 drops below the threshold voltage, a reset will be triggered.

[0197] The reset delay time terminal CT of the monitoring system voltage regulator U4 is connected to the first terminal of the capacitor C21.

[0198] The second end of the capacitor C76, the second end of the capacitor C77, and the second end of the capacitor C21 are connected to the power ground;

[0199] The reset terminal RST of the monitoring system voltage device U4 is connected to the first end of the resistor R79, the first end of the capacitor C18 and the reset signal terminal of the microcontroller U2, and the detected power supply voltage signal is transmitted to the controller. The second end of the resistor R79 is connected to the power supply VCC3V3, and the second end of the capacitor C18 and the ground terminal GND of the monitoring system voltage device U4 are connected to the power ground.

[0200] The model of the monitoring system voltage regulator U4 is preferably TPS3808G33DBVT.

[0201] Figure 8 The circuit connection diagram of the USB interface is shown in FIG. The I / O signal input terminal VBUS of the USB transceiver U7 is connected to the first end of the resistor R33, the second end of the resistor R33 is connected to the first end of the capacitor C40 and the USB noise suppression module, and the second end of the capacitor C40 is connected to the power ground;

[0202] The enable terminal REG_EN of the USB transceiver U7 and the power terminal VDD3V3 are connected to the first end of the capacitor C38, the first end of the capacitor C39, and the first end of the inductor L6, and the second end of the inductor L6 is connected to the power supply VDD3V3;

[0203] The external clock output terminal XO of the USB transceiver U7 is connected to the first end of the resistor R35, the second output terminal X2 of the crystal oscillator X1, and the first end of the capacitor C43, and the ground terminal GND2 of the USB transceiver U7 and the second end of the capacitor C43 are connected to the power ground;

[0204] The external clock input terminal XI of the USB transceiver U7 is connected to the first end of the capacitor C42 and the first output terminal X1 of the crystal oscillator X1, and the ground terminal GND1 of the USB transceiver U7 and the second end of the capacitor C42 are connected to the power ground;

[0205] The power supply terminal VDD1_8_2 and the power supply terminal VDD1_8_1 of the USB transceiver U7 are connected to the first end of the capacitor C45, and the second end of the capacitor C45 is connected to the power ground;

[0206] The power supply terminal VDDA1_8 of the USB transceiver U7 is connected to the first end of the resistor R37, and the second end of the resistor R37 is connected to the power ground.

[0207] The model of the USB transceiver is preferably USB3300-EZK-TR.

[0208] Fig. 9 This is a schematic diagram of the USB transceiver's noise reduction circuit connection.

[0209] The I / O signal output terminal VBUS of the USB connector U8 is connected to the fifth terminal of the transient voltage suppressor D19 to output the VBUS signal;

[0210] The data negative terminal D- of the USB connector U8 is connected to the negative signal output terminal of the common mode filter T1 and the first terminal of the transient voltage suppressor D19.

[0211] The data positive terminal D+ of the USB connector U8 is connected to the positive signal output terminal of the common mode filter T1 and the sixth terminal of the transient voltage suppressor D19;

[0212] The ground terminal of transient voltage suppressor D19 is connected to the power ground;

[0213] The negative signal input terminal of the common mode filter T1 is connected to the USB differential negative signal terminal DMXL of the USB transceiver U7;

[0214] The positive signal input terminal of the common mode filter T1 is connected to the USB differential positive signal terminal DP of the USB transceiver U7.

[0215] Among them, the model of the USB connector U8 is preferably ZX62D-B-5PA8; the model of the transient voltage suppressor D19 is preferably SRV05-4.TCT, and the model of the common mode filter T1 is preferably SDCW2012H-2-900TF.

[0216] Fig.10 It is a circuit connection diagram of the power module DC converter.

[0217] The power input terminal VIN1, the power input terminal VIN2, the operation state control terminal RUN, the cathode of the diode D20, the first end of the capacitor C82, the first end of the capacitor C83, the first end of the capacitor C81, and the first end of the resistor R88 of the DC converter U56 are connected to a 28V power supply;

[0218] The anode of the diode D20, the second end of the capacitor C82, and the second end of the capacitor C83 are connected to the power ground, and the second end of the capacitor C81 is connected to the power ground.

[0219] The second end of the resistor R88 is connected to the power output terminal VOUT1 and the power output terminal VOUT2 of the DC converter U56, the first end of the capacitor C80, and the first end of the capacitor C84. The power output terminal VOUT1 and the power output terminal VOUT2 of the DC converter U56 output the power supply VDD5V2.

[0220] The second end of the capacitor C80 and the second end of the capacitor C84 are connected to the power ground;

[0221] The switching frequency terminal RT of the DC converter U56 is connected to the first end of the resistor R81, and the second end of the resistor R81 is connected to the power ground;

[0222] The feedback terminal FB of the DC converter U56 is connected to the first end of the resistor R82, and the second end of the resistor R82 is connected to the power ground;

[0223] The operation mode terminal SYNC of the DC converter U56 is connected to the first end of the resistor R83, and the SS of the DC converter U56 is connected to the first end of the capacitor C87;

[0224] A second end of the resistor R83 and a second end of the capacitor C87 are connected to a power ground.

[0225] The model of DC converter U56 is preferably LTM8074IY#PBF.

[0226] Fig.11 Schematic diagram of the power module switching circuit. The state indication terminal STA of the power multiplexer U20 is connected to the first end of the resistor R74, the second end of the resistor R74 is connected to the output terminal OUT of the power multiplexer U20, the first end of the capacitor C74, the positive electrode of the polar capacitor C48, and the first end of the resistor R76, and the output terminal OUT of the power multiplexer U20 outputs the power supply VSYS;

[0227] The second end of the capacitor C74 and the negative electrode of the polar capacitor C48 are connected to the power ground respectively;

[0228] The second end of the resistor R76 is connected to the positive electrode of the LED indicator light D17, and the negative electrode of the LED indicator light D17 is connected to the power ground; the LED indicator light D17 is a power indicator light.

[0229] The data input terminal D1 of the power multiplexer U20 is connected to the power ground.

[0230] An input current limiting terminal ILIM of the power multiplexer U20 is connected to a first terminal of a resistor R73, and a second terminal of the resistor R73 is connected to a power ground;

[0231] The input terminal IN1 of the power multiplexer U20 is connected to the first end of the capacitor C73 and the I / O signal output terminal VBUS of the USB connector U8;

[0232] The input terminal IN2 of the power multiplexer U20 and the first terminal of the capacitor C72 are connected to the power supply VDD5V2, and the second terminal of the capacitor C72 is connected to the power ground;

[0233] The model of the power multiplexer U20 is preferably TPS2115AIPWRQ1.

[0234] Fig.12 It is a schematic diagram of the linear regulator circuit connection of the power module. The power input terminal VIN of the linear regulator U55, the positive electrode of the polar capacitor C85, and the first end of the capacitor C62 are connected to the power supply VSYS, and the negative electrode of the polar capacitor C85 and the second end of the capacitor C62 are connected to the power ground;

[0235] The adjustable / ground terminal ADJ / GND of the linear regulator U55 is connected to the power ground;

[0236] The power output terminal VOUT of the linear regulator U55 is connected to the positive electrode of the polar capacitor C78, ​​the first end of the capacitor C64, the first end of the capacitor C79, and the first end of the resistor R75; the power output terminal VOUT of the linear regulator U55 outputs the power supply VCC3V3;

[0237] The negative electrode of the polar capacitor C78, ​​the second end of the capacitor C64, and the second end of the capacitor C79 are connected to the power ground;

[0238] The second end of the resistor R75 is connected to the positive electrode of the LED indicator light D16, and the negative electrode of the LED indicator light D16 is connected to the power ground. The LED indicator light D16 is a power indicator light.

[0239] The model of the linear regulator U55 is preferably REG1117_3.3.

[0240] Fig.13 This is a schematic diagram of the startup process of the multi-channel recorder system. After the system receives the startup command, it first initializes the controller STM32H743; then initializes the eMMC interface; and then initializes the USB OTG interface; after the initialization is completed, the system starts self-checking. If the self-check fails, the red indicator light is always on and prompts the system abnormality. If the self-check passes, the data recording state is entered.

[0241] Fig.14 The following is a schematic diagram of the data recording process. Multi-channel data such as RS422 data, RS232 data, RS485 data, CAN data, and CANFD data are cached and recorded in the eMMC, and then connected to the host computer through the USB interface to manage the stored data files.

[0242] Fig.15 The figure is a schematic diagram of the power-off protection process. When the voltage monitor of the monitoring system detects that the power supply voltage of the system is abnormal, the operating file is closed in the upper computer interface.

[0243] If there is a power outage, the super capacitor C48 starts to supply power to the system at the moment the input power is off. The voltage across C48 starts to drop, and the microprocessor U2 detects the voltage on VSYS (across the super capacitor C48) with a 10ms period through ADC_SYS. When the detected voltage is less than the threshold set by the microprocessor U2, the microprocessor U2 starts to perform an emergency file closing operation to avoid the recorded files from being destroyed due to abnormal power outage. This improves the reliability of system file recording.

[0244] In addition, when the power is off, the supercapacitor C48 is used as a backup power supply: the backup power after the system power is off is provided by the supercapacitor C48, which is a 0.22F supercapacitor with a withstand voltage of 5.5V. When the system is powered on, the external power supply charges the supercapacitor through the power selection and power multiplexer U20 to limit the charging current and avoid instantaneous overload of the input power. When the U20 supercapacitor is fully charged, the voltage across the capacitor is maintained at about 5V.

[0245] Although the embodiments of the present invention have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

Claims

1. A multi-channel data recorder system, characterized in that: include: Microcontrollers, transceivers, memory, monitoring system voltage regulators, power supply modules, The power supply module is respectively connected to the voltage regulator and the transceiver of the monitoring system to supply power to the voltage regulator and the transceiver of the monitoring system; The microcontroller is connected to the transceiver, memory, and monitoring system voltage controller respectively. The transceiver includes one or any combination of an RS422 transceiver, an RS232 transceiver, an RS485 transceiver, a CAN transceiver, and a CANFD transceiver.

2. A multi-channel data recorder system according to claim 1, characterized in that: The power supply module includes a power multiplexer and a linear regulator, the power output end of the power multiplexer is connected to the power input end of the linear regulator, and the voltage output from the power output end of the linear regulator supplies power to the monitoring system voltage regulator and the transceiver; The power multiplexer is powered by a power adapter or a USB interface.

3. A multi-channel data recorder system according to claim 1, characterized in that: The circuit of the power multiplexer includes: The state indication terminal STA of the power multiplexer U20 is connected to the first end of the resistor R74, the second end of the resistor R74 is connected to the output terminal OUT of the power multiplexer U20, the first end of the capacitor C74, the positive electrode of the polar capacitor C48, and the first end of the resistor R76, and the output terminal OUT of the power multiplexer U20 outputs the power supply VSYS; The second end of the capacitor C74 and the negative electrode of the polar capacitor C48 are connected to the power ground respectively; The second end of the resistor R76 is connected to the positive electrode of the LED indicator D17, and the negative electrode of the LED indicator D17 is connected to the power ground; The data input terminal D1 of the power multiplexer U20 is connected to the power ground. An input current limiting terminal ILIM of the power multiplexer U20 is connected to a first terminal of a resistor R73, and a second terminal of the resistor R73 is connected to a power ground; The input terminal IN1 of the power multiplexer U20 is connected to the first end of the capacitor C73 and the I / O signal output terminal VBUS of the USB connector U8; An input terminal IN2 of the power multiplexer U20 and a first terminal of the capacitor C72 are connected to the power supply VDD5V2, and a second terminal of the capacitor C72 is connected to the power ground.

4. A multi-channel data recorder system according to claim 3, characterized in that: The polar capacitor C48 is a super capacitor.

5. A multi-channel data recorder system according to claim 1, characterized in that: The circuit of the linear regulator includes: The power input terminal VIN of the linear regulator U55, the positive electrode of the polar capacitor C85, and the first end of the capacitor C62 are connected to the power supply VSYS, and the negative electrode of the polar capacitor C85 and the second end of the capacitor C62 are connected to the power ground; The adjustable / ground terminal ADJ / GND of the linear regulator U55 is connected to the power ground; The power output terminal VOUT of the linear regulator U55 is connected to the positive electrode of the polar capacitor C78, ​​the first end of the capacitor C64, the first end of the capacitor C79, and the first end of the resistor R75; the power output terminal VOUT of the linear regulator U55 outputs the power supply VCC3V3; The negative electrode of the polar capacitor C78, ​​the second end of the capacitor C64, and the second end of the capacitor C79 are connected to the power ground; The second end of the resistor R75 is connected to the positive electrode of the LED indicator light D16, and the negative electrode of the LED indicator light D16 is connected to the power ground.

6. A multi-channel data recorder system according to claim 2, characterized in that: The power adapter is a DC converter, and the circuit of the DC converter includes: The power input terminal VIN1, the power input terminal VIN2, the operation state control terminal RUN, the cathode of the diode D20, the first end of the capacitor C82, the first end of the capacitor C83, the first end of the capacitor C81, and the first end of the resistor R88 of the DC converter U56 are connected to a 28V power supply; The anode of the diode D20, the second end of the capacitor C82, and the second end of the capacitor C83 are connected to the power ground, and the second end of the capacitor C81 is connected to the power ground. The second end of the resistor R88 is connected to the power output terminal VOUT1 and the power output terminal VOUT2 of the DC converter U56, the first end of the capacitor C80, and the first end of the capacitor C84. The power output terminal VOUT1 and the power output terminal VOUT2 of the DC converter U56 output the power supply VDD5V2. The second end of the capacitor C80 and the second end of the capacitor C84 are connected to the power ground; The switching frequency terminal RT of the DC converter U56 is connected to the first end of the resistor R81, and the second end of the resistor R81 is connected to the power ground; The feedback terminal FB of the DC converter U56 is connected to the first end of the resistor R82, and the second end of the resistor R82 is connected to the power ground; The operation mode terminal SYNC of the DC converter U56 is connected to the first end of the resistor R83, and the SS of the DC converter U56 is connected to the first end of the capacitor C87; A second end of the resistor R83 and a second end of the capacitor C87 are connected to a power ground.

7. A multi-channel data recorder system according to claim 1, characterized in that: The microcontroller includes: The battery voltage input terminal VBAT of the microcontroller U2, the power supply terminal VDD of the microcontroller U2, the first end of the capacitor C32, the first end of the capacitor C33, the first end of the capacitor C34, the first end of the capacitor C35, and the first end of the capacitor C36 are connected to the power supply VCC3V3; The second end of the capacitor C32, the second end of the capacitor C33, the second end of the capacitor C34, the second end of the capacitor C35, and the second end of the capacitor C36 are connected to the power ground; The reference voltage terminal VREF+ of the microcontroller U2 is connected to the first end of the inductor L12, and the second end of the inductor L12 is connected to the power supply VCC3V3. The positive voltage terminal VDDA of the analog power supply of the microcontroller U2 is connected to the first end of the capacitor C26, the first end of the capacitor C25, and the first end of the inductor L3. The second end of the inductor L3 is connected to the power supply VCC3V3. The ground terminal VSSA of the analog power supply of the microcontroller U2, the second end of the capacitor C26, and the second end of the capacitor C25 are connected to the power ground; The second power supply terminal VCAP2 of the microcontroller U2 is connected to the first end of the capacitor C29, the first power supply terminal VCAP1 of the microcontroller U2 is connected to the first end of the capacitor C30, the second end of the capacitor C29 and the second end of the capacitor C30 are connected to the power ground; the ground terminal VSS of the microcontroller U2 is connected to the power ground; The clock signal input terminal PH0-OSC_IN of the crystal oscillator of the microcontroller U2 is connected to the first end of the crystal oscillator Y1 and the first end of the capacitor C14, the second end of the capacitor C14 is connected to the power ground, the second end and the fourth end of the crystal oscillator Y1 are connected to the power ground, the third end of the crystal oscillator Y1 is connected to the first end of the capacitor C15, and the second end of the capacitor C15 is connected to the power ground; The boot mode configuration terminal BOOT0 of the microcontroller U2 is connected to the first end of the resistor R24, and the second end of the resistor R24 ​​is connected to the power ground. The reset terminal NRST of the microcontroller U2 is connected to the reset control terminal of the system voltage controller U4; when the voltage of the reset terminal NRST of the microcontroller U2 is less than or equal to the preset voltage threshold, the reset control terminal of the system voltage controller U4 outputs a low level reset.

8. A multi-channel data recorder system according to claim 1, characterized in that: The memory is eMMC memory, including: The data terminal DAT0 of the eMMC memory U1B is connected to the first terminal of the resistor R3 and the data transmission terminal of the microcontroller U2. The data terminal DAT0 of the eMMC memory U1B is connected to the first terminal of the resistor R3 and the data transmission terminal of the microcontroller U2. The data terminal DAT1 of the eMMC memory U1B is connected to the first terminal of the resistor R4 and the data transmission terminal of the microcontroller U2. The data terminal DAT2 of the eMMC memory U1B is connected to the first end of the resistor R5 and the data transmission terminal of the microcontroller U2. The data terminal DAT3 of the eMMC memory U1B is connected to the first terminal of the resistor R6 and the data transmission terminal of the microcontroller U2. The data terminal DAT4 of the eMMC memory U1B is connected to the first end of the resistor R10 and the data transmission terminal of the microcontroller U2. The data terminal DAT5 of the eMMC memory U1B is connected to the first end of the resistor R2 and the data transmission terminal of the microcontroller U2. The data terminal DAT6 of the eMMC memory U1B is connected to the first terminal of the resistor R9 and the data transmission terminal of the microcontroller U2. The data terminal DAT7 of the eMMC memory U1B is connected to the first end of the resistor R1 and the data transmission terminal of the microcontroller U2. The second end of the resistor R1, the second end of the resistor R2, the second end of the resistor R3, the second end of the resistor R4, the second end of the resistor R5, the second end of the resistor R6, the second end of the resistor R7, the second end of the resistor R8, the second end of the resistor R9, and the second end of the resistor R10 are connected to the power supply VCCQ; The data strobe clock terminal RCLK / DS of the eMMC memory U1B is connected to the first end of the resistor R14. The clock signal terminal CLK of the eMMC memory U1B is connected to the first end of the resistor R12, and the second end of the resistor R12 is connected to the clock signal terminal of the microcontroller U2. The control command terminal CMD of the eMMC memory U1B is connected to the first end of the resistor R7, the reset signal terminal RST_N of the eMMC memory U1B is connected to the first end of the resistor R8 and the first end of the capacitor C75, and the second end of the capacitor C75 and the second end of the resistor R14 are connected to the power ground; The power supply terminal VCC / VDDF of the eMMC memory U1B is connected to the first end of the capacitor C1, the first end of the capacitor C2, the first end of the capacitor C3, and the first end of the inductor L1. The second end of the capacitor C1, the second end of the capacitor C2, and the second end of the capacitor C3 are connected to the power ground. The second end of the inductor L1 is connected to the power supply VDD3V3. The power supply terminal VCCQ / VDD of the eMMC memory U1B is connected to the first end of capacitor C5, the first end of capacitor C6, the first end of capacitor C7, the first end of capacitor C8, the first end of capacitor C9, the first end of capacitor C10, and the first end of inductor L2; the second end of capacitor C5, the second end of capacitor C6, the second end of capacitor C7, the second end of capacitor C8, the second end of capacitor C9, and the second end of capacitor C10 are connected to the power ground; and the second end of inductor L2 is connected to the power supply VDD3V3.

9. A multi-channel data recorder system according to claim 1, characterized in that: The monitoring system voltage includes: The manual reset terminal of the monitoring system voltage device U4 is connected to the first terminal of the resistor R80, and the monitoring voltage terminal SENSE of the monitoring system voltage device U4, the power supply terminal VDD of the monitoring system voltage device U4, the first terminal of the capacitor C76, the first terminal of the capacitor C77, and the second terminal of the resistor R80 are connected to the power supply VCC3V3. When it is detected that the voltage of the power supply VCC3V3 drops below the threshold voltage, a reset will be triggered; The reset delay time terminal CT of the monitoring system voltage regulator U4 is connected to the first end of the capacitor C21, and the second end of the capacitor C76, the second end of the capacitor C77, and the second end of the capacitor C21 are connected to the power ground; the reset end of the monitoring system voltage regulator U4 is connected to the first end of the resistor R79, the first end of the capacitor C18 and the reset signal end of the microcontroller U2, and the detected power supply voltage signal is transmitted to the controller; the second end of the resistor R79 is connected to the power supply VCC3V3, and the second end of the capacitor C18 and the ground terminal GND of the monitoring system voltage regulator U4 are connected to the power ground.

10. A multi-channel data recorder system according to claim 1, characterized in that: The multi-channel data recorder system transmits data to the host computer via the USB OTG interface, and the USB OTG interface includes: The I / O signal input terminal VBUS of the USB transceiver U7 is connected to the first end of the resistor R33, the second end of the resistor R33 is connected to the first end of the capacitor C40 and the USB noise suppression module, and the second end of the capacitor C40 is connected to the power ground; The enable terminal REG_EN of the USB transceiver U7 and the power terminal VDD3V3 are connected to the first end of the capacitor C38, the first end of the capacitor C39, and the first end of the inductor L6, and the second end of the inductor L6 is connected to the power supply VDD3V3; The external clock output terminal XO of the USB transceiver U7 is connected to the first end of the resistor R35, the second output terminal X2 of the crystal oscillator X1, and the first end of the capacitor C43, and the ground terminal GND2 of the USB transceiver U7 and the second end of the capacitor C43 are connected to the power ground; The external clock input terminal XI of the USB transceiver U7 is connected to the first end of the capacitor C42 and the first output terminal X1 of the crystal oscillator X1, and the ground terminal GND1 of the USB transceiver U7 and the second end of the capacitor C42 are connected to the power ground; The power supply terminal VDD1_8_2 and the power supply terminal VDD1_8_1 of the USB transceiver U7 are connected to the first end of the capacitor C45, and the second end of the capacitor C45 is connected to the power ground; The power supply terminal VDDA1_8 of the USB transceiver U7 is connected to the first end of the resistor R37, and the second end of the resistor R37 is connected to the power ground.

Images