Inspection device

Abstract

The inspection apparatus includes: a jig including a first connector, the jig being connected to an image signal provider; and a panel FPC including a second connector fastened to the first connector in an inspection process, the panel FPC including at least one integrated circuit for driving the panel. The first connector includes a plurality of first connection pins, and includes a connection line for electrically connecting a 1a-th connection pin and a 1b-th connection pin among the first connection pins to each other.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the priority of Korean Patent Application No. 10-2023-0008152 filed in the Korean Intellectual Property Office on January 19, 2023, the disclosure of which is incorporated herein in its entirety by reference. Technical Field

[0003] The present disclosure generally relates to inspection apparatus and inspection methods. Background Art

[0004] As information technology develops, the importance of display devices as a connection medium between users and information increases. Therefore, display devices such as liquid crystal display devices and organic light emitting display devices are increasingly used.

[0005] Whether the panel of the display device is defective is determined when the panel is subjected to an inspection process before being released. In an example, a predetermined image may be displayed on the panel during the inspection process, and the position, brightness, noise, unevenness, etc. of the image may be used to determine whether the panel is defective.

[0006] The panel can be electrically connected to an inspection device for testing (or an image signal provider) via a fixture, and a predetermined image corresponding to the inspection data supplied from the inspection device for testing is displayed. The panel and the fixture can be fastened to each other through a contact portion, and when the contact portion is not fastened normally (or when the resistance of the contact portion increases), a good quality panel may be judged as a defective product. Utility Model Content

[0007] The embodiment provides an inspection apparatus and an inspection method capable of inspecting a contact defect of a contact portion for electrically connecting a panel and a jig to each other.

[0008] According to one aspect of the present disclosure, an inspection device is provided, including: a fixture including a first connector, the fixture being connected to an image signal provider; and a panel FPC, including a second connector fastened to the first connector during an inspection process, the panel FPC including at least one integrated circuit for driving the panel, wherein the first connector includes a plurality of first connecting pins and includes a connecting wire for electrically connecting a 1a-th connecting pin and a 1b-th connecting pin among the first connecting pins to each other.

[0009] The second connector may include a plurality of second connection pins, and include a 2a-th connection pin electrically connected to the 1a-th connection pin and a 2b-th connection pin electrically connected to the 1b-th connection pin when the second connector is fastened to the first connector.

[0010] The integrated circuit can detect whether fastening of the first connector and the second connector is defective by using the connection state of the 1a-th connecting pin and the 2a-th connecting pin and the connection state of the 1b-th connecting pin and the 2b-th connecting pin in the inspection process.

[0011] The integrated circuit may include: a transmitting pin electrically connected to a 2a-th connecting pin; a receiving pin electrically connected to a 2b-th connecting pin; a switch connected between a reference power supply and the transmitting pin; and a controller configured to turn on the switch during an inspection process and to turn off the switch during a period other than the inspection process.

[0012] When a reception voltage input to the reception pin is less than a threshold value in the inspection process, the controller may determine that fastening between the first connector and the second connector is defective.

[0013] The integrated circuit may further include a register, the threshold being stored in the register.

[0014] When a fastening defect between the first connector and the second connector is determined, the integrated circuit may display a related signal on the panel.

[0015] The jig may further include a connection FPC electrically connected to the jig, the connection FPC including a first connector.

[0016] The jig may further include an inspection connector for electrically connecting the image signal provider and the jig to each other.

[0017] The image signal supplier may supply inspection data and a timing signal to the panel FPC during an inspection process.

[0018] According to another aspect of the present disclosure, an inspection device is provided, including: a fixture for electrically connecting a panel and an image signal provider to each other during an inspection process, the fixture including a first connector, which is fastened to a second connector of the panel during the inspection process, wherein the first connector includes a plurality of first connecting pins and includes a connecting wire for electrically connecting two of the first connecting pins to each other.

[0019] The first connector is formed in the connection FPC, and the connection FPC is electrically connected to the jig through a connection connector formed in the jig.

[0020] Two first connection pins connected to each other by a connection line are positioned adjacent to each other.

[0021] Two first connecting pins connected to each other by the connecting wire are positioned with at least one first connecting pin interposed therebetween.

[0022] According to another aspect of the present disclosure, an inspection method is provided, including: fastening a first connector of a fixture and a second connector of a panel FPC to each other; inspecting whether contact between the first connector and the second connector is defective in an integrated circuit included in the panel FPC; sending inspection data and a timing signal from an image signal provider connected to the fixture to the panel FPC; and determining whether the panel is defective by using an image corresponding to the inspection data displayed on the panel.

[0023] The 1a-th connection pin and the 1b-th connection pin among the first connection pins included in the first connector maintain a state in which the 1a-th connection pin and the 1b-th connection pin are electrically connected to each other through the connection wire.

[0024] Checking whether the contact between the first connector and the second connector is defective includes: supplying a reference voltage to a 2a connection pin connected to a 1a connection pin among the second connection pins included in the second connector; receiving a voltage input to a 2b connection pin connected to a 1b connection pin among the second connection pins included in the second connector; and using the voltage input to the 2b connection pin to determine whether the contact between the first connector and the second connector is defective.

[0025] When the received voltage is less than the threshold value, it may be determined that the connection between the first connector and the second connector is defective.

[0026] The checking method may further include storing the threshold value in a register included in the integrated circuit.

[0027] The integrated circuit may supply a reference voltage to a transmission pin electrically connected to the 2a-th connection pin, and receive a reception voltage input from a reception pin electrically connected to the 2b-th connection pin. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Example embodiments will be described more fully below with reference to the accompanying drawings; however, the embodiments may be implemented in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the example embodiments to those skilled in the art.

[0029] In the accompanying drawings, dimensions may be exaggerated for clarity of illustration. It will be understood that when an element is referred to as being "between" two elements, it may be the only element between the two elements, or one or more intervening elements may also be present. The same reference numerals always refer to the same elements.

[0030] Figure 1 is a diagram illustrating a display device according to an embodiment of the present disclosure.

[0031] Figure 2 is a block diagram conceptually illustrating an inspection apparatus according to an embodiment of the present disclosure.

[0032] Figure 3 is a diagram illustrating a jig according to an embodiment of the present disclosure.

[0033] Figure 4A and Figure 4B is a diagram showing an embodiment of pins included in the first connector.

[0034] Figure 5 is a schematic diagram showing a panel flexible printed circuit attached to a panel.

[0035] Figure 6 is a diagram showing an embodiment of pins included in the second connector.

[0036] Fig. 7A and Figure 7B is a diagram showing an embodiment of a sensor driver (or integrated circuit).

[0037] Figure 8 and Fig. 9 1 is a diagram showing an embodiment when a connector is connected after a panel is mounted on a jig in an inspection process.

[0038] Fig.10 is a flow chart illustrating an inspection process according to an embodiment of the present disclosure.

[0039] Fig.11 is a diagram illustrating a jig according to an embodiment of the present disclosure.

[0040] Fig.12 is shown when the panel and Fig.11 The clamps shown in FIG. 1 are electrically connected to each other.

[0041] Fig.13 is a diagram illustrating a display unit and a display driver according to an embodiment of the present disclosure.

[0042] Fig.14 is a diagram showing a pixel according to an embodiment of the present disclosure.

[0043] Fig.15 It is shown Fig.14 FIG. 4 is a diagram of an exemplary driving method of a pixel shown in FIG. DETAILED DESCRIPTION

[0044] Hereinafter, exemplary embodiments are described in detail with reference to the accompanying drawings so that those skilled in the art can easily practice the present disclosure. The present disclosure can be implemented in various different forms and is not limited to the exemplary embodiments described in this specification.

[0045] Parts not related to the description will be omitted to clearly describe the present disclosure, and the same or similar constituent elements will be represented by the same reference numerals throughout the specification. Therefore, the same reference numerals may be used in different drawings to identify the same or similar elements.

[0046] In addition, for better understanding and ease of description, the size and thickness of each component shown in the drawings are arbitrarily shown, but the present disclosure is not limited thereto. For clear expression, the thickness of several parts and regions is exaggerated.

[0047] In the description, the expression "equal" may mean "substantially equal". That is, it may mean equal to the extent that a person skilled in the art can understand equal. Other expressions may be expressions in which "substantially" is omitted.

[0048] Figure 1 is a diagram illustrating a display device according to an embodiment of the present disclosure.

[0049] Reference Figure 1 , the display device 1 may include a panel 10 and a driving circuit 20 for driving the panel 10. In addition, the display device 1 may be connected to an application processor (AP) 30 included in an external host (or set).

[0050] The panel 10 may include a display unit 110 for displaying an image and a sensor unit 120 for sensing touch, pressure, fingerprint, hovering, biometric information (or biometric features), etc. For example, the panel 10 may include pixels PX and sensors SC positioned overlapping at least some of the pixels PX. In an embodiment, the sensor SC may include a first sensor TX (or driving electrode) and a second sensor RX (or sensing electrode). In another embodiment (e.g., a self-capacitive type), the sensor SC may be configured with one type of sensor without distinguishing the first sensor TX and the second sensor RX from each other.

[0051] The driving circuit 20 may include a display driver 210 for driving the display unit 110 and a sensor driver 220 for driving the sensor unit 120. For example, the pixel PX may display an image by using a display frame period as a unit. For example, the sensor SC may sense a user's input by using a sensing frame period as a unit. The sensing frame period and the display frame period may be independent of or different from each other. The sensing frame period and the display frame period may be synchronized or asynchronous with each other.

[0052] In some embodiments, after the display unit 110 and the sensor unit 120 are manufactured separately from each other, the display unit 110 and the sensor unit 120 may be arranged and / or coupled to overlap each other in at least one region. Alternatively, in another embodiment, the display unit 110 and the sensor unit 120 may be manufactured integrally. For example, the sensor unit 120 may be directly formed on at least one substrate constituting the display unit 110 (e.g., an upper substrate and / or a lower substrate of a display panel or a thin film encapsulation layer), or another insulating layer or one of various types of functional layers (e.g., an optical layer or a protective layer).

[0053] At the same time, despite Figure 1 , the sensor unit 120 is provided on the front surface (e.g., the upper surface on which an image is displayed) of the display unit 110, but the position of the sensor unit 120 is not limited thereto. For example, in another embodiment, the sensor unit 120 may be provided on the rear surface or both surfaces of the display unit 110. In yet another embodiment, the sensor unit 120 may be provided in at least one edge region of the display unit 110.

[0054] The display unit 110 may include a display substrate 111 and a plurality of pixels PX formed on the display substrate 111. The pixels PX may be disposed in a display area DA of the display substrate 111.

[0055] The display substrate 111 may include a display area DA in which an image is displayed and a non-display area NDA at the periphery of the display area DA. In some embodiments, the display area DA may be disposed in a central area of ​​the display unit 110, and the non-display area NDA may be disposed in an edge area of ​​the display unit 110 to surround the display area DA.

[0056] The display substrate 111 may be a rigid substrate or a flexible substrate, and there is no particular limitation on the material or properties of the display substrate 111. For example, the display substrate 111 may be a rigid substrate made of glass or tempered glass, or a flexible substrate provided with a thin film made of plastic or metal.

[0057] Scan lines SL and data lines DL, and pixels PX connected to the scan lines SL and the data lines DL are arranged in the display area DA. The pixels PX are selected by a scan signal having a conduction level supplied from the scan lines SL to be supplied with a data signal from the data lines DL, and emit light having a brightness corresponding to the data signal. Therefore, an image corresponding to the data signal is displayed in the display area DA. In the present disclosure, there is no particular limitation on the structure, driving method, etc. of the pixels PX. For example, each of the pixels PX may be implemented as a pixel having various structures and / or various driving methods that are well known in the art.

[0058] Various types of lines and / or built-in circuits connected to the pixels PX of the display area DA may be provided in the non-display area NDA. In an example, a plurality of lines for supplying various power supplies and various control signals to the display area DA may be provided in the non-display area NDA. In addition, a scan driver and the like may also be provided in the non-display area NDA.

[0059] In the present disclosure, the type of display unit 110 is not particularly limited. For example, the display unit 110 can be implemented as a self-luminous display panel such as an organic light-emitting display panel. However, when the display unit 110 is implemented as a self-luminous display panel, each of the pixels PX is not necessarily limited to the case where the pixel PX only includes an organic light-emitting element. For example, the light-emitting element of each of the pixels PX can be configured as an organic light-emitting diode, an inorganic light-emitting diode, a quantum dot / well light-emitting diode, etc. A plurality of light-emitting elements can be set in each of the pixels PX. A plurality of light-emitting elements can be connected in series, in parallel, in series / in parallel, etc. Optionally, the display unit 110 can be implemented as a non-luminous display panel such as a liquid crystal display panel. When the display unit 110 is implemented as a non-luminous display panel, the display device 1 may additionally include a light source such as a backlight unit.

[0060] The sensor unit 120 may include a sensor substrate 121 and a plurality of sensors SC formed on the sensor substrate 121. The sensors SC may be disposed in a sensing area SA on the sensor substrate 121.

[0061] The sensor substrate 121 may include a sensing area SA capable of sensing a touch input, etc., and a peripheral area NSA at the periphery of the sensing area SA. In some embodiments, the sensing area SA may be arranged to overlap with at least one area of ​​the display area DA. In an example, the sensing area SA may be set to an area corresponding to the display area DA (e.g., an area overlapping the display area DA), and the peripheral area NSA may be set to an area corresponding to the non-display area NDA (e.g., an area overlapping the non-display area NDA). When a touch input, etc. is provided in the display area DA, the touch input may be detected by the sensor unit 120.

[0062] The sensor substrate 121 may be a rigid substrate or a flexible substrate. In addition, the sensor substrate 121 may be configured with at least one insulating layer. In addition, the sensor substrate 121 may be a transparent or translucent light-transmitting substrate, but the present disclosure is not limited thereto. That is, in the present disclosure, the material and properties of the sensor substrate 121 are not particularly limited. For example, the sensor substrate 121 may be a rigid substrate configured with glass or tempered glass, or a flexible substrate configured with a thin film made of plastic or metal. In some embodiments, at least one substrate constituting the display unit 110 (e.g., a display substrate 111, an encapsulation substrate, and / or a thin film encapsulation layer) or at least one insulating layer or at least one functional layer disposed at the inner side and / or outer surface of the display unit 110 may be used as the sensor substrate 121.

[0063] The sensing area SA is set as an area that can react to touch input (ie, an effective area of ​​the sensor). To this end, a sensor SC for sensing touch input, etc. may be provided in the sensing area SA. In some embodiments, the sensor SC may include a first sensor TX and a second sensor RX.

[0064] For example, each of the first sensors TX may extend in the first direction DR1. The first sensors TX may be arranged in the second direction DR2. The second direction DR2 may be different from the first direction DR1. For example, the second direction DR2 may be a direction orthogonal to the first direction DR1. In another embodiment, the extending direction and the arrangement direction of the first sensors TX may follow another conventional configuration. Each of the first sensors TX may have a form in which a first unit cell having a relatively wide area and a first bridge having a relatively narrow area are connected to each other. Although in Figure 1 , each of the first cells has a diamond shape, but each of the first cells may be configured in various conventional shapes including a circular shape, a quadrilateral shape, a triangular shape, a grid shape, etc. For example, the first bridge may be formed integrally with the first cells on the same layer. In another embodiment, the first bridge may be formed in a layer different from that of the first cells to electrically connect adjacent first cells to each other.

[0065] For example, each of the second sensors RX may extend in the second direction DR2. The second sensors RX may be arranged in the first direction DR1. In another embodiment, the extending direction and the arrangement direction of the second sensors RX may follow another conventional configuration. Each of the second sensors RX may have a form in which a second unit cell having a relatively wide area and a second bridge having a relatively narrow area are connected to each other. Although Figure 1, each of the second cells has a diamond shape, but each of the second cells may be configured in various conventional shapes including a circular shape, a quadrilateral shape, a triangular shape, a grid shape, etc. For example, the second bridge may be formed integrally with the second cells on the same layer. In another embodiment, the second bridge may be formed in a layer different from that of the second cells to electrically connect adjacent second cells to each other.

[0066] In some embodiments, each of the first sensor TX and the second sensor RX may include at least one of a metal material, a transparent conductive material, and various other conductive materials, thereby having conductivity. In an example, the first sensor TX and the second sensor RX may include at least one of various metal materials or alloys thereof, and the metal materials include gold (Au), silver (Ag), aluminum (Al), molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), platinum (Pt), etc. The first sensor TX and the second sensor RX may be configured in a grid shape. In addition, the first sensor TX and the second sensor RX may include at least one of various transparent conductive materials, and the transparent conductive material includes silver nanowire (AgNW), indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), antimony zinc oxide (AZO), indium tin zinc oxide (ITZO), zinc oxide (ZnO), tin oxide (SnO 2 ), carbon nanotubes, graphene, etc. In addition, the first sensor TX and the second sensor RX may include at least one of various conductive materials to have conductivity. In addition, each of the first sensor TX and the second sensor RX may be configured as a single layer or a multilayer, and its cross-sectional structure is not particularly limited.

[0067] Meanwhile, sensor lines and the like for electrically connecting the first sensor TX and the second sensor RX to the sensor driver 220 may be collectively disposed in the peripheral area NSA.

[0068] The driving circuit 20 may include a display driver 210 for driving the display unit 110 and a sensor driver 220 for driving the sensor unit 120. In an embodiment, the display driver 210 and the sensor driver 220 may be configured as an integrated chip (IC) separated from each other. In another embodiment, at least a portion of the display driver 210 and at least a portion of the sensor driver 220 may be integrated together in one IC.

[0069] The display driver 210 is electrically connected to the display unit 110 to drive the pixels PX. For example, the display driver 210 may include a data driver and a timing controller, and a scan driver may be separately installed in the non-display area NDA of the display unit 110. In another embodiment, the display driver 210 may include all or at least a portion of the data driver, the timing controller, and the scan driver.

[0070] The timing controller included in the display driver 210 may control the data driver. In an example, the timing controller may supply a control signal and digital data to the data driver, and the data driver may convert the digital data into an analog data signal corresponding to the control signal and supply the analog data signal to the data line DL.

[0071] The sensor driver 220 is electrically connected to the sensor unit 120 to drive the sensor unit 120. The sensor driver 220 may include a sensor transmitter and a sensor receiver. In some embodiments, the sensor transmitter and the sensor receiver may be integrated into one IC, but the present disclosure is not limited thereto.

[0072] The sensor driver 220 may supply a control signal to the sensor transmitter and the sensor receiver so that a touch may be sensed in the sensor unit 120. The sensor transmitter may supply a touch signal to the first sensor TX (and / or the second sensor RX), and the sensor receiver may receive a sensing signal corresponding to the touch signal from the second sensor RX (and / or the first sensor TX).

[0073] After the panel 10 (or the display device 1) is released, the application processor 30 may be electrically connected to the display driver 210 and the sensor driver 220. The application processor 30 may provide grayscale (data) and timing signals to the display driver 210 in a display frame period. In addition, the application processor 30 may provide a timing signal to the sensor driver 220. The application processor 30 may correspond to at least one of a graphics processing unit (GPU), a central processing unit (CPU), an application processor (AP), and the like.

[0074] Figure 2 is a block diagram conceptually illustrating an inspection apparatus according to an embodiment of the present disclosure.

[0075] Reference Figure 2 , the inspection apparatus 2 according to an embodiment of the present disclosure may include an image signal provider 300 and a fixture 400 .

[0076] The panel 10 may be installed in one area of ​​the jig 400. The jig 400 may electrically connect the panel 10 and the image signal provider 300 to each other. To this end, the jig 400 may be connected to the image signal provider 300 via a first connector 402 (see Figure 3 ) is electrically connected to the panel 10 and is connected to the panel 10 via the inspection connector 406 (see Figure 3 ) is electrically connected to the image signal provider 300.

[0077] In the inspection process, the image signal provider 300 may provide a data signal and a timing signal to the display driver 210 included in the panel 10 via the jig 400, and provide a timing signal to the sensor driver 220 included in the panel 10 via the jig 400. In an example, in the inspection process, the image signal provider 300 may supply inspection data corresponding to a predetermined image (pattern) to the panel 10 via the jig 400, and determine whether the panel 10 is defective by using an image corresponding to the inspection data displayed on the panel 10.

[0078] Figure 3 is a diagram illustrating a jig according to an embodiment of the present disclosure. Figure 4A and Figure 4B is a diagram showing an embodiment of pins included in the first connector.

[0079] Reference Figure 3 , the jig 400 according to an embodiment of the present disclosure may include a panel mounting portion 408 , a connecting flexible printed circuit (FPC) 410 , and an inspection connector 406 .

[0080] The panel mounting portion 408 means an area in which the panel 10 is mounted (or fixed) in the inspection process. In an example, the panel mounting portion 408 may have a predetermined inner space, and the panel 10 may be inserted into the predetermined inner space to be fixed to the panel mounting portion 408 in the inspection process. In an embodiment, the panel mounting portion 408 may have various forms so that the panel 10 can be fixed to the panel mounting portion 408.

[0081] The inspection connector 406 can electrically connect the image signal provider 300 and the fixture 400 to each other. To this end, a connector (not shown) of the image signal provider 300 can be fastened to the inspection connector 406, and thus, the image signal provider 300 and the fixture 400 can be electrically connected to each other. In an embodiment, the image signal provider 300 can be directly connected to the fixture 400 without any connector, and thus, the inspection connector 406 can be removed.

[0082] The connection FPC 410 may electrically connect the panel 10 and the fixture 400 to each other. To this end, the connection FPC 410 may include a first connector 402 and a connection connector 404. The connection connector 404 may be fastened to the fixture 400 to electrically connect the fixture 400 and the connection FPC 410 to each other. In an embodiment, the connection connector 404 may be removed, and therefore, the connection FPC 410 may be configured integrally with the fixture 400.

[0083] The first connector 402 can be connected to the panel FPC 500 (see Figure 5 ) and the connecting FPC 410 are electrically connected to each other. To this end, the first connector 402 can be electrically connected to the second connector 502 (see Figure 5 ). In an example, in the inspection process, the first connector 402 and the second connector 502 may be fastened to each other, and thus, the jig 400 may be electrically connected to the panel FPC 500 via the connection FPC 410.

[0084] The connection FPC 410 may maintain a state in which the connection FPC 410 is connected to the jig 400 through the connection connector 404. In addition, the connection FPC 410 may maintain a state in which the connection FPC 410 is connected to the image signal provider 300 through the inspection connector 406. When the first connector 402 and the second connector 502 are fastened to each other in the inspection process, the inspection data and the timing signal provided from the image signal provider 300 may be provided to the panel 10 via the jig 400 and the connection FPC 410. When the inspection data and the timing signal are provided to the panel 10, a predetermined image may be displayed on the panel 10, and it may be determined whether the panel 10 is defective while the predetermined image is sensed.

[0085] Meanwhile, in an embodiment of the present disclosure, a connection line 412 connected to the first connector 402 may be further included in the connection FPC 410 to detect whether fastening (eg, connection or contact) of the first connector 402 and the second connector 502 is defective.

[0086] like Figure 4A and Figure 4B As shown in FIG. 1 , the first connector 402 may include a plurality of first connection pins 414. The plurality of first connection pins 414 may be respectively connected to a plurality of second connection pins 514 (see FIG. 1 ) included in the second connector 502. Figure 6 ).

[0087] The connection wire 412 may electrically connect two first connection pins of the first connection pins 414 to each other. In an example, the connection wire 412 may electrically connect the 1a-th connection pin 414a and the 1b-th connection pin 414b to each other of the first connection pins 414. The 1a-th connection pin 414a and the 1b-th connection pin 414b electrically connected to each other by the connection wire 412 may be used to detect whether the fastening of the first connector 402 and the second connector 502 is defective.

[0088] like Figure 4A As shown in , the 1a-th connecting pin 414a and the 1b-th connecting pin 414b may be positioned adjacent to each other. Figure 4B As shown in FIG. 1 , the 1a-th connecting pin 414 a and the 1b-th connecting pin 414 b may be positioned with at least one first connecting pin 414 interposed therebetween.

[0089] In an embodiment, any connection pins of the first connection pins 414 that are not used in the inspection process may be electrically connected to each other by using the connection wire 412 to serve as the 1a-th connection pin 414a and the 1b-th connection pin 414b. In an embodiment, two connection pins may be additionally formed in the first connector 402, and the additionally formed connection pins may be electrically connected to each other by using the connection wire 412 to serve as the 1a-th connection pin 414a and the 1b-th connection pin 414b.

[0090] Figure 5 is a schematic diagram showing a panel FPC attached to a panel.

[0091] Reference Figure 5 , the panel FPC 500 may be attached to the panel 10 to be fixed to the panel 10. The panel FPC 500 includes a second connector 502. At least one integrated circuit may be included in the panel FPC 500. In an example, the display driver 210 and the sensor driver 220 may be included in the panel FPC 500 in the form of an integrated circuit (IC). In an embodiment, the display driver 210 and the sensor driver 220 may be inserted into a separate printed circuit board (PCB) to be attached to the panel 10, and the panel FPC 500 may be electrically connected to the display driver 210 and the sensor driver 220 via the PCB.

[0092] In an embodiment, the integrated circuit included in the panel FPC 500 (or electrically connected to the panel FPC 500) may be set as at least one integrated circuit in various ways. In an example, each of the timing controller and the data driver included in the display driver 210 may be included in the panel FPC 500 as a separate integrated circuit. In an example, various types of integrated circuits currently known in the art may be included in the panel FPC 500 to drive the panel 10. Meanwhile, the integrated circuit included in the panel FPC 500 may include a case where the integrated circuit is directly attached to the panel FPC 500 and a case where the integrated circuit located on a separate printed circuit board and the panel FPC 500 are electrically connected to each other.

[0093] After the display device 1 is released, the second connector 502 of the panel FPC 500 can be fastened to a connector (not shown) of an external host (or unit), and thus, data signals and timing signals from the external host can be supplied to the display driver 210 and the sensor driver 220 via the panel FPC 500.

[0094] In the inspection process, the second connector 502 of the panel FPC 500 may be fastened to the first connector 402 , and thus, the image signal provider 300 may be electrically connected to the display driver 210 and the sensor driver 220 via the jig 400 , the connection FPC 410 , and the panel FPC 500 .

[0095] Figure 6 is a diagram showing an embodiment of pins included in the second connector.

[0096] Reference Figure 6 , the sensor driver 220 may be implemented as an integrated circuit and include a plurality of pins 221. In an example, the plurality of pins 221 may include a pin for being supplied with power, a pin for supplying a touch signal, a pin for receiving a sensing signal, and the like.

[0097] The second connector 502 may include a plurality of second connection pins 514. When the first connector 402 and the second connector 502 are fastened to each other, the second connection pins 514 may be electrically connected to the first connection pins 414, respectively.

[0098] The 2a-th connection pin 514a and the 2b-th connection pin 514b of the second connection pins 514 may be used to detect whether there is a defect in the fastening of the first connector 402 and the second connector 502. The 2a-th connection pin 514a may be electrically connected to the transmission pin 221a of the sensor driver 220, and the 2b-th connection pin 514b may be electrically connected to the reception pin 221b of the sensor driver 220.

[0099] The sensor driver 220 can supply a predetermined reference voltage (or current) to the transmission pin 221a and receive a voltage corresponding to the reference voltage from the reception pin 221b. The sensor driver 220 can determine whether the first connector 402 and the second connector 502 are normally fastened to each other corresponding to the voltage received from the reception pin 221b.

[0100] In an embodiment, the 2a-th connecting pin 514a and the 2b-th connecting pin 514b may be any second connecting pin 514 that is not used in the inspection process. In an embodiment, two additional connecting pins may be formed in the second connector 502, and the additionally formed connecting pins may be used as the 2a-th connecting pin 514a and the 2b-th connecting pin 514b.

[0101] In addition, although already Figure 6 4. The case where the 2a connection pin 514a and the 2b connection pin 514b are positioned adjacent to each other is shown in FIG, but the present disclosure is not limited thereto. When the first connector 402 and the second connector 502 are fastened to each other, the 2a connection pin 514a can be connected to the 1a connection pin 414a, and the 2b connection pin 514b can be connected to the 1b connection pin 414b. Therefore, the position of the 2a connection pin 514a can be set so that the 2a connection pin 514a can be connected to the 1a connection pin 414a, and the position of the 2b connection pin 514b can be set so that the 2b connection pin 514b can be connected to the 1b connection pin 414b.

[0102] In an embodiment, the transmission pin 221a and the reception pin 221b may be any pins not used in the sensor driver 220. In an embodiment, two pins may be additionally formed in the sensor driver 220, and the additionally formed pins may be used as the transmission pin 221a and the reception pin 221b.

[0103] At the same time, despite the fact that Figure 6 2 shows a case where the transmission pin 221a and the reception pin 221b are included in the sensor driver 220, but the present disclosure is not limited thereto. In an example, the transmission pin 221a and the reception pin 221b may be pins formed in the display driver 210. In another example, the transmission pin 221a and the reception pin 221b may be pins formed in any one of a plurality of integrated circuits connected to the panel FPC 500.

[0104] Fig. 7A and Figure 7B is a diagram showing an embodiment of a sensor driver (or integrated circuit). Fig. 7A and Figure 7B, only components for detecting a fastening defect of the connectors 402 and 502 among a plurality of components included in the sensor driver will be illustrated.

[0105] Reference Fig. 7A , the sensor driver 220 according to an embodiment of the present disclosure may include a controller 222 , a register 224 , and a switch SW.

[0106] The switch SW may be connected between the transmission pin 221 a and a reference power source Vref. The reference power source Vref may be supplied from a pin (eg, a power pin) (not shown). The switch SW may be turned on or off under the control of the controller 222 .

[0107] A threshold value corresponding to the reception voltage input from the reception pin 221b may be stored in the register 224. When the reception voltage is the threshold value or more, it may be determined that the first connector 402 and the second connector 502 are normally fastened to each other.

[0108] The controller 222 can control the on and off of the switch SW. In an example, the controller 222 can control the on and off of the switch SW during the inspection period. Figure 7B The switch SW is turned on as shown in FIG. 1 and is kept on as shown in FIG. 1 during the period other than the inspection period. Fig. 7A In addition, the controller 222 may receive a reception voltage input from the reception pin 221 b and compare the input reception voltage with a threshold value, thereby determining whether the first connector 402 and the second connector 502 have been normally fastened to each other. In an embodiment, when it is determined that the first connector 402 and the second connector 502 are not normally fastened to each other, the controller 222 may display predetermined information corresponding to the fastening defect on the panel 10.

[0109] Figure 8 and Fig. 9 1 is a diagram showing an embodiment when a connector is connected after a panel is mounted on a jig in an inspection process.

[0110] Reference Figure 8 and Fig. 9 , the panel 10 to which the panel FPC 500 is attached may be inserted into the panel mounting portion 408 in the inspection process. Thereafter, the first connector 402 and the second connector 502 may be fastened to each other. After the first connector 402 and the second connector 502 are fastened to each other, the controller 222 may determine whether the first connector 402 and the second connector 502 have been normally fastened to each other, and when it is determined that the first connector 402 and the second connector 502 have been normally fastened to each other, the inspection process is performed.

[0111] When the first connector 402 and the second connector 502 are fastened to each other, the 1a-th connection pin 414a included in the first connector 402 may be electrically connected to the 2a-th connection pin 514a, and the 1b-th connection pin 414b included in the first connector 402 may be electrically connected to the 2b-th connection pin 514b. The 1a-th connection pin 414a and the 1b-th connection pin 414b are electrically connected to each other through the connection line 412. Therefore, the 2a-th connection pin 514a and the 2b-th connection pin 514b may be electrically connected to each other.

[0112] After the first connector 402 and the second connector 502 are fastened to each other, the controller 222 turns on the switch SW, thereby supplying the voltage of the reference power supply Vref to the sending pin 221a. The voltage of the reference power supply Vref supplied to the sending pin 221a is input to the receiving pin 221b via the 2a-th connecting pin 514a, the 1a-th connecting pin 414a, the connecting line 412, the 1b-th connecting pin 414b and the 2b-th connecting pin 514b.

[0113] The controller 222 may compare the received voltage input to the receiving pin 221b with the threshold value stored in the register 224, and determine whether the fastening of the connectors 402 and 502 is defective corresponding to the comparison result. In the example, when the connectors 402 and 502 are not fastened to each other normally, the resistance between the connecting pins 414a and 514a and between the connecting pins 414b and 514b increases, and therefore, the received voltage may be a voltage lower than the threshold value. That is, when the received voltage may be a voltage lower than the threshold value, the controller 222 may determine that the connectors 402 and 502 have been abnormally fastened to each other. In other cases, the controller 222 may determine that the connectors 402 and 502 have been fastened to each other normally.

[0114] When it is determined that the connectors 402 and 502 have been properly fastened to each other, an inspection process may be performed. For example, during the inspection process, inspection data and a timing signal from the image signal provider 300 may be supplied to the sensor driver 220 and the display driver 210, and the display driver 210 may display a predetermined image corresponding to the inspection data on the panel 10. The image displayed on the panel 10 may be used to determine whether the panel 10 is defective.

[0115] Fig.10 is a flow chart illustrating an inspection process according to an embodiment of the present disclosure.

[0116] Reference Fig.10First, the first connector 402 and the second connector 502 are fastened to each other before the inspection process (step S1002). After the first connector 402 and the second connector 502 are fastened to each other, the controller 222 turns on the switch SW. When the switch SW is turned on, the voltage of the reference power supply Vref is supplied to the transmission pin 221a (step S1004).

[0117] The voltage of the reference power supply Vref supplied to the transmission pin 221a is input to the reception pin 221b via the 2a connection pin 514a, the 1a connection pin 414a, the connection line 412, the 1b connection pin 414b and the 2b connection pin 514b. The controller 222 compares the reception voltage input to the reception pin 221b with the threshold value stored in the register 224 (steps S1006 and S1008).

[0118] When the received voltage is equal to or higher than the threshold value, the controller 222 determines that the connectors 402 and 502 have been normally fastened to each other. When the controller 222 determines that the connectors 402 and 502 have been normally fastened to each other, an inspection process is performed (step S1010).

[0119] In an example, during the inspection process, the inspection data and the timing signal from the image signal provider 300 may be supplied to the display driver 210 and the sensor driver 220. In an embodiment, the display driver 210 may display a predetermined image corresponding to the inspection data on the panel 10, and determine whether the panel 10 is defective by using the image displayed on the panel 10. In an embodiment, a predetermined position is touched corresponding to the image displayed on the panel 10, and it may be determined whether the sensor driver 220 is defective using the image displayed on the panel 10 corresponding to the touched position.

[0120] When the received voltage is a voltage lower than the threshold, the controller 222 may determine that the connectors 402 and 502 have been abnormally fastened to each other. In an embodiment, the controller 222 may display a predetermined image corresponding to the fastening defect of the connectors 402 and 502 on the panel 10. Thereafter, the connectors 402 and 502 may be re-fastened to each other normally by the inspection device 2. Thereafter, steps S1002 to S1010 (or step S1012) may be repeated.

[0121] Fig.11 is a diagram illustrating a jig according to an embodiment of the present disclosure. Fig.12 is shown when the panel and Fig.11 Schematic diagram of the clamps shown in FIG. Fig.11 In, with Figure 3 Parts that are substantially the same as those shown in FIG. 1 are denoted by the same reference numerals, and their detailed description will be omitted.

[0122] Reference Fig.11 and Fig.12 , the fixture 400 a according to an embodiment of the present disclosure may include a panel mounting portion 408 , an inspection connector 406 , and a first connector 402 a .

[0123] The panel mounting part 408 may mean a region in which the panel 10 is mounted (or fixed) in the inspection process. In an example, the panel mounting part 408 may have a predetermined inner space, and the panel 10 may be mounted in the predetermined inner space in the inspection process.

[0124] The inspection connector 406 may electrically connect the image signal provider 300 and the fixture 400a to each other. To this end, a connector (not shown) of the image signal provider 300 may be fastened to the inspection connector 406, and thus, the image signal provider 300 and the fixture 400a may be electrically connected to each other.

[0125] The first connector 402a can electrically connect the panel 10 and the fixture 400a to each other. In an example, the first connector 402a can be fastened to the second connector 502 to electrically connect the panel 10 and the fixture 400a to each other. In an embodiment of the present disclosure, the first connector 402a can be directly formed in the fixture 400a. That is, Figure 3 In comparison, Fig.11 In the embodiment, the connecting FPC 410 may be removed and the first connector 402a may be directly formed in the jig 400a.

[0126] Meanwhile, the configuration of the first connection pin 414 included in the first connector 402a may be the same as Figure 4A and Figure 4B In an example, the first connector 402a may include a plurality of first connection pins 414, and a 1a-th connection pin 414a and a 1b-th connection pin 414b electrically connected to each other through a connection line 412a.

[0127] Fig.13 is a diagram illustrating a display unit and a display driver according to an embodiment of the present disclosure.

[0128] Reference Fig.13 , the display driver 210 may include a timing controller 11 and a data driver 12, and the display unit 110 may include a scan driver 13, a pixel unit 14, and an emission driver 15. However, as described above, whether the functional units are integrated in one IC or in a plurality of ICs, or mounted on the display substrate 111, may be variously configured according to the specification of the display device 1.

[0129] The timing controller 11 may receive grayscale and timing signals for each display frame period from the processor 9. The processor 9 may correspond to at least one of a graphics processing unit (GPU), a central processing unit (CPU), an application processor (AP), etc. For example, the processor 9 may be Figure 1 The application processor 30 is shown in FIG.

[0130] Grayscale can be provided by using a horizontal line as a unit in each horizontal period. A horizontal line may mean pixels PX (eg, a pixel row) connected to the same scan line.

[0131] The timing controller 11 may render grayscale to correspond to the specification of the display device 1 (or the pixel unit 14). For example, the processor 9 may provide red grayscale, green grayscale, and blue grayscale with respect to each unit point. For example, when the pixel unit 14 has an RGB stripe structure, the pixel PX may correspond to the corresponding grayscale one by one. Therefore, it may not be necessary to render grayscale. However, for example, when the pixel unit 14 has When the structure is used, adjacent unit points share a pixel PX with each other, and therefore the pixel PX may not correspond to the corresponding grayscale one by one. Therefore, it may be necessary to render the grayscale. The rendered or unrendered grayscale may be provided to the data driver 12. In addition, the timing controller 11 may provide a data control signal to the data driver 12. In addition, the timing controller 11 may provide a scan control signal to the scan driver 13.

[0132] The data driver 12 may generate data voltages (ie, data signals) to be supplied to the data lines DL1 to DLn (eg, n is a natural number greater than 1) by using grayscale and data control signals received from the timing controller 11 .

[0133] The scan driver 13 may generate a scan signal to be supplied to the scan lines SL0 to SLm (for example, m is a natural number greater than 0) by using a clock signal, a scan start signal, etc. received from the timing controller 11. The scan driver 13 may sequentially supply a scan signal having a pulse of a conduction level to the scan lines SL0 to SLm. For example, the scan driver 13 may supply a scan signal having a conduction level to the scan lines SL0 to SLm in a period corresponding to a cycle of a horizontal synchronization signal (Hsync) during an effective period of supplying grayscale. The scan driver 13 may include a scan stage configured in the form of a shift register. The scan driver 13 may generate a scan signal in a manner that, under the control of a clock signal, a scan start signal in the form of a pulse of a conduction level is sequentially transmitted to the next scan stage.

[0134] The emission driver 15 may generate an emission signal to be supplied to the emission lines EL1 to ELo (for example, o is a natural number greater than 1) by using an emission control signal (for example, a clock signal, an emission stop signal, etc.) received from the timing controller 11. The emission driver 15 may sequentially supply an emission signal having a pulse of an off level to the emission lines EL1 to ELo. The emission driver 15 may include an emission stage configured in the form of a shift register. The emission driver 15 may generate an emission signal in a manner of sequentially transmitting an emission stop signal in the form of a pulse of an off level to a next emission stage under the control of a clock signal.

[0135] The pixel unit 14 includes pixels PX. Each of the pixels PX can be connected to a corresponding data line and a corresponding scan line. For example, a pixel PXij can be connected to the i-th scan line and the j-th data line. The pixel PX can include a pixel emitting light of a first color, a pixel emitting light of a second color, and a pixel emitting light of a third color. The first color, the second color, and the third color can be different colors. For example, the first color can be one of red, green, and blue, the second color can be one of red, green, and blue except the first color, and the third color can be another color of red, green, and blue except the first color and the second color. In addition, magenta, cyan, and yellow can be used instead of red, green, and blue as the first to third colors.

[0136] Fig.14 is a diagram showing a pixel according to an embodiment of the present disclosure.

[0137] Reference Fig.14 , the pixel PXij may include transistors T1 , T2 , T3 , T4 , T5 , T6 , and T7 , a storage capacitor Cst, and a light emitting element LD.

[0138] In the following, a circuit implemented with a P-type transistor is described as an example. However, those skilled in the art can design a circuit implemented with an N-type transistor by changing the polarity of the voltage applied to the gate terminal. Similarly, those skilled in the art can design a circuit implemented with a combination of a P-type transistor and an N-type transistor. The transistor can be configured in various forms including a thin film transistor (TFT), a field effect transistor (FET), a bipolar junction transistor (BJT), etc.

[0139] A gate electrode of the first transistor T1 may be connected to the first node N1, a first electrode of the first transistor T1 may be connected to the second node N2, and a second electrode of the first transistor T1 may be connected to the third node N3. The first transistor T1 may be referred to as a driving transistor.

[0140] A gate electrode of the second transistor T2 may be connected to the scan line SLi1, a first electrode of the second transistor T2 may be connected to the data line DLj, and a second electrode of the second transistor T2 may be connected to the second node N2. The second transistor T2 may be referred to as a scan transistor.

[0141] A gate electrode of the third transistor T3 may be connected to the scan line SLi2, a first electrode of the third transistor T3 may be connected to the first node N1, and a second electrode of the third transistor T3 may be connected to the third node N3. The third transistor T3 may be referred to as a diode-connected transistor.

[0142] A gate electrode of the fourth transistor T4 may be connected to the scan line SLi3, a first electrode of the fourth transistor T4 may be connected to the first node N1, and a second electrode of the fourth transistor T4 may be connected to the initialization line INTL. The fourth transistor T4 may be referred to as a gate initialization transistor.

[0143] The gate electrode of the fifth transistor T5 may be connected to the i-th emission line ELi, the first electrode of the fifth transistor T5 may be connected to the first power line ELVDDL, and the second electrode of the fifth transistor T5 may be connected to the second node N2. The fifth transistor T5 may be referred to as an emission transistor. In another embodiment, the gate electrode of the fifth transistor T5 may be connected to an emission line different from the emission line connected to the gate electrode of the sixth transistor T6.

[0144] The gate electrode of the sixth transistor T6 may be connected to the i-th emission line ELi, the first electrode of the sixth transistor T6 may be connected to the third node N3, and the second electrode of the sixth transistor T6 may be connected to the anode of the light emitting element LD. The sixth transistor T6 may be referred to as an emission transistor. In another embodiment, the gate electrode of the sixth transistor T6 may be connected to an emission line different from the emission line connected to the gate electrode of the fifth transistor T5.

[0145] The gate electrode of the seventh transistor T7 may be connected to the scan line SLi4, the first electrode of the seventh transistor T7 may be connected to the initialization line INTL, and the second electrode of the seventh transistor T7 may be connected to the anode of the light emitting element LD. The seventh transistor T7 may be referred to as a light emitting element initialization transistor.

[0146] A first electrode of the storage capacitor Cst may be connected to the first power line ELVDDL, and a second electrode of the storage capacitor Cst may be connected to the first node N1.

[0147] The anode of the light emitting element LD can be connected to the second electrode of the sixth transistor T6, and the cathode of the light emitting element LD can be connected to the second power line ELVSSL. The light emitting element LD can be a light emitting diode. The light emitting element LD can be configured as an organic light emitting diode, an inorganic light emitting diode, a quantum dot / well light emitting diode, etc. The light emitting element LD can emit light of any one of the first color, the second color, and the third color. In addition, in this embodiment, only one light emitting element LD is provided in each pixel PX. However, in another embodiment, a plurality of light emitting elements LD can be provided in each pixel PX. The plurality of light emitting elements LD can be connected in series, in parallel, in series / parallel, etc.

[0148] A first power voltage may be applied to the first power line ELVDDL, a second power voltage may be applied to the second power line ELVSSL, and an initialization voltage may be applied to the initialization line INTL. For example, the first power voltage may be higher than the second power voltage. For example, the initialization voltage may be equal to or higher than the second power voltage. For example, the initialization voltage may correspond to a data voltage having a minimum size among data voltages of sizes that can be provided. In another example, the size of the initialization voltage may be smaller than the size of the data voltage that can be provided.

[0149] Fig.15 It is shown Fig.14 FIG. 4 is a diagram of an exemplary driving method of a pixel shown in FIG.

[0150] In the following, for ease of description, it is assumed that the scan lines SLi1, SLi2, and SLi4 correspond to the i-th scan line SLi, and the scan line SLi3 is the (i-1)th scan line SL(i-1). However, in some embodiments, the connection relationship between the scan lines SLi1, SLi2, SLi3, and SLi4 may be different. For example, the scan line SLi4 may be the (i-1)th scan line or the (i+1)th scan line.

[0151] First, an emission signal having a disconnection level (logic high level) is applied to the i-th emission line ELi, a data voltage DATA(i-1)j for the (i-1)-th pixel is applied to the data line DLj, and a scan signal having a turn-on level (logic low level) is applied to the scan line SLi3. The high / low of the logic level can be changed according to whether the transistor is P-type or N-type.

[0152] Since the scan signal having the off level is applied to the scan lines SLi1 and SLi2 , the second transistor T2 is in a turned-off state and prevents the data voltage DATA(i-1)j for the (i-1)th pixel from being input to the pixel PXij.

[0153] Since the fourth transistor T4 is in the on state, the first node N1 is connected to the initialization line INTL, thereby initializing the voltage of the first node N1. Since the emission signal with the off level is applied to the i-th emission line ELi, the transistors T5 and T6 are in the off state and prevent the light emitting element LD from emitting light unnecessarily during the application of the initialization voltage.

[0154] Next, the data voltage DATAij for the i-th pixel PXij is applied to the data line DLj, and a scan signal with a conduction level is applied to the scan lines SLi1 and SLi2. Therefore, the transistors T2, T1 and T3 are in a conductive state, and the data line DLj and the first node N1 are electrically connected to each other. Therefore, the compensation voltage obtained by subtracting the threshold voltage of the first transistor T1 from the data voltage DATAij is applied to the second electrode (i.e., the first node N1) of the storage capacitor Cst, and the storage capacitor Cst maintains a voltage corresponding to the difference between the first power voltage and the compensation voltage. This period may be referred to as a threshold voltage compensation period or a data write period.

[0155] In addition, when the scan line SLi4 is the i-th scan line SLi, the seventh transistor T7 is in the on state. Therefore, the anode of the light emitting element LD and the initialization line INTL are connected to each other, and the light emitting element LD is initialized to a charge amount corresponding to the voltage difference between the initialization voltage and the second power voltage.

[0156] Thereafter, as an emission signal having a turn-on level is applied to the i-th emission line ELi, the transistor T5 and the transistor T6 can be electrically connected to each other. Thus, a driving current path is formed, through which the first power line ELVDDL, the fifth transistor T5, the first transistor T1, the sixth transistor T6, the light emitting element LD and the second power line ELVSSL are connected to each other.

[0157] The amount of driving current flowing through the first electrode and the second electrode of the first transistor T1 is adjusted according to the voltage held in the storage capacitor Cst. The light emitting element LD emits light with brightness corresponding to the amount of driving current. The light emitting element LD emits light until an emission signal with an off level is applied to the emission line ELi.

[0158] When the emission signal has an on-level, the pixel PX receiving the corresponding emission signal may be in a display state. Therefore, the period in which the emission signal has an on-level may be referred to as an emission period EP (or emission allowed period). In addition, when the emission signal has an off-level, the pixel PX receiving the corresponding emission signal may be in a non-display state. Therefore, the period in which the emission signal has an off-level may be referred to as a non-emission period NEP (or emission prohibited period).

[0159] Fig.15 The non-emission period NEP described in is used to prevent the pixel PXij from emitting light with undesired brightness when undergoing the initialization period and the data writing period.

[0160] One or more non-emission periods NEP (eg, one frame period) may be additionally provided while maintaining data written to the pixel PXij. This is to reduce the emission period EP of the pixel PXij, thereby effectively representing low grayscale or gently blurring the motion of the image.

[0161] In the inspection apparatus and the inspection method according to the present disclosure, a contact defect of a contact portion for connecting a jig and a panel to each other can be detected, and thus the reliability of an inspection process can be ensured.

[0162] Example embodiments have been disclosed herein, and although specific terms are employed, they are used and interpreted in a general and descriptive sense only, and not for purposes of limitation. In some cases, it will be apparent to one of ordinary skill in the art at the time of filing this application that, unless otherwise specifically stated, features, characteristics, and / or elements described in conjunction with a particular embodiment may be used alone or in combination with features, characteristics, and / or elements described in conjunction with other embodiments. Therefore, it will be understood by those skilled in the art that various changes in form and detail may be made without departing from the spirit and scope of the present disclosure as set forth in the appended claims.

Claims

1. An inspection device, characterized in that: include: A fixture, comprising a first connector, the fixture being connected to an image signal provider; as well as a panel flexible printed circuit, comprising a second connector fastened to the first connector during an inspection process, the panel flexible printed circuit comprising at least one integrated circuit for driving the panel, The first connector includes a plurality of first connecting pins and a connecting wire for electrically connecting a 1a-th connecting pin and a 1b-th connecting pin among the first connecting pins.

2. The inspection device according to claim 1, characterized in that The second connector includes a plurality of second connection pins, and includes a 2a connection pin electrically connected to the 1a connection pin and a 2b connection pin electrically connected to the 1b connection pin when the second connector is fastened to the first connector.

3. The inspection device according to claim 2, characterized in that The integrated circuit detects whether the fastening of the first connector and the second connector is defective by using the connection state of the 1a-th connection pin and the 2a-th connection pin and the connection state of the 1b-th connection pin and the 2b-th connection pin in the inspection process.

4. The inspection device according to claim 3, characterized in that The integrated circuit comprises: A sending pin, electrically connected to the 2a-th connecting pin; A receiving pin electrically connected to the 2b-th connecting pin; a switch connected between a reference power supply and the transmitting pin; and A controller is configured to turn on the switch during the inspection process and turn off the switch during a period other than the inspection process.

5. The inspection device according to claim 4, characterized in that The controller determines that the fastening between the first connector and the second connector is defective when a reception voltage input to the reception pin is less than a threshold value in the inspection process.

6. The inspection device according to claim 5, characterized in that The integrated circuit also includes a register, and the threshold value is stored in the register.

7. The inspection device according to claim 5, characterized in that When it is determined that the fastening between the first connector and the second connector is defective, the integrated circuit displays a related signal on the panel.

8. The inspection device according to claim 1, characterized in that The fixture further includes a connection flexible printed circuit electrically connected to the fixture, the connection flexible printed circuit including the first connector.

9. The inspection device according to claim 1, characterized in that: The jig further includes an inspection connector for electrically connecting the image signal provider and the jig to each other.

10. The inspection device according to claim 1, characterized in that The image signal provider supplies inspection data and a timing signal to the panel flexible printed circuit during the inspection process.

Images