Substrate, quantum device thereof, chip and computer

Abstract

The utility model discloses a substrate, a quantum device thereof, a chip and a computer, and belongs to the field of quantum computer manufacturing. The substrate for manufacturing the superconducting quantum chip comprises a body and an annular bulge, wherein the body is provided with a first surface and a second surface which are oppositely distributed in the thickness direction, and the annular bulge is used for limiting a target area. Wherein the body is provided with a hole penetrating through the first surface and extending towards the second surface. An annular protrusion disposed on the first surface exposes a hole in the body, and a trajectory of the through hole on the first surface is located within a target area. The substrate can be used for manufacturing the quantum device with large-scale quantum bits, and the quality of the quantum device of the corresponding type can be improved.

Description

Technical Field

[0001] The present application belongs to the field of quantum information, especially the field of quantum computer manufacturing. In particular, the present application relates to a substrate and its quantum device, chip and computer. Background Art

[0002] As the number of quantum bits in quantum chips continues to increase, the size of quantum chips is getting larger and larger. At the same time, there are many technical difficulties in preparing large-sized quantum chips, such as high yield and high difficulty in preparation, and the size of a single chip increases, resulting in limitations on exposure equipment.

[0003] For example, when manufacturing multi-bit chips, the photoresist used in the lithography stage can contaminate devices on the chip surface; that is, there is a problem of photoresist residue. Utility Model Content

[0004] The example of the present application provides a substrate and quantum device, chip and computer thereof. The solution can be used to manufacture quantum devices with large numbers of bits in high quality. For example, it can effectively avoid the residue of photoresist in the photolithography process during micro-nano processing.

[0005] The solution of this application example is implemented through the following contents.

[0006] In a first aspect, an example of the present application discloses a substrate for manufacturing a superconducting quantum chip comprising:

[0007] A body having a first surface and a second surface opposite to each other in a thickness direction, the body being provided with a hole penetrating through the first surface and extending to the second surface; and

[0008] An annular protrusion defining a target area is disposed on the first surface and exposes the through hole, and a trajectory of the hole on the first surface is located within the target area.

[0009] According to some examples of the present application, the material of the body is sapphire or silicon;

[0010] and / or, the body is transparent;

[0011] And / or, the hole also penetrates the second surface.

[0012] According to some examples of the present application, the axial direction of the hole is consistent with the thickness direction of the body.

[0013] According to some examples of the present application, the hole is a straight hole or a stepped hole.

[0014] According to some examples of the present application, the hole is a stepped hole and is composed of a first equal diameter section and a second equal diameter section in the axial direction; along the thickness direction, the projection pattern of the first equal diameter section is located within the projection pattern of the second equal diameter section; along the thickness direction, the first equal diameter section is close to the annular protrusion, while the second equal diameter section is far away from the annular protrusion;

[0015] and / or, the annular protrusion has an inner sidewall and an outer sidewall, and the outer sidewall extends upright perpendicularly relative to the first surface;

[0016] and / or, the outer contour and the inner contour of the annular protrusion along the thickness direction are respectively circular;

[0017] And / or, projected along the thickness direction, the inner contour of the annular protrusion coincides with the contour of the hole.

[0018] In a second aspect, an example of the present application discloses a quantum device comprising:

[0019] The aforementioned substrate; and

[0020] Quantum circuits formed on a substrate.

[0021] According to some examples of the present application, the quantum circuit has at least a superconducting column penetrating into a hole in a substrate.

[0022] According to some examples of the present application, the hole is a through hole that penetrates the body, and the quantum circuit also includes a superconducting column passing through the through hole of the substrate, a first circuit arranged on the first surface, and a second circuit arranged on the second surface, and the first circuit is electrically connected to the second circuit through the superconducting column.

[0023] In a third aspect, an example of the present application discloses a quantum chip, comprising the aforementioned quantum device or substrate.

[0024] In a fourth aspect, an example of the present application discloses a quantum chip, comprising a first chip, a second chip, and a third chip which are sequentially stacked, wherein two adjacent chips are flip-chip interconnected, and the second chip is provided by the above-mentioned quantum device;

[0025] The quantum bits in the quantum chip are configured on the first chip, and the quantum circuits for reading and controlling in the quantum chip are independently configured on at least one of the first chip, the second chip and the third chip.

[0026] In a fifth aspect, an example of the present application discloses a quantum computer comprising the quantum chip described above.

[0027] In the substrate of the present application, a through hole is provided through the body, and an annular protrusion is provided on one surface (first surface) of the body. Therefore, the substrate can partition and isolate the through hole through the annular protrusion on the first surface.

[0028] Then, when the substrate is used for photolithography in the micro-nano processing process, since the annular protrusion protrudes from the first surface, when the photoresist is spin-coated on the first surface, the photoresist will not leak into the hole, and accordingly will not overflow to the second surface of the substrate through the through hole. In this way, when performing processing and manufacturing operations in the hole or on the second surface of the substrate, a sufficiently clean surface without photoresist contamination can be provided so that various components can be manufactured thereon. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] For a clearer explanation, the following briefly introduces the drawings required for the description.

[0030] Figure 1 A schematic diagram of a substrate in an example of this application;

[0031] Figure 2 for Figure 1 A schematic cross-sectional structural diagram of a substrate;

[0032] Figure 3 A schematic diagram of another substrate in an example of this application;

[0033] Figure 4 for Figure 3 The local method diagram in the middle A part;

[0034] Figure 5 This is a process flow chart of manufacturing the substrate in the example of this application.

[0035] Description of the reference numerals: 100 - substrate; 10 - body; 101 - through hole; 20 - annular protrusion; 201 - gap. DETAILED DESCRIPTION

[0036] In a superconducting quantum chip, there are structures such as superconducting quantum bits (qubits), control lines for controlling quantum bits (such as xy lines and z lines), read lines for reading the quantum states of quantum bits, couplers for coupling between quantum bits, and buses for transmitting input signals for read operations and output signals for read operations.

[0037] Moreover, these components or circuit structures are interrelated with each other, and the sensitivity of superconducting quantum bits to the environment and various signals inside the chip is considered. Therefore, when superconducting quantum bits are closely arranged in space in the chip, crosstalk will occur, causing signal distortion.

[0038] Therefore, to a certain extent, we can choose to conveniently configure components, circuits, structures, etc. by appropriately increasing the volume of the superconducting quantum chip. However, such a strategy is not always useful because the chip volume is not expected to be too large.

[0039] Furthermore, when the number of superconducting quantum bits in a superconducting quantum chip continues to increase (for example, to realize a quantum computer with large-scale bits), it is unrealistic to increase the size of the quantum chip because the refrigerator required for a superconducting quantum computer may not be able to effectively install a large quantum chip.

[0040] In order to solve the size problem of multi-bit quantum chips during the manufacturing process, many methods are used, such as flip-chip technology, multi-layer wiring technology, and TSV through-hole technology.

[0041] In practice, the inventors of the present application have found that the current TSV through-hole process has some problems.

[0042] Micro-nano processing technology is used in the process of manufacturing quantum chips, and multiple process steps are related to each other. Specifically, in the use of TSV technology, after the TSV sample is prepared, subsequent photolithography, coating, etching and other processes may be required. Therefore, in the subsequent photolithography process, due to the presence of holes on the chip (produced by TSV process manufacturing), the photoresist will penetrate from the surface of the chip into the holes, and even penetrate to the back of the chip.

[0043] The penetration of photoresist in the hole may make it difficult to manufacture a certain structure in the hole, or the quality and performance of the manufactured structure may not meet the requirements. And such a problem also exists for the penetration to the back side, and may even be more serious.

[0044] For such a problem, a cleaning process can be performed when photoresist leakage occurs. In actual implementation, the cleaning process may significantly increase the complexity of the process or excessively extend the process flow.

[0045] In the present application example, the inventor has chosen another solution to improve or even solve the problem. The solution can achieve a better effect of preventing photoresist leakage, so that the photoresist spin coating operation can be performed more freely without worrying about the occurrence of photoresist leakage.

[0046] For example, see Figures 1 to 4 The present application discloses a substrate 100 for manufacturing a superconducting quantum chip. It should be noted that the substrate 100 in the example of the present application can also be used to manufacture related components in the field of non-superconducting quantum computers. For example, various semiconductor chips in integrated circuits, such as processors.

[0047] like Figure 1 As shown, the substrate 100 includes a body 10 and an annular protrusion 20. The body 10 and the annular protrusion 20 can be an integral structure, or the body 10 and the annular protrusion 20 can be two parts manufactured in different steps or process conditions and combined together. The following will mainly be described by taking the body 10 and the annular protrusion 20 as an integral structure as an example.

[0048] In terms of material, when the body 10 and the annular protrusion 20 are an integral structure, the two can have the same material. On the contrary, if the body 10 and the annular protrusion 20 are not an integral structure, they can be configured with different materials according to actual needs.

[0049] Therefore, in short, the material of the substrate 100 can be selected as various inappropriate materials according to different usage scenarios. As a specific example, the material of the body 10 in the substrate 100 can be sapphire or silicon; in other examples, it can also be silicon carbide, gallium nitride, etc.

[0050] The body 10 is the main part of the substrate 100 , and the annular protrusion 20 can be described as an auxiliary structure on the body 10 .

[0051] Taking a silicon wafer as an example, the shape of the body 10 is a circular structure; or, if it is really necessary, the body 10 can also be designed into other shapes, such as rectangles or polygons. For example, for some substrates with broken corners or defects in local areas, these "problematic" areas are removed or cut off, and at this time, there may be some bodies 10 with special shapes.

[0052] For the convenience of description, the body 10 in the substrate 100 may be defined as having a first surface and a second surface that are oppositely distributed in the thickness direction. For example, the first surface and the second surface may also be described as a front surface and a back surface, or a top surface and a bottom surface.

[0053] Furthermore, the body 10 is also provided with a hole penetrating through the first surface and extending toward the second surface.

[0054] Furthermore, in some examples, the hole is implemented as a through hole 101, such as Figure 2 As shown. Therefore, it can be understood that the through hole 101 runs through the body 10, that is, the hole penetrates the first surface and also penetrates the second surface. For example, in some examples, the through hole 101 can be implemented as a TSV (Through Silicon Via) solution. The following mainly describes the solution involving the through hole 101; however, it should be pointed out that, in the absence of contradiction, the corresponding description is also applicable to the solution of non-through hole 101 (or blind hole).

[0055] For the through hole 101 , different definitions can be selected according to different examples.

[0056] For example, regarding the shape of the through hole 101, the through hole 101 may be a straight through hole 101. Therefore, it can be understood that in the extension trajectory of the through hole 101 from the first surface to the second surface, the cross-sectional graph of the through hole 101 at any position is the same (shape and size, such as a circle with the same diameter).

[0057] Alternatively, in some other examples, the shape of the through hole 101 may also be a stepped hole. Therefore, it can be understood that in the extension trajectory of the through hole 101 from the first surface to the second surface, the cross-sectional graph of the through hole 101 at any position is different (one or both of the shape and size are different, such as circles with different diameters).

[0058] For a stepped hole, the through hole 101 is a stepped hole and is composed of a first equal-diameter section and a second equal-diameter section in the axial direction; therefore, the through hole 101 may have a substructure of two sections. Alternatively, in other examples, the through hole 101 may also have a substructure of more than three sections.

[0059] The through hole 101 constructed in two sections can be defined in the thickness direction, and the projection pattern of the first equal diameter section is located within the projection pattern of the second equal diameter section. For example, for a cylindrical through hole 101, it can be understood that the diameter of the first equal diameter section is smaller than the diameter of the second equal diameter section. Among them, the first equal diameter section can be closer to the first surface (that is, farther away from the second surface), and the second equal diameter section is closer to the second surface (that is, farther away from the first surface). For the structure of the annular protrusion 20 in the substrate 100 that will be discussed in detail later, it can be defined that the first equal diameter section is close to the annular protrusion 20 along the thickness direction, and the second equal diameter section is far away from the annular protrusion 20. That is, the small diameter is closer to the first surface, and the large diameter is closer to the second surface.

[0060] Taking the straight hole 101 and the stepped hole as examples, the axial direction of the through hole 101 may be consistent with the thickness direction of the body 10. Therefore, the axial direction of the through hole 101 is parallel to the thickness direction of the body 10. Alternatively, the axial direction of the through hole 101 is not parallel to the thickness direction of the body 10, but has a certain inclination angle.

[0061] The above content mainly describes the main body 10 of the substrate 100 , and now turns to the discussion of the annular protrusion 20 .

[0062] In the substrate 100, the annular protrusion 20 is arranged on the first surface and exposes the through hole 101. It can be known that the annular protrusion 20 defines a target area. Therefore, the trajectory of the through hole 101 on the first surface is located in the target area. That is, the inside of the through hole 101 can be entered through the annular protrusion 20.

[0063] The above discussion discusses the situation where the track of the through hole 101 on the first surface is located in the target area. In some more detailed discussions, the position of the annular protrusion 20 may also be designed in other ways.

[0064] Therefore, the annular protrusion 20 can be defined as having an inner side wall and an outer side wall. Based on this, it can be defined that the inner side wall is aligned / coplanar with the inner wall of the through hole 101. For example, the through hole 101 is a first cylindrical hole, and the inner side wall of the annular protrusion 20 also defines a second cylindrical hole - therefore, the outer contour and inner contour of the annular protrusion 20 along the thickness direction are circular respectively; and the first cylindrical hole and the second cylindrical hole are coaxial and have the same diameter. Then it can be understood that, projected along the thickness direction, the inner contour of the annular protrusion 20 coincides with the contour of the through hole 101.

[0065] In other examples, it can also be considered that the inner contour of the annular protrusion 20 does not coincide with the contour of the through hole 101 when projected in the thickness direction. For example, the inner contour is outside the contour of the through hole 101; that is, in some examples, it can be expressed that the inner diameter of the annular protrusion 20 is greater than the diameter of the through hole 101; therefore, there is a gap 201 between the inner wall of the annular protrusion 20 and the contour of the through hole on the first surface, such as Figure 3 and Figure 4 For another example, the inner contour is inside the contour of the through hole 101 ; that is, in some examples, it can be expressed that the inner diameter of the annular protrusion 20 is smaller than the diameter of the through hole 101 .

[0066] In addition, the outer side wall of the annular protrusion 20 can also be designed so that it has a specified structure or orientation. For example, the outer side wall can be designed to extend vertically relative to the first surface. Alternatively, the outer side wall of the annular protrusion 20 can also be a sloped portion structure. Exemplarily, the annular protrusion 20 is constructed as a trapezoidal structure.

[0067] In order to facilitate those skilled in the art to implement the solution of the present application example, the manufacturing process of the substrate 100 is described as above.

[0068] Illustratively, a method for manufacturing the substrate 100 may be implemented in the following manner.

[0069] Take double-sided polished silicon wafer as an example, see Figure 5 .

[0070] 1. Use a 375μm thick double-sided polished (DSP) silicon wafer. Coat the front side of the silicon wafer with S1813 photoresist (see Figure 5The photoresist in Figure I has a coating thickness of about 2 μm. The photoresist mask left after exposure (optical exposure, electron beam exposure) and development of S1813 photoresist is about 60 μm cylindrical; see Figure 5 Figures I and II in .

[0071] 2. Perform silicon etching process on the area not covered by photoresist. The etching thickness is about 1μm, and the pattern structure left after washing is a cylinder with a diameter of 60μm and a height of 1μm; see Figure 5 Figure III in .

[0072] 3. Prepare 4μm silicon dioxide on the front side using electron beam evaporation (see Figure 5 The V in the figure is SiO2), and a 100nmAl film is prepared on the back by electron beam evaporation as an etching stop layer ( Figure 5 not shown).

[0073] 4. Coat Al4620 photoresist on the surface / front side of the silicon wafer (see Figure 5 The photoresist in Figure V is coated with a thickness of about 2 μm. The Al4620 photoresist is exposed and developed to prepare a mask having a pattern of openings with a diameter of about 50 μm on the aforementioned silicon cylinder with a height of 1 μm and a diameter of 60 μm.

[0074] 5. Use CHF3 (trifluoromethane) to remove the 4 μm thick silicon dioxide layer at the 50 μm diameter opening of the mask to prepare a SiO2 hard mask, and the hard mask exposes the front side of the silicon wafer; refer to Figure 5 VI diagram in .

[0075] 6. Use SF6 (sulfur hexafluoride) and C4F8 (octafluoride) to perform deep silicon etching to etch through the silicon wafer; see Figure 5 Figure VII in .

[0076] 7. Use etching solution to remove the back Al film.

[0077] 8. Etch away the hard mask to obtain Figure 5 The structure shown in Figure VIII.

[0078] It should be pointed out that the materials, sizes and reagent compositions of the various materials used in the above examples are only given as examples and are not necessarily limited; when implementing the solutions of the examples in this application, they can be adjusted as needed according to the needs of the corresponding scenarios.

[0079] Furthermore, the sequence given in the process method of the above example is not restrictive, and in practice, the sequence of the execution actions in the process can be selectively adjusted according to specific circumstances when implementing the solution. For example, in the above process description, the operation of etching away the hard mask can be performed first, and then the operation of removing the back Al film using an etching solution can be performed.

[0080] When the photoresist is spin-coated on the first surface of the main body 10 of the substrate 100 manufactured by the above process in the subsequent photolithography process, the photoresist cannot flow into the through hole 101 set in the main body 10 of the substrate 100 due to the limitation of the annular protrusion 20 on the substrate 100, and correspondingly will not flow to the second surface of the main body 10 of the substrate 100.

[0081] Therefore, when the substrate 100 is used to manufacture other circuits and components in one or more of the first surface, the second surface and the through hole 101, the adverse effects caused by the overflowed and uncleaned photoresist can be avoided.

[0082] It should be noted that when implementing the above process, it may be necessary to deposit one or more materials - such as superconductors, dielectrics and / or metals.

[0083] Depending on the materials chosen, these materials may be deposited using deposition processes such as chemical vapor deposition, physical vapor deposition (eg, evaporation or sputtering), or epitaxial techniques, among other deposition processes.

[0084] Exemplary deposition processes include ion beam assisted deposition (IBAD), vacuum evaporation coating (Evaporation), molecular beam epitaxy (MBE), pulsed laser deposition (PLD), chemical vapor deposition (CVD), sol-gel and magnetron sputtering coating (Magnetron 25Sputtering), etc.

[0085] Further, it may also be necessary to remove one or more materials from the device during the manufacturing process. It depends on the material to be removed. As an example, the process of removing the material may include, for example, a wet etching technique, a dry etching technique, or a lift-off process. It is understood that known lithographic techniques (e.g., photolithography or electron beam exposure) may also be selectively used in the process to pattern the materials forming the circuit elements described herein.

[0086] Furthermore, for the sake of brevity, conventional techniques related to semiconductor and / or superconducting device and integrated circuit (IC) manufacturing may or may not be described in detail herein.

[0087] Therefore, the various tasks and process steps described herein may be incorporated into a more comprehensive procedure or process having additional steps or functionality not described in detail herein. And in particular, the various steps in the manufacture of semiconductor and / or superconducting devices and semiconductor / superconductor-based ICs are well known, so for the sake of brevity, many conventional steps will only be briefly mentioned here or will be omitted entirely without providing well-known process details.

[0088] The above description has fully explained the substrate 100 in the example of the present application, and its application will be explained below.

[0089] In some examples, a quantum device is disclosed, which includes the aforementioned substrate 100 and a quantum circuit.

[0090] Optionally, the quantum circuit is formed on the substrate 100 and may have at least a superconducting column penetrating through the through hole 101 of the substrate 100. Alternatively, further, the quantum circuit may also include a first circuit and a second circuit. The first circuit is arranged on the first surface, and the second circuit is arranged on the second surface. The first circuit is electrically connected to the second circuit through the superconducting column.

[0091] The first circuit and the second circuit may be circuits for realizing electrical connection between two structures, or may be intentionally designed functional components.

[0092] For example, in the example of a superconducting quantum chip, the first line and the second line can be a read bus used for performing a read operation on a quantum bit. The read bus is arranged in a three-dimensional manner and includes two sections. One section is arranged as a first line on the first surface of the substrate 100, and the second line is arranged on the second surface of the substrate 100. The two sections are connected through the superconducting column in the through hole 101 to transmit signals.

[0093] In other examples, the quantum circuit may also include other structures in the superconducting quantum chip, such as xy lines and z lines for controlling quantum bits, and a reading resonator for reading. Or more generally, in some examples, the quantum circuit may be specifically implemented as various structures constructed according to functions in the form of coplanar waveguides, such as capacitor plates.

[0094] In terms of materials, quantum circuits can be formed using superconductor materials that exhibit superconducting properties at a temperature equal to or lower than a critical temperature, such as about 10 millikelvin to 100 millikelvin (mK). In a specific example, the materials used to make quantum circuits include, but are not limited to, aluminum, niobium, tantalum, or titanium nitride. In specific implementations, the materials may not be limited to the above materials. When using other material systems to make quantum bits, various materials that exhibit superconducting properties at a temperature equal to or lower than the critical temperature can be used to form the quantum circuit.

[0095] Based on the above quantum device, a quantum chip is also disclosed in an example of the present application, and the quantum chip includes the above substrate 100 or quantum device.

[0096] In other examples, a quantum chip is also disclosed in the examples of the present application.

[0097] The quantum chip includes a first chip, a second chip (manufactured on the basis of the aforementioned substrate 100, for example, the quantum device mentioned above) and a third chip. Moreover, the first chip, the second chip and the third chip are stacked in sequence. Therefore, it can be known that the quantum chip is a three-dimensional packaged chip. Accordingly, based on this, the first chip can be described as a top chip, the second chip is set as an intermediate chip, and the third chip is set as a bottom chip.

[0098] In a quantum chip, two adjacent chips are flip-connected; that is, the first chip is flip-connected with the second chip, and the second chip is also flip-connected with the third chip. In different examples, the flip-connected structure can be implemented in different ways.

[0099] When the flip-chip interconnection can be implemented with various metal materials, such as connecting two adjacent chips at both ends of a copper column. It can be used to provide physical functions, such as supporting two layers of chips. Alternatively, for quantum chips in a superconducting system, the flip-chip interconnection can be implemented with various superconducting metal materials, such as indium columns. The use of indium columns can not only play a physical function such as supporting the upper and lower chips of the indium column, but also can be used to connect the component structures distributed in the upper and lower chips to transmit signals.

[0100] When flip-chip interconnect structures such as indium pillars are used to transmit signals in superconducting quantum chips, their dimensions, such as diameter, may be limited to be relatively small. In some practices, it has been found that in superconducting quantum chips, indium pillars can also be used as noise shielding structures, for example, by placing them around superconducting quantum bits to suppress the adverse interference of crosstalk signals on the quantum bits.

[0101] In addition to the above implementation, the quantum bits, read lines, control lines, etc. in the quantum chip can be configured in different structures according to the design requirements. For example, the quantum bits are configured in the first chip. The quantum circuits for reading and controlling in the quantum chip are independently configured in at least one of the first chip, the second chip and the third chip. The quantum bits can be configured in the second chip, and the control lines or read lines are coupled with the bits in the same plane or in different planes, and then part of the flip-chip interconnection structure or TSV is used independently or in combination to guide the lines to the first chip or the third chip.

[0102] After obtaining the above-mentioned quantum chip, a quantum computer can be realized based on its manufacturing. Therefore, the quantum computer includes a quantum chip, a control and reading system, a signal system, etc.

[0103] It is worth noting that the substrate 100 used in the above quantum computer, quantum chip, and quantum device is similar in structure to the substrate 100 discussed above, and has the same beneficial effects as the above quantum chip embodiment, so it will not be described in detail. For technical details not specifically disclosed in other parts, those skilled in the art should refer to the description of the above substrate 100 for understanding, and will not be described here in order to save space.

[0104] The embodiments described above with reference to the accompanying drawings are exemplary and are only used to explain the present application, but should not be construed as limiting the present application.

[0105] To make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the foregoing describes one or more embodiments with reference to the accompanying drawings. Wherein, similar reference numerals throughout the text are used to refer to similar components. In the above description, for the purpose of explanation, many specific details are set forth in order to provide a more thorough understanding of one or more embodiments. However, it is obvious that in various cases, one or more embodiments can be practiced without these specific details, and each embodiment can be combined with each other and referenced to each other without contradiction.

[0106] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0107] In addition, it should be understood that when a layer (or film), region, pattern or structure is referred to as being "on" a substrate, layer (or film), region and / or pattern, it can be directly on another layer or substrate, and / or there can also be intervening layers. In addition, it should be understood that when a layer is referred to as being "under" another layer, it can be directly under another layer, and / or there can also be one or more intervening layers. In addition, references to being "on" and "under" each layer can be made based on the accompanying drawings.

[0108] The above describes in detail the structure, features and effects of the present application based on the embodiments shown in the drawings. The above is only a preferred embodiment of the present application, but the present application does not limit the scope of implementation to what is shown in the drawings. Any changes made in accordance with the concept of the present application, or modifications to equivalent embodiments with equivalent changes, which still do not exceed the spirit covered by the description and drawings, should be within the protection scope of the present application.

Claims

1. A substrate for manufacturing a superconducting quantum chip, characterized in that: The substrate comprises: A body having a first surface and a second surface opposite to each other in a thickness direction, wherein the body is provided with a hole penetrating through the first surface and extending to the second surface; and An annular protrusion defining a target area is disposed on the first surface and exposes the hole, and a trajectory of the hole on the first surface is located within the target area.

2. The substrate according to claim 1, characterized in that The material of the body is sapphire or silicon; and / or, the body is transparent; And / or, the hole also penetrates the second surface.

3. The substrate according to claim 1, characterized in that The axial direction of the hole is consistent with the thickness direction of the body.

4. The substrate according to claim 1 or 3, characterized in that The hole is a straight through hole or a stepped hole.

5. The substrate according to claim 1, characterized in that The hole is a stepped hole, and is composed of a first equal diameter section and a second equal diameter section in the axial direction; along the thickness direction, the projection pattern of the first equal diameter section is located within the projection pattern of the second equal diameter section; along the thickness direction, the first equal diameter section is close to the annular protrusion, while the second equal diameter section is far away from the annular protrusion; And / or, the annular protrusion has an inner sidewall and an outer sidewall, and the outer sidewall extends upright perpendicularly relative to the first surface; and / or, the outer contour and the inner contour of the annular protrusion along the thickness direction are respectively circular; And / or, projected along the thickness direction, the inner contour of the annular protrusion coincides with the contour of the hole.

6. A quantum device, characterized in that: include: The substrate according to any one of claims 1 to 5; as well as A quantum circuit is formed on the substrate.

7. The quantum device according to claim 6, characterized in that The quantum circuit has at least a superconducting column penetrating a hole in a substrate; Alternatively, the hole is a through hole that penetrates the body, and the quantum circuit includes a superconducting column passing through the through hole of the substrate, a first circuit arranged on the first surface, and a second circuit arranged on the second surface, and the first circuit is electrically connected to the second circuit through the superconducting column.

8. A quantum chip, characterized in that: Comprising the substrate according to any one of claims 1 to 5, or the quantum device according to claim 6 or 7.

9. A quantum chip, characterized in that: It comprises a first chip, a second chip and a third chip which are stacked in sequence, wherein two adjacent chips are flip-chip interconnected, and the second chip is provided by the quantum device according to claim 7; The quantum bits in the quantum chip are configured on the first chip, and the quantum circuits for reading and controlling in the quantum chip are independently configured on at least one of the first chip, the second chip and the third chip.

10. A quantum computer, characterized in that: Comprising the quantum chip as described in claim 8 or 9.

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