Circuit board

Abstract

The utility model provides a circuit board, and belongs to the technical field of PCB via hole impedance optimization and crosstalk resistance, the circuit board comprises a substrate and a plurality of anti-pads, the substrate is provided with a first surface and a second surface, and one surface of the substrate is provided with a plurality of mutually spaced anti-pad areas. Two anti-pad areas are arranged on the substrate, each anti-pad area is provided with two signal holes penetrating through the substrate, each signal hole is provided with a pad on the other surface of the substrate, the pad is used for being electrically connected with a lead arranged on the substrate, and a backflow hole penetrating through the substrate is arranged outside each anti-pad area. Through the plurality of anti-pad areas arranged on the substrate, the capacitance of the signal hole is increased, so that the impedance of the signal hole is reduced, and the signal quality is effectively improved. The backflow holes are arranged around the signal holes, so that mutual interference among signals is reduced, the anti-interference capability of the signals is effectively enhanced, and the integrity of the signals is ensured.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of PCB technology, and in particular to a circuit board. Background Art

[0002] In server application scenarios, high-density connectors are a technology used to produce printed circuit boards (PCBs). They have the characteristics of high density, high performance, small pitch, and high speed. They can effectively increase the line density on PCBs and improve signal transmission efficiency.

[0003] However, since the vias used on the PCB are large and the inductance of the vias is very low, the signal is more susceptible to interference during transmission and the signal transmission speed is slowed down. At present, the PIN arrangement of high-density connectors is basically matrix-type, and the distance between PINs is very close, which is easy to increase crosstalk. If the signal holes on the PCB are too close, the crosstalk will be further increased. In addition, when designing the PCB, there will be long traces parallel to the fiberglass cloth, which will produce a fiberglass effect, resulting in a decrease in the integrity of the circuit board's signal, an increase in the bit error rate, and even the possibility of the circuit board not working properly. Utility Model Content

[0004] The embodiment of the present application provides a circuit board, which avoids signal failure caused by excessive via impedance and crosstalk, ensures the integrity of line signals, and reasonably utilizes the routing space on the circuit board to avoid cost waste caused by design.

[0005] The embodiments of the present application provide the following technical solutions to solve the above technical problems:

[0006] An embodiment of the present application provides a circuit board, including a substrate and a plurality of anti-pads, wherein the substrate has a first surface and a second surface, and one of the surfaces of the substrate is provided with a plurality of anti-pad areas spaced apart from each other; each of the anti-pad areas is provided with two signal holes penetrating the substrate, and each of the signal holes is provided with a pad on the other surface of the substrate, and the pad is used to be electrically connected to a lead arranged on the substrate; and each of the anti-pad areas is provided with a reflow hole penetrating the first surface and the second surface of the substrate.

[0007] Beneficial effects of the embodiments of the present application: The circuit board provided in the embodiments of the present application includes a substrate and a plurality of anti-pads, wherein the substrate has a first surface and a second surface, and a plurality of anti-pad areas spaced apart from each other are provided on one surface of the substrate. Two signal holes penetrating the substrate are provided on each anti-pad area, and each signal hole is provided with a pad on the other surface of the substrate, and the pad is used to be electrically connected to a lead provided on the substrate, and a reflow hole penetrating the substrate is provided outside each anti-pad area. By providing a plurality of anti-pad areas on one side of the substrate, the capacitance of the signal hole is increased, thereby reducing the impedance of the signal hole, so as to effectively reduce the reflection and loss of the signal during the transmission of the signal hole, and improve the quality of the signal. By providing a plurality of reflow holes around the signal hole, the mutual interference between signals is reduced, the anti-interference ability of the signal is effectively enhanced, and the integrity of the signal is ensured.

[0008] In a possible implementation manner, a size of each anti-pad region along the first direction is a first size, and a size along the second direction is a second size;

[0009] The first direction is the length direction of the anti-pad area, and the second direction is the width direction of the anti-pad area;

[0010] The first direction is perpendicular to the second direction.

[0011] In a possible implementation manner, the return holes are arranged around the signal hole, and the number of the return holes is at most five.

[0012] In a possible implementation manner, the number of the reflow holes is five, three reflow holes are evenly spaced apart at the lower end of the anti-pad area, and two reflow holes are opened at the upper end of the anti-pad area;

[0013] The reflow hole at the upper end of the anti-pad area is symmetrical to the reflow holes at both ends of the three reflow holes at the lower end of the anti-pad area.

[0014] In a possible implementation manner, it further includes a plurality of groups of leads, each group of the leads includes two signal lines, one end of the signal line is electrically connected to the pad on the signal hole, and the other end of the signal line is electrically connected to the connector;

[0015] The two signal lines have a first bending section and a second bending section, and the first bending section and the second bending section are arc-shaped.

[0016] In a possible implementation manner, the first bending section is a bend formed by the signal line being electrically connected to the pad on the signal hole and leading out of the anti-pad projection area;

[0017] The second bending section is a bend formed by the signal line relative to the substrate, so as to avoid the influence of glass fiber effect on the signal line.

[0018] In a possible implementation manner, the signal line includes a plurality of straight line segments and broken line segments, and the straight line segments are connected to the broken line segments in an arc shape;

[0019] The signal line leads out of the anti-pad projection area and forms a first angle with the straight line segment;

[0020] The folded line segment and the extension line of the straight line segment form a second angle, and the second angle is between 10° and 45°.

[0021] In a possible embodiment, each of the anti-pad areas has a hypotenuse and a side edge, the hypotenuse and the extension line of the side edge form a third angle, the third angles of two adjacent anti-pad areas form a cut-angle area, and a partial area of ​​the second bending section of the signal line is located within the cut-angle area.

[0022] In a possible implementation manner, each of the anti-pad regions further has a plurality of arc edges, and each of the arc edges is spaced apart from the reflow hole.

[0023] In a possible implementation manner, a grounding hole penetrating the substrate is further provided on the left side outside each anti-pad region;

[0024] The grounding hole is tangent to or separated from a side edge of the anti-pad area.

[0025] In addition to the technical problems solved by the present application, the technical features that constitute the technical solutions, and the beneficial effects brought about by the technical features of these technical solutions described above, other technical problems that can be solved by the circuit board provided by the present application, other technical features included in the technical solutions, and the beneficial effects brought about by these technical features will be further described in detail in the specific implementation methods. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments of the present application or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only part of the embodiments of the present application. These drawings and text descriptions are not intended to limit the scope of the concept of the present application in any way, but to illustrate the concept of the present application for those skilled in the art by referring to specific embodiments. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0027] Figure 1 A schematic diagram of a circuit board structure is provided for an embodiment of the present application;

[0028] Figure 2 A schematic diagram of the anti-pad structure of a circuit board is provided for an embodiment of the present application;

[0029] Figure 3 A schematic diagram of anti-pad routing of a circuit board is provided for an embodiment of the present application;

[0030] Figure 4 A schematic diagram of signal lines of a circuit board is provided for an embodiment of the present application;

[0031] Figure 5 A schematic diagram of five reflow holes being arranged around the anti-pad of a circuit board is provided for an embodiment of the present application;

[0032] Figure 6 Simulation results for optimizing the via impedance of the anti-pad hollowed out on the circuit board;

[0033] Figure 7 Simulation results for increasing the via impedance optimization of the anti-pad on the PCB;

[0034] Figure 8 The far-end crosstalk simulation results of setting two return holes for the circuit board;

[0035] Fig. 9 The near-end crosstalk simulation results of setting two return holes for the circuit board;

[0036] Fig.10 The FEXT simulation results of setting five return holes for the circuit board;

[0037] Fig.11 The near-end crosstalk simulation results for a circuit board with five return vias.

[0038] Description of reference numerals:

[0039] 100, substrate; 200, anti-pad; 300, signal hole; 400, pad; 500, lead; 600, reflow hole; 700, ground hole;

[0040] 110. Page 1;

[0041] 210, bevel edge; 220, side edge; 230, arc edge; 240, chamfered area; 250, third angle;

[0042] 510, signal line; 520, first bending section; 530, second bending section; 540, first angle; 550, second angle;

[0043] 511. Straight line segment; 512. Broken line segment. DETAILED DESCRIPTION

[0044] One of the main disadvantages of the existing technology is that the via impedance of the PCB is large and prone to crosstalk. If the via size is too large, the impedance during signal transmission will increase, affecting the signal quality and transmission speed. In addition, the structure and layout around the via will also interfere with and crosstalk the signal, resulting in signal distortion and unstable transmission.

[0045] In view of this, the embodiment of the present application is provided with a substrate and a plurality of anti-pads, wherein the substrate has a first surface and a second surface, and a plurality of anti-pad areas spaced apart from each other are provided on one surface of the substrate. Two signal holes penetrating the substrate are provided on each anti-pad area, and each signal hole is provided with a pad on the other surface of the substrate, and the pad is used to be electrically connected to the lead provided on the substrate, and a reflow hole penetrating the first surface and the second surface of the substrate is provided outside each anti-pad area. The capacitance of the signal hole is increased by the anti-pad, thereby reducing the impedance of the signal hole and improving the quality of signal transmission. The multiple reflow holes provided around the signal hole can reduce mutual interference between signals, effectively enhance the anti-crosstalk capability of the signal, and ensure the integrity of the signal.

[0046] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0047] Figure 1 A schematic diagram of a circuit board structure is provided for an embodiment of the present application. Figure 2 A schematic diagram of the anti-pad structure of a circuit board is provided for an embodiment of the present application. Figure 3 A schematic diagram of the anti-pad routing of a circuit board is provided for an embodiment of the present application. Figure 4 A schematic diagram of signal lines of a circuit board is provided for an embodiment of the present application. Figure 5 A schematic diagram of five reflow holes arranged around the anti-pad of a circuit board is provided for an embodiment of the present application. Figure 6 The simulation results of optimizing the via impedance of the anti-pad hollowed out on the circuit board. Figure 7 The simulation results of optimizing the via impedance of the circuit board to increase the anti-pad are Figure 8 The far-end crosstalk simulation results of setting two return holes for the circuit board. Fig. 9 The near-end crosstalk simulation results of setting two return holes for the circuit board. Fig.10 The FEXT simulation results of setting five return holes for the circuit board. Fig.11 The near-end crosstalk simulation results for a circuit board with five return vias.

[0048] The circuit board provided in the embodiment of the present application includes a substrate 100 having a first surface 110 and a second surface (not shown in the figure), and a plurality of mutually spaced anti-pad 200 areas are provided on one side of the substrate 100. Two signal holes 300 penetrating the first and second surfaces of the substrate 100 are provided on each anti-pad 200 area, and each signal hole 300 is provided with a pad 400 on the other surface of the substrate 100, and the pad 400 is used to be electrically connected to a lead 500 provided on the substrate 100. A signal hole 300 penetrating the substrate 100 is also provided outside each anti-pad 200 area.

[0049] The anti-pad 200 may be disposed on any side of the substrate 100. In the embodiment of the present application, the second side is taken as an example, and the pad 400 is disposed on the first side. Figure 1 As shown, the anti-pad 200 is projected onto the first surface 110 of the substrate 100 and is represented by a dotted line. The anti-pad 200 areas arranged on the second surface of the substrate 100 are spaced apart from each other and are independent of each other to prevent mutual interference between signals and enhance the transmission quality of the signal. It should be noted that the anti-pad 200 is a metallization processing technology, which increases the capacitance of the signal hole 300 and reduces the impedance of the signal hole 300 by arranging a circle of metallization layers connected to the ground or power supply around the signal hole 300, thereby optimizing the impedance of the via. The metallization layer in the anti-pad 200 area can be copper, but is not limited to copper, and can also be other metal materials, such as aluminum, nickel, etc.

[0050] The signal hole 300 is a through hole, which is a via hole that runs through the entire circuit board. It should be noted that the signal hole 300 can be of any shape, such as a circle or a square. The embodiment of the present application specifically takes a circle as an example. Figure 1 and Figure 2 A pad 400 is also provided on the top of each signal hole 300, that is, on the first surface 110 of the substrate 100, and the pad 400 is electrically connected to a lead 500 provided on the substrate 100. It should be noted that the lead 500 is a metal wire for transmitting signals, and the size of the pad 400 is larger than that of the signal hole 300.

[0051] In some embodiments of the present application, the size of each anti-pad 200 region along the first direction is a first size, and the size along the second direction is a second size. The first direction is the length direction of the anti-pad region 200, and the second direction is the width direction of the anti-pad region, and the first direction is perpendicular to the second direction.

[0052] For example, Figure 2 and Figure 3As shown, the first direction of the anti-pad 200 area is along the X-axis direction, and the second direction of the pad 200 area is along the Y-axis direction. The limit length of the anti-pad 200 is the maximum distance between two adjacent ground holes 700. The maximum value of the first dimension of the anti-pad 200 area in the embodiment of the present application is 125 mil, and the maximum value of the second dimension is 56 mil. It should be noted that the first dimension and the second dimension of the anti-pad 200 area are not fixed values, and can be determined according to the line width and spacing of the signal line 510.

[0053] Through simulation, such as Figure 6 As shown in FIG. 1 , the anti-pad 200 can reduce the capacitance of the signal hole 300. Figure 7 As shown, increasing the area of ​​the anti-pad 200 further reduces the capacitance of the signal hole 300, thereby optimizing the via impedance. It should be noted that the anti-pad 200 can increase the area of ​​the ground layer or power layer around the signal hole 300, thereby increasing the capacitance between the signal and the ground or power supply, effectively reducing the capacitance of the signal hole 300, thereby reducing the reflection of the signal.

[0054] In some embodiments of the present application, Figure 2 and Figure 5 As shown, the return holes 600 are arranged around the signal holes 300, and there are at most five return holes 600. Arranging the return holes 600 around the signal holes 300 can suppress the electric field radiation between the signal holes 300 and reduce the mutual interference between the signals.

[0055] Through simulation, such as Figure 8 and Fig. 9 As shown, the far-end crosstalk of setting two return holes 600 is -46.083, and the near-end crosstalk is -50.752. Setting two return holes 600 can meet the far-end and near-end anti-crosstalk requirements of high-speed signals. By increasing the number of return holes 600, the far-end and near-end anti-crosstalk effect of high-speed signals can be enhanced. Fig.10 and Fig.11 As shown, the far-end crosstalk of setting five return holes 600 is -50.187, and the near-end crosstalk is -66.350. It should be noted that after the area of ​​the anti-pad 200 is enlarged, the return holes 600 and the anti-pad 200 do not affect each other. The return holes 600 are provided with a complete hole ring on the substrate 100 to ensure that the current of the return holes 600 can flow smoothly, ensuring the stability and reliability of the substrate 100.

[0056] In some embodiments of the present application, Figure 2 As shown, the number of return holes 600 arranged outside each anti-pad 200 area is three, and the return holes 600 are arranged at equal intervals outside the lower end of the anti-pad 200 area. The number of return holes 600 arranged outside each anti-pad 200 area is five, for example, Figure 5As shown, three return holes 600 are arranged at equal intervals at the lower end of the anti-pad 200 area, and another two return holes 600 are opened at the upper end of the anti-pad 200 area, and the two return holes 600 at the upper end are arranged symmetrically with the return holes 600 at the lower end.

[0057] In some embodiments of the present application, multiple groups of leads 500 are also included, each group of leads 500 includes two signal lines 510, one end of the signal line 510 is electrically connected to the pad 400 on the signal hole 300, and the other end of the signal line 510 is electrically connected to the connector (not shown in the figure), and the two signal lines 510 have a first bending section 520 and a second bending section 530, and the first bending section 520 and the second bending section 530 are arc-shaped.

[0058] For example, Figure 3 and Figure 4 As shown, one end of the signal line 510 is connected to the pad 400 on the signal hole 300, and the signal line 510 leads out the anti-pad 200 to project on the area of ​​the first surface of the substrate 100 to form a first bending section 520. It should be noted that in order to improve the integrity and stability of the signal, reduce mutual interference between signals, ensure the quality and timing of the signal during transmission, and facilitate the layout of the signal line 510, the two signal lines 510 are led out of the anti-pad 200 to project on the area of ​​the first surface 110 of the substrate 100 and then arranged parallel to each other. The second bending section 530 is the bend formed by the signal line 510 for the substrate 100 to avoid the influence of the glass fiber effect on signal transmission. It should be noted that the corners of the first bending section 520 and the second bending section 530 are rounded to improve the reliability and stability of the PCB.

[0059] It should be noted that the substrate 100 includes glass fiber and resin, and the glass fiber is the main reinforcing material of the substrate 100, providing strength and rigidity. The resin is used as an adhesive to stick the glass fibers together to fill the gaps between the glass fiber bundles. Due to the inconsistency of the dielectric constants of the glass fiber and the resin, the signal generates common mode noise during transmission, resulting in a glass fiber effect. Through data simulation, two return holes 600 are set to meet the far-end and near-end anti-crosstalk requirements of high-speed signals. In the embodiment of the present application, in order to achieve the normal wiring of the second bending section 530 of the signal line 510, only the three return holes 600 at the lower end of the anti-pad 200 area are retained while ensuring anti-crosstalk, and the area of ​​the anti-pad 200 area is increased to further optimize the impedance of the signal hole 300.

[0060] In some embodiments of the present application, Figure 3 and Figure 4As shown, the signal line 510 includes a plurality of straight line segments 511 and a folded line segment 512, and the straight line segments 511 and the folded line segments 512 are connected in an arc shape. The signal line 510 leads out of the anti-pad 200 and forms a first angle 540 with the straight line segment 511 in the area projected on the first surface 110 of the substrate 100, and the folded line segment 512 forms a second angle 550 with the extension line of the straight line segment 511, and the second angle 550 is between 10° and 45°.

[0061] Please continue reading Figure 4 , the first angle 540 formed by the area where the signal line 510 leads out the anti-pad 200 and is projected on the first surface of the substrate 100 and the straight line segment 511 can be any angle, such as 45° or 90°. The embodiment of the present application specifically takes 90° as an example, that is, the angle formed by the projection area of ​​the anti-pad 200 led out by the signal line 510 and the positive direction of the Y-axis is 90°. The second angle formed by the broken line segment 512 of the signal line 510 and the extension line of the straight line segment 511 can be any angle between 10° and 45°, such as 15° or 20°. The embodiment of the present application specifically takes 10° as an example, that is, the angle formed by the broken line segment 512 of the signal line 510 and the positive direction of the X-axis is 10°. It should be noted that the degrees of the first angle 540 and the second angle 550 need to be adjusted according to actual applications. Bending the signal line 510 to form the second angle 550 can reduce the impact of the glass fiber effect caused by the uneven dielectric constants of the glass fiber and resin of the substrate 100 on high-speed signal transmission, thereby improving the integrity and stability of the signal.

[0062] In some embodiments of the present application, each anti-pad 200 area includes two groups of oblique edges 210 and side edges 220, and the extension lines of the oblique edges 210 and the side edges 220 form a third angle 250. The third angles 250 of two adjacent anti-pad 200 areas form a cut-angle area 240, and a partial area of ​​the second bending section 530 is located within the cut-angle area 240.

[0063] For example, Figure 2 and Figure 3 As shown, in order to avoid the influence of glass fiber effect on high-speed signal transmission, the signal line 510 is bent to form a plurality of second bending sections 530, and the second bending section 530 is located between two adjacent anti-pads 200. The two groups of hypotenuses 210 in the anti-pad 200 area are hollowed out to form a cut-angle area 240, so that the second bending section 530 of the signal line 510 is kept at a distance from the anti-pad 200 to ensure the correct transmission of high-speed signals. The third angle 250 formed by each group of hypotenuses 210 and the extension line of the side 220 can be any angle, such as 30° or 40°. The embodiment of the present application specifically takes 45° as an example, that is, the angle formed by the hypotenuse 210 and the positive direction along the Y axis is 45°. It should be noted that the angle of the third angle 250 needs to be adjusted according to the actual application.

[0064] In some embodiments of the present application, each anti-pad 200 region further has a plurality of arc edges 230, and each arc edge 230 is spaced apart from the reflow hole 600. It should be noted that the present application embodiment specifically takes three arc edges 230 as an example. Figure 2 As shown, the number of arc edges 230 is determined by the number of reflow holes 600. When the number of reflow holes 600 is two, the number of arc edges 230 of the anti-pad 200 is correspondingly two.

[0065] Please continue reading Figure 1 and Figure 2 A grounding hole 700 penetrating the substrate 100 is also provided on one side outside each anti-pad 200 area, and the grounding hole 700 is tangent to or separated from the side edge 220 of the anti-pad 200 area. It should be noted that the grounding hole 700 is a grounding hole that ensures circuit stability and safety.

[0066] Among them, the terms "upper" and "lower" are used to describe the relative position relationship of each structure in the accompanying drawings, which is only for the convenience of description and is not used to limit the scope of implementation of the present application. Changes or adjustments to their relative relationships should also be regarded as the scope of implementation of the present application without substantially changing the technical content.

[0067] It should be noted that: in this application, unless otherwise clearly specified and limited, the first feature being "above" or "below" the second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, the first feature being "above", "above" and "above" the second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. The first feature being "below", "below" and "below" the second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0068] In addition, in this application, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral one; it can be directly connected, or indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0069] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present disclosure. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0070] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A circuit board, characterized in that: include: A substrate and a plurality of anti-pads, wherein the substrate has a first surface and a second surface, and one surface of the substrate is provided with a plurality of anti-pad areas spaced apart from each other; Two signal holes penetrating the substrate are formed on each of the anti-pad regions, and each of the signal holes is provided with a pad on the other side of the substrate, and the pad is used to be electrically connected to a lead wire provided on the substrate; A reflow hole penetrating through the first surface and the second surface of the substrate is opened outside each anti-pad area.

2. The circuit board according to claim 1, characterized in that: The size of each anti-pad area along the first direction is a first size, and the size along the second direction is a second size; The first direction is the length direction of the anti-pad area, and the second direction is the width direction of the anti-pad area; The first direction is perpendicular to the second direction.

3. The circuit board according to claim 1, characterized in that: The return holes are arranged around the signal hole, and the number of the return holes is at most five.

4. The circuit board according to claim 3, characterized in that: The number of the reflow holes is five, three reflow holes are arranged at intervals at the lower end of the anti-pad area, and two reflow holes are arranged at the upper end of the anti-pad area; The reflow hole at the upper end of the anti-pad area is symmetrical to the reflow holes at both ends of the three reflow holes at the lower end of the anti-pad area.

5. The circuit board according to claim 4, characterized in that: It also includes a plurality of groups of leads, each group of the leads includes two signal lines, one end of the signal line is electrically connected to the pad on the signal hole, and the other end of the signal line is electrically connected to the connector; The two signal lines have a first bending section and a second bending section, and the first bending section and the second bending section are arc-shaped.

6. The circuit board according to claim 5, characterized in that: The first bending section is a bend formed by the signal line being electrically connected to the pad and leading out of the anti-pad projection area; The second bending section is a bend formed by the signal line relative to the substrate to avoid the influence of glass fiber effect on the signal.

7. The circuit board according to claim 6, characterized in that: The signal line includes a plurality of straight line segments and broken line segments, and the straight line segments are connected to the broken line segments in an arc shape; The signal line leads out of the anti-pad projection area and forms a first angle with the straight line segment; The folded line segment and the extension line of the straight line segment form a second angle, and the second angle is between 10° and 45°.

8. The circuit board according to claim 7, characterized in that: Each of the anti-pad regions has a hypotenuse and a side edge, the hypotenuse and the extended line of the side edge form a third angle, the third angles of two adjacent anti-pad regions form a cut-angle region, and a partial region of the second bending section of the signal line is located in the cut-angle region.

9. The circuit board according to claim 8, characterized in that: Each of the anti-pad regions also has a plurality of arc edges, and each of the arc edges is spaced apart from the reflow hole.

10. The circuit board according to claim 9, characterized in that: A grounding hole penetrating through the substrate is also provided on one side outside each anti-pad region; The grounding hole is tangent to or separated from a side edge of the anti-pad area.

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